Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a substrate, a binding part and a leveling layer, the binding part and the leveling layer are arranged on the substrate, the binding part is located in a non-display area, the binding part comprises a plurality of binding terminals arranged at intervals, the leveling layer comprises a retaining wall located in the non-display area, the retaining wall is of a closed-loop structure with an enclosed area, and the retaining wall is located in the non-display area. At least one binding terminal is arranged in the enclosed area; according to the invention, the retaining wall is arranged on the substrate, and the at least one binding terminal is arranged in the enclosed area formed by the retaining wall, so that the arrangement of the retaining wall can reduce a medium for corroding a metal material in a subsequent process, and improves the technical problem that the side surface of the binding terminal is etched. The technical problem that the binding terminal is separated from the corresponding binding device is avoided.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) is a new type of current-type semiconductor light-emitting device that displays light by controlling the carriers of the device and stimulating organic materials.

[0003] In current OLED display panels, the binding terminals are usually formed by a multi-layer metal stack, and the upper metal in the binding terminals is easily affected by subsequent processes, causing the upper metal to have side etching problems. When the side etching exceeds a certain threshold, it leads to technical problems such as separation of the device bound to the binding terminal. Summary of the Invention

[0004] The present application provides a display panel and a display device to solve the technical problem of separation of components bound to binding terminals in existing OLED display panels.

[0005] To solve the above problem, the technical solution provided by this application is as follows:

[0006] The present application provides a display panel comprising a display area and a non-display area located at least on one side of the display area; wherein the display panel comprises:

[0007] substrate;

[0008] a binding portion, provided on one side of the base substrate and located in the non-display area, the binding portion comprising a plurality of binding terminals arranged at intervals;

[0009] a leveling layer, disposed on the same side of the base substrate as the binding portion;

[0010] The leveling layer includes at least one retaining wall located in the non-display area, the retaining wall is a closed-loop structure having an enclosed area, and at least one binding terminal is provided in the enclosed area.

[0011] Optionally, the retaining wall is arranged along the periphery of the binding portion.

[0012] Optionally, the leveling layer includes a plurality of retaining walls, and one retaining wall is arranged at the periphery of one of the binding terminals.

[0013] Optionally, the display panel includes:

[0014] A first source-drain electrode layer is provided on one side of the base substrate, wherein the first source-drain electrode layer includes a first conductive portion of the binding terminal;

[0015] a second source-drain layer, provided on a side of the first source-drain layer away from the base substrate, the second source-drain layer comprising a second conductive portion of the binding terminal, the first conductive portion and the second conductive portion being electrically connected;

[0016] Wherein, the average thickness of the retaining wall is greater than or equal to half of the thickness of the first conductive part or the second conductive part.

[0017] Optionally, the leveling layer includes:

[0018] a first planarization layer, provided between the first source-drain electrode layer and the second source-drain electrode layer;

[0019] a second planarization layer, provided on a side of the second source / drain electrode layer away from the base substrate;

[0020] Wherein, the second flat layer includes the retaining wall.

[0021] Optionally, the leveling layer includes:

[0022] a first planarization layer, provided between the first source-drain electrode layer and the second source-drain electrode layer;

[0023] a second planarization layer, provided on a side of the second source / drain electrode layer away from the base substrate;

[0024] a third flat layer, provided on a surface of the second flat layer away from the base substrate;

[0025] Wherein, the second flat layer includes the retaining wall.

[0026] Optionally, the average thickness of the retaining wall is smaller than the average thickness of the second flat layer in the display area.

[0027] Optionally, the retaining wall includes a first sub-wall and a second sub-wall that are adjacent to each other, and the average thickness of the first sub-wall is smaller than the average thickness of the second sub-wall.

[0028] Optionally, the first sub-wall includes a first sub-portion and a second sub-portion arranged along the thickness direction of the display panel, and a surface of the first sub-portion away from the base substrate contacts a surface of the second sub-portion close to the base substrate.

[0029] Optionally, the first sub-wall has a concave surface facing the base substrate, and the second sub-wall has a convex surface away from the base substrate.

[0030] Optionally, in the arrangement direction of the plurality of binding terminals, the thickness of the retaining wall in the middle region is greater than the thickness of the retaining wall in the edge region.

[0031] Optionally, the width of the retaining wall is less than or equal to half of the distance between two adjacent binding terminals in the arrangement direction of the plurality of binding terminals.

[0032] Optionally, the distance between the retaining wall and adjacent binding terminals is less than or equal to half of the distance between two adjacent binding terminals in the arrangement direction of the plurality of binding terminals, and is greater than or equal to 0.5 micrometers.

[0033] The present application also proposes a display device, which includes the above-mentioned display panel.

[0034] The present application sets a retaining wall on the base substrate, and at least one binding terminal is set in the enclosed area formed by the retaining wall. The setting of the retaining wall can reduce the etching of the binding terminal by the medium that corrodes the metal material in the subsequent process, improve the technical problem of etching on the side of the binding terminal, and avoid the technical problem of separation of the binding terminal and the corresponding binding device.

[0035] Other features and advantages of the present application will be described in detail in the subsequent detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] To more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present application. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.

[0037] In order to more completely understand the present application and its beneficial effects, the following description will be given in conjunction with the accompanying drawings, wherein the same drawing numbers represent the same parts in the following description.

[0038] Figure 1 A simplified structural diagram of the display panel of this application;

[0039] Figure 2 This is a first film layer diagram of the display panel of this application;

[0040] Figure 3 This is a second film layer diagram of the display panel of this application;

[0041] Figure 4 This is a third film layer diagram of the display panel of this application;

[0042] Figure 5 This is the first structure of the binding portion in the display panel of this application;

[0043] Figure 6 This is the second structure of the binding portion in the display panel of this application;

[0044] Figure 7 This is the third structure of the binding portion in the display panel of this application;

[0045] Figure 8 This is the fourth structure of the binding portion in the display panel of this application;

[0046] Figure 9 for Figure 8 The first type of cross-section of the middle section MM;

[0047] Figure 10 for Figure 8 The second cross-sectional view of the middle section MM;

[0048] Figure 11 This is a structural diagram of the mask in the display panel of this application;

[0049] Figure 12 A top view of a retaining wall in a display panel of the present application;

[0050] Figure 13 for Figure 12 Cross-sectional view of the middle section NN. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0052] See also Figures 1 to 13 The present application proposes a display panel 100, which includes a display area AA and a non-display area NA located on at least one side of the display area AA, and the display panel 100 includes a base substrate 110 and a binding portion 200 and a leveling layer PLN arranged on one side of the base substrate 110.

[0053] In this embodiment, the binding portion 200 is located in the non-display area NA, and the binding portion 200 includes a plurality of binding terminals 200 a arranged at intervals.

[0054] In this embodiment, the leveling layer PLN includes a retaining wall Dm located in the non-display area NA. The retaining wall Dm is a closed-loop structure having an enclosed area 200b, and at least one binding terminal 200a is provided in the enclosed area 200b.

[0055] In the current OLED display panel 100, the binding terminal 200a is usually formed by a multi-layer metal stack, and the upper metal in the binding terminal 200a is easily affected by subsequent processes, causing the upper metal to have a side etching problem. When the side etching exceeds a certain threshold, it causes a technical problem of separation of the device bound to the binding terminal 200a. The present application sets a retaining wall Dm on the base substrate 110, and at least one binding terminal 200a is set in the enclosed area 200b formed by the retaining wall Dm. The setting of the retaining wall Dm can reduce the etching of the binding terminal 200a by media such as the developer or etching solution in the subsequent process, such as the etching solution or developer in the patterning process of the anode layer 401 and the patterning process of the pixel layer 30, thereby improving the technical problem of etching on the side of the binding terminal 200a and avoiding the technical problem of separation of the binding terminal 200a from the corresponding binding device.

[0056] The technical solution of this application is now described in conjunction with specific embodiments.

[0057] See also Figure 1 The display panel 100 includes a display area AA and a non-display area NA adjacent to the display area AA. Optionally, the non-display area NA surrounds the display area AA, enclosing the display area AA. The display area AA is the area within the display panel 100 used for display functions, and contains a plurality of sub-pixels PX that implement these functions. The non-display area NA may be a border area of ​​the display panel 100, and may contain functional components that assist the sub-pixels PX within the display area AA in performing display functions.

[0058] See also Figure 1 A binding portion 200 may be provided on one side of the display area AA. The binding portion 200 may be connected to an external circuit or a driver chip. The binding portion 200 transmits signals input from the external circuit to data traces, thereby driving the display panel 100 to display an image. For example, the binding terminal Dm may be bonded to a chip or a chip-on-film to provide power and drive signals to the display panel 100.

[0059] See also Figure 2 and Figure 3 The display panel 100 may include a base substrate 110 , an array layer 20 disposed on the base substrate 110 , a pixel layer 30 disposed on the array layer 20 , a light emitting functional layer 40 and an encapsulation layer 50 .

[0060] In this embodiment, the base substrate 110 supports various layers provided on the base substrate 110. When the display panel 100 is a bottom-emitting light-emitting display device or a double-sided light-emitting display device, a transparent base substrate is used. When the display panel 100 is a top-emitting light-emitting display device, a semi-transparent or opaque base substrate as well as a transparent base substrate can be used.

[0061] In this embodiment, the base substrate 110 is used to support the various film layers provided thereon. The base substrate 110 may be made of an insulating material such as glass, quartz, or a polymer resin. The base substrate 110 may be a rigid substrate or a flexible substrate that can be bent, folded, or rolled. Examples of flexible materials for the flexible substrate include, but are not limited to, polyimide (PI).

[0062] For example, in this embodiment, the base substrate 110 may include a first flexible substrate 111, a first barrier layer 112, a second flexible substrate 113, and a second barrier layer 114 that are stacked. The first flexible substrate 111 and the second flexible substrate 113 may be formed of the same material, such as polyimide, and the first barrier layer 112 and the second barrier layer 114 may be formed of an inorganic material, such as at least one of SiOx and SiNx.

[0063] See also Figures 2 to 4 The array layer 20 may include a plurality of thin film transistors. The thin film transistors may be of an etch barrier type or a back channel etch type, or may be classified into a bottom gate thin film transistor, a top gate thin film transistor, etc. according to the position of the gate electrode and the active layer, or may be classified into an N-type thin film transistor or a P-type thin film transistor according to the performance of the thin film transistor. Figure 2 and Figure 3 The thin film transistor in the figure does not represent the structure of any transistor, but is only a schematic diagram of each film layer of the display panel 100 of the present application.

[0064] See also Figure 2 The thin film transistor shown in the figure can be a top-gate thin film transistor, and the array layer 20 may include an active layer 201 arranged on the base substrate 110, a first gate insulating layer 202 arranged on the active layer 201, a first gate layer GE1 arranged on the first gate insulating layer 202, a second gate insulating layer 203 arranged on the first gate layer GE1, a second gate layer GE2 arranged on the second gate insulating layer 203, an inter-insulating layer 204 arranged on the second gate layer GE2, a first source-drain layer SD1 arranged on the inter-insulating layer 204, a first planarizing layer 206 arranged on the first source-drain layer SD1, a second source-drain layer SD2 arranged on the first planarizing layer 206, a second planarizing layer 207 arranged on the second source-drain layer SD2, and a third planarizing layer 208 arranged on the second planarizing layer 207.

[0065] See also Figure 3The thin film transistor shown in the figure may be a top-gate thin film transistor, and the array layer 20 may include an active layer 201 arranged on the base substrate 110, a first gate insulating layer 202 arranged on the active layer 201, a first gate layer GE1 arranged on the first gate insulating layer 202, a second gate insulating layer 203 arranged on the first gate layer GE1, a second gate layer GE2 arranged on the second gate insulating layer 203, an inter-insulating layer 204 arranged on the second gate layer GE2, a first source-drain layer SD1 arranged on the inter-insulating layer 204, a first planarizing layer 206 arranged on the first source-drain layer SD1, a second source-drain layer SD2 arranged on the first planarizing layer 206, a second planarizing layer 207 arranged on the second source-drain layer SD2, a third source-drain layer SD3 arranged on the second planarizing layer 207, and a third planarizing layer 208 arranged on the third source-drain layer.

[0066] See also Figure 4 The thin film transistor shown in the figure can be a top-gate thin film transistor, and the array layer 20 may include an active layer 201 arranged on the base substrate 110, a first gate insulating layer 202 arranged on the active layer 201, a first gate layer GE1 arranged on the first gate insulating layer 202, a second gate insulating layer 203 arranged on the first gate layer GE1, a second gate layer GE2 arranged on the second gate insulating layer 203, an inter-insulating layer 204 arranged on the second gate layer GE2, a first source-drain layer SD1 arranged on the inter-insulating layer 204, a first planarizing layer 206 arranged on the first source-drain layer SD1, a second source-drain layer SD2 arranged on the first planarizing layer 206, and a second planarizing layer 207 arranged on the second source-drain layer SD2.

[0067] It should be noted that the number of source and drain layers can be set according to the requirements of wiring space, for example, Figure 2 and Figure 4 The source and drain layers can be two layers. Figure 3 The source and drain layers can be three layers; at the same time, the number of gate layers is set according to the requirements of wiring space and capacitance. For example, the gate layer of this application can be two layers.

[0068] In this embodiment, the materials of the gate layer and the source-drain layer may include metals such as Cr, W, Ti, Ta, Mo, Al, Cu, or a single-layer or multi-layer metal structure composed of at least two of the above metals; for example, the materials of the gate layer and the source-drain layer may be Mo, Mo / Al, Mo / Cu, MoTi / Cu, MoTi / Cu / MoTi, Ti / Al / Ti, Ti / Cu / Ti, Mo / Cu / IZO, IZO / Cu / IZO, Mo / Cu / ITO, etc.

[0069] It should be noted that the material of the source and drain layer of the present application can be Ti / Al / T. Since the etching rate of aluminum in the intermediate layer is greater than the etching rate of titanium metal, under the action of the same etching solution, a structure in which the side of the aluminum metal is retracted relative to the side of the titanium metal will appear. In the subsequent binding process, due to the retraction of the aluminum metal, a technical problem of separation of the binding terminal Dm from the corresponding binding device will arise.

[0070] It should be noted that the first gate insulating layer 202, the second gate insulating layer 203, and the inter-insulating layer 204 are all inorganic materials composed of elements such as nitrogen, silicon, oxygen, and aluminum, such as single-layer or multi-layer stacked inorganic film layers composed of one of silicon nitride, silicon oxide, and aluminum oxide.

[0071] It should be noted that the material of the flat layer of the present application can be composed of organic materials, and the setting of the flat layer of the present application is to ensure the flatness of the film layer. The number of flat layers is set according to the flatness requirement. For example, Figure 2 and Figure 3 The flat layer in can be three layers, Figure 4 The flat layer in can be 2 layers.

[0072] It should be noted that Figure 2 and Figure 3 The three flat layers in Figure 4 The two flat layers in the leveling layer PLN of the present application can be, and the material of the retaining wall Dm of the present application can be composed of the material of at least one layer of the leveling layer PLN.

[0073] See also Figures 2 to 4 The pixel layer 30 may include a first pixel definition layer 310 and a second pixel definition layer 320. The first pixel definition layer 310 is arranged on the side of the leveling layer PLN away from the base substrate 110, and the second pixel definition layer 320 is arranged on the surface of the first pixel definition layer 310 away from the base substrate 110.

[0074] It should be noted that since the light-emitting layer 402 of the present application is prepared using an inkjet printing process, in order to reduce the accuracy of inkjet printing, the first pixel definition layer 310 of the present application may include a plurality of first pixel dams 311 that are staggered horizontally and vertically, and the first pixel dams 311 that are staggered horizontally and vertically enclose a plurality of pixel openings corresponding to sub-pixels. The second pixel definition layer 320 includes a plurality of second pixel dams 321 in the horizontal or vertical direction, and the plurality of sub-pixels between two adjacent second pixel dams 321 have the same color, so that in the inkjet printing process, the plurality of sub-pixels between two adjacent second pixel dams 321 can be printed simultaneously along the direction of the second pixel dam 321, thereby reducing the accuracy of inkjet printing and improving the process efficiency.

[0075] In this embodiment, since the second pixel dam 321 mainly serves to isolate sub-pixels of different colors, the thickness of the second pixel dam 321 of the present application may be greater than the thickness of the first pixel dam 311 .

[0076] It should be noted that the light-emitting layer 402 of the present application may also be prepared by an evaporation process, and in this case the pixel layer 30 may only include one pixel definition layer.

[0077] See also Figures 2 to 4 The light-emitting functional layer 40 may include an anode layer 401 disposed on the third planar layer 208, a light-emitting layer 402 disposed on the anode layer 401, and a cathode layer 403 disposed on the light-emitting layer 402. The anode layer 401 includes a plurality of anodes corresponding one-to-one to the pixel openings, and the light-emitting layer 402 may include a plurality of light-emitting pixels corresponding one-to-one to the plurality of anodes.

[0078] See also Figures 2 to 4 The encapsulation layer 50 covers the pixel layer 30 and continuously covers multiple pixel openings and multiple light-emitting pixels; the encapsulation layer 50 includes a first inorganic encapsulation layer 501, an organic encapsulation layer 502, and a second inorganic encapsulation layer 503 which are stacked in sequence.

[0079] In this embodiment, the display panel may further include a color filter layer (not shown) arranged on the encapsulation layer 50 and a cover layer (not shown) arranged on the color filter layer. The color filter layer includes multiple color resists and shading units arranged on both sides of the color resists, and one color resist corresponds to one luminous pixel; the cover layer is arranged on the side of the color filter layer away from the base substrate 110. The cover layer can be a glass cover or be formed directly on the color filter layer.

[0080] It should be noted that Figures 2 to 4 The film layer structures in the figure are only two embodiments of the present application. For example, the gate layer can also be a single layer or three layers, and the source and drain layer can be a single layer.

[0081] The technical solution of this application is described below based on specific embodiments.

[0082] See also Figures 5 to 7 The binding portion 200 may include a plurality of binding terminals 200a arranged at intervals, and the plurality of binding terminals 200a may be arranged along a first direction X and a second direction Y; for example, Figure 4 The binding portion 200 may include two rows of a plurality of binding terminals 200 a arranged along the first direction X.

[0083] In this embodiment, the second direction Y may be the direction from the display area AA to the binding portion 200 , and the first direction X may be the arrangement direction of the plurality of binding terminals 200 a . For example, the first direction X and the second direction Y may be perpendicular.

[0084] See also Figure 5 The retaining wall Dm is arranged along the periphery of the binding portion 200, and the retaining wall Dm is a closed loop structure, that is, the retaining wall Dm is arranged around the periphery of the binding portion 200.

[0085] exist Figure 5 In the structure, the leveling layer may only include a retaining wall with a closed-loop structure, and the enclosed area formed by the retaining wall surrounds all the binding terminals to improve the technical problem of etching on the side of the binding terminal 200a.

[0086] Taking the developer and etching solution as an example, since the developer comes before the etching solution, and the etching rate of the developer on metal aluminum is much lower than that of the etching solution on metal, the developer will first fill the enclosed area 200b during the development stage. Since the retaining wall Dm is a closed-loop structure with an enclosed area, the developer will not be removed. When the etching solution comes, since the developer fills the enclosed area 200b, the etching solution cannot etch the binding terminal 200a, which greatly reduces the depth of the side engraving of the binding terminal 200a, improves the morphology of the edge of the binding terminal 200a, and avoids the technical problem of separation of the binding terminal 200a from the corresponding binding device.

[0087] See also Figure 6 The leveling layer includes multiple retaining walls, one retaining wall is arranged at the periphery of a binding terminal, that is, the enclosed area of ​​the retaining wall of the present application only surrounds one binding terminal, and the multiple retaining walls form a mesh structure that is staggered horizontally and vertically.

[0088] See also Figure 7 , Figure 7 and Figure 6 The same or similar, except that: one binding terminal 200a may be provided in the partially enclosed area 200b, two binding terminals 200a may be provided in the partially enclosed area 200b, and four binding terminals 200a may be provided in the partially enclosed area 200b.

[0089] and Figure 5 Compared with the structure of Figure 6 and Figure 7 In the structure, the present application achieves directional protection of the binding terminal 200a by reducing the area of ​​the enclosed area 200b, and the developer can more easily fill the enclosed area 200b during the development stage. Since the retaining wall Dm is a closed-loop structure with an enclosed area, the developer will not be removed. When the etching liquid is fed, the protective effect of the developer prevents the etching liquid from etching the binding terminal 200a, greatly reducing the depth of the side engraving of the binding terminal 200a, improving the morphology of the edge of the binding terminal 200a, and avoiding the technical problem of separation of the binding terminal 200a and the corresponding binding device.

[0090] See also Figure 8The leveling layer includes a plurality of retaining walls, a retaining wall is arranged at the periphery of a binding terminal; Figure 6 Compared with the structure of the present invention, two adjacent retaining walls can be set at intervals, and Figure 6 Two adjacent binding terminals can share a side wall of the retaining wall.

[0091] In this embodiment, since the organic material is subject to resistance during the flow process, the thickness of the organic material located in the central area of ​​the display panel 100 will be greater than the thickness of the organic material located in the edge area. Therefore, in the arrangement direction of the multiple binding terminals 200a, that is, in the first direction X, the thickness of the retaining wall Dm in the middle area is greater than the thickness of the retaining wall Dm in the edge area.

[0092] In this embodiment, the width of the retaining wall Dm is less than or equal to half of the distance between two adjacent binding terminals 200 a in the arrangement direction of the plurality of binding terminals 200 a.

[0093] In this embodiment, since the display panel 100 includes a first gate layer GE1, a second gate layer GE2, a first source-drain layer SD1, a second source-drain layer SD2, and a third source-drain layer SD3, the binding terminal 200a of the present application can be composed of at least two layers of the first gate layer GE1, the second gate layer GE2, the first source-drain layer SD1, the second source-drain layer SD2, and the third source-drain layer SD3.

[0094] For example, see Figure 9 The binding terminal 200a may include a first conductive part CT1, a second conductive part CT2 and a third conductive part CT3 connected to each other, the first source and drain layer SD1 includes the first conductive part CT1 of the binding terminal 200a, the second source and drain layer SD2 includes the second conductive part CT2 of the binding terminal 200a, and the second gate layer GE2 or the first gate layer GE1 may include the third conductive part CT3 of the binding terminal 200a.

[0095] For example, see Figure 10 The binding terminal 200a may include a first conductive part CT1, a second conductive part CT2, a third conductive part CT3 and a fourth conductive part CT4 connected to each other, the first source and drain layer SD1 includes the first conductive part CT1 of the binding terminal 200a, the second source and drain layer SD2 includes the second conductive part CT2 of the binding terminal 200a, the third source and drain layer SD3 includes the fourth conductive part CT4 of the binding terminal 200a, and the second gate layer GE2 or the first gate layer GE1 may include the third conductive part CT3 of the binding terminal 200a.

[0096] exist Figure 9In the structure, since the second conductive portion CT2 is located on the top of the binding terminal 200a, the second conductive portion CT2 is susceptible to side etching by the side etching liquid or the developer in the patterning process of the anode layer 401 and the patterning process of the pixel layer 30; at the same time, if the retaining wall Dm is formed in the patterning process of the third flat layer 208, the developer in the patterning process of the second flat layer 207 will side-etch the second conductive portion CT2, while if the retaining wall Dm is formed in the patterning process of the second flat layer 207, the developer in the patterning process of the second flat layer 207 will not side-etch the second conductive portion CT2, that is, it is equivalent to using the second flat layer 207 to prepare the retaining wall Dm, and the second conductive portion CT2 will have one less side etching, thereby reducing the shrinkage of the aluminum metal in the second conductive portion CT2.

[0097] exist Figure 10 In the structure, since the fourth conductive portion CT4 is located on the top of the binding terminal 200a, the fourth conductive portion CT4 is easily etched by the side etching liquid or developer in the patterning process of the anode layer 401 and the patterning process of the pixel layer 30; at the same time, Figure 10 Only the third planar layer 208 is provided on the third source / drain layer SD3. Figure 10 The barrier walls Dm in the third planar layer 208 may be formed during the patterning process of the third planar layer 208 .

[0098] It should be noted that since the binding terminal 200a is used to bind to the binding device, in order to ensure the binding effect, the thickness of the retaining wall around the binding terminal 200a cannot be too large; at the same time, in order to prevent the etching solution or the developing solution from flowing into the area where the binding part 200 is located, the thickness of the retaining wall around the binding terminal 200a cannot be too small; for example, the average thickness of the retaining wall Dm in the non-display area NA of the present application is greater than or equal to half of the thickness of the first conductive part CT1 or the second conductive part CT2.

[0099] It should be noted that Figure 9 Taking the structure as an example, since the retaining wall Dm is made of the material of the second planar layer 207, and since the organic material is subject to resistance during the flow process, the thickness of the organic material located in the central area of ​​the display panel 100 will be greater than the thickness of the organic material located in the edge area; therefore, the average thickness of the retaining wall Dm is less than the average thickness of the second planar layer 207 in the display area AA.

[0100] In this embodiment, the distance L between the retaining wall Dm and adjacent binding terminals 200 a is less than or equal to half the distance between two adjacent binding terminals 200 a in the arrangement direction of the plurality of binding terminals 200 a and greater than or equal to 0.5 μm.

[0101] In this embodiment, the retaining wall Dm is mainly used to store the developer during the development stage. During the etching stage, the developer fills the enclosed area 200b of the retaining wall Dm, and the etching liquid cannot etch the binding terminal 2000a, that is, the retaining wall Dm reduces the replacement rate of the etching liquid and the developer, and reduces the depth of the side engraving of the binding terminal 2000a; and if the distance between the retaining wall Dm and the adjacent binding terminal 200a is small, there is too little developer in the enclosed area 200b, and the etching liquid and the developer are mixed, resulting in the etching ability of the mixed liquid being close to the etching ability of the etching liquid, and the depth of the side engraving of the binding terminal 2000a being close to that of the prior art; therefore, the present application can make the distance L between the retaining wall Dm and the adjacent binding terminal 200a greater than or equal to 0.5 microns to ensure that there is sufficient developer in the enclosed area 200b, so as to avoid the etching liquid and the developer from mixing, and the side engraving depth of the binding terminal 200a reaches the design requirements of the present application.

[0102] At the same time, since a retaining wall Dm may be provided between two adjacent binding terminals 200a, the distance L between the retaining wall Dm and the adjacent binding terminals 200a is less than or equal to half of the distance between the two adjacent binding terminals 200a in the arrangement direction of the plurality of binding terminals 200a.

[0103] In this embodiment, the distance between the retaining wall Dm and the adjacent binding terminal 200 a may be 3.0 microns, 3.5 microns, 4.0 microns, 4.5 microns, 5.0 microns, or intermediate values ​​thereof.

[0104] In this embodiment, since the thickness of the retaining wall Dm needs to be smaller than the thickness of the second planar layer 207 in the display area AA, the present application can use a half-tone mask 300 to prepare the retaining wall Dm.

[0105] For example, see Figure 11 The mask plate 300 includes a first transmittance area 301, a second transmittance area 302 and a third transmittance area 303. The first transmittance area 301 is located in the central area, the second transmittance area 302 and the third transmittance area 303 are located on the periphery of the first transmittance area 301, and the second transmittance area 302 and the third transmittance area 303 are alternately arranged along the periphery of the first transmittance area 301.

[0106] by Figure 9Taking the structure in as an example, the second flat layer 207 is a positive photoresist material, the first transmittance area 301 corresponds to the binding terminal 200a, and the transmittance of the first transmittance area 301 is 100%, the transmittance of the second transmittance area 302 is 40%, and the transmittance of the third transmittance area 303 is 0. Then, the second flat layer 207 corresponding to the first transmittance area 301 will be completely removed, the second flat layer 207 corresponding to the second transmittance area 302 will retain 40%, and the second flat layer 207 corresponding to the third transmittance area 303 will be completely retained.

[0107] It should be noted that the transmittance of the second transmittance zone 302 can be 100%. At the same time, the present application adjusts the total transmittance of the second transmittance zone 302 and the third transmittance zone 303 by adjusting the area ratio between the second transmittance zone 302 and the third transmittance zone 303. For example, if the area of ​​the second transmittance zone 302 is 40% of the sum of the areas of the second transmittance zone 302 and the third transmittance zone 303, then the total transmittance of the second transmittance zone 302 and the third transmittance zone 303 is 40%, which is equivalent to 40% of the organic material in the second transmittance zone 302 and the third transmittance zone 303 being removed.

[0108] At the same time, due to the fluidity of the organic material itself and the thickness difference between the second flat layer 207 corresponding to the third transmittance zone 303 and the second flat layer 207 corresponding to the second transmittance zone 302, the second flat layer 207 corresponding to the third transmittance zone 303 will flow toward the second flat layer 207 corresponding to the second transmittance zone 302.

[0109] In this embodiment, although the organic material has a fluidity characteristic, when the thickness difference of the organic material in two adjacent regions is less than a certain value, the fluidity of the organic material will be weakened, and flat layers of different thicknesses will appear.

[0110] See also Figure 12 The retaining wall Dm includes a first sub-wall Dm1 and a second sub-wall Dm2 that are adjacent to each other. The average thickness of the first sub-wall Dm1 can be smaller than the average thickness of the second sub-wall Dm2; that is, the second sub-wall Dm2 corresponds to the third transmittance zone 303, and the first sub-wall Dm1 corresponds to the second transmittance zone 302. Part of the organic material in the second sub-wall Dm2 will flow to the area where the first sub-wall Dm1 is located.

[0111] In this embodiment, since the organic material in part of the second sub-wall Dm2 will flow toward the area where the first sub-wall Dm1 is located, the organic material in the second sub-wall Dm2 will form an interface with the organic material in the first sub-wall Dm1; that is, the first sub-wall Dm1 includes a first sub-portion Dm1a and a second sub-portion Dm1b arranged along the thickness direction of the display panel 100, and the surface of the first sub-portion Dm1a away from the base substrate 110 is in contact with the surface of the second sub-portion Dm1b close to the base substrate 110, for example Figure 13 The black line between the first sub-portion Dm1a and the second sub-portion Dm1b is the interface between the two.

[0112] In this embodiment, since the organic materials of the second sub-walls Dm2 on both sides of the first sub-wall Dm1 can flow into the area where the first sub-wall Dm1 is located, and the flow of the organic materials generally gradually extends from the edge area to the middle area and converges in the middle area, the thickness of the first sub-wall Dm1 in the central area is smaller, thereby forming a concave surface facing the base substrate 110, for example Figure 13 Similarly, the organic material in the second sub-wall Dm2 flows to the areas where the first sub-walls Dm1 are located on both sides, and the flow order of the organic material in the second sub-wall Dm2 is that the edge areas flow to the first sub-wall Dm1 before the organic material in the middle area. Therefore, the second sub-wall Dm2 is finally formed with a convex surface away from the base substrate 110, for example Figure 13 structure.

[0113] The present application also proposes a display device, which includes the above-mentioned display panel. It should be noted that the display device of the present application can be any product or component with a display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigation system.

[0114] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0115] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0116] The embodiments, implementation methods and related technical features of the present application can be combined and replaced with each other unless there is any conflict.

[0117] The above are merely preferred embodiments of the present application and do not constitute any form of limitation to the present application. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application are still within the scope of the technical solution of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises a display area and a non-display area located on at least one side of the display area; wherein the display panel comprises: substrate; a binding portion, provided on one side of the base substrate and located in the non-display area, the binding portion comprising a plurality of binding terminals arranged at intervals; a leveling layer, disposed on the same side of the base substrate as the binding portion; The leveling layer includes at least one retaining wall located in the non-display area, the retaining wall is a closed-loop structure having an enclosed area, and at least one binding terminal is provided in the enclosed area.

2. The display panel according to claim 1, wherein: The retaining wall is arranged along the periphery of the binding portion.

3. The display panel according to claim 1, wherein: The leveling layer includes a plurality of retaining walls, and one retaining wall is arranged on the periphery of one of the binding terminals.

4. The display panel according to any one of claims 1 to 3, characterized in that: The display panel includes: A first source-drain electrode layer is provided on one side of the base substrate, wherein the first source-drain electrode layer includes a first conductive portion of the binding terminal; a second source-drain layer, provided on a side of the first source-drain layer away from the base substrate, the second source-drain layer comprising a second conductive portion of the binding terminal, the first conductive portion and the second conductive portion being electrically connected; Wherein, the average thickness of the retaining wall is greater than or equal to half of the thickness of the first conductive part or the second conductive part.

5. The display panel according to claim 4, wherein: The leveling layer comprises: a first planarization layer, provided between the first source-drain electrode layer and the second source-drain electrode layer; a second planarization layer, provided on a side of the second source / drain electrode layer away from the base substrate; Wherein, the second flat layer includes the retaining wall.

6. The display panel according to claim 4, wherein: The leveling layer comprises: a first planarization layer, provided between the first source-drain electrode layer and the second source-drain electrode layer; a second planarization layer, provided on a side of the second source / drain electrode layer away from the base substrate; a third flat layer, provided on a surface of the second flat layer away from the base substrate; Wherein, the second flat layer includes the retaining wall.

7. The display panel according to claim 5 or 6, characterized in that: The average thickness of the retaining wall is smaller than the average thickness of the second flat layer in the display area.

8. The display panel according to any one of claims 1 to 3, characterized in that: The retaining wall includes a first sub-wall and a second sub-wall that are adjacent to each other, and the average thickness of the first sub-wall is smaller than the average thickness of the second sub-wall.

9. The display panel according to claim 8, wherein: The first sub-wall includes a first sub-portion and a second sub-portion arranged along the thickness direction of the display panel. The surface of the first sub-portion away from the base substrate contacts the surface of the second sub-portion close to the base substrate.

10. The display panel according to claim 8, wherein The first sub-wall has a concave surface facing the base substrate, and the second sub-wall has a convex surface away from the base substrate.

11. The display panel according to any one of claims 1 to 3, characterized in that: In the arrangement direction of the plurality of binding terminals, the thickness of the retaining wall in the middle region is greater than the thickness of the retaining wall in the edge region.

12. The display panel according to any one of claims 1 to 3, characterized in that: The width of the retaining wall is less than or equal to half of the distance between two adjacent binding terminals in the arrangement direction of the plurality of binding terminals.

13. The display panel according to any one of claims 1 to 3, characterized in that: The distance between the retaining wall and the adjacent binding terminals is less than or equal to half of the distance between two adjacent binding terminals in the arrangement direction of the plurality of binding terminals, and is greater than or equal to 0.5 micrometers.

14. A display device, characterized in that: The display device comprises the display panel according to any one of claims 1 to 13.

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