Display device
By arranging an overhang structure on the frame of the display device, the problem of moisture or oxygen penetration in the prior art is solved, a technical means of preventing external interference is achieved, and an extremely narrow frame of the display device is realized.
Patent Information
- Application Number
- CN202410877142.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-12-29
- Filing Date
- 2024-07-02
- Publication Date
- 2025-09-19
AI Technical Summary
The display panel is easily affected by external moisture or oxygen, causing damage. It is difficult to effectively prevent moisture or oxygen from penetrating with existing technologies.
A planarization layer is provided on the substrate of the display panel, and an outermost embankment and an overhanging structure are constructed thereon. The overhanging structure is connected to the emission layer through the overhanging structure to form a protective layer to prevent moisture or oxygen from penetrating.
This prevents external moisture or oxygen from penetrating, reduces power consumption, and enables the design of a display device with an extremely narrow frame.
Smart Images

Figure CN120676826A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims the benefit of priority from Korean Patent Application No. 102023-0196466 filed on December 29, 2023, in the Korean Intellectual Property Office, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field
[0003] The present disclosure relates to an electronic device having a display, and more particularly to a display device. Background Art
[0004] As information-oriented society develops, various demands for display devices for displaying images are increasing. In recent years, various display devices such as liquid crystal displays (LCDs) and organic light emitting diode (OLED) display devices have been developed and widely used.
[0005] A display device may include a display panel, one or more driving circuits, a controller, and the like. Summary of the Invention
[0006] Elements included in a display panel (e.g., a light-emitting element (ED) including an organic material) are susceptible to external influences such as moisture or oxygen. When moisture or oxygen penetrates the display panel, the display panel may be damaged. Therefore, a display device that can prevent external moisture or oxygen from penetrating the display panel is needed.
[0007] To solve this problem, one or more embodiments of the present disclosure may provide a display device capable of preventing penetration of external moisture or oxygen.
[0008] One or more embodiments of the present disclosure may provide a display device configured to have an extremely narrow bezel.
[0009] One or more embodiments of the present disclosure may provide a display device capable of preventing penetration of external moisture or oxygen, thereby achieving low power consumption.
[0010] According to aspects of the present disclosure, a display device can be provided, which includes a substrate, the substrate including a display area and a dam area surrounding the display area; a planarization layer arranged on the substrate; an outermost embankment arranged on the planarization layer in the dam area; a first overhang structure arranged on the outermost embankment and overlapping with the outermost embankment; a second overhang structure arranged on the first overhang structure and overlapping with the first overhang structure; and an emission layer, the emission layer being arranged on the planarization layer and extending from the display area to the dam area and terminating at the inner side of the first overhang structure facing the display area.
[0011] According to one or more embodiments of the present disclosure, a display device capable of preventing penetration of external moisture or oxygen may be provided.
[0012] According to one or more embodiments of the present disclosure, a display device configured to have an extremely narrow bezel may be provided.
[0013] According to one or more embodiments of the present disclosure, a display device capable of preventing penetration of external moisture or oxygen, thereby achieving low power consumption, may be provided. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this disclosure. The accompanying drawings illustrate various aspects of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:
[0015] Figure 1 shows an exemplary system configuration of a display device according to aspects of the present disclosure;
[0016] Figure 2 An exemplary display panel according to aspects of the present disclosure is shown;
[0017] Figure 3 An exemplary substrate for a display panel according to aspects of the present disclosure is shown;
[0018] Figure 4 is an exemplary cross-sectional view of a display area of a display panel according to aspects of the present disclosure;
[0019] Figure 5 shows an exemplary overhang structure in a display panel according to aspects of the present disclosure;
[0020] Figure 6 、 Figure 7 and Figure 8 shows an exemplary overhang structure in a display panel according to aspects of the present disclosure;
[0021] Figure 9 shows an area of a display panel configured with an overhang structure according to aspects of the present disclosure;
[0022] Figure 10 shows an exemplary cross-sectional view of a display panel having an overhang structure according to aspects of the present disclosure;
[0023] Figure 11 and Figure 12 is an exemplary cross-sectional view of a display panel according to aspects of the present disclosure;
[0024] Figure 13 、 Figure 14 and Figure 15 An exemplary manufacturing process of a display panel according to aspects of the present disclosure is shown; and
[0025] Figure 16 An exemplary process of forming an overhang structure in a display panel according to aspects of the present disclosure is shown. DETAILED DESCRIPTION
[0026] Reference will now be made in detail to the embodiments of the present disclosure, examples of which may be illustrated in the accompanying drawings.
[0027] In the following description, unless otherwise stated, the structures, embodiments, implementations, methods, and operations described herein are not limited to the specific examples or examples described herein and may be modified as known in the art. Unless otherwise stated, similar reference numerals represent similar elements throughout. The names of the corresponding elements used in the following description are selected solely for the convenience of writing the specification and may therefore differ from the names used in actual products. The advantages and features of the present disclosure and its implementation methods will become clear through the exemplary embodiments described below with reference to the accompanying drawings. However, the present disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments described herein. Rather, these exemplary embodiments are provided so that the present disclosure can be sufficiently thorough and complete to help those skilled in the art fully understand the scope of the present disclosure. In addition, the scope of protection of the present disclosure is defined by the claims and their equivalents. In the following description, when a detailed description of a related known function or configuration may unnecessarily obscure various aspects of the present disclosure, such a detailed description of such known function or configuration may be omitted. The shapes, sizes, proportions, angles, quantities, etc. shown in the drawings to describe the various exemplary embodiments of the present disclosure are given by way of example only. Therefore, the present disclosure is not limited to the illustrations in the drawings. When the terms "comprising," "having," "including," "containing," "consisting of," "composed of," "formed of," etc. are used, one or more other elements may be added unless a term such as "only" is used. Elements described in the singular are intended to include plural elements and vice versa unless the context clearly indicates otherwise.
[0028] Although the terms "first," "second," "A," "B," "(a)," or "(b)" and the like may be used herein to describe various elements, these elements should not be construed as limited by these terms, as these terms are not used to define a particular order or priority. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of the present invention.
[0029] When referring to a first element being “connected or coupled to” a second element, “contacting or overlapping” the second element, etc., it should be understood that the first element may not only be “directly connected or coupled to” the second element or “directly contact or overlap” the second element, but also that a third element may be “interposed” between the first and second elements, or that the first and second elements may be “connected or coupled to”, “contacting or overlapping” each other via a fourth element, etc. Here, the second element may be included in at least one of the two or more elements that are “connected or coupled to”, “contacting or overlapping”, etc., each other.
[0030] In the case of describing a positional relationship, for example, when “on…”, “above…”, “below…”, “above…”, “below…”, “next to”, “adjacent to”, etc. are used to describe the positional relationship between two parts, one or more other parts may be located between the two parts, unless more restrictive terms such as “immediately (immediately)”, “directly (directly)” or “closely (closely)” are used. For example, when an element or layer is disposed “on” another element or layer, a third element or layer may be inserted therebetween. In addition, the terms “left”, “right”, “top”, “bottom”, “downward”, “upward”, “upper”, “lower”, etc. refer to an arbitrary reference system.
[0031] In addition, when referring to any external dimensions, relative dimensions, etc., it should be considered that the numerical value or corresponding information (e.g., level, range, etc.) of the element or feature includes tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is explicitly given. In addition, the word "may" comprehensively includes the full meaning of the word "can".
[0032] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
[0033] Figure 1 An exemplary system configuration of the display apparatus 100 according to aspects of the present disclosure is shown.
[0034] refer to Figure 1 In one or more embodiments, the display device 100 may include a display panel 110 and a display driving circuit as components for displaying an image. The display driving circuit may be a circuit for driving the display panel 110 and includes a data driving circuit 120, a gate driving circuit 130, a display controller 140, and other circuit components.
[0035] The display panel 110 may include a substrate 111 and a plurality of sub-pixels SP disposed on the substrate 111 .
[0036] The substrate 111 of the display panel 110 may include a display area DA allowing an image to be displayed and a non-display area NDA located outside the display area DA.
[0037] A plurality of sub-pixels SP for displaying an image may be provided in the display area DA, and the non-display area NDA may include a pad area PA (eg, as shown in FIG. 1 ) located in a first direction relative to the display area DA. Figure 3 shown).
[0038] In the display panel 110 according to an embodiment of the present disclosure, the non-display area NDA may have a very small area compared to the display area DA. Here, the non-display area NDA may also be referred to as a "bezel."
[0039] For example, the non-display area NDA may include a first non-display area located outside the display area DA in a first direction, a second non-display area located outside the display area DA in a second direction intersecting the first direction, a third non-display area located outside the display area DA in a direction opposite to the first direction, and a fourth non-display area located outside the display area DA in a direction opposite to the second direction. One or two of the first to fourth non-display areas may include a pad area to which the data driving circuit 120 is connected or bonded. For example, among the first to fourth non-display areas, each of the remaining two or three non-display areas, excluding the pad area, may have a very small size compared to the one or two non-display areas.
[0040] In one embodiment, the boundary area between the display area DA and the non-display area NDA may be bent, so that the non-display area NDA may be located below the display area DA. In this embodiment, when a user observes the display device 100 from the front, the user may not be able to see all or most of the non-display area NDA.
[0041] Various types of signal lines for driving the plurality of sub-pixels SP may be provided on the substrate 111 of the display panel 110 .
[0042] In one or more embodiments, the display device 100 according to aspects of the present disclosure may be a liquid crystal display device or the like, or may be a self-emissive display device in which light is emitted from the display panel 110 itself. In an example in which the display device 100 according to aspects of the present disclosure is a self-emissive display device, each of the plurality of sub-pixels SP may include a light-emitting element.
[0043] For example, the display device 100 according to various aspects of the present disclosure may be an organic light-emitting display device implemented with an organic light-emitting diode (OLED) as a light-emitting element. In another example, the display device 100 according to various aspects of the present disclosure may be an inorganic light-emitting display device implemented with an inorganic material-based light-emitting diode as a light-emitting element. In yet another example, the display device 100 according to various aspects of the present disclosure may be a quantum dot display device implemented with quantum dots as a light-emitting element, where quantum dots are self-luminous semiconductor crystals.
[0044] The structure of each of the plurality of sub-pixels SP may depend on the type of display device 100. For example, in an example where the display device 100 is a self-emissive display device including self-emissive sub-pixels SP, each sub-pixel SP may include a self-emissive light emitting element, one or more transistors, and one or more capacitors.
[0045] The various types of signal lines may include, for example, a plurality of data lines DL for carrying data signals (which may be referred to as data voltages or image signals), a plurality of gate lines GL for carrying gate signals (which may be referred to as scan signals), and the like.
[0046] In one or more embodiments, a plurality of data lines DL and a plurality of gate lines GL may intersect with each other. Each of the plurality of data lines DL may be arranged along a first direction while extending along the first direction, and each of the plurality of gate lines GL may be arranged along a second direction while extending along the second direction. For example, the first direction may be a column direction or a vertical direction, and the second direction may be a row direction or a horizontal direction. In another example, the first direction may be a row direction or a horizontal direction, and the second direction may be a column direction or a vertical direction. Below, for ease of explanation, discussion may be based on an example in which each of the plurality of data lines DL is arranged along a column direction and each of the plurality of gate lines GL is arranged along a column direction, but the embodiments of the present disclosure are not limited thereto.
[0047] The data driving circuit 120 may be a circuit for driving the plurality of data lines DL, and may be capable of outputting data signals to the plurality of data lines DL.
[0048] The data driving circuit 120 may receive image data DATA in a digital form from the display controller 140 , convert the received image data DATA into a data signal in an analog form, and output the converted data signal to a plurality of data lines DL.
[0049] In one or more embodiments, the data driving circuit 120 may be connected to the display panel 110 using tape automated bonding (TAB) technology, or connected to a conductive pad such as a bonding pad of the display panel 110 using chip on glass (COG) technology or chip on panel (COP) technology, or connected to the display panel 110 using chip on film (COF) technology.
[0050] The data driving circuit 120 may be located in only one side or portion (e.g., the upper edge or the lower edge) of the display panel 110 and / or electrically connected to the only one side or portion, but is not limited thereto. In one or more embodiments, the data driving circuit 120 may be disposed in at least two of the two sides or portions (e.g., the upper edge and the lower edge) or four sides or portions (e.g., the upper edge, the lower edge, the left edge, and the right edge) of the display panel 110 and / or electrically connected to the two sides or portions or the at least two of the four sides or portions, but is not limited thereto, according to a driving scheme, a panel design scheme, or other design requirements.
[0051] The data driving circuit 120 may be connected to the outside or edge of the display area DA of the display panel 110 or may be provided in the display area DA of the display panel 110 .
[0052] The gate driving circuit 130 may be a circuit for driving the plurality of gate lines GL, and may output gate signals to the plurality of gate lines GL.
[0053] The gate driving circuit 130 may receive various types of gate driving control signals GCS, and may also receive a first gate voltage corresponding to an on-level voltage and a second gate voltage corresponding to an off-level voltage. Therefore, the gate driving circuit 130 may generate gate signals and provide the generated gate signals to the plurality of gate lines GL.
[0054] In one or more embodiments, the gate driver circuit 130 included in the display device 100 may be embedded in the display panel 110 using a gate-in-panel (GIP) technology. In an example where the gate driver circuit 130 is implemented using the gate-in-panel (GIP) technology, the gate driver circuit 130 may be provided on the substrate 111 of the display panel 110 during a manufacturing process of the display panel 110 or the display device 100.
[0055] In one embodiment, the gate driver circuit 130 included in the display device 100 may be provided in the display area DA of the display panel 110. In this implementation, for example, the gate driver circuit 130 may be provided in a first area (e.g., a left area or a right area of the display area DA) of the display panel 110 and / or electrically connected to the first area, but is not limited thereto. In another example, the gate driver circuit 130 may be provided in a first area (e.g., a left area or a right area of the display area DA) and a second area (e.g., the right area or the left area of the display area DA) of the display panel 110 and / or electrically connected to the first area and the second area, but is not limited thereto.
[0056] Here, the gate driving circuit 130 embedded in the display panel 110 using the gate-in-panel (GIP) technology may also be referred to as a “gate-in-panel circuit”.
[0057] The display controller 140 may be a device for controlling the data driving circuit 120 and the gate driving circuit 130 , and may control driving timing for a plurality of data lines DL and driving timing for a plurality of gate lines GL.
[0058] The display controller 140 may provide a data driving control signal DCS to the data driving circuit 120 to control the data driving circuit 120 , and provide a gate driving control signal GCS to the gate driving circuit 130 to control the gate driving circuit 130 .
[0059] The display controller 140 may receive image data input from the host system 150 and provide the data driving circuit 120 with image data DATA that can be read by the data driving circuit 120 according to the input image data.
[0060] The display controller 140 may be implemented as a separate component from the data driving circuit 120 , or may be integrated in the data driving circuit 120 to be implemented as an integrated circuit.
[0061] The display controller 140 may be a timing controller used in typical display technologies, or may be a controller or control device capable of performing other control functions in addition to the functions of a typical timing controller. In one or more embodiments, the display controller 140 may be a controller or control device that is different from a timing controller, or may be a circuit or component included in a controller or control device. The display controller 140 may be implemented using various circuits or electronic components such as an integrated circuit (IC), a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a processor, and / or the like.
[0062] The display controller 140 may be mounted on a printed circuit board, a flexible printed circuit, and / or the like, and electrically connected to the gate driving circuit 130 and the data driving circuit 120 through the printed circuit board, the flexible printed circuit, and / or the like.
[0063] The display controller 140 may send and receive signals to and from the data driving circuit 120 through one or more predefined interfaces. For example, such interfaces may include a low voltage differential signaling (LVDS) interface, an embedded clock point-to-point interface (EPI), a serial peripheral interface (SPI), etc. However, the embodiments of the present disclosure are not limited thereto.
[0064] In one or more aspects, in order to provide touch sensing functions and image display functions, the display device 100 may include a touch sensor and a touch sensing circuit configured to sense the touch sensor and detect whether there is a touch or the position of the touch by an object such as a finger or a pen.
[0065] The touch sensing circuit may include a touch driving circuit and a touch controller. The touch driving circuit is configured to drive and sense the touch sensor and generate and output touch sensing data. The touch controller can use the touch sensing data to detect whether a touch exists or the position of a touch.
[0066] The touch sensor may include a plurality of touch electrodes and a plurality of touch lines for electrically connecting the plurality of touch electrodes to a touch driving circuit.
[0067] The touch sensor may be implemented as a touch panel external to the display panel 110, or may be integrated into the display panel 110. In the example where the touch sensor is implemented as a touch panel external to the display panel 110, such a touch sensor may be referred to as an add-on type. In the example where the add-on type touch sensor is provided in the display device 100, the touch panel and the display panel 110 may be manufactured separately and combined in the assembly process. The add-on type touch panel may include a touch panel substrate and a plurality of touch electrodes provided on the touch panel substrate.
[0068] In an example where the touch sensor is provided inside the display panel 110 , the touch sensor may be formed on a substrate together with signal lines and electrodes related to display driving during a manufacturing process of the display panel 110 .
[0069] The touch driving circuit may provide a touch driving signal to at least one of the plurality of touch electrodes and generate touch sensing data by sensing at least one of the plurality of touch electrodes.
[0070] The touch sensing circuitry may perform touch sensing using self-capacitance sensing technology or mutual-capacitance sensing technology.
[0071] In an example where the touch sensing circuit performs touch sensing using self-capacitance sensing technology, the touch sensing circuit can perform touch sensing based on the capacitance between each touch electrode and a touch object (e.g., a finger, a pen, etc.). According to the self-capacitance sensing technology, each of the multiple touch electrodes can be used as a driving touch electrode and a sensing touch electrode. The touch drive circuit can drive all or one or more of the multiple touch electrodes and sense all or one or more of the multiple touch electrodes.
[0072] In an example where the touch sensing circuit uses mutual capacitance sensing technology to perform touch sensing, the touch sensing circuit can perform touch sensing based on the capacitance between touch electrodes. Using mutual capacitance sensing technology, multiple touch electrodes can be divided into drive touch electrodes and sense touch electrodes. The touch drive circuit can drive the drive touch electrodes and sense the sense touch electrodes.
[0073] In one or more aspects, the touch drive circuit and touch controller included in the touch sensing circuit may be implemented as separate devices or as a single device. In one or more aspects, the touch drive circuit and data drive circuit may be implemented as separate devices or as a single device.
[0074] The display device 100 may further include a power supply circuit for providing various types of power to the display driving circuit and / or the touch sensing circuit.
[0075] In one or more embodiments, the display device 100 according to aspects of the present disclosure may represent, but is not limited to, a mobile terminal such as a smartphone, a tablet computer or similar device, a display, a television (TV) or similar device. The embodiments of the present disclosure are not limited thereto. In one or more embodiments, the display device 100 may be a display device of various types, sizes, and shapes for displaying information or images, or include displays of various types, sizes, and shapes for displaying information or images.
[0076] In one or more embodiments, the display device 100 may further include electronic devices such as a camera (e.g., an image sensor) or a sensor capable of detecting an object. For example, the sensor may be a sensor capable of detecting an object or a human body by receiving light such as infrared light, ultrasonic light, ultraviolet light, etc.
[0077] Figure 2 An exemplary configuration of the display panel 110 according to the present disclosure is shown.
[0078] refer to Figure 2The display panel 110 may include a substrate 111 and an encapsulation layer 200 on the substrate 111. A plurality of sub-pixels SP are provided on the substrate 111. The encapsulation layer 200 may also be referred to as an encapsulation substrate or a sealing member.
[0079] Please refer to Figure 2 In an example where the display device 100 is a self-emissive display device, each of the plurality of sub-pixels SP disposed on the substrate 111 may include a light emitting element ED and a sub-pixel circuit SPC for driving the light emitting element ED.
[0080] refer to Figure 2 The sub-pixel circuit SPC may include a plurality of pixel driving transistors and at least one capacitor for driving the light-emitting element ED. The sub-pixel circuit SPC may drive the light-emitting element ED by supplying a driving current to the light-emitting element ED at a predetermined timing. The light-emitting element ED may be driven by the driving current to emit light.
[0081] The plurality of pixel driving transistors may include a driving transistor DT for driving the light emitting element ED and a scanning transistor ST configured to be turned on or off according to a scanning signal SC.
[0082] The driving transistor DT may provide a driving current to the light emitting element ED.
[0083] The scan transistor ST may be configured to control an electrical state of a corresponding node in the sub-pixel circuit SPC, or to control a state or operation of the drive transistor DT.
[0084] The at least one capacitor may include a storage capacitor Cst configured to maintain a constant voltage during a display frame or a specific period of the display frame.
[0085] In order to drive one or more sub-pixels SP, a data signal VDATA (which is an image signal) and a scan signal SC (which is a gate signal) may be applied to the sub-pixels SP. In addition, a common pixel driving voltage including a first common driving voltage VDD and a second common driving voltage VSS may also be applied to the one or more sub-pixels SP.
[0086] The light emitting element ED may include an anode AND, a light emitting element intermediate layer EL, and a cathode CAT. The light emitting element intermediate layer EL may be provided between the anode AND and the cathode CAT. The light emitting element intermediate layer EL may also be referred to as an "emission layer."
[0087] In the example where the light-emitting element ED is an organic light-emitting diode, the light-emitting element intermediate layer EL may include an emission material layer EML, a first common intermediate layer COM1 between the anode AND and the emission material layer EML, and a second common intermediate layer COM2 between the emission material layer EML and the cathode CAT. An emission material layer EML may be provided in each sub-pixel SP. The first common intermediate layer COM1 and the second common intermediate layer COM2 may be provided together to span a plurality of sub-pixels SP. The emission material layer EML may be provided in each sub-pixel SP, and the first common intermediate layer COM1 and the second common intermediate layer COM2 may be provided together to span the emission area and the non-emission area of the plurality of sub-pixels SP. The layer including the first common intermediate layer COM1 and the second common intermediate layer COM2 may be referred to as a common intermediate layer EL_COM.
[0088] For example, the first common intermediate layer COM1 may include a hole injection layer (HIL), a hole transport layer (HTL), etc. The second common intermediate layer COM2 may include an electron transport layer (ETL), an electron injection layer (EIL), etc. The hole injection layer may inject holes from the anode AND into the hole transport layer, and the hole transport layer may transport holes to the emission material layer EML. The electron injection layer may inject electrons from the cathode ACT into the electron transport layer, and the electron transport layer may transport electrons to the emission material layer EML.
[0089] For example, the cathode CAT may be electrically connected to a second common drive voltage line VSSL. The second common drive voltage VSS is a common pixel drive voltage that may be applied to the cathode CAT via the second common drive voltage line VSSL. The anode AND may be electrically connected to the first node N1 of the corresponding drive transistor DT of each sub-pixel SP. Here, the second common drive voltage VSS may also be referred to as a "base voltage," and the second common drive voltage line VSSL may also be referred to as a "base voltage line."
[0090] For example, the anode AND may be a pixel electrode provided in each sub-pixel SP, and the cathode CAT may be a common electrode provided in common in the plurality of sub-pixels SP. In another example, the cathode CAT may be a pixel electrode provided in each sub-pixel SP, and the anode AND may be a common electrode provided in common in the plurality of sub-pixels SP. Here, for ease of explanation, discussion may be based on an example in which the anode AND is a pixel electrode and the cathode CAT is a common electrode.
[0091] Each light-emitting element ED may be configured by corresponding portions of an anode AND, a light-emitting element intermediate layer EL, and a cathode CAT, which overlap with each other. A corresponding light-emitting region may be formed in each light-emitting element ED. For example, the corresponding light-emitting region of each light-emitting element ED may include a region in which the anode AND, the light-emitting element intermediate layer EL, and the cathode CAT overlap with each other.
[0092] In some embodiments, the light-emitting element ED may be an organic light-emitting diode (OLED), an inorganic material-based light-emitting diode (LED), or a quantum dot light-emitting element. For example, in an example where the light-emitting element ED is an organic light-emitting diode OLED, the light-emitting element intermediate layer EL of the light-emitting element ED may be a light-emitting element intermediate layer including an organic material.
[0093] The driving transistor DT may be a transistor configured to provide a driving current to the light emitting element ED. The driving transistor DT may be connected between the first common driving voltage line VDDL and the light emitting element ED.
[0094] The driving transistor DT may include a first node N1 electrically connected to the light emitting element ED, a second node N2 to which the data signal VDATA is applied, and a third node N3 to which the driving voltage VDD is applied through a driving voltage line DVL (eg, a first common driving voltage line VDDL).
[0095] In the driving transistor DT, the second node N2 may be a gate node, the first node N1 may be a source node or a drain node, and the third node N3 may be a drain node or a source node. Hereinafter, for ease of explanation only, the first node, the second node, and the third node (N1, N2, and N3) of the driving transistor DT may be discussed based on an example in which the first node, the second node, and the third node (N1, N2, and N3) are the source node, the gate node, and the drain node, respectively. However, the embodiments of the present disclosure are not limited thereto.
[0096] Figure 2 The scan transistor ST included in the illustrated sub-pixel circuit SPC may be a switching transistor for allowing a data signal VDATA, which is an image signal, to be supplied to a second node N2, which is a gate node of the driving transistor DT.
[0097] The scanning transistor ST can be turned on or off by a scanning signal SC (a gate signal) applied through a scanning line SCL (a gate line GL) and controls the electrical connection between the second node N2 of the driving transistor DT and the data line DL. The drain electrode or the source electrode of the scanning transistor ST can be electrically connected to the data line DL. The source electrode or the drain electrode of the scanning transistor ST can be electrically connected to the second node N2 of the driving transistor DT. The gate electrode of the scanning transistor ST can be electrically connected to the scanning line SCL.
[0098] The storage capacitor Cst may be electrically connected between the first node N1 and the second node N2 of the driving transistor DT. The storage capacitor Cst may include a first capacitor electrode electrically connected to or corresponding to the first node N1 of the driving transistor DT, and a second capacitor electrode electrically connected to or corresponding to the second node N2 of the driving transistor DT.
[0099] In one or more embodiments, the storage capacitor Cst (which may exist between the first node N1 and the second node N2 of the driving transistor DT) may be an external capacitor that is intentionally configured or designed to be located outside the driving transistor DT, rather than an internal capacitor such as a parasitic capacitor (e.g., a gate-to-source capacitance Cgs, a gate-to-drain capacitance Cgd, etc.).
[0100] Each of the driving transistor DT and the scanning transistor ST may be an n-type transistor or a p-type transistor.
[0101] The display panel 110 may have a top emission structure or a bottom emission structure.
[0102] In an example where the display panel 110 has a top emission structure, at least a portion of the sub-pixel circuit SPC may overlap at least a portion of the light-emitting element ED in the vertical direction. In an example where the display panel 110 has a bottom emission structure, the sub-pixel circuit SPC may not overlap with the light-emitting element ED in the vertical direction.
[0103] like Figure 2 As shown, the sub-pixel circuit SPC may include two transistors (2T: DT and ST) and one capacitor (1C: Cst) (which may be referred to as a "2T1C structure"), and in some implementations, the sub-pixel circuit SPC may also include one or more transistors, or further include one or more capacitors.
[0104] For example, the sub-pixel circuit SPC may have an 8T1C structure including eight transistors and one capacitor. In another example, the sub-pixel circuit SPC may have a 6T2C structure including six transistors and two capacitors. In yet another example, the sub-pixel circuit SPC may have a 7T1C structure including seven transistors and one capacitor.
[0105] Depending on the structure of the corresponding sub-pixel circuit SPC, the type and number of gate signals provided to the sub-pixel SP and / or the type and number of gate lines connected to the sub-pixel SP may vary.
[0106] Furthermore, the type and amount of common pixel driving voltages supplied to the sub-pixels SP may vary depending on the structure of the corresponding sub-pixel circuits SPC.
[0107] Since the circuit elements (e.g., light-emitting elements ED, such as organic light-emitting diodes (OLEDs) including organic materials) in each sub-pixel SP are easily affected by external moisture or oxygen, an encapsulation layer 200 may be provided in the display panel 110 to prevent external moisture or oxygen from penetrating into the circuit elements (e.g., light-emitting elements ED). The encapsulation layer 200 may be provided in various shapes or configurations to prevent the light-emitting elements ED from contacting moisture or oxygen.
[0108] Figure 3 An exemplary structure of the substrate 111 of the display panel 110 according to aspects of the present disclosure is shown.
[0109] refer to Figure 3 In one or more embodiments, the substrate 111 of the display panel 110 may include a display area DA allowing an image to be displayed and a non-display area NDA in which no image is displayed.
[0110] refer to Figure 3 The non-display area NDA may include, for example, a first non-display area NDA1 located outside the display area DA in a first direction, a second non-display area NDA2 located outside the display area DA in a second direction, a third non-display area NDA3 located outside the display area DA in a direction opposite to the first direction, and a fourth non-display area NDA4 located outside the display area DA in a direction opposite to the second direction. For example, the first direction may be a column direction (Y-axis direction), and the second direction intersecting the first direction may be a row direction (X-axis direction).
[0111] refer to Figure 3 , the first non-display area NDA1 may include a pad area PA in which a plurality of pads are disposed.
[0112] One or more drive circuits may be electrically connected to one or more pads provided in the pad area PA. Multiple drive circuits or one or more printed circuit boards may be electrically connected to the pads provided in the pad area PA. For example, the multiple pads may include multiple display pads and multiple touch pads. Multiple data lines DL, a first common drive voltage line VDDL, a second common drive voltage line VSSL, etc. may be electrically connected to the multiple display pads. Multiple touch routing lines TL may be electrically connected to the multiple touch pads.
[0113] refer to Figure 3In one or more embodiments, the first non-display area NDA1 may further include a bending area BA. In these embodiments, the substrate 111 may be a flexible substrate. In one or more embodiments, the first non-display area NDA1 may not include the bending area BA.
[0114] refer to Figure 3 , the display panel 110 may further include a ground line provided in the non-display area NDA of the substrate 1111. The ground line may be provided such that it extends from one point of the pad area PA to another point of the pad area PA via the second non-display area NDA2, the third non-display area NDA3, and the fourth non-display area NDA4.
[0115] refer to Figure 3 , the display panel 110 may include an encapsulation layer area A_ENCAP and a dam area A_DAM.
[0116] refer to Figure 3 The encapsulation layer region A_ENCAP may be a region in which the encapsulation layer 200 is disposed. In one or more embodiments, the encapsulation layer 200 included in the display panel 110 may have a structure in which at least one inorganic layer and at least one organic layer are stacked. In these embodiments, the edge of the encapsulation layer 200 may be an edge of an organic layer included in the encapsulation layer 200.
[0117] refer to Figure 3 The dam region A_DAM may be a region surrounding the encapsulation layer region A_ENCAP. A structure functioning as a dam may be located in the dam region A_DAM. The dam can prevent the liquid organic layer from flowing outward.
[0118] Figure 4 is an exemplary cross-sectional view of a display area DA of a display panel 110 according to aspects of the present disclosure.
[0119] refer to Figure 4 The substrate SUB of the display panel 110 may include a first substrate SUB1, an interlayer insulating layer IPD, and a second substrate SUB2. The interlayer insulating layer IPD may be interposed between the first substrate SUB1 and the second substrate SUB2. Since the substrate SUB includes the first substrate SUB1, the interlayer insulating layer IPD, and the second substrate SUB2, the substrate SUB may prevent or reduce the penetration of moisture. For example, the first substrate SUB1 and the second substrate SUB2 may be polyimide (PI) substrates. The first substrate SUB1 may be referred to as a primary PI substrate, and the second substrate SUB2 may be referred to as a secondary PI substrate.
[0120] refer to Figure 4Various patterns (ACT1, SD1, GATE1), various insulating layers (MBUF, ABUF1, ABUF2, GI, ILD1, ILD2, PAS0) and various metal patterns (TM1, GM, ML1, ML2) for forming transistors such as a driving transistor DRT may be provided on the substrate SUB.
[0121] refer to Figure 4 , a multi-buffer layer MBUF may be disposed on the second substrate SUB2 , and a first active buffer layer ABUF1 may be disposed on the multi-buffer layer MBUF.
[0122] The first metal layer ML1 and the second metal layer ML2 may be disposed on the first active buffer layer ABUF1. For example, the first metal layer ML1 and the second metal layer ML2 may be light shielding layers LS for shielding light.
[0123] The second active buffer layer ABUF2 may be disposed on the first metal layer ML1 and the second metal layer ML2 . The first active layer ACT1 of the driving transistor DRT may be disposed on the second active buffer layer ABUF2 .
[0124] The first gate insulating layer GI1 may be provided such that the first gate insulating layer GI1 covers the first active layer ACT1 .
[0125] The first gate electrode GATE1 of the driving transistor DRT may be disposed on the first gate insulating layer GI1. In one embodiment, the gate material layer GM may be disposed on the first gate insulating layer GI1 together with the first gate electrode GATE1 of the driving transistor DRT at a position different from the position where the driving transistor DRT is disposed.
[0126] A first interlayer insulating layer ILD1 may be disposed on the first gate electrode GATE1 and the gate material layer GM, such that the first interlayer insulating layer ILD1 covers the first gate electrode GATE1 and the gate material layer GM. A metal pattern TM1 may be disposed on the first interlayer insulating layer ILD1. The metal pattern TM1 may be located at a position different from the position where the drive transistor DRT is disposed. A second interlayer insulating layer ILD2 may be disposed on the metal pattern TM1 located on the first interlayer insulating layer ILD1, such that the second interlayer insulating layer ILD2 covers the metal pattern TM1.
[0127] Two first source-drain electrode patterns SD1 may be disposed on the second interlayer insulating layer ILD2. One of the two first source-drain electrode patterns SD1 may be a source node of the drive transistor DRT, and the other may be a drain node of the drive transistor DRT. The two first source-drain electrode patterns SD1 may be electrically connected to the first and second portions (e.g., the first and second sides) of the first active layer ACT1 through contact holes formed in the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the first gate insulating layer GI1, respectively.
[0128] A portion of the first active layer ACT1 overlapping the first gate electrode GATE1 may be referred to as a channel region. One of the two first source-drain electrode patterns SD1 may be connected to a first portion (e.g., a first side) of the channel region of the active layer ACT1, and the other of the two first source-drain electrode patterns SD1 may be connected to a second portion (e.g., a second side) of the channel region of the active layer ACT1.
[0129] The passivation layer PAS0 may be disposed on the two first source-drain electrode patterns SD1 so that the passivation layer PAS0 covers the two first source-drain electrode patterns. The planarization layer PLN may be disposed on the passivation layer PAS0. The planarization layer PLN may include a first planarization layer PLN1 and a second planarization layer PLN2.
[0130] For example, the first planarization layer PLN1 may be disposed on the passivation layer PAS0 .
[0131] The second source-drain electrode pattern SD2 may be disposed on the first planarization layer PLN1. The second source-drain electrode pattern SD2 may be connected to one of the two first source-drain electrode patterns SD1 (corresponding to the first planarization layer PLN1) through a contact hole formed in the first planarization layer PLN1. Figure 3 a second node N2 of the driving transistor DRT in the sub-pixel SP).
[0132] The second planarization layer PLN2 may be disposed on the second source-drain electrode pattern SD2 such that the second planarization layer PLN2 covers the second source-drain electrode pattern SD2. The light emitting element ED of the sub-pixel SP may be disposed on the second planarization layer PLN2.
[0133] According to an exemplary stacked configuration of the light emitting element ED, the anode electrode AE may be disposed on the second planarization layer PLN2 , and may be electrically connected to the second source-drain electrode pattern SD2 through a contact hole formed in the second planarization layer PLN2 .
[0134] The bank BANK may be disposed on the anode electrode AE such that the bank BANK covers a portion of the anode electrode AE, and a portion of the bank BANK corresponding to the emission area EA of the sub-pixel SP may be opened.
[0135] A portion of the anode electrode AE may be exposed through the opening (open portion) of the bank BANK. The emission material layer EML may be provided on one or more side surfaces of the bank BANK and in the opening (open portion) of the bank BANK. All or at least a portion of the emission material layer EML may be located between adjacent banks.
[0136] In the opening of the bank BANK, the emission material layer EML may be in contact with the anode electrode AE. The cathode electrode CE may be disposed on the emission layer EL.
[0137] The light emitting element ED may be formed by including an anode electrode AE, an emission material layer EML, and a cathode electrode CE. The emission material layer EML may include an organic material layer.
[0138] An encapsulation layer ENCAP may be disposed on the stack of light emitting elements ED.
[0139] The encapsulation layer ENCAP can have a single layer stack or a multi-layer stack. Figure 6 and Figure 7 As shown, the encapsulation layer ENCAP may include a first encapsulation layer PAS1 , a second encapsulation layer PCL and a third encapsulation layer PAS2 .
[0140] The first and third encapsulation layers PAS1 and PAS2 may be, for example, inorganic material layers, and the second encapsulation layer PCL may be, for example, an organic material layer. Among the first, second, and third encapsulation layers PAS1, PAS2, the second encapsulation layer PCL may be the thickest and serve as a planarization layer.
[0141] The first encapsulation layer PAS1 may be disposed on the cathode electrode CE and may be disposed as a stack closest to the light-emitting element ED. The first encapsulation layer PAS1 may include an inorganic insulating material that can be deposited using low-temperature deposition. For example, the first encapsulation layer PAS1 may include, but is not limited to, silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), and the like. Since the first encapsulation layer PAS1 can be deposited in a low-temperature environment, during the deposition process, the first encapsulation layer PAS1 can prevent the emission material layer EML, which includes an organic material that is easily affected by a high-temperature environment, from being damaged.
[0142] The area or size of the second encapsulation layer PCL may be smaller than the area or size of the first encapsulation layer PAS1. For example, the second encapsulation layer PCL may be configured to expose both ends or edges of the first encapsulation layer PAS1. The second encapsulation layer PCL may be used as a buffer to relieve stress between corresponding layers when the display device 100 is bent or folded, and may also be used to enhance planarization performance. For example, the second encapsulation layer PCL may include an organic insulating material, such as an acrylic resin, an epoxy resin, a polyimide, a polyethylene, a silicon oxycarbon (SiOC), and the like. For example, the second encapsulation layer PCL may be provided using inkjet technology.
[0143] The third encapsulation layer PAS2 may be disposed on the substrate SUB on which the second encapsulation layer PCL is disposed, such that the third encapsulation layer PAS2 covers corresponding top and side surfaces of the second encapsulation layer PCL and the first encapsulation layer PAS1. The third encapsulation layer PAS2 may minimize or prevent external moisture or oxygen from penetrating into the first encapsulation layer PAS1 and the second encapsulation layer PCL. For example, the third encapsulation layer PAS2 may include an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), or the like.
[0144] refer to Figure 4 In the example where the touch sensor TS is embedded in the display panel PNL, the touch sensor TS may be disposed on the encapsulation layer ENCAP. The structure of the touch sensor will be described in detail below.
[0145] The touch buffer layer T-BUF may be disposed on the encapsulation layer ENCAP, and the touch sensor TS may be disposed on the touch buffer layer T-BUF.
[0146] The touch sensor TS may include a touch sensor metal TSM and at least one bridge metal BRG, the touch sensor metal TSM and the at least one bridge metal BRG being located in different layers.
[0147] A touch interlayer insulating layer T-ILD may be provided between the touch sensor metal TSM and the bridge metal BRG.
[0148] For example, the touch sensor metal TSM may include a first touch sensor metal TSM, a second touch sensor metal TSM, and a third touch sensor metal TSM disposed adjacent to each other. In an embodiment where the third touch sensor metal TSM is disposed between the first touch sensor metal TSM and the second touch sensor metal TSM and the first touch sensor metal TSM and the second touch sensor metal TSM need to be electrically connected to each other, the first touch sensor metal TSM and the second touch sensor metal TSM may be electrically connected to each other via a bridging metal BRG located in different layers. The bridging metal BRG may be electrically insulated from the third touch sensor metal TSM by a touch interlayer insulating layer T-ILD.
[0149] When the touch sensor TS is formed on the display panel PNL, chemical solutions (e.g., developer or etchant) used in the corresponding process or moisture from the outside may be generated or introduced. In one or more embodiments, by disposing the touch sensor TS on the touch buffer layer T-BUF, chemical solutions or moisture can be prevented from penetrating into the emissive material layer EML, which includes organic materials, during the manufacturing process of the touch sensor TS. Therefore, the touch buffer layer T-BUF can prevent damage to the emissive material layer EML, which is susceptible to chemical solutions or moisture.
[0150] In order to prevent damage to the emission material layer EML including an organic material that is easily affected by high temperatures, the touch buffer layer T-BUF can be formed at a low temperature lower than or equal to a predetermined temperature (for example, 100 degrees (°C)) and formed using an organic insulating material with a low dielectric constant of 1 to 3. For example, the touch buffer layer T-BUF may include an acrylic-based material, an epoxy-based material, or a silicone-based material. When the display device 100 is bent, the encapsulation layer ENCAP may be damaged, and the touch sensor metal located on the touch buffer layer T-BUF may be cracked or broken. Even when the display device 100 is bent, the touch buffer layer T-BUF, which is an organic insulating material with a planarization property, can prevent damage to the encapsulation layer ENCAP and / or cracking or breaking of the metal (TSM, BRG) included in the touch sensor TS.
[0151] The protection layer PAC may be disposed on the touch sensor TS such that the protection layer PAC covers the touch sensor TS. The protection layer PAC may be, for example, an organic insulating layer.
[0152] Figure 5 An exemplary overhang structure OH in the display panel 110 according to aspects of the present disclosure is shown.
[0153] The display device 100 may include a substrate SUB1 having a display area and a dam area surrounding the display area, a planarization layer PLN arranged on the substrate SUB1, a light emitting element intermediate layer EL (i.e., an emission layer) arranged on the planarization layer PLN in the display area, an outermost embankment BANK_O arranged on the planarization layer PLN in the dam area, a first overhang structure OH1 arranged to overlap with the outermost embankment BANK_O, and a second overhang structure OH2 arranged to overlap with the first overhang structure OH1.
[0154] The overhang structure OH may include a first overhang structure OH1 and a second overhang structure OH2. Since the display device 100 includes the overhang structure OH, it is easy to form a structure in which a portion of the light-emitting element intermediate layer EL is disconnected from the rest of the light-emitting element intermediate layer EL. Furthermore, since the display device 100 includes the overhang structure OH, it is possible to effectively prevent moisture or oxygen from penetrating into the display panel 110. The overhang structure OH will be discussed in detail below.
[0155] Figure 5 The display panel 110 shown may be Figure 4 The display panel 110 is the same as that shown. Figure 5 Omitted Figure 4 Some components of the cross-sectional view of the display panel 110 are shown. For example, Figure 5 Omitted Figure 4 The components shown are arranged between the second substrate SUB2 and the anode layer AE. Figure 5 In the cross-sectional view of the display panel 110 shown, the transistor below the anode layer AE and components related to the transistor are omitted. Figure 4 and Figure 5 , the stackup configuration of the display panel 110 will be discussed starting from the first substrate SUB1.
[0156] The first substrate SUB1 may be disposed at the bottom of the display panel 110. The first substrate SUB1 may be Figure 4 The first substrate SUB1 shown is identical.
[0157] An interlayer insulating layer IPD may be provided on the first substrate SUB1. Figure 4 The interlayer insulating layers IPD shown are the same.
[0158] The second substrate SUB2 may be disposed on the interlayer insulating layer IPD. The second substrate SUB1 may be disposed such that the second substrate SUB1 exposes a portion of the first substrate SUB1. Figure 3 and Figure 5, the right side portion of the first substrate SUB1 may extend beyond the right end of the second substrate SUB2. Figure 4 The second substrate SUB2 shown is identical.
[0159] At least one buffer layer BUF may be provided on the second substrate SUB2. The buffer layer BUF may include Figure 4 The multi-buffer layer MBUF and active buffer layers (ABUF1 and ABUF2) are shown.
[0160] The planarization layer PLN may be provided on the buffer layer BUF. The planarization layer PLN may include Figure 4 The planarization layer (PLN) shown. The planarization layer PLN may be formed of two or three or more planarization layers PLN. The planarization layer PLN may include a contact hole, and the upper electrode and the lower electrode provided in different layers may be electrically connected through the contact hole.
[0161] The anode layer AE may be provided on the planarization layer PLN. The anode layer AE is deposited on top of the planarization layer PLN, after which the anode layer AE may be patterned to form an electrode. Therefore, the anode layer may also be referred to as the anode electrode AE. One or more corresponding elements included in a plurality of transistors or similar components such as a driver transistor may be provided in the planarization layer PLN (or on the planarization layer PLN or below the planarization layer PLN). The source electrode (or drain electrode) of the driver transistor may be electrically connected to the anode electrode AE. Figure 5 The anode electrode AE shown may have Figure 4 The same characteristics as the anode electrode AE shown in FIG. Figure 5 The anode electrode AE shown is electrically connected to one or more elements of the transistor discussed.
[0162] The bank BANK may be provided on the planarization layer PLN and the anode layer AE.
[0163] The outermost bank BANK_O may be disposed on the planarization layer PLN, and, for example, may be disposed adjacent to an edge of the planarization layer PLN. The outermost bank BANK_O may prevent the organic encapsulation layer from overflowing to the outside.
[0164] The overhang structure OH may include a first overhang structure OH1 and a second overhang structure OH2 . The first overhang structure OH1 and the second overhang structure OH2 may each surround the display area.
[0165] The first overhang structure OH1 may be disposed on the outermost bank BANK_O. The first overhang structure OH1 may include an inner side (eg, Figures 5 to 8 and Figures 10 to 12the left surface in the middle), the outer side opposite to the inner side and facing away from the display area (e.g., Figures 5 to 8 and Figures 10 to 12 The bottom surface of the first overhang structure OH1 may face the first substrate SUB1 and the outermost bank BANK_O, and the top surface of the first overhang structure OH1 may face away from the first substrate SUB1 and the outermost bank BANK_O.
[0166] The second overhang structure OH2 may be disposed on the first overhang structure OH1. The second overhang structure OH2 may include an inner side (eg, Figures 5 to 8 and Figures 10 to 12 the left surface in the middle), the outer side opposite to the inner side and facing away from the display area (for example, Figures 5 to 8 and Figures 10 to 12 The second overhang structure OH2 may include a first extending portion extending inwardly beyond the first overhang structure OH1 and a second extending portion extending inwardly beyond the first overhang structure OH1.
[0167] like Figure 5 As shown, the width of the second overhang structure OH2 (i.e., the distance between the left and right ends of the second overhang structure OH2) can be greater than the width of the first overhang structure OH1 (i.e., the distance between the left and right ends of the first overhang structure OH1). The width of the second overhang structure OH2 can be the dimension between the inner side and the outer side of the second overhang structure OH2 along the lateral direction, and the lateral direction can be substantially parallel to the first substrate SUB1. The width of the first overhang structure OH1 can be the dimension between the inner side and the outer side of the first overhang structure OH1 along the lateral direction.
[0168] When the overhang structure OH is provided, one or more layers deposited on the overhang structure OH may be provided in a form in which corresponding portions of the one or more layers are cutoff from corresponding remaining portions of the one or more layers.
[0169] The light emitting element intermediate layer EL may be provided on the bank BANK. The light emitting element intermediate layer EL may be provided on the bank BANK and in contact with the anode electrode AE. Figure 5, the light emitting element intermediate layer EL may be provided in such a form that the light emitting element intermediate layer EL is in contact with the two anode electrodes AE. When the overhang structure OH is provided, the light emitting element intermediate layer EL may be provided so that a portion of the light emitting element intermediate layer EL is disconnected from the rest of the light emitting element intermediate layer EL. For example, the light emitting element intermediate layer EL may be provided only to the left side of the first overhang structure OH1. The light emitting element intermediate layer EL may extend from the display area to the dam area and terminate at the inner side of the first overhang structure OH1 (i.e., it is located at the inner side of the first overhang structure OH1). Figure 5 ). As will be described below, the light emitting element intermediate layer EL may be in contact with the inner side of the first overhang structure OH1 or spaced apart from the inner side of the first overhang structure OH1.
[0170] The cathode layer CAT may be provided on the light emitting element intermediate layer EL. When the overhang structure OH is provided, the cathode layer CAT may be provided in such a form that a portion of the cathode layer CAT is disconnected from the rest of the cathode layer CAT. For example, the cathode layer CAT may be provided only to the left side of the first overhang structure OH1 or only to the left side of the light emitting element intermediate layer EL in contact with the left surface of the first overhang structure OH1. The cathode layer CAT may extend from the display area to the dam area and terminate at the inner side of the first overhang structure OH1 (i.e., Figure 5 ). As will be described below, the cathode layer CAT may be in contact with or spaced apart from the inner side of the first overhang structure OH1.
[0171] The cap layer CPL may be provided on the cathode layer CAT. For example, the cap layer CPL may be provided only to the left side of the first overhang structure OH1 or only to the left side of the cathode layer CAT in contact with the left surface of the light emitting element intermediate layer EL, which is in contact with the left surface of the first overhang structure OH1. The cap layer CPL may extend from the display area to the dam area and terminate at the inner side of the first overhang structure OH1 (i.e., Figure 5 ). The cover layer CPL may be in contact with the inner side of the first overhang structure OH1 or spaced apart from the inner side of the first overhang structure OH1.
[0172] The first encapsulation layer PAS1 may be disposed on the capping layer CPL. The first encapsulation layer PAS1 may be an inorganic encapsulation layer. The first encapsulation layer PAS1 may be disposed only up to the left side of the first overhang structure OH1 or the second overhang structure OH2.
[0173] The second encapsulation layer PCL1 may be disposed on the first encapsulation layer PAS1. The second encapsulation layer PCL1 may be disposed on the left side of the second overhang structure OH2. For example, the second encapsulation layer PCL1 may be disposed up to a position spaced a certain distance from the left edge (i.e., the inner edge) of the second overhang structure OH2. The second encapsulation layer PCL1 may be an organic encapsulation layer. Since the outermost embankment BANK_O and the overhang structure OH are disposed on the right side of the second encapsulation layer PCL1, the second encapsulation layer PCL1 as an organic encapsulation layer may not overflow into the non-display area. A portion of the upper surface of the second encapsulation layer PCL1 corresponding to the display area may be set to be flat, and another portion of the upper surface of the second encapsulation layer PCL1 may be tilted downward because the other portion of the upper surface of the second encapsulation layer PCL1 extends closer to the non-display area.
[0174] The third encapsulation layer PAS2 may be disposed on the second encapsulation layer PCL1. The third encapsulation layer PAS2 may be an inorganic encapsulation layer. The third encapsulation layer PAS2 may include an inorganic material. The third encapsulation layer PAS2 may be disposed such that the third encapsulation layer PAS2 covers the overhang structure OH and the non-display area.
[0175] The fourth encapsulation layer PCL2 may be disposed on the third encapsulation layer PAS2. The fourth encapsulation layer PCL2 may be an organic encapsulation layer. The fourth encapsulation layer PCL2 may be disposed such that the fourth encapsulation layer PCL2 covers the overhang structure OH and the non-display area.
[0176] The fifth encapsulation layer PAS3 may be disposed on the fourth encapsulation layer PCL2. The fifth encapsulation layer PAS3 may be an inorganic encapsulation layer. The fifth encapsulation layer PAS3 may be disposed such that the fifth encapsulation layer PAS3 covers the overhang structure OH and the non-display area.
[0177] When the fourth encapsulation layer PCL2 and the fifth encapsulation layer PAS3 are disposed on the third encapsulation layer PAS2, penetration of external moisture or oxygen may be more effectively prevented. In one embodiment, an additional encapsulation layer may be disposed on the fifth encapsulation layer PAS3.
[0178] Figure 5 The overhang structure OH discussed above is shown. The overhang structure OH will be described in more detail below.
[0179] Figure 6 、 Figure 7 and Figure 8 is a cross-sectional view of an example of an overhang structure OH configured in the display panel 110 according to aspects of the present disclosure.
[0180] refer to Figure 5 and Figure 6, the first overhang structure OH1 may be disposed on the outermost bank BANK_O. The width of the first overhang structure OH1 (i.e., the distance between the left and right ends of the first overhang structure OH1) may be smaller than the width of the outermost bank BANK_O (i.e., the distance between the left and right ends of the outermost bank BANK_O). The center of the first overhang structure OH1 may correspond to the center of the outermost bank BANK_O. The center of the second overhang structure OH2 may correspond to the center of the outermost bank BANK_O and / or the center of the first overhang structure OH1.
[0181] refer to Figure 5 and Figure 6 The first overhang structure OH1 may be provided so that the first overhang structure OH1 is in contact with the light emitting element intermediate layer EL. A left surface (ie, an inner side) of the first overhang structure OH1 may be in contact with the light emitting element intermediate layer EL.
[0182] refer to Figure 5 and Figure 6 The second overhang structure OH2 may be provided so that the second overhang structure OH2 contacts the light emitting element intermediate layer EL and the cathode layer CAT. The bottom surface of the second overhang structure OH2 may contact the light emitting element intermediate layer EL. The bottom surface of the second overhang structure OH2 may contact the cathode layer CAT.
[0183] refer to Figure 5 and Figure 6 Since the display device 100 includes the overhang structure OH, it is possible to easily form a structure in which a portion of the light emitting element intermediate layer EL is disconnected from the rest of the light emitting element intermediate layer EL. In addition, since the display device 100 includes the overhang structure OH, it is possible to effectively prevent moisture or oxygen from penetrating into the display panel 110.
[0184] See also Figure 5 and Figure 6 , the second overhang structure OH2 may include a conductive material such as a metal. In this example, the second overhang structure OH2 may be formed of a material that is capable of conducting electricity. The second overhang structure OH2 may be arranged so that the second overhang structure OH2 is in contact with the cathode layer CAT. In this implementation, the second overhang structure OH2 may be electrically connected to the cathode layer CAT. The second overhang structure OH2 may serve as an auxiliary cathode layer, and the second overhang structure OH2 may include both structural characteristics and electrical characteristics. The second overhang structure OH2 serves as an auxiliary cathode layer, which can reduce the resistance of the cathode layer CAT. Since the cathode layer CAT is electrically connected to the second common drive voltage line VSSL, the resistance of the second common drive voltage line VSSL can be reduced, thereby reducing the voltage drop of the second common drive voltage VSS. This reduces the power consumption of the display device 100.
[0185] refer to Figure 5 and Figure 6 The light-emitting element intermediate layer EL may be provided so that the light-emitting element intermediate layer EL contacts the first overhang structure OH1 on the left side of the first overhang structure OH1. The second overhang structure OH2 may be provided so that at least one of the side portions of the second overhang structure OH2 extends beyond at least one of the side portions of the first overhang structure OH1 (i.e., the extended portion of the second overhang structure OH2 is exposed from the first overhang structure OH1). For example, the extended portion of the second overhang structure OH2 may contact the light-emitting element intermediate layer EL. For example, a portion of the bottom surface of the second overhang structure OH2 may contact the light-emitting element intermediate layer EL.
[0186] refer to Figure 5 and Figure 6 , the cathode layer CAT may be arranged so that the cathode layer CAT covers the light emitting element intermediate layer EL. The extension portion of the second overhang structure OH2 exposed from the first overhang structure OH1 may be in contact with the cathode layer CAT. That is, a portion of the bottom surface of the second overhang structure OH2 may be in contact with the cathode layer CAT. The second overhang structure OH2 may include a first extension portion extending beyond the first overhang structure OH1 in a lateral inward direction toward the display area. The first extension portion may include a bottom surface facing the first substrate SUB1. The cathode layer CAT may be in contact with the bottom surface of the first extension portion. As described above, the light emitting element intermediate layer EL may be in contact with both the bottom surface of the first extension portion of the second overhang structure OH2 and the inner side of the first overhang structure OH1. In this case, the cathode layer CAT may be separated from the inner side of the first overhang structure OH1 by the light emitting element intermediate layer EL.
[0187] refer to Figure 5 and Figure 6 The third encapsulation layer PAS2 may be provided so that the third encapsulation layer PAS2 covers the second overhang structure OH2. The third encapsulation layer PAS2 may be provided on the second encapsulation layer PCL1 and extend from the display area to the dam area. The third encapsulation layer PAS2 may cover the top surface of the second overhang structure OH2 facing away from the substrate, the outer side of the second overhang structure OH2 opposite to its inner side, the outer side of the first overhang structure OH1 opposite to its inner side, and the outer side of the outermost bank BANK_O.
[0188] refer to Figure 5 and Figure 6 , the fourth encapsulation layer PCL2 may be provided such that the fourth encapsulation layer PCL2 covers the third encapsulation layer PAS2. The fourth encapsulation layer PCL2 may be an organic encapsulation layer.
[0189] refer to Figure 5 and Figure 6, the fifth encapsulation layer PAS3 may be provided such that the fifth encapsulation layer PAS3 covers the fourth encapsulation layer PCL2. The fifth encapsulation layer PAS3 may be an inorganic encapsulation layer.
[0190] refer to Figure 5 and Figure 6 , the fourth encapsulation layer PCL2 and the fifth encapsulation layer PAS3 may be disposed such that the fourth encapsulation layer PCL2 and the fifth encapsulation layer PAS3 overlap with the overhang structure OH.
[0191] The following will describe Figure 7 Overhang structure OH.
[0192] refer to Figure 5 and Figure 7 The first overhang structure OH1 may be disposed on the outermost bank BANK_O. The width of the first overhang structure OH1 (i.e., the distance between the left and right ends of the first overhang structure OH1) may be smaller than the width of the outermost bank BANK_O (i.e., the distance between the left and right ends of the outermost bank BANK_O). The center of the first overhang structure OH1 may correspond to the center of the outermost bank BANK_O.
[0193] refer to Figure 5 and Figure 7 The cathode layer CAT may be disposed between the light emitting element intermediate layer EL and the first overhang structure OH1, and the light emitting element intermediate layer EL may be disposed so as to be spaced apart from the first overhang structure OH1. A portion of the light emitting element intermediate layer EL may overlap with the cathode layer CAT and the second overhang structure OH2.
[0194] refer to Figure 5 and Figure 7 , the light emitting element intermediate layer EL may be provided so that the light emitting element intermediate layer EL covers a portion of the outermost bank BANK_O and the anode electrode AE.
[0195] refer to Figure 7 , the cathode layer CAT may be provided so that the cathode layer CAT covers the light emitting element intermediate layer EL.
[0196] refer to Figure 7 , the cathode layer CAT may be disposed such that the cathode layer CAT is in contact with the first overhang structure OH1. A left surface (ie, an inner side) of the first overhang structure OH1 may be in contact with the cathode layer CAT.
[0197] refer to Figure 7, the cathode layer CAT may be arranged so that the cathode layer CAT is in contact with the second overhang structure OH2. The bottom surface of the second overhang structure OH2 may be in contact with the cathode layer CAT. The extension portion of the second overhang structure OH2 exposed from the first overhang structure OH1 may be in contact with the cathode layer CAT. That is, a portion of the bottom surface of the second overhang structure OH2 may be in contact with the cathode layer CAT. The second overhang structure OH2 may include a first extension portion extending beyond the first overhang structure OH1 in a lateral inward direction toward the display area. The first extension portion may include a bottom surface facing the first substrate SUB1. The cathode layer CAT may be in contact with the bottom surface of the first extension portion.
[0198] refer to Figure 7 Since the display device 100 includes the overhang structure OH, a structure in which a portion of the light emitting element intermediate layer EL is disconnected from the rest of the light emitting element intermediate layer EL can be easily formed. In addition, since the display device 100 includes the overhang structure OH, it is possible to effectively prevent moisture or oxygen from penetrating into the display panel 110.
[0199] See also Figure 7 The first overhang structure OH1 may include a conductive material such as metal. In this example, the first overhang structure OH1 may be formed from a conductive material. The first overhang structure OH1 may be arranged so that the first overhang structure OH1 contacts the cathode layer CAT. In this implementation, the first overhang structure OH1 may be electrically connected to the cathode layer CAT. The first overhang structure OH1 may serve as an auxiliary cathode layer and may have both structural and electrical characteristics. The first overhang structure OH1 functions as an auxiliary cathode layer, reducing the resistance of the cathode layer CAT. Since the cathode layer CAT is electrically connected to the second common drive voltage line VSSL, the resistance of the second common drive voltage line VSSL is reduced, thereby reducing the voltage drop of the second common drive voltage VSS. This reduces power consumption of the display device 100. Alternatively or additionally, the second overhang structure OH2 may include a conductive material such as metal. In this example, the second overhang structure OH2 may be formed from a conductive material. The second overhang structure OH2 may be arranged so that the second overhang structure OH2 contacts the cathode layer CAT. In this implementation, the second overhang structure OH2 may be electrically connected to the cathode layer CAT.The second overhang structure OH2 may serve as an auxiliary cathode layer, and the second overhang structure OH2 may include both structural and electrical characteristics.
[0200] refer to Figure 5 and Figure 7The third encapsulation layer PAS2 may be provided so that the third encapsulation layer PAS2 covers the second overhang structure OH2. The third encapsulation layer PAS2 may be provided on the second encapsulation layer PCL1 and extend from the display area to the dam area. The third encapsulation layer PAS2 may cover the top surface of the second overhang structure OH2 facing away from the substrate, the outer side of the second overhang structure OH2 opposite to its inner side, the outer side of the first overhang structure OH1 opposite to its inner side, and the outer side of the outermost bank BANK_O.
[0201] refer to Figure 5 and Figure 7 , the fourth encapsulation layer PCL2 and the fifth encapsulation layer PAS3 may be disposed such that the fourth encapsulation layer PCL2 and the fifth encapsulation layer PAS3 overlap with the overhang structure OH.
[0202] The following will describe Figure 8 Overhang structure OH.
[0203] refer to Figure 5 and Figure 8 The first overhang structure OH1 may be disposed on the outermost bank BANK_O. The width of the first overhang structure OH1 (i.e., the distance between the left and right ends of the first overhang structure OH1) may be smaller than the width of the outermost bank BANK_O (i.e., the distance between the left and right ends of the outermost bank BANK_O). The center of the first overhang structure OH1 may correspond to the center of the outermost bank BANK_O.
[0204] refer to Figure 5 and Figure 8 , the first overhang structure OH1 may be provided such that the first overhang structure OH1 is spaced apart from the light emitting element intermediate layer EL.
[0205] refer to Figure 5 and Figure 8 , the first encapsulation layer PAS1 may extend from the display area to the dam area and terminate at the inner side of the first overhang structure OH1 (ie, Figure 5 The left side shown in FIG. ). The side surface of the first overhang structure OH1 and the bottom surface of the second overhang structure OH2 may be arranged so that the side surface of the first overhang structure OH1 and the bottom surface of the second overhang structure OH2 are in contact with the first encapsulation layer PAS1. The first encapsulation layer PAS1 may be arranged on the cap layer CPL so that the first encapsulation layer PAS1 covers the side surface of the cathode layer CAT and the side surface of the light emitting element intermediate layer EL.
[0206] refer to Figure 8The first overhang structure OH1 may be disposed such that the first overhang structure OH1 is spaced apart from the cathode layer CAT. The first encapsulation layer PAS1 may be disposed on a side surface of the first overhang structure OH1, and the cathode layer CAT may be spaced apart from the side surface of the first overhang structure OH1 in a left direction.
[0207] refer to Figure 8 The first overhang structure OH1 may be disposed such that the first overhang structure OH1 is spaced apart from the capping layer CPL. The first encapsulation layer PAS1 may be disposed on a side surface of the first overhang structure OH1, and the capping layer CPL may be spaced apart from the side surface of the first overhang structure OH1 in a left direction.
[0208] The first overhang structure OH1 may be provided such that the first overhang structure OH1 is in contact with the first encapsulation layer PAS1 .
[0209] The first encapsulation layer PAS1 may be disposed such that the first encapsulation layer PAS1 is in contact with side surfaces of the first overhang structure OH1 .
[0210] refer to Figure 8 , the second overhang structure OH2 may be provided such that the second overhang structure OH2 is spaced apart from the light emitting element intermediate layer EL.
[0211] The second overhang structure OH2 may be provided such that the second overhang structure OH2 is spaced apart from the cathode layer CAT. Figure 8 , the first encapsulation layer PAS1 may be disposed on the bottom surface of the second overhang structure OH2, and the cathode layer CAT may be disposed such that the cathode layer CAT is spaced apart from the bottom surface of the second overhang structure OH2 in a downward direction.
[0212] The second overhang structure OH2 may be provided such that the second overhang structure OH2 is spaced apart from the capping layer CPL. Figure 8 , the first encapsulation layer PAS1 may be disposed on the bottom surface of the second overhang structure OH2, and the cathode layer CAT may be disposed such that the cathode layer CAT is spaced apart from a left portion of the bottom surface of the second overhang structure OH2 in a downward direction.
[0213] The second overhang structure OH2 may be provided such that the second overhang structure OH2 is in contact with the first encapsulation layer PAS1 .
[0214] The first encapsulation layer PAS1 may be disposed such that the first encapsulation layer PAS1 is in contact with a bottom surface of the second overhang structure OH2 .
[0215] exist Figure 8 In the cross-sectional view of , a top surface of the second overhang structure OH2 may be higher than a top surface of the first encapsulation layer PAS1.
[0216] refer to Figure 8 The first encapsulation layer PAS1 may be provided so that the first encapsulation layer PAS1 covers the light emitting element intermediate layer EL and the cathode layer CAT. Since the first encapsulation layer PAS1 covers the light emitting element intermediate layer EL and the cathode layer CAT, it can effectively prevent moisture or oxygen from penetrating into the light emitting element EL.
[0217] refer to Figure 8 , a portion of the side surface of the first overhang structure OH1 and the bottom surface of the second overhang structure OH2 may be disposed such that the side surface of the first overhang structure OH1 and the bottom surface of the second overhang structure OH2 are in contact with the first encapsulation layer PAS1. The first encapsulation layer PAS1 may be disposed such that the first encapsulation layer PAS1 is in contact with the side surface of the first overhang structure OH1 and overlaps with the second overhang structure OH2. The first encapsulation layer PAS1 may be disposed below an extended portion of the second overhang structure OH2, the extended portion of the second overhang structure OH2 extending beyond a side end of the first overhang structure OH1.
[0218] refer to Figure 8 , a portion of the first encapsulation layer PAS1 may be disposed between a side surface of the light emitting element intermediate layer EL and a side surface of the first overhang structure OH1 .
[0219] refer to Figure 8 A portion of the first encapsulation layer PAS1 may be disposed between a side surface of the cathode layer CAT and a side surface of the first overhang structure OH1. The second encapsulation layer PCL1 may be disposed on the first encapsulation layer PAS1 and extend from the display area to the dam area. The second encapsulation layer PCL1 may terminate at an inner side of the second overhang structure OH2 facing the display area and contact the inner side of the second overhang structure OH2.
[0220] refer to Figure 5 and Figure 8 The third encapsulation layer PAS2 may be provided so that the third encapsulation layer PAS2 covers the second overhang structure OH2. The third encapsulation layer PAS2 may be provided on the second encapsulation layer PCL1 and extend from the display area to the dam area. The third encapsulation layer PAS2 may cover the top surface of the second overhang structure OH2 facing away from the substrate, the outer side of the second overhang structure OH2 opposite to its inner side, the outer side of the first overhang structure OH1 opposite to its inner side, and the outer side of the outermost bank BANK_O.
[0221] Figure 6 、 Figure 7 and Figure 8 The corresponding area including line AB is shown. Figure 9 An exemplary region including line AB is described.
[0222] Figure 9 An area in which an overhang structure is configured in the display panel 110 according to aspects of the present disclosure is shown.
[0223] Figure 9 A first example and a second example are shown.
[0224] refer to Figure 9 In a first example, the overhang structure OH may include a first overhang structure OH1 and a second overhang structure OH2. For example, the first overhang structure OH1 may include silicon oxide, and the second overhang structure OH2 may include one or more metal particles. In another example, the first overhang structure OH1 may include one or more metal particles, and the second overhang structure OH2 may include amorphous silicon.
[0225] refer to Figure 9 In a second example, the overhang structure OH may include a first overhang structure OH1, a second overhang structure OH2 and an auxiliary cathode layer CAT_sub. In some embodiments, Figure 9 The auxiliary cathode layer CAT_sub shown may be provided at Figure 6 、 Figure 7 and Figure 8 in the area including the line AB. In these embodiments, the auxiliary cathode layer CAT_sub may be disposed between the first overhang structure OH1 and the outermost embankment BANK_O. The auxiliary cathode layer CAT_sub may be electrically connected to the cathode layer CAT. For example, the cathode layer CAT may be in contact with the auxiliary cathode layer CAT_sub, and thus may be electrically connected to the auxiliary cathode layer CAT_sub. For another example, the cathode layer CAT may be in contact with the first overhang structure OH1, and thus may be electrically connected to the auxiliary cathode layer CAT_sub via the first overhang structure OH1 that is capable of conducting electricity. For another example, the cathode layer CAT may be in contact with the second overhang structure OH2, and thus may be electrically connected to the auxiliary cathode layer CAT_sub via the second overhang structure OH2 that is capable of conducting electricity and the first overhang structure OH1 that is capable of conducting electricity. Therefore, the auxiliary cathode layer CAT_sub can contribute to the function of the cathode layer CAT configured to receive a basic voltage. Electrically connecting the cathode layer CAT to the auxiliary cathode layer CAT_sub can reduce the resistance of the cathode layer CAT. Since the cathode layer CAT is electrically connected to the second common driving voltage line VSSL, the resistance of the second common driving voltage line VSSL can be reduced, thereby reducing the voltage drop of the second common driving voltage VSS (ie, the base voltage).
[0226] exist Figure 9In a second example, the first overhang structure OH1 may include silicon oxide, and the second overhang structure OH2 may include amorphous silicon. In this embodiment, the auxiliary cathode layer CAT_sub may include a metal or a metal alloy. The auxiliary cathode layer CAT_sub may include one or more metal particles, such as silver (Ag), aluminum (Al), molybdenum (Mo), titanium (Ti), copper (Cu), gold (Au), magnesium (Mg), calcium (Ca), or barium (Ba). However, these metal particles are merely examples of what can be included in the auxiliary cathode layer CAT_sub, and thus, embodiments of the present disclosure are not limited thereto.
[0227] Figure 10 An exemplary cross-sectional view of a display panel 110 having an overhang structure according to aspects of the present disclosure is shown.
[0228] refer to Figure 10 , the first encapsulation layer PAS1 may be arranged so that the first encapsulation layer PAS1 covers the overhang structure OH, which is consistent with Figure 5 The arrangement of the first encapsulation layer PAS1 included in the illustrated display panel 110 is different. The first encapsulation layer PAS1 may be provided such that the first encapsulation layer PAS1 covers the top surface of the second overhang structure OH2.
[0229] refer to Figure 10 The first encapsulation layer PAS1 may be provided so that it covers the right surface (i.e., the outer side) of the second overhang structure OH2 and the right surface (i.e., the outer side) of the first overhang structure OH1. Therefore, the first encapsulation layer PAS1 may be in contact with the right surface (i.e., the outer side) of the first overhang structure OH1. The light-emitting element intermediate layer EL may be provided so that it is in contact with the left surface (i.e., the inner side) of the first overhang structure OH1.
[0230] Please refer to Figure 10 , the first encapsulation layer PAS1 may be disposed such that the first encapsulation layer PAS1 contacts a right portion (ie, an outer portion) of the bottom surface of the second overhang structure OH2 and contacts a right side surface (ie, an outer side) of the first overhang structure OH1.
[0231] Since the first encapsulation layer PAS1 is provided such that the first encapsulation layer PAS1 covers the entirety of the overhang structure OH, the overhang structure OH can be protected from external substances.
[0232] Furthermore, since the first encapsulation layer PAS1 is provided so as to cover the entire overhang structure OH, the first encapsulation layer PAS1 can prevent the overhang structure OH from being deformed during the manufacturing process of the display device 100 .
[0233] refer to Figure 10 The first encapsulation layer PAS1 may be provided so as to cover all of the first substrate SUB1, the interlayer insulating film IPD, the second substrate SUB2, the buffer layer BUF, the planarization layer PLN, and the overhang structure OH. The second encapsulation layer PCL1 may be provided on the first encapsulation layer PAS1 and extend from the display area to the dam area. The second encapsulation layer PCL1 may terminate inside the second overhang structure OH2 and be separated from the inside of the second overhang structure OH2 by the first encapsulation layer PAS1.
[0234] refer to Figure 10 , the third encapsulation layer PAS2 may be arranged such that the third encapsulation layer PAS2 covers the first encapsulation layer PAS1 and the third encapsulation layer PAS2 is located on the overhang structure OH. Figure 10 , the third encapsulation layer PAS2 may be provided such that the third encapsulation layer PAS2 covers the first encapsulation layer PAS1 in a rightward direction with respect to the overhang structure OH.
[0235] refer to Figure 10 , the fifth encapsulation layer PAS3 may be provided such that the fifth encapsulation layer PAS3 covers the third encapsulation layer PAS2 in a rightward direction with respect to the overhang structure OH.
[0236] An exemplary cross-sectional view of the display panel 110 illustrating the overhang structure OH and the transistor structure will be described below.
[0237] Figure 11 and Figure 12 is an exemplary cross-sectional view of a display panel 110 according to aspects of the present disclosure.
[0238] refer to Figure 11 The substrate SUB may include a first substrate SUB1, a second substrate SUB2, and an interlayer insulating layer IPD interposed between the first substrate SUB1 and the second substrate SUB2.
[0239] refer to Figure 11 , the transistor layer may be provided on the substrate SUB. The transistor layer may be a layer in which a driving transistor and a transistor of a gate driving circuit are provided.
[0240] The transistor layer may include a multi-buffer layer MBUF, a first insulating layer IL1 , a second insulating layer IL2 , a third insulating layer IL3 , a fourth insulating layer IL4 , a fifth insulating layer IL5 , and a first planarization layer PLN1 .
[0241] refer to Figure 11The first active layer ACT_g may be disposed on the first insulating layer IL1. The first active layer ACT_g may include low-temperature polysilicon (LTPS). The transistor including the first active layer ACT_g may be an LTPS thin film transistor (TFT).
[0242] refer to Figure 11 , the second insulating layer IL2 may be provided such that the second insulating layer IL2 covers the first active layer ACT_g.
[0243] See also Figure 11 , the first gate electrode GAT1 may be disposed on the second insulating layer IL2 . Figure 11 Three first gate electrodes GAT1 disposed on the second insulating layer IL2 are shown. One first gate electrode GAT_g among the three first gate electrodes GAT1 may be disposed such that the first gate electrode GAT_g overlaps the first active layer ACT_g.
[0244] refer to Figure 11 , the third insulating layer IL3 may be provided such that the third insulating layer IL3 covers the first gate electrode GAT1 .
[0245] refer to Figure 11 , the second gate electrode GAT2 may be disposed on the third insulating layer IL3 .
[0246] refer to Figure 11 , the fourth insulating layer IL4 may be provided such that the fourth insulating layer IL4 covers the third insulating layer IL3.
[0247] refer to Figure 11 The active layer ACT_d of the driving transistor may be disposed on the fourth insulating layer IL4. The active layer ACT_d of the driving transistor may include one or more oxide particles. That is, the driving transistor may be an oxide TFT.
[0248] refer to Figure 11 , the gate electrode GAT_d of the driving transistor and a first interlayer insulating layer (not shown) may be disposed on the active layer ACT_d of the driving transistor.
[0249] refer to Figure 11 , the fifth insulating layer IL5 may be provided such that the fifth insulating layer IL5 covers the gate electrode GAT_d of the driving transistor.
[0250] Thereafter, contact holes may be formed in the fifth insulating layer IL5 and the fourth insulating layer IL4 , and the first source-drain electrode SD1 may be disposed through the contact holes.
[0251] refer to Figure 11, the first planarization layer PLN1 may be provided on the fifth insulating layer IL5. Additional contact holes may be formed in the first planarization layer PLN1, and the second source-drain electrode SD2 may be provided through these contact holes. The second source-drain electrode SD2 may be provided in contact with the first source and drain electrode SD1.
[0252] See also Figure 11 , the second planarization layer PLN2 may be provided on the first planarization layer PLN1. A contact hole may be formed in the second planarization layer PLN2, and the anode layer may be provided through the contact hole. The anode layer may be referred to as an anode electrode AE.
[0253] refer to Figure 11 , Figure 5 The light emitting element intermediate layer EL, the overhang structure OH, the encapsulation layer, etc. shown in FIG. Figure 5 Discussion of those elements shown are identical or substantially identical elements.
[0254] refer to Figure 11 , the components of the driving transistor (GAT_d and ACT_d) can be set in the display area (not shown). For example, the components of the driving transistor (GAT_d and ACT_d) can be set so that these components overlap with the anode layer AE or the light-emitting element intermediate layer EL. The components of the transistor of the gate driving circuit (GAT_g and ACT_g) can be set in the non-display area (not shown). In this implementation, the components of the transistor of the gate driving circuit (GAT_g and ACT_g) can be set Figure 3 The second non-display area NDA2 or Figure 3 In the fourth non-display area NDA4 shown.
[0255] refer to Figure 12 In one embodiment, the components of the driving transistor (GAT_d and ACT_d) may be disposed in a non-display area (not shown). In this implementation, the components of the driving transistor (GAT_d and ACT_d) may be disposed in a non-display area (not shown). Figure 3 The second non-display area NDA2 or Figure 3 In the fourth non-display area NDA4 shown. In one embodiment, the components of the transistors of the gate drive circuit (GAT_g and ACT_g) can be arranged in the display area (not shown). For example, the components of the transistors of the gate drive circuit (GAT_d and ACT_d) can be arranged so that they overlap with the anode layer AE or the light emitting element intermediate layer EL.
[0256] Figure 13 、 Figure 14 and Figure 15 An exemplary manufacturing process of the display panel 110 according to aspects of the present disclosure is shown.
[0257] Figure 13 The first to fourth steps (step 1 , step 2 , step 3 , and step 4 ) in the manufacturing process of the display panel 110 are shown. Figure 13 The first step (step 1) shows a stacked configuration in which an interlayer insulating layer IPD, a second substrate SUB2, an insulating layer IL, a planarization layer PLN, a bank BANK, and an anode layer AE are deposited on a first substrate SUB1. After the first step (step 1), a process of forming an overhang structure OH on the outermost bank BANK_O can be performed.
[0258] refer to Figure 13 In the second step (step 2), a first overhang structure OH1 may be deposited on the stack of the bank BANK and the anode layer AE so that the first overhang structure OH1 covers the bank BANK and the anode layer AE. A second overhang structure OH2 may be deposited so that the second overhang structure OH2 covers the first overhang structure OH1.
[0259] refer to Figure 13 In the third step (step 3), a first photoresist PR1 may be deposited on the second overhang structure OH2 in a region overlapping with the outermost bank BANK_O. Thereafter, an etching process may be performed to form the overhang structure OH.
[0260] refer to Figure 13 In the fourth step (step 4), the overhang structure OH may be arranged so that the overhang structure OH overlaps the outermost bank BANK_O. The specific process of forming the overhang structure OH will be described in detail later. The overhang structure OH may include a first overhang structure OH1 and a second overhang structure OH2. The width of the second overhang structure OH2 (i.e., the distance between the left and right ends of the second overhang structure OH2) may be greater than the width of the first overhang structure OH1 (i.e., the distance between the left and right ends of the first overhang structure OH1). The thickness of the first overhang structure OH1 may be greater than the thickness of the second overhang structure OH2.
[0261] Figure 14 5 to 8 (step 5, step 6, step 7 and step 8) of the manufacturing process of the display panel 110 are shown. Figure 14In the fifth step (step 5), the light-emitting element intermediate layer EL may be deposited on the stack of the bank BANK, the anode layer AE, and the overhang structure OH so that the light-emitting element intermediate layer EL can cover the bank BANK, the anode layer AE, and the overhang structure OH. In this step, the light-emitting element intermediate layer EL may be provided in a form in which a portion of the light-emitting element intermediate layer EL adjacent to the overhang structure OH is disconnected. For example, the light-emitting element intermediate layer EL may be deposited so that when the light-emitting element intermediate layer EL is provided on the stack of the bank BANK, the anode layer AE, and the overhang structure OH, the portion of the light-emitting element intermediate layer EL provided on and overlapping the overhang structure OH is disconnected from the portion of the light-emitting element intermediate layer EL provided on the side of the overhang structure OH.
[0262] refer to Figure 14 In the sixth step (step 6), the cathode layer CAT may be deposited on the light-emitting element intermediate layer EL. In this step, the cathode layer CAT may be provided in a form in which a portion of the cathode layer CAT adjacent to the overhang structure OH is disconnected. For example, the cathode layer CAT may be deposited so that when the cathode layer CAT is provided on the light-emitting element intermediate layer EL, a portion of the cathode layer CAT provided on and overlapping the overhang structure OH is disconnected from a portion of the cathode layer CAT provided on a side of the overhang structure OH.
[0263] refer to Figure 14 In the seventh step (step 7), the cap layer CPL may be deposited on the cathode layer CAT. The cap layer CPL may be deposited on the cathode layer CAT such that the cap layer CPL can cover the overhang structure OH.
[0264] refer to Figure 14 In the eighth step (step 8), the first encapsulation layer PAS1 may be deposited such that the first encapsulation layer PAS1 covers the cap layer CPL.
[0265] Figure 15 9 to 12 (step 9, step 10, step 11, and step 12) of the manufacturing process of the display panel 110 are shown. Figure 15 In the ninth step (step 9), a second photoresist PR2 may be deposited on the first encapsulation layer PAS1. The second photoresist PR2 may be disposed so that the second photoresist PR2 partially overlaps with the left side of the overhang structure OH. The second photoresist PR2 may also be disposed in an area overlapping with the display area.
[0266] refer to Figure 15In the tenth step (step 10), after the second photoresist PR2 is formed, an etching process may be performed. As the etching process proceeds, the corresponding portion of the first encapsulation layer PAS1 disposed on the top and right side of the overhang structure OH may be etched and removed. As the etching process proceeds, the corresponding portion of the cap layer CPL disposed on the top and right side of the overhang structure OH may be etched and removed.
[0267] refer to Figure 15 In the eleventh step (step 11), the second encapsulation layer PCL1 may be deposited on the first encapsulation layer PAS1. The second encapsulation layer PCL1 may be disposed in an area overlapping with the display area. The right edge of the second encapsulation layer PCL1 may overlap with the left edge of the overhang structure OH. The third encapsulation layer PAS2 may be deposited on the second encapsulation layer PCL1. The third encapsulation layer PAS2 may be deposited so that the third encapsulation layer PAS2 extends only until a position covering the second encapsulation layer PCL1. The third encapsulation layer PAS2 may also be deposited so that the third encapsulation layer PAS2 covers the overhang structure OH. The first encapsulation layer PAS1 and the third encapsulation layer PAS2 may be inorganic encapsulation layers, and the second encapsulation layer PCL1 may be an organic encapsulation layer.
[0268] refer to Figure 15 In the twelfth step (step 12), a fourth encapsulation layer PCL2 may be deposited on the third encapsulation layer PAS2. The fourth encapsulation layer PCL2 may be deposited so that the fourth encapsulation layer PCL2 covers the overhang structure OH. A fifth encapsulation layer PAS3 may be deposited on the third encapsulation layer PAS2. The fourth encapsulation layer PCL2 may be an organic encapsulation layer, and the fifth encapsulation layer PAS3 may be an inorganic encapsulation layer.
[0269] Figure 16 An exemplary process of forming the overhang structure OH in the display panel 110 according to aspects of the present disclosure is shown.
[0270] refer to Figure 16 , a process of forming a portion of the overhang structure OH will be described. Figure 16 , will form Figure 5 The process of the right side portion (ie, the outer side portion) of the overhang structure OH is described as an example.
[0271] Figure 16 The first to sixth steps (step a, step b, step c, step d, step e, and step f) are shown. Figure 16In the first step (step a), a stack of an auxiliary cathode layer CAT_sub, a first overhang structure OH1, and a second overhang structure OH2 may be deposited. The auxiliary cathode layer CAT_sub may include a metal such as molybdenum and titanium. The first overhang structure OH1 may include silicon oxide or the like. The second overhang structure OH2 may include amorphous silicon or the like.
[0272] refer to Figure 16 In the second step (step b), a photoresist PR may be deposited on the second overhang structure OH2. A right edge of the photoresist PR may be shorter than a right edge of the second overhang structure OH2.
[0273] refer to Figure 16 In the third step (step c), after depositing the photoresist PR, a first etching process may be performed. In the first etching process, amorphous silicon or the like may be etched and removed. The right edge of the second overhang structure OH2 may be etched and removed. Due to this implementation, the right side portion of the first overhang structure OH1 may protrude beyond the right end of the second overhang structure OH2.
[0274] refer to Figure 16 After the fourth step (step d), a second etching process may be performed. In the second etching process, silicon oxide or the like may be etched and removed. The right edge of the first overhang structure OH1 may be etched and removed. Due to this implementation, the right side of the second overhang structure OH2 may protrude beyond the right end of the first overhang structure OH1. The right side of the auxiliary cathode layer CAT_sub may protrude beyond the corresponding right ends of the first overhang structure OH1 and the second overhang structure OH2.
[0275] refer to Figure 16 The fifth step (step e) of the embodiment of the present invention may be followed by a third etching process. In the third etching process, molybdenum, titanium, or the like may be etched and removed. The right edge of the auxiliary cathode layer CAT_sub may be etched and removed. The right end of the auxiliary cathode layer CAT_sub may be aligned or nearly aligned with the right end of the first overhang structure OH1.
[0276] refer to Figure 16 The sixth step (step f) is completed, after which the fourth etching process can be performed. In the fourth etching process, silicon oxide or the like can be etched and removed. The right edge of the first overhang structure OH1 can be etched and removed. Due to this implementation, the right side portion of the second overhang structure OH2 can further protrude beyond the right end of the first overhang structure OH1. In addition, the right side portion of the auxiliary cathode layer CAT_sub can protrude beyond the right side edge of the first overhang structure OH1. That is, for each element, the width between the left and right ends can be "second overhang structure OH2>auxiliary cathode layer CAT_sub>first overhang structure OH1". After completing Figure 16 In the sixth step (step f) shown in FIG. Figure 5 The right side of the overhang structure OH is shown. It should be understood that a similar process can be used to form Figure 5 The left side portion (ie, the inner side portion) of the overhang structure OH shown in FIG. Figure 5 Overhang structure OH shown.
[0277] The thickness of the first overhang structure OH1 may be greater than the sum of the thicknesses of the emission layer EL and the cathode layer CAT. For example, the thickness of the first overhang structure OH1 may be equal to or greater than the sum of the thicknesses of the emission layer EL, the cathode layer CAT, and the cap layer CL.
[0278] The above-mentioned embodiment will be briefly described below.
[0279] According to the embodiments described herein, a display device may be provided, comprising: a substrate comprising a display area and a dam area surrounding the display area; a planarization layer arranged on the substrate; an outermost embankment arranged on the planarization layer in the dam area; a first overhang structure arranged on and overlapping with the outermost embankment; a second overhang structure arranged on and overlapping with the first overhang structure; and an emission layer, the emission layer being arranged on the planarization layer and extending from the display area to the dam area and terminating at the inner side of the first overhang structure facing the display area.
[0280] The display device may further include a cathode layer disposed on the emission layer, extending from the display region to the dam region, and terminating at the inner side of the first overhang structure. The cathode layer may be in contact with the second overhang structure.
[0281] The second overhang structure may include a conductive material, and the second overhang structure may be electrically connected to the cathode layer.
[0282] The second overhang mechanism may include a first extension portion extending beyond the first overhang structure in a lateral inward direction toward the display area, the first extension portion may include a bottom surface facing the substrate; and the cathode layer may contact the bottom surface of the first extension portion of the second overhang mechanism.
[0283] The emission layer may be in contact with both the bottom surface of the first extension portion of the second overhang structure and the inner side of the first overhang structure; and the cathode layer may be spaced apart from the inner side of the first overhang structure by the emission layer.
[0284] The cathode layer may also contact the inner side of the first overhang structure, and the first overhang structure may include a conductive material, and the first overhang structure may be electrically connected to the cathode layer.
[0285] The display device may further include an auxiliary cathode layer disposed between the first overhang structure and the outermost bank, and the cathode layer may be electrically connected to the auxiliary cathode layer.
[0286] A width of the second overhang structure may be greater than a width of the auxiliary cathode layer, and the width of the auxiliary cathode layer may be greater than a width of the first overhang structure.
[0287] The display device may further include a cathode layer disposed on the emission layer and extending from the display region to the dam region and terminating at the inner side of the first overhang structure. The cathode layer may be in contact with the inner side of the first overhang structure.
[0288] The first overhang structure may include a conductive material, and the first overhang structure may be electrically connected to the cathode layer.
[0289] The emission layer may be spaced apart from the first overhang structure by the cathode layer.
[0290] The display device may further include: a cathode layer, which is arranged on the emission layer, extends from the display area to the dam area, and terminates at the inner side of the first overhang structure; a cover layer, which is arranged on the cathode layer, extends from the display area to the dam area, and terminates at the inner side of the first overhang structure; and a first encapsulation layer arranged on the cover layer.
[0291] The first encapsulation layer may extend from the display region to the dam region and terminate at the inner side of the first overhang structure, and the first encapsulation layer may contact the inner side of the first overhang structure.
[0292] A top surface of the second overhang structure facing away from the substrate may be higher than a top surface of the first encapsulation layer facing away from the substrate.
[0293] The second overhang mechanism may include a first extension portion extending beyond the first overhang structure in a lateral inward direction toward the display area, and the first extension portion may include a bottom surface facing the substrate; and the top surface of the first encapsulation layer may contact the bottom surface of the first extension portion of the second overhang mechanism.
[0294] The emission layer, the cathode layer, and the capping layer may be spaced apart from the first and second overhang structures by the first encapsulation layer.
[0295] The display device may further include a second encapsulation layer, which is arranged on the first encapsulation layer and extends from the display area to the dam area. The second encapsulation layer may terminate at the inner side of the second overhang structure facing the display area and may contact the inner side of the second overhang structure.
[0296] The display device may further include a third encapsulation layer, which is arranged on the second encapsulation layer and extends from the display area to the dam area. The third encapsulation layer may cover the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
[0297] The first encapsulation layer may extend from the display area to the dam area and may terminate at the inner side of the second overhang structure facing the display area, and the first encapsulation layer may contact the inner side of the second overhang structure; and the display device may further include a second encapsulation layer, which is arranged on the first encapsulation layer and extends from the display area to the dam area, and the second encapsulation layer may terminate at the inner side of the second overhang structure and may be separated from the inner side of the second overhang structure by the first encapsulation layer.
[0298] The display device may further include a third encapsulation layer, which is arranged on the second encapsulation layer and extends from the display area to the dam area. The third encapsulation layer may cover the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
[0299] The first encapsulation layer can extend from the display area to the dam area and cover the inner side of the second overhang structure facing the display area, the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
[0300] The second overhang mechanism may include a second extension portion extending beyond the first overhang structure in a lateral outward direction away from the display area, and the second extension portion may include a bottom surface facing the substrate; and the first encapsulation layer may also cover the bottom surface of the second extension portion of the second overhang mechanism.
[0301] The display device may further include: a second encapsulation layer, which is arranged on the first encapsulation layer and extends from the display area to the dam area, the second encapsulation layer terminates at the inner side of the second overhang structure and is separated from the inner side of the second overhang structure by the first encapsulation layer; and a third encapsulation layer, which covers the second encapsulation layer and the first encapsulation layer.
[0302] The display device may further include: a fourth encapsulation layer disposed on the third encapsulation layer and overlapping the second overhang structure; and a fifth encapsulation layer disposed on the fourth encapsulation layer.
[0303] The inner side of the first overhang structure may be a first inner side, and the first overhang structure may further include a first outer side opposite to the first inner side, and the first overhang structure may have a first width between the first inner side and the first outer side; the second overhang structure may include a second inner side facing the display area and a second outer side opposite to the second inner side, and the second overhang structure may have a second width between the second inner side and the second outer side; and the second width may be greater than the first width.
[0304] The second overhang may include a first extension portion extending beyond the first inner side of the first overhang structure in a lateral inward direction toward the display area; and the emitting layer may terminate at a position below the first extension portion of the second overhang.
[0305] The second overhang mechanism may include a second extension portion extending beyond the first overhang structure in a laterally outward direction away from the display area.
[0306] The display device may further include a cathode layer, which is arranged on the emission layer and extends from the display area to the dam area and terminates at the inner side of the first overhang structure; and the thickness of the first overhang structure may be greater than the sum of the thickness of the emission layer and the thickness of the cathode layer.
[0307] The display device may further include a cover layer, which is arranged on the cathode layer and extends from the display area to the dam area and terminates at the inner side of the first overhang structure; and the thickness of the first overhang structure may be equal to the sum of the thickness of the emission layer, the thickness of the cathode layer and the thickness of the cover layer.
[0308] The display device may further include: a transistor layer, which is provided on the substrate and may include a driving transistor; an anode layer, which is provided on the planarization layer and is electrically connected to a drain electrode or a source electrode of the driving transistor, wherein the emission layer is provided on the anode layer; F24-0229CN001_FP24-3344 / LGD / CN
[0309] and a cathode layer disposed on the emission layer.
[0310] The first overhang structure may include silicon oxide, and / or the second overhang structure may include amorphous silicon.
[0311] The above description has been presented to enable any person skilled in the art to make and use the technical ideas of the present disclosure, and the above description is provided in the context of specific applications and their requirements. Various modifications, additions and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the present disclosure. The above description and accompanying drawings provide examples of the technical ideas of the present disclosure and are for reference only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of the present disclosure.
Claims
1. A display device comprising: a substrate comprising a display area and a dam area surrounding the display area; a planarization layer disposed on the substrate; an outermost bank provided on the planarization layer in the dam region; a first overhanging structure disposed on and overlapping the outermost embankment; a second overhang structure disposed on and overlapping the first overhang structure; as well as An emission layer is provided on the planarization layer, extends from the display region to the dam region, and terminates at an inner side of the first overhang structure facing the display region.
2. The display device according to claim 1, wherein The display device further includes a cathode layer, which is disposed on the emission layer and extends from the display region to the dam region and terminates at the inner side of the first overhang structure. Wherein, the cathode layer is in contact with the second overhanging structure.
3. The display device according to claim 2, wherein: The second overhang structure includes a conductive material, and the second overhang structure is electrically connected to the cathode layer.
4. The display device according to claim 2, wherein: the second overhang mechanism comprising a first extension portion extending beyond the first overhang structure in a lateral inward direction toward the display area, the first extension portion comprising a bottom surface facing the substrate; and The cathode layer contacts the bottom surface of the first extension portion of the second overhang.
5. The display device according to claim 4, wherein: the emitting layer is in contact with both the bottom surface of the first extension portion of the second overhang structure and the inner side of the first overhang structure; and The cathode layer is spaced apart from the inner side of the first overhang structure by the emitter layer.
6. The display device according to claim 2, wherein: The cathode layer is also in contact with the inner side of the first overhang structure, and the first overhang structure includes a conductive material and is electrically connected to the cathode layer.
7. The display device according to claim 2, wherein: The display device further includes an auxiliary cathode layer disposed between the first overhang structure and the outermost bank. Wherein, the cathode layer is electrically connected to the auxiliary cathode layer.
8. The display device according to claim 7, wherein: The width of the second overhang structure is greater than the width of the auxiliary cathode layer, and the width of the auxiliary cathode layer is greater than the width of the first overhang structure.
9. The display device according to claim 1, wherein The display device further includes a cathode layer, which is disposed on the emission layer and extends from the display region to the dam region and terminates at the inner side of the first overhang structure. The cathode layer contacts the inner side of the first overhang structure.
10. The display device according to claim 9, wherein The first overhang structure includes a conductive material, and the first overhang structure is electrically connected to the cathode layer.
11. The display device according to claim 2 or 9, characterized in that: The emission layer is separated from the first overhang structure by the cathode layer.
12. The display device according to claim 1, wherein The display device further includes: a cathode layer, the cathode layer being disposed on the emission layer, extending from the display area to the dam area, and terminating at the inner side of the first overhang structure; a capping layer disposed on the cathode layer, extending from the display region to the dam region, and terminating at the inner side of the first overhanging structure; and A first encapsulation layer is disposed on the cover layer.
13. The display device according to claim 12, wherein: The first encapsulation layer extends from the display area to the dam area and terminates at the inner side of the first overhang structure, and the first encapsulation layer contacts the inner side of the first overhang structure.
14. The display device according to claim 13, wherein: A height of a top surface of the second overhang structure facing away from the substrate is higher than a height of a top surface of the first encapsulation layer facing away from the substrate.
15. The display device according to claim 14, wherein: the second overhang mechanism comprising a first extension portion extending beyond the first overhang structure in a lateral inward direction toward the display area, the first extension portion comprising a bottom surface facing the substrate; and The top surface of the first encapsulation layer contacts the bottom surface of the first extension portion of the second overhang mechanism.
16. The display device according to claim 13, wherein The emission layer, the cathode layer, and the cap layer are separated from the first overhang structure and the second overhang structure by the first encapsulation layer.
17. The display device according to claim 13, wherein: The display device also includes a second encapsulation layer, which is arranged on the first encapsulation layer and extends from the display area to the dam area. The second encapsulation layer terminates at the inner side of the second overhang structure facing the display area and contacts the inner side of the second overhang structure.
18. The display device according to claim 17, wherein: The display device also includes a third encapsulation layer, which is arranged on the second encapsulation layer and extends from the display area to the dam area, the third encapsulation layer covering the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
19. The display device according to claim 12, wherein: The first encapsulation layer extends from the display area to the dam area and terminates at an inner side of the second overhang structure facing the display area, the first encapsulation layer being in contact with the inner side of the second overhang structure; as well as The display device also includes a second encapsulation layer, which is arranged on the first encapsulation layer and extends from the display area to the dam area. The second encapsulation layer terminates at the inner side of the second overhang structure and is separated from the inner side of the second overhang structure by the first encapsulation layer.
20. The display device according to claim 19, wherein The display device also includes a third encapsulation layer, which is arranged on the second encapsulation layer and extends from the display area to the dam area, the third encapsulation layer covering the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
21. The display device according to claim 12, wherein: The first encapsulation layer extends from the display area to the dam area and covers the inner side of the second overhang structure facing the display area, the top surface of the second overhang structure facing away from the substrate, the outer side of the second overhang structure opposite to the inner side of the second overhang structure, the outer side of the first overhang structure opposite to the inner side of the first overhang structure, and the outer side of the outermost embankment.
22. The display device according to claim 21, wherein: the second overhang mechanism comprising a second extension portion extending beyond the first overhang structure in a laterally outward direction away from the display area, the second extension portion comprising a bottom surface facing toward the substrate; and The first encapsulation layer also covers the bottom surface of the second extension portion of the second overhanging structure.
23. The display device according to claim 21, wherein The display device further includes: a second encapsulation layer disposed on the first encapsulation layer and extending from the display area to the dam area, the second encapsulation layer terminating at the inner side of the second overhang structure and being spaced apart from the inner side of the second overhang structure by the first encapsulation layer; and A third encapsulation layer covers the second encapsulation layer and the first encapsulation layer.
24. The display device according to any one of claims 18, 20 and 23, characterized in that The display device further includes: a fourth encapsulation layer, the fourth encapsulation layer being disposed on the third encapsulation layer and overlapping the second overhanging structure; and A fifth encapsulation layer is disposed on the fourth encapsulation layer.
25. The display device according to claim 1, wherein: The inner side of the first overhang structure is a first inner side, the first overhang structure further includes a first outer side opposite to the first inner side, and the first overhang structure has a first width between the first inner side and the first outer side; The second overhang structure includes a second inner side facing the display area and a second outer side opposite to the second inner side, and the second overhang structure has a second width between the second inner side and the second outer side; and The second width is greater than the first width.
26. The display device according to claim 25, wherein: the second overhang mechanism comprising a first extension portion extending beyond the first inner side of the first overhang structure in a lateral inward direction toward the display area; and The emitting layer terminates at a location below the first extension of the second overhang.
27. The display device according to claim 25, wherein: The second overhang mechanism includes a second extension portion extending beyond the first overhang structure in a laterally outward direction away from the display area.
28. The display device according to claim 1, wherein: The display device further includes a cathode layer, the cathode layer being disposed on the emission layer, extending from the display region to the dam region, and terminating at the inner side of the first overhang structure; and The thickness of the first overhang structure is greater than the sum of the thickness of the emission layer and the thickness of the cathode layer.
29. The display device according to claim 28, wherein: The display device further includes a capping layer, the capping layer being disposed on the cathode layer, extending from the display region to the dam region, and terminating at the inner side of the first overhanging structure; as well as The thickness of the first overhang structure is equal to the sum of the thickness of the emission layer, the thickness of the cathode layer, and the thickness of the cap layer.
30. The display device according to claim 1, wherein The display device further includes: a transistor layer provided on the substrate and including a driving transistor; an anode layer provided on the planarization layer and electrically connected to a drain electrode or a source electrode of the driving transistor, wherein the emission layer is provided on the anode layer; and A cathode layer is provided on the emission layer.
31. The display device according to claim 1, wherein The first overhang structure includes silicon oxide, and / or the second overhang structure includes amorphous silicon.