Capacitance-free voltage stabilizing circuit and method

Abstract

The invention discloses a capacitance-free voltage stabilizing circuit and method. The capacitance-free voltage stabilizing circuit comprises an analog power supply generation module, a bias current generation and conversion module and a power supply generation module, the analog power supply generation module generates a stable analog voltage and provides the stable analog voltage to the bias current generation and conversion module; the bias current generation and conversion module generates stable bias current based on the stable analog voltage, performs current mirroring and scaling, and outputs a current signal adaptive to the power supply generation module; and the power supply generation module generates power voltage with high driving capability according to the received current signal. According to the invention, external capacitors can be saved, and rapid dynamic response required when the driving circuit works can be satisfied.

Description

Technical Field

[0001] The present invention belongs to the technical field of voltage stabilization circuits, and in particular relates to a capacitor-free voltage stabilization circuit and method. Background Art

[0002] High-voltage power chips typically use linear regulators such as LDOs to power their internal analog circuits. When the driver transistors within a high-voltage power chip are heavily loaded, external capacitors are required. Otherwise, they cannot provide fast dynamic response, resulting in large output voltage fluctuations and impacting the operation of the chip's sequential and combinational logic circuits. However, adding external capacitors not only increases costs but also reduces the integration density of the high-voltage power chip. Summary of the Invention

[0003] In view of the above problems, the present invention proposes a capacitor-free voltage stabilization circuit and method, which can not only save external capacitors but also meet the fast dynamic response required by the driving circuit during operation.

[0004] In order to achieve the above technical objectives and the above technical effects, the present invention is implemented through the following technical solutions:

[0005] In a first aspect, the present invention provides a capacitor-free voltage stabilization circuit, comprising: an analog power supply generation module, a bias current generation and conversion module, and a power supply generation module;

[0006] The analog power generation module generates a stable analog voltage and provides the stable analog voltage to the bias current generation and conversion module;

[0007] The bias current generation and conversion module generates a stable bias current based on the stable analog voltage, performs current mirroring and scaling, and outputs a current signal adapted to the power supply generation module;

[0008] The power supply generating module generates a power voltage with high driving capability based on the received current signal.

[0009] In combination with the first aspect, optionally, the analog power generation module includes: a first resistor R1, a first MOS transistor NM1, a second MOS transistor NLD1 and a first voltage regulator transistor ZD1;

[0010] The first end of the first resistor R1 is used to connect to the high-voltage power supply VIN_HV, and the second end thereof is respectively connected to the gate and drain of the first MOS transistor NM1, and the gate of the second MOS transistor NLD1;

[0011] The cathode of the first voltage regulator ZD1 is connected to the source of the first MOS transistor NM1 , and the anode thereof is grounded; the drain of the second MOS transistor NLD1 is used to connect to the high-voltage power supply VIN_HV.

[0012] In combination with the first aspect, optionally, the high voltage power supply VIN_HV is applied to the first MOS tube NM1 and the first voltage regulator tube ZD1 after passing through the first resistor R1 to generate a voltage , ,in, is the voltage drop across the gate and source of the first MOS transistor NM1 when it operates in the saturation region, The regulated voltage of the first voltage regulator tube ZD1 when it is working in the breakdown region;

[0013] The voltage Drive the second MOS transistor NLD1 to generate a stable analog voltage at the source terminal of the second MOS transistor NLD1 , ,in, is the driving voltage across the gate and source required by the second MOS transistor NLD1 during operation.

[0014] In combination with the first aspect, optionally, the analog power generation module further includes a second voltage regulator diode ZD2 and a first capacitor C1;

[0015] The positive electrode of the second voltage regulator tube ZD2 is grounded, and the negative electrode is connected to the source electrode of the second MOS tube NLD1;

[0016] One end of the first capacitor C1 is grounded, and the other end is connected to the source of the second MOS transistor NLD1.

[0017] In combination with the first aspect, optionally, the bias current generating and converting module includes: a current source IBIAS, a third MOS transistor NM2, a fourth MOS transistor NM3, a fifth MOS transistor NLD2 and a sixth MOS transistor PLD1;

[0018] The input of the current source IBIAS is connected to the stable analog voltage The output end thereof is connected to the gate and drain of the third MOS transistor NM2 respectively;

[0019] The source of the third MOS transistor NM2 is grounded;

[0020] The gate of the fourth MOS transistor NM3 is connected to the gate of the third MOS transistor NM2, the drain of the fourth MOS transistor NM3 is connected to the source of the fifth MOS transistor NLD2, and the source of the fourth MOS transistor NM3 is grounded;

[0021] The gate of the fifth MOS transistor NLD2 is connected to the stable analog voltage connected to the gate and drain of the sixth MOS transistor PLD1 respectively;

[0022] The source of the sixth MOS transistor PLD1 is connected to the high-voltage power supply VIN_HV.

[0023] In combination with the first aspect, optionally, the current source IBIAS stabilizes the analog voltage A constant current IB is generated under the action of the third MOS transistor NM2, and is mirrored to the fourth MOS transistor NM3, and finally outputs the current signal of the adaptation power supply generation module through the sixth MOS transistor PLD1;

[0024] The fifth MOS transistor NLD2 isolates the high-voltage power supply for the fourth MOS transistor NM3 so that the voltage applied to the drain of the fourth MOS transistor NM3 is less than 5V.

[0025] In combination with the first aspect, optionally, the power supply generation module includes: a seventh MOS transistor PLD2, an eighth MOS transistor NM4, a ninth MOS transistor NLD3 and a second capacitor C2;

[0026] The gate of the seventh MOS transistor PLD2 is connected to the gate of the sixth MOS transistor PLD1, the source of the seventh MOS transistor PLD2 is connected to the high-voltage power supply VIN_HV, and the drain of the seventh MOS transistor PLD2 is connected to the drain and gate of the eighth MOS transistor NM4 respectively;

[0027] The source of the eighth MOS tube NM4 is connected to the stable analog voltage connected;

[0028] The gate of the ninth MOS transistor NLD3 is connected to the drain of the seventh MOS transistor PLD2, the drain of the ninth MOS transistor NLD3 is used to connect to the high-voltage power supply VIN_HV, and the source of the ninth MOS transistor NLD3 serves as the output end of the capacitor-free voltage stabilization circuit to generate a power voltage with high driving capability;

[0029] One end of the second capacitor is connected to the gate of the ninth MOS transistor NLD3 , and the other end is grounded.

[0030] In combination with the first aspect, optionally, the current signal of the adaptive power supply generating module output by the sixth MOS transistor PLD1 is mirrored to the branch where the seventh MOS transistor PLD2 is located through the sixth MOS transistor PLD1 and the seventh MOS transistor PLD2, and is loaded onto the eighth MOS transistor NM4 to generate a bias voltage VB; a stable analog voltage is loaded at the source of the eighth MOS transistor NM4. , so the voltage at the gate of the ninth MOS tube NLD3 is , the voltage at the source of the ninth MOS transistor NLD3 , For high driving capability power supply, is the voltage across the gate and source when the eighth MOS transistor NM4 operates in the saturation region, It is the driving voltage across the gate and source required by the ninth MOS transistor NLD3 during operation.

[0031] In combination with the first aspect, optionally, the power supply generation module further includes a third voltage regulator diode ZD3, a second resistor R2 and a third capacitor C3;

[0032] The positive electrode of the third voltage regulator tube ZD3 is grounded, and the negative electrode is connected to the source electrode of the ninth MOS tube NLD3;

[0033] One end of the second resistor R2 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3;

[0034] One end of the third capacitor C3 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3.

[0035] In a second aspect, the present invention provides a voltage stabilization method based on the capacitor-free voltage stabilization circuit according to any one of the first aspects, comprising:

[0036] Generate a stable analog voltage using an analog power generation module, and provide the stable analog voltage to a bias current generation and conversion module;

[0037] Using the bias current generation and conversion module to generate a stable bias current based on the stable analog voltage, and performing current mirroring and scaling to output a current signal adapted to the power supply generation module;

[0038] The power supply generating module generates a power voltage with high driving capability based on the received current signal.

[0039] Compared with the prior art, the present invention has the following beneficial effects:

[0040] The present invention provides a capacitor-free voltage stabilization circuit and method, which can not only save external capacitors but also meet the fast dynamic response required by the driving circuit during operation.

[0041] The present invention provides a capacitor-free voltage stabilization circuit and method. Based on the principle of MOS transistors, the VCCP output voltage is controlled by the gate voltage. To enhance the dynamic response capability of the power module, the control capability of the VB voltage must be enhanced. The present invention employs a constant current source added to the voltage stabilizing transistor while forming a backup path through the body diodes of MOS transistors NLD1 and NM4 (the body diode is a diode between the substrate and the drain of MOS transistor NM4; since the substrate and the source are connected together, it can be considered a diode between the source and the drain). Under stable conditions, the constant current source provides a DC output voltage. When the load changes rapidly, the VB voltage fluctuates. When the fluctuation is high, a discharge path is formed through MOS transistors NM4 and NLD2. When the fluctuation is low, the path formed by the body diodes of MOS transistors NLD1 and NM4 rapidly injects charge into VB, maintaining the stability of the VB voltage, thereby stabilizing the high-drive power voltage VCCP. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive work, among which:

[0043] Figure 1 FIG. 4 is a circuit diagram of a capacitor-free voltage stabilization circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0044] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is in no way intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0045] Unless otherwise specifically stated, the relative arrangement of the parts and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the drawings are not drawn according to actual proportional relationships. The techniques, methods and equipment known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods and equipment should be considered as part of the authorization specification. In all examples shown and discussed here, any specific values ​​should be interpreted as being merely exemplary, not as limitations. Therefore, other examples of the exemplary embodiments may also include different values. It should be noted that similar numbers and letters represent similar items in the following figures, and therefore, once an item is defined in one figure, it does not need to be further discussed in subsequent figures.

[0046] In the description of the present invention, "several" means more than one, "plurality" means more than two, "greater than," "less than," and "exceed" are understood to exclude the number itself, while "above," "below," and "within" are understood to include the number itself. The use of "first" and "second" in the description is solely for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0047] In the description of the present invention, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the exemplary expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0048] The application principle of the present invention is described in detail below with reference to the accompanying drawings.

[0049] Example 1

[0050] The embodiment of the present invention provides a capacitor-free voltage stabilization circuit, such as Figure 1 As shown, it includes: an analog power generation module, a bias current generation and conversion module and a power supply generation module;

[0051] The analog power generation module generates a stable analog voltage and provides the stable analog voltage to the bias current generation and conversion module;

[0052] The bias current generation and conversion module generates a stable bias current based on the stable analog voltage, performs current mirroring and scaling, and outputs a current signal adapted to the power supply generation module;

[0053] The power supply generating module generates a power voltage with high driving capability based on the received current signal.

[0054] The above solution not only saves external capacitors but also meets the fast dynamic response required by the driving circuit during operation.

[0055] In a specific implementation of the embodiment of the present invention, the analog power generation module includes: a first resistor R1, a first MOS transistor NM1, a second MOS transistor NLD1 and a first voltage regulator transistor ZD1;

[0056] The first resistor R1 is a current limiting resistor; the second MOS transistor NLD1 is a high-voltage N-type MOS transistor; the first voltage regulator ZD1 is a Zener transistor. Generally, in a high-voltage BCD process, the regulated voltage of the first voltage regulator ZD1 is 5V;

[0057] The first end of the first resistor R1 is used to connect to the high-voltage power supply VIN_HV, and the second end thereof is respectively connected to the gate and drain of the first MOS transistor NM1, and the gate of the second MOS transistor NLD1;

[0058] The cathode of the first voltage regulator ZD1 is connected to the source of the first MOS transistor NM1 , and the anode thereof is grounded; the drain of the second MOS transistor NLD1 is used to connect to the high-voltage power supply VIN_HV.

[0059] In a specific implementation of the embodiment of the present invention, the high voltage power supply VIN_HV is applied to the first MOS tube NM1 and the first voltage regulator tube ZD1 after passing through the first resistor R1 to generate a voltage , ,in, is the voltage drop across the gate and source of the first MOS transistor NM1 when it operates in the saturation region, The regulated voltage of the first voltage regulator tube ZD1 when it is working in the breakdown region;

[0060] The voltage Drive the second MOS transistor NLD1 to generate a stable analog voltage at the source terminal of the second MOS transistor NLD1 , ,in, The driving voltage across the gate and source required by the second MOS transistor NLD1 during operation. It does not have fast response capability and is usually used to power analog circuits such as internal reference sources and operational amplifiers that require stable and small currents.

[0061] In a specific implementation of the embodiment of the present invention, the analog power generation module further includes a second voltage regulator diode ZD2 and a first capacitor C1;

[0062] The positive electrode of the second voltage regulator tube ZD2 is grounded, and the negative electrode is connected to the source electrode of the second MOS tube NLD1;

[0063] One end of the first capacitor C1 is grounded, and the other end is connected to the source of the second MOS transistor NLD1.

[0064] In the above solution, the second voltage regulator ZD2 is used to stabilize the analog voltage Secondary protection for overvoltage, the first capacitor C1 is a stable analog voltage filter capacitor.

[0065] In a specific implementation of the embodiment of the present invention, the bias current generating and converting module includes: a current source IBIAS, a third MOS transistor NM2, a fourth MOS transistor NM3, a fifth MOS transistor NLD2 and a sixth MOS transistor PLD1;

[0066] The third MOS transistor NM2 and the fourth MOS transistor NM3 are both low-voltage N-type MOS transistors; the fifth MOS transistor NLD2 is a high-voltage N-type MOS transistor; and the sixth MOS transistor PLD1 is a high-voltage P-type MOS transistor.

[0067] The input of the current source IBIAS is connected to the stable analog voltage The output end thereof is connected to the gate and drain of the third MOS transistor NM2 respectively;

[0068] The source of the third MOS transistor NM2 is grounded;

[0069] The gate of the fourth MOS transistor NM3 is connected to the gate of the third MOS transistor NM2, the drain of the fourth MOS transistor NM3 is connected to the source of the fifth MOS transistor NLD2, and the source of the fourth MOS transistor NM3 is grounded;

[0070] The gate of the fifth MOS transistor NLD2 is connected to the stable analog voltage connected to the gate and drain of the sixth MOS transistor PLD1 respectively;

[0071] The source of the sixth MOS transistor PLD1 is connected to the high-voltage power supply VIN_HV.

[0072] In a specific implementation of the embodiment of the present invention, the current source IBIAS stabilizes the analog voltage A constant current IB is generated under the action of the third MOS transistor NM2, and is mirrored to the fourth MOS transistor NM3, and finally outputs the current signal of the adaptation power supply generation module through the sixth MOS transistor PLD1;

[0073] The fifth MOS transistor NLD2 isolates the high-voltage power supply for the fourth MOS transistor NM3 so that the voltage applied to the drain of the fourth MOS transistor NM3 is less than 5V.

[0074] In a specific implementation of the embodiment of the present invention, the power supply generation module includes: a seventh MOS transistor PLD2, an eighth MOS transistor NM4, a ninth MOS transistor NLD3 and a second capacitor C2;

[0075] The seventh MOS transistor PLD2 is a high-voltage P-type MOS transistor, the eighth MOS transistor NM4 is a low-voltage N-type MOS transistor; the ninth MOS transistor NLD3 is a high-voltage N-type MOS transistor;

[0076] The gate of the seventh MOS transistor PLD2 is connected to the gate of the sixth MOS transistor PLD1, the source of the seventh MOS transistor PLD2 is connected to the high-voltage power supply VIN_HV, and the drain of the seventh MOS transistor PLD2 is connected to the drain and gate of the eighth MOS transistor NM4 respectively;

[0077] The source of the eighth MOS tube NM4 is connected to the stable analog voltage connected;

[0078] The gate of the ninth MOS transistor NLD3 is connected to the drain of the seventh MOS transistor PLD2, the drain of the ninth MOS transistor NLD3 is used to connect to the high-voltage power supply VIN_HV, and the source of the ninth MOS transistor NLD3 serves as the output end of the capacitor-free voltage stabilization circuit to generate a power voltage with high driving capability;

[0079] One end of the second capacitor is connected to the gate of the ninth MOS transistor NLD3 , and the other end is grounded.

[0080] In a specific implementation of the embodiment of the present invention, the current signal of the adaptive power supply generating module output by the sixth MOS transistor PLD1 is mirrored to the branch where the seventh MOS transistor PLD2 is located through the sixth MOS transistor PLD1 and the seventh MOS transistor PLD2, and is loaded onto the eighth MOS transistor NM4 to generate a bias voltage VB; a stable analog voltage is loaded at the source of the eighth MOS transistor NM4. , so the voltage at the gate of the ninth MOS transistor NLD3 is , , the voltage at the source of the ninth MOS transistor NLD3 is , , For high driving capability power supply, is the voltage across the gate and source when the eighth MOS transistor NM4 operates in the saturation region, It is the driving voltage across the gate and source required by the ninth MOS transistor NLD3 during operation.

[0081] In the above scheme It is used to supply power to the driving circuit. In a specific implementation process, the source of the ninth MOS transistor NLD3 is used to be connected to the driving circuit.

[0082] In a specific implementation of the embodiment of the present invention, the power supply generation module further includes a third voltage regulator diode ZD3, a second resistor R2 and a third capacitor C3;

[0083] The positive electrode of the third voltage regulator tube ZD3 is grounded, and the negative electrode is connected to the source electrode of the ninth MOS tube NLD3;

[0084] One end of the second resistor R2 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3;

[0085] One end of the third capacitor C3 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3.

[0086] In the above scheme, the third voltage regulator ZD3 is used to stabilize the analog voltage Secondary protection for overvoltage, the third capacitor C3 is for stabilizing analog voltage When the driving circuit connected to the source of the ninth MOS transistor NLD3 is working, it will cause the VCCP voltage to drop. and through the parasitic capacitance of the ninth MOS tube NLD3 Coupled to the gate of the ninth MOS transistor NLD3, causing the gate voltage (ie ) also drops, and if there is no rapid charge replenishment, the VCCP voltage will drop further. With strong driving ability, and The voltage is connected through the eighth MOS tube NM4, and the eighth MOS tube NM4 has a body diode, which points from the S end to the D end. The diode voltage difference is usually 0.7V. When the voltage drops to about 0.7V lower than VCCA, the diode can be turned on and the charge can be replenished quickly.

[0087] It can be seen that the capacitor-free voltage stabilization circuit in the embodiment of the present invention has the following advantages:

[0088] (1) Generate two low voltage power supplies ( and ), Provides clean and stable power to the internal analog circuits, Provides a power voltage with fast response and strong load capacity for the internal drive circuit.

[0089] (2) Fast dynamic response can be achieved without external capacitors to ensure correct internal logic.

[0090] (3) The capacitor-free voltage stabilization circuit in the embodiment of the present invention operates in an open loop (i.e., the output voltage is not introduced to the input terminal), and there is no need to consider stability issues.

[0091] (4) Place a second capacitor C2 at VB, which has a larger capacitance than NLD3.

[0092] Example 2

[0093] An embodiment of the present invention provides a voltage stabilization method based on the capacitor-free voltage stabilization circuit according to any one of the first embodiments, including:

[0094] Generate a stable analog voltage using an analog power generation module, and provide the stable analog voltage to a bias current generation and conversion module;

[0095] Using the bias current generation and conversion module to generate a stable bias current based on the stable analog voltage, and performing current mirroring and scaling to output a current signal adapted to the power supply generation module;

[0096] The power supply generating module generates a power voltage with high driving capability based on the received current signal.

[0097] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the protection content of the present invention.

[0098] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. A capacitor-free voltage stabilizing circuit, characterized in that: include: Analog power generation module, bias current generation and conversion module and power supply generation module; The analog power generation module generates a stable analog voltage and provides the stable analog voltage to the bias current generation and conversion module; The bias current generation and conversion module generates a stable bias current based on the stable analog voltage, performs current mirroring and scaling, and outputs a current signal adapted to the power supply generation module; The power supply generating module generates a power voltage with high driving capability based on the received current signal.

2. The capacitor-free voltage stabilizing circuit according to claim 1, wherein: The analog power generation module includes: a first resistor R1, a first MOS transistor NM1, a second MOS transistor NLD1 and a first voltage regulator transistor ZD1; The first end of the first resistor R1 is used to connect to the high-voltage power supply VIN_HV, and the second end thereof is respectively connected to the gate and drain of the first MOS transistor NM1, and the gate of the second MOS transistor NLD1; The cathode of the first voltage regulator ZD1 is connected to the source of the first MOS transistor NM1, and the anode thereof is grounded; The drain of the second MOS transistor NLD1 is used to connect to the high-voltage power supply VIN_HV.

3. The capacitor-free voltage stabilizing circuit according to claim 2, wherein: The high voltage power supply VIN_HV is applied to the first MOS tube NM1 and the first voltage regulator tube ZD1 after passing through the first resistor R1 to generate a voltage , ,in, is the voltage drop across the gate and source of the first MOS transistor NM1 when it operates in the saturation region, The regulated voltage of the first voltage regulator tube ZD1 when it is working in the breakdown region; The voltage Drive the second MOS transistor NLD1 to generate a stable analog voltage at the source terminal of the second MOS transistor NLD1 , ,in, is the driving voltage across the gate and source required by the second MOS transistor NLD1 during operation.

4. The capacitor-free voltage stabilizing circuit according to claim 2, wherein: The analog power generation module further includes a second voltage regulator diode ZD2 and a first capacitor C1; The positive electrode of the second voltage regulator tube ZD2 is grounded, and the negative electrode is connected to the source electrode of the second MOS tube NLD1; One end of the first capacitor C1 is grounded, and the other end is connected to the source of the second MOS transistor NLD1.

5. The capacitor-free voltage stabilizing circuit according to claim 2, wherein: The bias current generation and conversion module includes: a current source IBIAS, a third MOS transistor NM2, a fourth MOS transistor NM3, a fifth MOS transistor NLD2 and a sixth MOS transistor PLD1; The input of the current source IBIAS is connected to the stable analog voltage The output end thereof is connected to the gate and drain of the third MOS transistor NM2 respectively; The source of the third MOS transistor NM2 is grounded; The gate of the fourth MOS transistor NM3 is connected to the gate of the third MOS transistor NM2, the drain of the fourth MOS transistor NM3 is connected to the source of the fifth MOS transistor NLD2, and the source of the fourth MOS transistor NM3 is grounded; The gate of the fifth MOS transistor NLD2 is connected to the stable analog voltage connected to the gate and drain of the sixth MOS transistor PLD1 respectively; The source of the sixth MOS transistor PLD1 is connected to the high-voltage power supply VIN_HV.

6. The capacitor-free voltage stabilizing circuit according to claim 5, wherein: The current source IBIAS stabilizes the analog voltage A constant current IB is generated under the action of the third MOS transistor NM2, and is mirrored to the fourth MOS transistor NM3, and finally outputs the current signal of the adaptation power supply generation module through the sixth MOS transistor PLD1; The fifth MOS transistor NLD2 isolates the high-voltage power supply for the fourth MOS transistor NM3 so that the voltage applied to the drain of the fourth MOS transistor NM3 is less than 5V.

7. The capacitor-free voltage stabilizing circuit according to claim 5, wherein: The power supply generating module includes: a seventh MOS transistor PLD2, an eighth MOS transistor NM4, a ninth MOS transistor NLD3 and a second capacitor C2; The gate of the seventh MOS transistor PLD2 is connected to the gate of the sixth MOS transistor PLD1, the source of the seventh MOS transistor PLD2 is connected to the high-voltage power supply VIN_HV, and the drain of the seventh MOS transistor PLD2 is connected to the drain and gate of the eighth MOS transistor NM4 respectively; The source of the eighth MOS tube NM4 is connected to the stable analog voltage connected; The gate of the ninth MOS transistor NLD3 is connected to the drain of the seventh MOS transistor PLD2, the drain of the ninth MOS transistor NLD3 is used to connect to the high-voltage power supply VIN_HV, and the source of the ninth MOS transistor NLD3 serves as the output end of the capacitor-free voltage stabilization circuit to generate a power voltage with high driving capability; One end of the second capacitor is connected to the gate of the ninth MOS transistor NLD3 , and the other end is grounded.

8. The capacitor-free voltage stabilizing circuit according to claim 7, wherein: The current signal of the adaptive power supply generating module output by the sixth MOS transistor PLD1 is mirrored to the branch where the seventh MOS transistor PLD2 is located through the sixth MOS transistor PLD1 and the seventh MOS transistor PLD2, and is loaded onto the eighth MOS transistor NM4 to generate a bias voltage VB; the source of the eighth MOS transistor NM4 is loaded with a stable analog voltage , so the voltage at the gate of the ninth MOS tube NLD3 is , the voltage at the source of the ninth MOS transistor NLD3 , For high driving capability power supply, is the voltage across the gate and source when the eighth MOS transistor NM4 operates in the saturation region, It is the driving voltage across the gate and source required by the ninth MOS transistor NLD3 during operation.

9. The capacitor-free voltage stabilizing circuit according to claim 7, wherein: The power supply generating module further includes a third voltage regulator diode ZD3, a second resistor R2 and a third capacitor C3; The positive electrode of the third voltage regulator tube ZD3 is grounded, and the negative electrode is connected to the source electrode of the ninth MOS tube NLD3; One end of the second resistor R2 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3; One end of the third capacitor C3 is grounded, and the other end is connected to the source of the ninth MOS transistor NLD3.

10. A voltage stabilization method based on the capacitor-free voltage stabilization circuit according to any one of claims 1 to 9, characterized in that: include: Generate a stable analog voltage using an analog power generation module, and provide the stable analog voltage to a bias current generation and conversion module; Using the bias current generation and conversion module to generate a stable bias current based on the stable analog voltage, and performing current mirroring and scaling to output a current signal adapted to the power supply generation module; The power supply generating module generates a power voltage with high driving capability based on the received current signal.

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