ATE embedded wafer defect detection method and device based on PSO-SVM

Abstract

The embodiment of the invention provides an ATE embedded wafer defect detection method and device based on PSO-SVM, and the method comprises the steps: obtaining historical data, carrying out the labeling, determining the labeled historical data, and building a reference defect detection model; performing integration based on the labeled historical data to determine an original data set, and performing feature engineering and data standardization on the original data set to determine target data; pSO-SVM joint optimization training is carried out based on the target data and the reference defect detection model, and an SVM defect detection model is determined; and acquiring real-time test data, performing defect detection based on the real-time test data and the SVM defect detection model, and determining a defect detection result. High-dimensional feature vectors based on dynamic electrical parameters generated in a CP test process are constructed, and efficient classification is performed by using a PSO-SVM model, so that early and intelligent recognition of wafer defects is realized.

Description

Technical Field

[0001] The embodiments of this specification relate to the field of chip technology, and more particularly to an ATE-embedded wafer defect detection method based on PSO-SVM. Background Art

[0002] In the integrated circuit industry, wafer-level testing is a critical line of defense for ensuring product quality and reliability. Wafer probe testing (CP testing), a core electrical performance verification step before packaging, has a direct impact on the yield and cost of the final product. This testing technology relies on a highly automated precision system: automated test equipment (ATE) serves as the control core. Through the precise positioning of the probe station and the physical contact of the probe card, it applies electrical signal stimulation to each individual chip unit (die) and collects the response. Based on preset specifications, the ATE makes a preliminary judgment of "pass" or "fail" on the die, aiming to screen out failed units early and prevent them from entering costly subsequent processes.

[0003] To extract deeper insights from massive amounts of test data, the industry has introduced deep learning technologies, particularly for analyzing wafer maps generated after CP testing. Models such as convolutional neural networks (CNNs) automatically classify macro-defect types by learning the specific spatial distribution patterns of failed dies on the wafer map (e.g., center, ring, scratch, etc.). This "post-mortem" approach provides engineers with analytical insights into the root causes of yield loss, guiding upstream process improvements.

[0004] Despite the maturity of existing wafer testing and defect analysis technology frameworks, their inherent flaws are becoming increasingly apparent in response to increasingly stringent manufacturing challenges. First, existing analysis methods suffer from significant timeliness lags. Both traditional threshold determination and wafer map analysis based on convolutional neural networks (CNNs) fall into the "post-diagnosis" mode, failing to provide real-time early warnings for potential or evolving defects during the testing process, thus missing opportunities for early intervention and dynamic adjustment of test strategies. Second, the inherent value of massive amounts of dynamic test data is not fully utilized. Automated test equipment (ATE) generates rich parameter time series when testing each die, which contain the evolutionary trajectory of the chip's health status. However, most traditional methods ignore the in-depth exploration of the overall dynamic behavior and complex interactions of these sequences, resulting in insufficient ability to identify early signs of defects.

[0005] Furthermore, there is a mismatch between the selected analytical model and the characteristics of the data, and performance optimization challenges exist in applications. For example, while CNN excels at processing the spatial features of images, its structure struggles to effectively capture the temporal dynamic cues that are crucial for revealing early functional degradation or process drift. Furthermore, the performance of machine learning models such as support vector machines (SVMs), which are more suitable for high-dimensional classification tasks, is highly dependent on the choice of hyperparameters. In complex test data scenarios, relying on inefficient manual parameter tuning or grid search makes it difficult to quickly find the optimal parameter combination, which greatly limits its practical application potential in industrial production environments that pursue efficiency and precision.

[0006] Therefore, a better solution is urgently needed. Summary of the Invention

[0007] In light of this, embodiments of this specification provide an ATE-embedded wafer defect detection method based on PSO-SVM. One or more embodiments of this specification also involve an ATE-embedded wafer defect detection apparatus using PSO-SVM, a computing device, a computer-readable storage medium, and a computer program to address technical deficiencies in the prior art.

[0008] According to a first aspect of an embodiment of this specification, a PSO-SVM-based ATE embedded wafer defect detection method is provided, comprising: Acquire and annotate historical data, determine the annotated historical data, and establish a baseline defect detection model; Determine the original data set based on the integration of annotated historical data, and perform feature engineering and data normalization on the original data set to determine the target data; Perform PSO-SVM joint optimization training based on target data and benchmark defect detection model to determine the SVM defect detection model; Acquire real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine the defect detection results.

[0009] In one possible implementation, obtaining historical data and annotating the annotated historical data includes: Obtain historical data; the historical data includes historical CP test data; Assign a true label to each Die's historical CP test data; the confidence of the true label is within the set confidence interval.

[0010] In one possible implementation, the original data set is determined based on the integration of the annotated historical data, including: Analyzing the annotated historical data to determine a multi-dimensional electrical parameter set; wherein the multi-dimensional electrical parameter set is related to the defect mode; The original data set is determined based on the integration of the multidimensional electrical parameter set and metadata.

[0011] In one possible implementation, feature engineering and data normalization are performed on the original dataset to determine the target data, including: Perform feature calculation on the original data set to determine the high-dimensional feature vector; Perform data cleaning based on high-dimensional feature vectors to determine the cleaned data; Standardize or normalize the cleaned data to determine the target data.

[0012] In one possible implementation, PSO-SVM joint optimization training is performed based on target data and a benchmark defect detection model to determine an SVM defect detection model, including: Construct training data sets, validation data sets, and test data sets based on target data; Initialize a population of a set number of particles based on the training dataset; Perform fitness evaluation on each particle in the group to determine the fitness; Determine the update position based on the comparison between fitness and historical fitness; Based on the updated position and update formula, combined with the inertia weight, individual learning factor and group learning factor, and the introduction of random numbers, the speed and position of each particle are updated; Stop the training process based on the iteration condition and get the optimal parameters based on the position; Retrain based on the optimal parameters and training data set to determine the SVM defect detection model.

[0013] In a possible implementation, the method further includes: Compare verification results with defect detection results within a set period to determine performance indicators; When the number of labeled update data reaches a preset number or the model performance is determined to have degraded based on performance indicators, the SVM defect detection model is retrained by labeling the updated data and the historical data.

[0014] In a possible implementation, the defect detection result includes at least one of parameter drift, early breakdown, poor contact, and logic function failure.

[0015] According to a second aspect of the embodiments of this specification, a PSO-SVM ATE-embedded wafer defect detection device is provided, comprising: a data acquisition module configured to acquire historical data and annotate the annotated historical data, and to establish a baseline defect detection model; A data construction module is configured to determine the original data set based on the integration of the annotated historical data, and perform feature engineering and data normalization on the original data set to determine the target data; a model training module configured to perform PSO-SVM joint optimization training based on target data and a benchmark defect detection model to determine an SVM defect detection model; The defect detection module is configured to obtain real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

[0016] According to a third aspect of an embodiment of this specification, a computing device is provided, including: memory and processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, the steps of the above-mentioned ATE embedded wafer defect detection method based on PSO-SVM are implemented.

[0017] According to a fourth aspect of the embodiments of this specification, a computer-readable storage medium is provided, which stores computer-executable instructions. When the instructions are executed by a processor, the steps of the above-mentioned ATE embedded wafer defect detection method based on PSO-SVM are implemented.

[0018] According to a fifth aspect of the embodiments of this specification, a computer program is provided, wherein when the computer program is executed in a computer, the computer is caused to execute the steps of the above-mentioned ATE embedded wafer defect detection method based on PSO-SVM.

[0019] The embodiments of this specification provide an ATE-embedded wafer defect detection method and apparatus based on PSO-SVM, wherein the method includes: acquiring historical data and annotating it to determine the annotated historical data, and establishing a baseline defect detection model; integrating the annotated historical data to determine the original data set, and performing feature engineering and data normalization on the original data set to determine the target data; performing PSO-SVM joint optimization training based on the target data and the baseline defect detection model to determine the SVM defect detection model; acquiring real-time test data, performing defect detection based on the real-time test data and the SVM defect detection model, and determining the defect detection results. By constructing a high-dimensional feature vector based on the dynamic electrical parameters generated during the CP test process and utilizing the PSO-SVM model for efficient classification, early and intelligent identification of wafer defects is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a flow chart of a PSO-SVM-based ATE embedded wafer defect detection method provided by one embodiment of this specification; Figure 2 This is a schematic diagram of a PSO-SVM-based ATE embedded wafer defect detection method provided in one embodiment of this specification; Figure 3 This is a schematic diagram of a model training process of a PSO-SVM-based ATE embedded wafer defect detection method provided by an embodiment of this specification; Figure 4 This is a schematic diagram of online defect recognition and decision-making of an ATE embedded wafer defect detection method based on PSO-SVM provided by an embodiment of this specification; Figure 5 This is a schematic structural diagram of a PSO-SVM ATE embedded wafer defect detection device provided by one embodiment of this specification; Figure 6 This is a structural block diagram of a computing device provided by one embodiment of this specification. DETAILED DESCRIPTION

[0021] The following description sets forth many specific details to facilitate a thorough understanding of this specification. However, this specification can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the scope of this specification. Therefore, this specification is not limited to the specific implementations disclosed below.

[0022] The terms used in one or more embodiments of this specification are for the purpose of describing specific embodiments only and are not intended to limit one or more embodiments of this specification. The singular forms "a," "an," and "the" used in one or more embodiments of this specification and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used in one or more embodiments of this specification refers to and includes any or all possible combinations of one or more associated listed items.

[0023] It should be understood that although the terms first, second, etc. may be used to describe various information in one or more embodiments of this specification, such information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of one or more embodiments of this specification, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0024] In this specification, an ATE-embedded wafer defect detection method based on PSO-SVM is provided. This specification also involves an ATE-embedded wafer defect detection device based on PSO-SVM, a computing device, and a computer-readable storage medium, which are described in detail one by one in the following embodiments.

[0025] See also Figure 1 , Figure 1 A flowchart of a PSO-SVM-based ATE embedded wafer defect detection method according to an embodiment of this specification is shown, which specifically includes the following steps.

[0026] Step 101: Obtain historical data and annotate it to determine the annotated historical data, and establish a baseline defect detection model.

[0027] In actual applications, the preparation and baseline establishment phase provides the foundation for the establishment of the entire intelligent detection system, including data preparation, environment configuration, and determination of performance benchmarks.

[0028] In one possible implementation, historical data is obtained and annotated to determine the annotated historical data, including: obtaining historical data; wherein the historical data includes historical CP test data; assigning a true label to each Die's historical CP test data; wherein the confidence of the true label is within a set confidence interval.

[0029] In practical applications, a large amount of representative historical CP test data is collected. The key is to label this data with high quality, assigning each die test data a true label ("normal die" or "defective die") with high confidence. The necessary computing environment, including Python, relevant machine learning libraries (such as Scikit-learn), and optimization algorithm libraries, is configured on the ATE system or its associated server. A baseline defect detection model is also established.

[0030] Step 102: Determine the original data set based on the integration of the annotated historical data, and perform feature engineering and data normalization on the original data set to determine the target data.

[0031] In practical applications, the real-time construction and refined preprocessing of high-dimensional electrical feature vectors are aimed at extracting rich and reliable raw electrical parameters from the ATE test flow and converting them into a purified static high-dimensional feature vector that can comprehensively characterize the health status of a single die.

[0032] In one possible implementation, the original data set is determined based on the integration of the annotated historical data, including: analyzing the annotated historical data to determine a multidimensional electrical parameter set; wherein the multidimensional electrical parameter set is related to the defect mode; and determining the original data set based on the integration of the multidimensional electrical parameter set and metadata.

[0033] In practical applications, based on in-depth analysis of semiconductor device physics, failure mechanisms, and historical defect data, a multi-dimensional electrical parameter set that is highly correlated with various key defect modes (such as parameter drift, early breakdown, poor contact, weak logic function failure, etc.) is defined; see Figure 2 After the ATE completes the entire CP test process for a single die, the system automatically triggers a data integration process. This process combines all values ​​within the aforementioned parameter space measured during all relevant test steps for that die, along with its metadata (XY coordinates, test time, probe card information, etc.), into a complete single-die raw data set.

[0034] In one possible implementation, feature engineering and data normalization are performed on the original data set to determine the target data, including: performing feature calculation on the original data set to determine a high-dimensional feature vector; performing data cleaning based on the high-dimensional feature vector to determine the cleaned data; and standardizing or normalizing the cleaned data to determine the target data.

[0035] In practical applications, feature engineering is performed on the original dataset of each Die. K key parameter values ​​are used as basic features, and their statistics (mean, standard deviation, etc.) are calculated or derived features are constructed, ultimately condensing them into a high-dimensional feature vector of fixed dimension. Robust data cleaning is then performed on the constructed feature vector. For example, missing values ​​caused by test skipping or measurement errors are filled using the K-nearest neighbor (KNN) algorithm or multiple imputation, which is more accurate than simple mean filling. To eliminate the impact of differences in dimensionality and numerical range between different features on the SVM model (especially when using the RBF kernel), all dimensions of the feature vector must be normalized or standardized.

[0036] Step 103: Perform PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine the SVM defect detection model.

[0037] In practical applications, offline training and global optimization of the PSO-SVM defect detection model are the core algorithm of the present invention. By using historical annotated data, the particle swarm optimization (PSO) algorithm is used to automatically and efficiently search for the optimal hyperparameter combination of the support vector machine (SVM) and train a high-performance defect classifier.

[0038] In one possible implementation, PSO-SVM joint optimization training is performed based on target data and a benchmark defect detection model to determine the SVM defect detection model, including: constructing a training data set, a validation data set, and a test data set based on the target data; initializing a population containing a set number of particles based on the training data set; performing fitness evaluation on each particle in the population to determine the fitness; determining an update position based on a comparison between the fitness and the historical fitness; updating the speed and position of each particle based on the updated position and an update formula, combining inertia weights, individual learning factors, and population learning factors, and introducing random numbers; stopping the training process based on an iteration condition, and obtaining optimal parameters based on the position; and retraining based on the optimal parameters and the training data set to determine the SVM defect detection model.

[0039] In practical applications, training, validation, and test datasets are constructed. The historical annotated dataset prepared in the above steps is randomly divided into a training set, a validation set, and an independent test set according to standard machine learning practices.

[0040] For further information, see Figure 3 , perform PSO-SVM joint optimization training, initialize a group of N particles. The position vector of each particle In the preset reasonable search range (for example, C in [0.1, 1000], The velocity vector of each particle is randomly generated in the logarithmic space of [0.001, 10]. It is also randomly initialized. When the preset maximum number of iterations is reached or the fitness value is no longer significantly improved for multiple generations, the iteration is terminated. In each iteration: 1. Fitness evaluation: For each particle i in the particle swarm, use its current position Represented Parameter pair, train a temporary SVM model on the training set. Then, use this model to predict the validation set and calculate its fitness value 2. Individual and global optimal updates: and the particle's own historical optimal fitness Compare and if it is better, update its historical best position At the same time, and the global optimal fitness of the entire particle swarm Compare and if better, update the global optimal position 3. Speed ​​and position update: Based on the speed and position update formula of standard PSO, combined with inertia weight, individual learning factor and group learning factor, and introducing random numbers, update the speed of each particle and location This process simulates the particle's approach to its own historical optimal position and the group's historical optimal position, while maintaining a certain degree of exploration ability. When the iterative cycle ends, the global optimal position The corresponding hyperparameter combination This is the optimal solution found in this optimization search. Using this set of optimal parameters, we retrain on the complete training set to obtain the final, optimal-performing SVM defect detection model, which we then persist for deployment.

[0041] Step 104: Acquire real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

[0042] In practical applications, model deployment and online real-time inference. This step describes the deployment of the trained model into the actual ATE production environment and deep integration with the test process to achieve real-time and automated defect identification for each die under test.

[0043] For details, see Figure 4 The SVM model with optimal hyperparameters, fully trained and verified through the above steps, is deployed. The model and its associated preprocessing parameters (such as normalization parameters) are encapsulated as a callable service or library. Once the ATE completes the entire test process for a new die, the system automatically triggers the online inference program. This program first collects and processes the die's electrical parameters in real time according to the methods described above, constructing a high-dimensional feature vector. This constructed feature vector is input into the deployed PSO-SVM model, and the final defect detection output includes at least one of parameter drift, premature breakdown, poor contact, and logical function failure.

[0044] In one possible implementation, the method further includes: comparing the verification results with the defect detection results within a set period to determine performance indicators; when the labeled update data reaches a preset number or the model performance is determined to have degraded based on the performance indicators, retraining the SVM defect detection model by labeling the updated data and the historical data.

[0045] In practical applications, the closed loop of model performance monitoring and continuous self-evolution ensures the long-term effectiveness and adaptability of the model in a dynamic and evolving production environment, and enables continuous learning and self-improvement of the system.

[0046] Specifically, an automated data pipeline should be established to regularly compare subsequent, more reliable verification results of the die predicted by the PSO-SVM model (such as the pass / fail results of the final test (FT) or the conclusions of the physical failure analysis (FA)) with the model's original predictions. The system should continuously calculate and monitor the model's online performance metrics, such as accuracy, precision, recall, F1 score, and confusion matrix, and set performance monitoring thresholds. When a sufficient amount of new, high-value annotated data has accumulated (especially "hard" examples where the model previously mispredicted the model), or when a significant and sustained decline in the model's online performance metrics is detected (which may indicate process drift or the emergence of new defect modes not previously seen by the model), the system should automatically or semi-automatically trigger a model re-optimization process. Once re-optimization is triggered, the system will return to the training step and conduct a new round of PSO-SVM training using an updated, more comprehensive historical dataset (including the new feedback data). This will result in a new version of the model with improved performance and adaptability. After rigorous offline verification, the new model can be redeployed into the production environment to replace the old model, thus completing a complete, data-driven self-evolution iteration.

[0047] This invention achieves a strategic shift from traditional hard thresholding or complex sequence modeling to efficient, optimized classification methods. Its foundation lies in systematic feature engineering, which condenses the massive, multi-dimensional dynamic electrical parameter streams generated by ATE during single-die testing into a static, high-dimensional feature vector that comprehensively characterizes the die's health status. This provides a rich and effective data foundation for subsequent advanced machine learning applications.

[0048] The key highlight of this invention lies in overcoming the performance optimization bottleneck of support vector machines (SVMs) in industrial applications. By creatively coupling the particle swarm optimization (PSO) algorithm with the SVM classifier, an automated optimization framework is constructed. This framework uses the SVM's classification performance as the fitness function and leverages the swarm intelligence of the PSO to efficiently search for the optimal combination of the penalty factor C and kernel function parameter gamma in a multidimensional parameter space, thereby ensuring that the classification model achieves optimal performance for a specific dataset.

[0049] Furthermore, by comprehensively learning and characterizing multi-parameter dynamic behaviors, this invention significantly expands the dimensions of defect characterization. This enables the model to effectively identify complex, marginal, and evolving defect patterns where multiple parameters act synergistically, and each offset is within tolerance. These defects are blind spots that are difficult to detect with traditional methods, significantly improving detection sensitivity and robustness.

[0050] The innovation of this invention lies in its comprehensive, systematic design. This solution not only encompasses an offline optimal model-building process but also incorporates a suite of online real-time inference, adaptive decision-making, and continuous optimization solutions. This enables the trained model to be seamlessly integrated into the ATE system, enabling real-time intelligent diagnosis of each die and differentiated operations (such as intelligent binning) based on the confidence level of the prediction results. Ultimately, through data reflow and model retraining, the system continuously evolves to adapt to evolving manufacturing processes.

[0051] The implementation of this invention, by deeply integrating the global search capability of particle swarm optimization with the powerful classification performance of support vector machines and embedding them into the ATE test process, is expected to produce a series of significant technical achievements and application values.

[0052] First, a qualitative leap in detection accuracy and sensitivity will be achieved. By leveraging the PSO algorithm to automatically optimize the SVM hyperparameters globally, the classifier constructed using this method can establish a more accurate and robust decision boundary. This enables it to effectively identify complex and marginal defects caused by small, coordinated shifts in multiple parameters, which are difficult to capture using traditional hard thresholding methods. This fundamentally improves defect detection rates and reduces the risk of misjudgments and missed detections.

[0053] Secondly, the efficiency of model development and deployment will be greatly improved. The introduction of PSO transforms the previously tedious, time-consuming, and expert-reliant SVM parameter tuning process into an efficient, automated optimization process. This not only significantly shortens the development and iteration cycle of high-performance detection models, but also reduces reliance on domain-specific expert skills, making large-scale industrial application of advanced machine learning methods possible.

[0054] Furthermore, the present invention can significantly optimize test efficiency and manufacturing costs. Early, high-confidence identification of potentially failed dies enables the ATE system to implement intelligent, adaptive test strategies. For example, simplified confirmation testing can be performed on high-risk dies, or additional diagnostic testing can be performed on "marginal" dies, thereby optimizing test time allocation. Furthermore, more accurately eliminating all defective dies before packaging directly avoids the costly waste caused by their flow into subsequent expensive processes and reduces the significant commercial risk caused by potential market returns.

[0055] Furthermore, this invention will become a powerful tool for accelerating process control (APC) and increasing yield. By continuously monitoring the defect patterns, proportions, and distribution trends across the wafer identified by the PSO-SVM model, the system can provide rapid, quantitative data feedback on subtle fluctuations or equipment status changes in upstream manufacturing processes (such as lithography and etching). This efficient feedback loop helps process engineers quickly diagnose the root causes of problems and verify the effectiveness of corrective measures, thereby accelerating process optimization iterations and steadily improving overall production yield.

[0056] Finally, this invention significantly enhances the intelligence and decision-making capabilities of ATE systems. Rather than simply providing a binary "pass / fail" judgment, it can output classification results with confidence information. This information can be used to guide more sophisticated and risk-foresighted intelligent binning strategies, thus shifting the paradigm of test decision-making from "deterministic judgment" to "probabilistic risk management," injecting new vitality into intelligent semiconductor manufacturing.

[0057] Corresponding to the above method embodiment, this specification also provides an embodiment of a PSO-SVM ATE embedded wafer defect detection device. Figure 5 FIG1 shows a schematic diagram of the structure of a PSO-SVM ATE embedded wafer defect detection device provided by an embodiment of this specification. Figure 5 As shown, the device includes: The data acquisition module 501 is configured to acquire historical data and annotate the annotated historical data, and establish a baseline defect detection model; The data construction module 502 is configured to determine the original data set by integrating the annotated historical data, and perform feature engineering and data normalization on the original data set to determine the target data; The model training module 503 is configured to perform PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine the SVM defect detection model; The defect detection module 504 is configured to obtain real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

[0058] In one possible implementation, obtaining historical data and annotating the annotated historical data includes: Obtain historical data; the historical data includes historical CP test data; Assign a true label to each Die's historical CP test data; the confidence of the true label is within the set confidence interval.

[0059] In one possible implementation, the original data set is determined based on the integration of the annotated historical data, including: Analyzing the annotated historical data to determine a multi-dimensional electrical parameter set; wherein the multi-dimensional electrical parameter set is related to the defect mode; The original data set is determined based on the integration of the multidimensional electrical parameter set and metadata.

[0060] In one possible implementation, feature engineering and data normalization are performed on the original dataset to determine the target data, including: Perform feature calculation on the original data set to determine the high-dimensional feature vector; Perform data cleaning based on high-dimensional feature vectors to determine the cleaned data; Standardize or normalize the cleaned data to determine the target data.

[0061] In one possible implementation, PSO-SVM joint optimization training is performed based on target data and a benchmark defect detection model to determine an SVM defect detection model, including: Construct training data sets, validation data sets, and test data sets based on target data; Initialize a population of a set number of particles based on the training dataset; Perform fitness evaluation on each particle in the group to determine the fitness; Determine the update position based on the comparison between fitness and historical fitness; Based on the updated position and update formula, combined with the inertia weight, individual learning factor and group learning factor, and the introduction of random numbers, the speed and position of each particle are updated; Stop the training process based on the iteration condition and get the optimal parameters based on the position; Retrain based on the optimal parameters and training data set to determine the SVM defect detection model.

[0062] In a possible implementation, the method further includes: Compare verification results with defect detection results within a set period to determine performance indicators; When the number of labeled update data reaches a preset number or the model performance is determined to have degraded based on performance indicators, the SVM defect detection model is retrained by labeling the updated data and the historical data.

[0063] In a possible implementation, the defect detection result includes at least one of parameter drift, early breakdown, poor contact, and logic function failure.

[0064] The above is a schematic scheme of a PSO-SVM-based ATE-embedded wafer defect detection device of this embodiment. It should be noted that the technical scheme of the PSO-SVM-based ATE-embedded wafer defect detection device and the technical scheme of the PSO-SVM-based ATE-embedded wafer defect detection method described above are based on the same concept. For details not described in detail in the technical scheme of the PSO-SVM-based ATE-embedded wafer defect detection device, please refer to the description of the technical scheme of the PSO-SVM-based ATE-embedded wafer defect detection method described above.

[0065] Figure 6 6 shows a block diagram of a computing device 600 according to one embodiment of the present disclosure. Components of the computing device 600 include, but are not limited to, a memory 610 and a processor 620. The processor 620 is connected to the memory 610 via a bus 630, and a database 650 is used to store data.

[0066] Computing device 600 also includes an access device 640 that enables computing device 600 to communicate via one or more networks 660. Examples of such networks include a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or a combination of communication networks such as the Internet. Access device 640 may include one or more of any type of network interface (e.g., a network interface card (NIC)) whether wired or wireless, such as an IEEE 802.11 wireless local area network (WLAN) wireless interface, a Worldwide Interoperability for Microwave Access (Wi-MAX) interface, an Ethernet interface, a universal serial bus (USB) interface, a cellular network interface, a Bluetooth interface, or a near field communication (NFC) interface.

[0067] In one embodiment of the present specification, the above components of the computing device 600 and Figure 6 Other components not shown in the figure may also be connected to each other, for example, via a bus. Figure 6The computing device structure block diagram shown is for illustrative purposes only and is not intended to limit the scope of this specification. Those skilled in the art may add or replace other components as needed.

[0068] Computing device 600 can be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., a tablet computer, personal digital assistant, laptop computer, notebook computer, netbook computer, etc.), a mobile phone (e.g., a smartphone), a wearable computing device (e.g., a smartwatch, smart glasses, etc.), or other types of mobile devices, or a stationary computing device such as a desktop computer or personal computer (PC). Computing device 600 can also be a mobile or stationary server.

[0069] The processor 620 is configured to execute the following computer-executable instructions, which, when executed by the processor, implement the steps of the above-mentioned PSO-SVM-based ATE embedded wafer defect detection method. The above is a schematic scheme of a computing device of this embodiment. It should be noted that the technical solution of the computing device and the technical solution of the above-mentioned PSO-SVM-based ATE embedded wafer defect detection method are of the same concept. For details not described in detail in the technical solution of the computing device, please refer to the description of the technical solution of the above-mentioned PSO-SVM-based ATE embedded wafer defect detection method.

[0070] An embodiment of the present specification further provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the steps of the above-mentioned ATE-embedded wafer defect detection method based on PSO-SVM.

[0071] The above is a schematic diagram of a computer-readable storage medium according to this embodiment. It should be noted that the technical solution of this storage medium is based on the same concept as the technical solution of the aforementioned PSO-SVM-based ATE-embedded wafer defect detection method. For details not described in detail in the technical solution of the storage medium, please refer to the description of the technical solution of the aforementioned PSO-SVM-based ATE-embedded wafer defect detection method.

[0072] An embodiment of the present specification further provides a computer program, wherein when the computer program is executed in a computer, the computer is instructed to execute the steps of the above-mentioned ATE-embedded wafer defect detection method based on PSO-SVM.

[0073] The above is a schematic scheme of a computer program of this embodiment. It should be noted that the technical scheme of this computer program and the technical scheme of the aforementioned PSO-SVM-based ATE-embedded wafer defect detection method are based on the same concept. For details not described in detail in the technical scheme of the computer program, please refer to the description of the technical scheme of the aforementioned PSO-SVM-based ATE-embedded wafer defect detection method.

[0074] The foregoing description of this specification describes specific embodiments. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0075] The computer instructions include computer program code, which may be in source code form, object code form, executable file, or some intermediate form. The computer-readable medium may include any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal, and software distribution medium. It should be noted that the content of the computer-readable medium may be appropriately increased or decreased based on the requirements of legislation and patent practice within a jurisdiction. For example, in some jurisdictions, based on legislation and patent practice, computer-readable media does not include electric carrier signals and telecommunication signals.

[0076] It should be noted that for the aforementioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of this specification are not limited by the order of the actions described, because according to the embodiments of this specification, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the embodiments of this specification.

[0077] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0078] The preferred embodiments disclosed above are intended only to help illustrate this specification. The optional embodiments do not exhaustively describe all details, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made based on the content of the embodiments of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the embodiments of this specification, so that those skilled in the art can better understand and utilize this specification. This specification is limited only by the claims and their full scope and equivalents.

Claims

1. A PSO-SVM-based ATE embedded wafer defect detection method, characterized in that: include: Acquire and annotate historical data, determine the annotated historical data, and establish a baseline defect detection model; Integrating the annotated historical data to determine an original data set, and performing feature engineering and data normalization on the original data set to determine target data; Performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model; Real-time test data is acquired, defect detection is performed based on the real-time test data and the SVM defect detection model, and a defect detection result is determined.

2. The method according to claim 1, characterized in that The obtaining of historical data and marking to determine the marked historical data includes: Acquire historical data; wherein the historical data includes historical CP test data; Assign a true label to the historical CP test data of each Die; wherein the true label is preset with a confidence level, and the confidence level is within a set confidence level interval.

3. The method according to claim 1, characterized in that The step of integrating and determining the original data set based on the annotated historical data includes: Analyzing the annotated historical data to determine a multidimensional electrical parameter set; wherein the multidimensional electrical parameter set is associated with a defect mode, the defect mode being a mode determined based on a defect category of the wafer, the defect mode including parameter drift, early breakdown, poor contact, and weak logic function failure; An original data set is determined based on the integration of the multi-dimensional electrical parameter set and metadata; wherein the metadata includes coordinates, test time, and probe card information.

4. The method according to claim 1, wherein The performing feature engineering and data normalization on the original data set to determine target data includes: Performing feature calculation on the original data set to determine a high-dimensional feature vector; Performing data cleaning based on the high-dimensional feature vector to determine cleaned data; The cleaned data is standardized or normalized to determine target data.

5. The method according to claim 1, wherein The performing PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine the SVM defect detection model includes: Constructing a training data set, a validation data set, and a test data set based on the target data; Initializing a population based on the training data set; wherein the population includes a set number of particles; Performing a fitness evaluation on each particle in the population to determine the fitness; wherein the fitness evaluation is used to determine the fitness of the particle; Determining an update position based on comparing the fitness with historical fitness; Based on the update position and update formula, combined with the inertia weight, individual learning factor and group learning factor of PSO, and introducing random numbers, the speed and position of each particle are updated; Stopping the training process based on an iteration condition and obtaining optimal parameters based on the position; The SVM defect detection model is determined by retraining based on the optimal parameters and the training data set.

6. The method according to claim 1, characterized in that Also includes: Comparing the verification results with the defect detection results within a set period to determine performance indicators; When the labeled update data reaches a preset number or the model performance is determined to have degraded based on the performance indicators, the SVM defect detection model is retrained by labeling the updated data and the historical data; wherein the labeled update data is data obtained by labeling the real-time test data within a period of time.

7. The method according to any one of claims 1 to 6, characterized in that The defect detection result includes at least one of parameter drift, early breakdown, poor contact, and logic function failure.

8. A PSO-SVM ATE embedded wafer defect detection device, characterized in that: include: a data acquisition module configured to acquire historical data and annotate the annotated historical data, and to establish a baseline defect detection model; A data construction module is configured to integrate the annotated historical data to determine an original data set, and perform feature engineering and data normalization on the original data set to determine target data; a model training module configured to perform PSO-SVM joint optimization training based on the target data and the benchmark defect detection model to determine an SVM defect detection model; The defect detection module is configured to obtain real-time test data, perform defect detection based on the real-time test data and the SVM defect detection model, and determine a defect detection result.

9. A computing device, characterized in that include: memory and processor; The memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, the steps of the ATE embedded wafer defect detection method based on PSO-SVM are implemented as described in any one of claims 1 to 7.

10. A computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions, when executed by a processor, implement the steps of the ATE embedded wafer defect detection method based on PSO-SVM according to any one of claims 1 to 7.

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