Voltage setting method of display device

Abstract

The voltage setting method for a display device according to the present invention displays an image on the basis of a maximum brightness selected from among maximum brightness, the voltage setting method for a display device comprising: a step of setting a light emission duty ratio for the maximum brightness; setting a first power supply voltage for the maximum brightness on the basis of a first maximum brightness; setting a black data voltage for the maximum brightness on the basis of a second maximum brightness; and a step of setting a difference between an anode initialization voltage and the first power supply voltage based on a third maximum brightness and a fourth maximum brightness for the remaining maximum brightness except the second maximum brightness among the maximum brightness.

Description

Technical Field

[0001] The invention relates to a voltage setting method for a display device. Background Art

[0002] With the development of information technology, the importance of display devices as a connection medium between users and information has become increasingly prominent. In response, the use of display devices such as liquid crystal display devices (LCDs) and organic light emitting display devices (OLEDs) is increasing.

[0003] To reduce manufacturing costs, a plurality of display devices may be simultaneously formed on a large-area mother substrate, and the display devices may be separated into individual display devices by scribing.

[0004] However, such individual display devices may include elements having different driving characteristics depending on their positions in the mother substrate or other reasons. Therefore, when the same voltage is set in all display devices, the problem of not emitting light at a brightness corresponding to the grayscale level may occur.

[0005] Conventionally, to solve this problem, a large margin is provided for the voltage when setting the voltage. In this case, unnecessary power consumption of the individual display devices may be increased. Summary of the Invention

[0006] The technical problem to be solved is to provide a voltage setting method for a display device that can prevent black excitation.

[0007] According to a voltage setting method for a display device according to an embodiment of the present invention, an image is displayed based on a maximum brightness selected from the maximum brightness, and the voltage setting method for the display device includes: a step of setting a luminous duty cycle for the maximum brightness; a step of setting a first power supply voltage for the maximum brightness based on a first maximum brightness; a step of setting a black data voltage for the maximum brightness based on a second maximum brightness; and a step of setting a difference between an anode initialization voltage and the first power supply voltage for the remaining maximum brightness among the maximum brightnesses except the second maximum brightness based on a third maximum brightness and a fourth maximum brightness.

[0008] It may be that the second maximum brightness, the third maximum brightness, and the fourth maximum brightness are different from each other.

[0009] It may be that the second maximum brightness is greater than the third maximum brightness and the fourth maximum brightness.

[0010] It may be that the second maximum brightness is the maximum value among the maximum brightnesses.

[0011] The same first power supply voltage may be set for the maximum brightness among the maximum brightness that is less than or equal to the third maximum brightness.

[0012] Alternatively, the same light-emitting duty cycle may be set for the maximum brightness among the maximum brightnesses that is greater than or equal to the third maximum brightness.

[0013] At least one maximum brightness for which the minimum light emission duty ratio among the light emission duty ratios is set may be set as the fourth maximum brightness.

[0014] It may be that, when the number of at least one of the maximum brightnesses is two or more, the largest maximum brightness among the at least one of the maximum brightnesses is set as the fourth maximum brightness.

[0015] It may be that, when setting a first difference value related to a maximum brightness smaller than the second maximum brightness and larger than the third maximum brightness among the differences, first interpolation is performed using the difference value set for the second maximum brightness and the difference value set for the third maximum brightness.

[0016] The first interpolation may be performed such that a difference between the first difference values ​​is proportional to a difference between first power supply voltages corresponding to maximum brightness.

[0017] It may be that, when setting a second difference value related to a maximum brightness smaller than the third maximum brightness and larger than the fourth maximum brightness among the differences, second interpolation is performed using the difference value set for the third maximum brightness and the difference value set for the fourth maximum brightness.

[0018] The second interpolation may be performed such that a difference between the second difference values ​​is proportional to a difference between light emission duties of corresponding maximum brightnesses.

[0019] It can be that the difference between the anode initialization voltage and the first power supply voltage is pre-set for the second maximum brightness, and the temporary black data voltage is repeatedly tested based on the difference related to the second maximum brightness, so as to set the black data voltage for the second maximum brightness to display a black image.

[0020] The black data voltages corresponding to the remaining maximum luminances may be set by applying an offset to the black data voltage based on the second maximum luminance.

[0021] The temporary difference may be repeatedly tested based on the black data voltage set for the third maximum brightness, thereby setting the difference for the third maximum brightness to display a black image.

[0022] The temporary difference may be repeatedly tested based on the black data voltage set for the fourth maximum brightness, thereby setting the difference for the fourth maximum brightness to display a black image.

[0023] It may be that, when setting a first difference value among the differences related to a maximum brightness that is less than the second maximum brightness and greater than the third maximum brightness, a first interpolation is performed using the difference value set for the second maximum brightness and the difference value set for the third maximum brightness, and the first interpolation is performed so that the difference between the first difference values ​​is proportional to the difference between the first power supply voltages corresponding to the maximum brightness.

[0024] It may be that, when setting a second difference value among the differences related to a maximum brightness that is less than the third maximum brightness and greater than the fourth maximum brightness, a second interpolation is performed using the difference value set for the third maximum brightness and the difference value set for the fourth maximum brightness, and the second interpolation is performed so that the difference between the second difference values ​​is proportional to the difference between the luminous duty cycles of the corresponding maximum brightnesses.

[0025] It may be that the first maximum brightness, the second maximum brightness, the third maximum brightness, and the fourth maximum brightness are different from each other.

[0026] It may be that the second maximum brightness is greater than the first maximum brightness, the third maximum brightness, and the fourth maximum brightness.

[0027] The voltage setting method of the display device according to the present invention can prevent black excitation. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 FIG. 1 is a diagram for explaining a display device according to an embodiment of the present invention.

[0029] Figure 2 FIG. 1 is a diagram for explaining a pixel according to an embodiment of the present invention.

[0030] Figure 3 as well as Figure 4 FIG. 1 is a diagram for explaining a change in display frequency according to an embodiment of the present invention.

[0031] Figure 5 FIG. 1 is a diagram for explaining an address scanning period according to an embodiment of the present invention.

[0032] Figure 6 FIG. 1 is a diagram for explaining a self-scan period according to an embodiment of the present invention.

[0033] Figure 7 FIG. 1 is a diagram for explaining a voltage setting device according to an embodiment of the present invention.

[0034] Figures 8 to 12 FIG. 1 is a diagram for explaining a voltage setting method according to an embodiment of the present invention.

[0035] Figure 13 is a diagram for explaining a voltage setting method according to another embodiment of the present invention. DETAILED DESCRIPTION

[0036] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings so that a person having ordinary knowledge in the technical field to which the present invention pertains can easily implement the present invention. The present invention can be implemented in many different ways, but is not limited to the embodiments described herein.

[0037] In order to clearly illustrate the present invention, parts not related to the description are omitted, and the same or similar components are marked with the same reference numerals throughout the specification. Therefore, the reference numerals previously described can also be used for other drawings.

[0038] In addition, the size and thickness of each structure shown in the drawings are arbitrarily shown for the convenience of explanation, and therefore the present invention is not necessarily limited to the drawings. In the drawings, the thickness may be exaggerated to clearly express multiple layers and regions.

[0039] In addition, the term "same" in the description may mean "substantially the same." That is, it may be the same to the extent that a person with ordinary knowledge can understand it as the same. Other descriptions may also omit the term "substantially."

[0040] Figure 1 FIG. 1 is a diagram for explaining a display device according to an embodiment of the present invention.

[0041] Reference Figure 1 The display device 10 according to an embodiment of the present invention may include a timing control unit 11 , a data driving unit 12 , a scan driving unit 13 , a pixel unit 14 , a light emitting driving unit 15 and a power supply unit 16 .

[0042] The timing control unit 11 may receive grayscale levels for an input image (or input frame). The grayscale levels may include a first color grayscale level, a second color grayscale level, and a third color grayscale level. The first color grayscale level may be a grayscale level for expressing a first color, the second color grayscale level may be a grayscale level for expressing a second color, and the third color grayscale level may be a grayscale level for expressing a third color.

[0043] In addition, the timing control unit 11 can receive control signals for the image. Such control signals may include a horizontal synchronization signal (Hsync), a vertical synchronization signal (Vsync), and a data enable signal. The vertical synchronization signal may include multiple pulses, which may indicate that the previous frame period ends and the current frame period begins based on the time point at which each pulse occurs. The spacing between adjacent pulses of the vertical synchronization signal may be equivalent to one frame period. The horizontal synchronization signal may include multiple pulses, which may indicate that the previous horizontal period ends and a new horizontal period begins based on the time point at which each pulse occurs. The spacing between adjacent pulses of the horizontal synchronization signal may be equivalent to one horizontal period. The data enable signal may have an enable level for a specific horizontal period and a disable level for the remaining periods. When the data enable signal is at an enable level, it may indicate that a color grayscale is supplied in the corresponding horizontal period.

[0044] The timing control section 11 can provide the data driving section 12 with grayscales rendered or corrected in a manner that matches the specifications of the display device 10. Furthermore, the timing control section 11 can provide a clock signal, a scan start signal, and the like to the scan driving section 13. The timing control section 11 can also provide a clock signal, a light emission stop signal, and the like to the light emission driving section 15.

[0045] The data driver 12 can generate data voltages to be supplied to the data lines DL1, ..., DLj, ..., DLq using the grayscale levels and control signals received from the timing control unit 11. The data driver 12 can sample the grayscale levels using a clock signal and apply data voltages corresponding to the grayscale levels to the data lines in units of pixel rows. q can be an integer greater than 2, and j can be an integer greater than 1 and less than q.

[0046] The magnitude of the data voltage may vary depending on the corresponding grayscale level. The data voltage may include a black data voltage. The black data voltage may be the data voltage that should be written to the pixel when the pixel displays a black image. For example, the black data voltage may correspond to the minimum grayscale level (e.g., grayscale level 0).

[0047] The magnitude of the data voltage may vary according to the maximum brightness of the display device 10. The maximum brightness may be the brightness of light emitted from a pixel set to a maximum grayscale level (for example, 255 grayscale levels when the grayscale level is expressed using 8 bits). For example, the maximum brightness may be the brightness of white light generated by the entire pixel portion 14 emitting light in a manner corresponding to the white grayscale level. The unit of brightness may be nits. The maximum brightness may also be named the display brightness value (DisplayBrightness Value). This maximum brightness may be manually set by a user's operation on the display device 10 or automatically set by an algorithm related to an illuminance sensor, etc. For example, the maximum value of the maximum brightness may be 2175 nits and the minimum value may be 4 nits. The maximum and minimum values ​​of the maximum brightness may be variously set depending on the product. Even with the same grayscale level, the data voltage varies according to the maximum brightness, so the luminous brightness of the pixel also varies.

[0048] The scan driver 13 may include first to fourth scan driver units 13GW, 13GB, 13GI, and 13GC. The first scan driver 13GW may provide a first scan signal to the first scan lines GW1, ..., GWi, ..., GWp. p may be an integer greater than 2, and i may be an integer greater than 1 and less than p. The second scan driver 13GB may provide a second scan signal to the second scan lines GB1, ..., GBi, ..., GBp. The third scan driver 13GI may provide a third scan signal to the third scan lines GI1, ..., GIi, ..., GIp. The fourth scan driver 13GC may provide a fourth scan signal to the fourth scan lines GC1, ..., GCi, ..., GCp.

[0049] For example, the first scan driver 13GW can receive at least one scan clock signal and a scan start signal from the timing control unit 11 to generate a first scan signal to be provided to the first scan lines GW1 to GWp. The first scan driver 13GW can sequentially provide the first scan signal having an on-level pulse to the first scan lines GW1 to GWp. For example, the first scan driver 13GW can be configured as a shift register and can generate the first scan signal by sequentially transmitting the on-level pulse scan start signal to the next scan stage under the control of the scan clock signal.

[0050] Each of the second scanning driver 13GB, the third scanning driver 13GI, and the fourth scanning driver 13GC can be configured similarly to the first scanning driver 13GW, and thus repeated descriptions are omitted. According to an embodiment, at least a portion of the first to fourth scanning drivers 13GW, 13GB, 13GI, and 13GC can be integrated. For example, when the polarity and width of the pulses are the same, two or more scanning drivers can be integrated. For example, referring to Figure 5 The polarity and width of the on-level pulse applied to the third scan line GIi at time point t2a and the on-level pulse applied to the fourth scan line GCi at time point t3a are the same, so the third scan driving unit 13GI and the fourth scan driving unit 13GC can be integrated.

[0051] The light-emitting driver 15 receives at least one light-emitting clock signal and a light-off signal from the timing control unit 11 to generate light-emitting signals to be provided to the light-emitting lines EM1, ..., EMi, ..., EMp. The light-emitting driver 15 can sequentially provide light-emitting signals having pulses at an off-level to the light-emitting lines EM1 through EMp. For example, the light-emitting driver 15 can be configured as a shift register, and can generate light-emitting signals by sequentially transmitting the light-off signal in the form of pulses at an off-level to the next light-emitting stage under the control of the light-emitting clock signal.

[0052] Figure 1 , the first scan lines GW1-GWp, the second scan lines GB1-GBp, the third scan lines GI1-GIp, the fourth scan lines GC1-GCp, and the light-emitting lines EM1-EMp are each shown as p. However, in another embodiment, at least one of the second scan lines GB1-GBp, the third scan lines GI1-GIp, the fourth scan lines GC1-GCp, and the light-emitting lines EM1-EMp can be configured to be less than p / 2. For example, two adjacent pixel rows can share a second scan line. Similarly, two adjacent pixel rows can also share a third scan line, a fourth scan line, or a light-emitting line. The same pixel row refers to pixels connected to the same first scan line.

[0053] The pixel portion 14 includes pixels. Each pixel PXij may be connected to a corresponding data line DLj, scan lines GWi, GBi, GIi, GCi, and emission line EMi. Each pixel PXij may include a light emitting element that emits light based on a received data voltage.

[0054] The pixel portion 14 may include a first pixel that emits light of a first color, a second pixel that emits light of a second color, and a third pixel that emits light of a third color. The first color, the second color, and the third color may be different colors from one another. For example, the first color may be one of red, green, and blue, the second color may be one of red, green, and blue that is not the first color, and the third color may be the remaining colors of red, green, and blue that are not the first color and the second color. In addition, as the first to third colors, magenta, cyan, and yellow may also be used instead of red, green, and blue. In the following, for ease of explanation, it is assumed that the first color is red, the second color is green, and the third color is blue.

[0055] The pixel portion 14 may be a diamond PENTILE (diamond ), RGB-Stripe, S-Stripe, Real RGB, Normal PENTILE ) and other various forms of configuration.

[0056] The power supply unit 16 can provide voltages commonly supplied to the pixels of the pixel unit 14. For example, the power supply unit 16 can provide a first power supply voltage ELVSS, a second power supply voltage ELVDD, an initialization voltage VINT, an anode initialization voltage VAINT, and a bias voltage VOBS. For example, the power supply unit 16 can be a PMIC (power management integrated circuit). For example, the power supply unit 16 can be composed of multiple DC-DC converters.

[0057] According to an embodiment, the timing control unit 11 and the data driver unit 12 may also be formed by a single integrated circuit. Alternatively, the timing control unit 11, the data driver unit 12, and the power supply unit 16 may also be formed by a single integrated circuit. Alternatively, the timing control unit 11, the data driver unit 12, the power supply unit 16, the scan driver unit 13, and the light driver unit 15 may also be formed by a single integrated circuit. As described above, whether the components are integrated or separated may vary depending on the product.

[0058] Figure 2 FIG. 1 is a diagram for explaining a pixel according to an embodiment of the present invention.

[0059] Reference Figure 2 The pixel PXij may include a pixel circuit PXC and a light emitting element LD. The pixel circuit PXC includes transistors T1, T2, T3, T4, T5, T6, T7, T8 and a storage capacitor Cst.

[0060] Pixel PXij may be located in the i-th pixel row and in the j-th pixel column. Pixel PXij may be a first pixel for expressing a first color. A second pixel for expressing a second color and a third pixel for expressing a third color may have the same configuration as the first pixel, and thus repeated descriptions are omitted.

[0061] The P-type transistor may be a polycrystalline silicon semiconductor transistor. The channel of the active layer of the polycrystalline silicon semiconductor transistor may include a polycrystalline silicon semiconductor. For example, the polycrystalline silicon semiconductor transistor may be an LTPS (Low Temperature Poly-Silicon) thin film transistor. The polycrystalline silicon semiconductor transistor has high electron mobility and corresponding fast driving characteristics.

[0062] The N-type transistor may be an oxide semiconductor transistor. The channel of the active layer of the oxide semiconductor transistor may include an oxide semiconductor. For example, the oxide transistor may be a low-temperature polycrystalline oxide (LTPO) thin film transistor. The oxide semiconductor transistor has a charge mobility lower than that of a polycrystalline silicon semiconductor transistor. Therefore, the amount of leakage current generated in the oxide semiconductor transistor in the off state may be less than that of the polycrystalline silicon semiconductor transistor.

[0063] The gate electrode of the first transistor T1 may be connected to the first node N1, the first electrode may be connected to the second node N2, and the second electrode may be connected to the third node N3. The first transistor T1 may be a driving transistor. The first transistor T1 may be a P-type transistor.

[0064] The second transistor T2 may have a gate electrode connected to the first scan line GWi, a first electrode connected to the data line DLj, and a second electrode connected to the second node N2. The second transistor T2 may be a switching transistor or a P-type transistor.

[0065] The first scan driving unit 13GW may provide a first scan signal of a conduction level that determines the time point at which the pixel PXij receives the data voltage. For example, the second transistor T2 that receives the first scan signal of the conduction level may be turned on, and the second transistor T2 may apply the data voltage applied to the data line DLj to the second node N2.

[0066] The gate electrode of the third transistor T3 is connected to the fourth scan line GCi, the first electrode is connected to the first node N1, and the second electrode is connected to the third node N3. The third transistor T3 may be a diode-connected transistor or an N-type transistor.

[0067] The fourth transistor T4 may have a gate electrode connected to the third scan line GIi, a first electrode connected to the first node N1, and a second electrode receiving the initialization voltage VINT. The fourth transistor T4 may be a gate initialization transistor. The fourth transistor T4 may be an N-type transistor.

[0068] The fifth transistor T5 may have a gate electrode connected to the emission line EMi, a first electrode receiving the second power supply voltage ELVDD, and a second electrode connected to the second node N2. The fifth transistor T5 may be a first emission control transistor or a P-type transistor.

[0069] The sixth transistor T6 may have a gate electrode connected to the light emitting line EMi, a first electrode connected to the third node N3, and a second electrode connected to the fourth node N4. The sixth transistor T6 may be a second light emitting control transistor or a P-type transistor.

[0070] The seventh transistor T7 may have a gate electrode connected to the second scan line GBi, a first electrode receiving an anode initialization voltage VAINT, and a second electrode connected to the fourth node N4. The seventh transistor T7 may be an anode initialization transistor. The seventh transistor T7 may be a P-type transistor. The magnitude of the anode initialization voltage VAINT may be different from the magnitude of the initialization voltage VINT.

[0071] The anode initialization voltage VAINT can be set differently depending on the type of light-emitting element LD. Depending on the type of light-emitting element LD, there are differences in emission start time. Due to the differences in emission start time, color drag may occur. For example, the anode initialization voltage VAINT for the light-emitting element LD of the first color, the anode initialization voltage VAINT for the light-emitting element LD of the second color, and the anode initialization voltage VAINT for the light-emitting element LD of the third color can be set differently. In another embodiment, the anode initialization voltage VAINT for the light-emitting elements LD of the two colors can be set the same, while the anode initialization voltage VAINT for the light-emitting element LD of the remaining color can be set differently. In yet another embodiment, the anode initialization voltage VAINT for all light-emitting elements LD can also be set the same. In this way, the difference in emission start time for the light-emitting elements LD of each color can be adjusted to prevent color drag.

[0072] The second scan driving unit 13GB may provide a second scan signal of a conduction level that determines the timing for initializing the anode voltage of the light-emitting element LD. For example, the seventh transistor T7 receiving the second scan signal of the conduction level is turned on, and the anode initialization voltage VAINT is applied to the anode of the light-emitting element LD, so that the anode voltage of the light-emitting element LD can be initialized to the anode initialization voltage VAINT.

[0073] The eighth transistor T8 may have a gate electrode connected to the second scan line GBi, a first electrode receiving a bias voltage VOBS, and a second electrode connected to the second node N2. The eighth transistor T8 may be a bias transistor or a P-type transistor.

[0074] It may be that a first electrode of the storage capacitor Cst receives the second power voltage ELVDD, and a second electrode is connected to the first node N1.

[0075] The anode of the light-emitting element LD is connected to the fourth node N4, and the cathode receives the first power supply voltage ELVSS. The light-emitting element LD can emit light in one of a first color, a second color, and a third color. The light-emitting element LD can be a light-emitting diode. The light-emitting element LD can be composed of an organic light-emitting diode, an inorganic light-emitting diode, a quantum dot / well light-emitting diode, or the like. In this embodiment, only one light-emitting element LD is provided in each pixel. However, in another embodiment, multiple light-emitting elements can also be provided in each pixel. In this case, the multiple light-emitting elements can be connected in series, in parallel, or in series-parallel, etc.

[0076] Figure 3 as well as Figure 4 FIG. 1 is a diagram for explaining a change in display frequency according to an embodiment of the present invention.

[0077] The display device 10 may support a variable refresh rate (VRR). The refresh rate is the frequency at which data voltages are written to pixels PXij. It is also called a screen scan rate or a screen refresh rate and may indicate the number of image frames refreshed in one second.

[0078] For example, the pixel unit 14 may display an image at a first frequency AHz in the first mode (see Figure 3 ), in the second mode, the image is displayed at a second frequency BHz which is less than the first frequency AHz (refer to Figure 4 ).

[0079] For example, in the first mode, each frame period 1F may include, for each pixel PXij, one address scan period (AS) and one self scan period (SS). For example, in the second mode, each frame period 1F may include, for each pixel PXij, one address scan period AS and multiple self scan periods SS. The smaller the second frequency BHz, the more self scan periods SS may be included in one frame period 1F. In another example, in the third mode, each frame period 1F may include, for each pixel PXij, only one address scan period AS without including a self scan period SS.

[0080] The address scanning period AS is a period for writing data voltages to the pixels PXij. The address scanning period AS may also be referred to as a data programming period for receiving data voltages from the data lines DLj.

[0081] The self-scan period SS is a period in which no data voltage is written to the pixel PXij. During the light-emitting period of the self-scan period SS, the pixel PXij can emit light using the data voltage written to the address scan period AS. The length of the self-scan period SS can be the same as that of the address scan period AS.

[0082] Figure 5 FIG. 1 is a diagram for explaining an address scanning period according to an embodiment of the present invention. Figure 5 When, refer to Figure 2 Pixel PXij.

[0083] At time point t1a, a light emission signal of an off level (high voltage) is applied to the light emission line EMi, and the fifth transistor T5 and the sixth transistor T6 are turned off, so that the pixel PXij is in a non-light emitting state.

[0084] At time t2a, a third scan signal of a conduction level (high voltage) is applied to the third scan line GIi, turning on the fourth transistor T4. Thus, an initialization voltage VINT is applied to the first node N1. The initialization voltage VINT is a sufficiently low voltage to bias the first transistor T1.

[0085] At time point t3a, the third transistor T3 is turned on by applying a fourth scan signal of an on level (high voltage) to the fourth scan line GCi. Therefore, the first transistor T1 is in a diode connection state in which the drain electrode and the gate electrode are connected.

[0086] At time t4a, a scan signal of a conduction level (low level) is applied to the first scan line GWi, turning on the second transistor T2. Therefore, the data voltage of the data line DLj can be applied to the first node N1 through the second transistor T2, the first transistor T1, and the third transistor T3 in the conduction state. At this time, the voltage of the first node N1 can be a compensation voltage obtained by subtracting the threshold voltage of the first transistor T1 from the data voltage. The storage capacitor Cst can maintain the difference between the second power supply voltage ELVDD and the compensation voltage.

[0087] At time t5a, a low-level scan signal is applied to the second scan line GBi, turning on the seventh transistor T7 and the eighth transistor T8. Due to the seventh transistor T7 being turned on, the anode initialization voltage VAINT is applied to the anode of the light-emitting element LD, initializing the light-emitting element LD to a charge corresponding to the voltage difference between the anode initialization voltage VAINT and the first power supply voltage ELVSS. This facilitates the expression of low grayscale levels in the light-emitting element LD.

[0088] In addition, as the eighth transistor T8 is turned on, the voltage of the second node N2 can be set to the bias voltage VOBS. Therefore, the bias voltage VOBS can be applied to the source electrode of the first transistor T1, thereby preventing hysteresis and ensuring a conductive bias state.

[0089] At time t6a, a low-level emission signal is applied to the emission line EMi, turning on the fifth transistor T5 and the sixth transistor T6. Thus, a path for a driving current to flow from the second power supply voltage ELVDD via the fifth transistor T5, the first transistor T1, the sixth transistor T6, and the light-emitting element LD toward the first power supply voltage ELVSS is formed.

[0090] The amount of driving current can be adjusted according to the voltage held in the storage capacitor Cst. The light emitting element LD emits light at a brightness corresponding to the amount of driving current. The light emitting element LD may emit light before a light emission signal of an off level is applied to the light emission line EMi.

[0091] Figure 6 1 is a diagram for explaining a self-scanning period according to an embodiment of the present invention. Figure 6 When, refer to Figure 2 Pixel PXij.

[0092] At time point t7a, a light emission signal of an off level (high voltage) is applied to the light emission line EMi, and the fifth transistor T5 and the sixth transistor T6 are turned off, so that the pixel PXij is in a non-light emitting state.

[0093] During the period t7a to t8a, the scan signal of the off level is maintained in the first scan line GWi, the third scan line GIi, and the fourth scan line GCi. Therefore, the voltage of the first node N1 does not change.

[0094] At time t8a, a low-level scan signal is applied to the second scan line GBi, turning on the seventh transistor T7 and the eighth transistor T8. Due to the seventh transistor T7 being turned on, the anode initialization voltage VAINT is applied to the anode of the light-emitting element LD, initializing the light-emitting element LD to a charge corresponding to the voltage difference between the anode initialization voltage VAINT and the first power supply voltage ELVSS. This facilitates the expression of low grayscale levels in the light-emitting element LD.

[0095] In addition, as the eighth transistor T8 is turned on, the voltage of the second node N2 can be set to the bias voltage VOBS. Therefore, the bias voltage VOBS can be applied to the source electrode of the first transistor T1, thereby preventing hysteresis and ensuring a conductive bias state.

[0096] At time t9a, a low-level emission signal is applied to the emission line EMi, turning on the fifth transistor T5 and the sixth transistor T6. Thus, a path for a driving current to flow from the second power supply voltage ELVDD via the fifth transistor T5, the first transistor T1, the sixth transistor T6, and the light-emitting element LD toward the first power supply voltage ELVSS is formed.

[0097] The amount of driving current can be adjusted according to the voltage maintained in the storage capacitor Cst. The voltage of the first node N1 recorded during the address scanning period AS is maintained during the self-scanning period SS, so the brightness of the pixel PXij in the self-scanning period SS is the same as the brightness of the pixel PXij in the address scanning period AS.

[0098] Figure 7 FIG. 1 is a diagram for explaining a voltage setting device according to an embodiment of the present invention.

[0099] Reference Figure 7 According to one embodiment of the present invention, a voltage setting device ED may include a brightness measurement unit 110 and an inspection and control unit 120. The inspection and control unit 120 may be comprised of a general-purpose or dedicated computing device. The computing device may include a recording medium and a processor. The recording medium and processor may be included in the same physically identical device, but may also be included in physically separate devices using cloud technology, for example. The brightness measurement unit 110 may be comprised of a camera or a brightness meter.

[0100] Recording media include all kinds of recording devices that can store data or programs that can be read by a processor. Examples of recording media that can be read by a processor include ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, hard disk, external hard disk, SSD, USB storage device, DVD, Blu-ray disc, etc. In addition, the recording medium that can be read by the processor can also be a combination of multiple devices, or it can be distributed in a computer system connected by a network. Such a recording medium can be a non-transitory recording medium (non-transitory computer readable medium). A non-transitory recording medium means a medium that stores data or programs semi-permanently and can be read by a processor, and is not a medium that stores data or programs for a short period of time such as a register, cache memory, memory, etc.

[0101] The inspection control unit 120 may supply a test voltage to the display device 10 or control the display device 10 to generate the test voltage. The brightness measurement unit 110 may capture an image displayed by the display device 10 based on the test voltage or measure the brightness.

[0102] The test control unit 120 may set the test voltage determined to be suitable for the display device 10 as a voltage value of the display device 10. The set voltage value may be stored in a memory of the display device 10.

[0103] Figures 8 to 12 FIG. 1 is a diagram for explaining a voltage setting method according to an embodiment of the present invention.

[0104] Display device 10 (see Figure 7 ) can display an image based on the maximum brightness selected from the maximum brightness (4 nits to 2175 nits). As described above, the maximum brightness can be manually set by a user operating the display device 10 or automatically set by an algorithm related to an illuminance sensor, etc. Even if the grayscale level is the same, the data voltage varies according to the maximum brightness, and thus the light emission brightness of the pixel also varies.

[0105] However, when various voltages are tested one by one for all maximum luminances (4 nits to 2175 nits), excessive tact time is required, and thus an efficient voltage setting method is needed.

[0106] First, the voltage setting device ED (refer to Figure 7 Alternatively, the display device 10 may set emission duty ratios for the maximum brightness (4 nits to 2175 nits) (S101). Such emission duty ratios may be stored in a memory of the display device 10 as predetermined values, rather than being tested by the voltage setting device ED.

[0107] The luminous duty ratio is the ratio of the period of time during which each pixel PXij emits light during a frame period. For example, if the pixel PXij emits light during 80% of the period of a frame period, the luminous duty ratio will be 80%. As another example, if the pixel PXij emits light during 5% of the period of a frame period, the luminous duty ratio will be 5%. Figure 2 as well as Figure 5 When the light emitting signal applied to the light emitting line EMi is at a low level, the fifth transistor T5 and the sixth transistor T6 will be turned on, and the driving current can be supplied to the light emitting element LD. Figure 2 In the case of the display device 10 having the pixel PXij, the ratio of the period in which the light emission signal is at a low level in one frame period can be referred to as the light emission duty ratio.

[0108] For maximum luminances less than or equal to the third maximum luminance ML3 (4 nits to 100 nits), the lower the maximum luminance, the smaller the emission duty cycle (8.9% to 89%) can be set. Therefore, at maximum luminances (4 nits to 100 nits), even if the difference between the second power supply voltage ELVDD and the first power supply voltage ELVSS is the same, the emission duty cycle can be used to adjust the brightness of the display device 10. The same emission duty cycle (8.9%) can also be set for a portion of adjacent maximum luminances (for example, 4 nits and 10 nits).

[0109] On the other hand, for maximum brightness greater than or equal to the third maximum brightness ML3 (100 nits to 2175 nits), the same light-emission duty ratio (e.g., 89%) can be set. In this case, the same light-emission duty ratio can be the maximum value (89%) among the set light-emission duty ratios (8.9% to 89%).

[0110] As described above, the third maximum brightness ML3 is a boundary brightness between the maximum brightness (4 nits to 100 nits) for adjusting the brightness using the light emission duty cycle and the maximum brightness (100 nits to 2175 nits) for adjusting the brightness using the first power supply voltage ELVSS. The appropriate maximum brightness (e.g., 100 nits) can be determined in consideration of power consumption, luminous efficiency, etc. In one embodiment, the second power supply voltage ELVDD can have a fixed value.

[0111] Next, the voltage setting device ED may set a first power supply voltage ELVSS for a maximum brightness (4 nits to 2175 nits) based on the first maximum brightness ML1 ( S102 ). For example, the first maximum brightness ML1 may be predetermined to be the maximum brightness most commonly used by users of the display device 10 (e.g., 650 nits).

[0112] For example, the inspection control unit 120 (see Figure 7) can control the display device 10 so that the display device 10 displays a white image. For example, the inspection control unit 120 can change the first power supply voltage ELVSS so that the brightness measurement unit 110 (refer to Figure 7 ) is 650 nits.

[0113] At this point, even for the same model of display device 10, the magnitude of the first power supply voltage ELVSS required to express the first maximum brightness ML1 may vary due to process variations. For example, process variations may occur depending on the position within the motherboard, and even for the same model of display device 10, the magnitude of the first power supply voltage ELVSS required to express the first maximum brightness ML1 may vary. Therefore, the first power supply voltage ELVSS can be set to a range (minimum to maximum) that can meet the requirements for the first maximum brightness ML1 for all multiple display devices 10. Here, the minimum and maximum values ​​can be based on the absolute values. Each display device 10 can independently set the first power supply voltage ELVSS for the first maximum brightness ML1 within a set range.

[0114] The voltage setting device ED may not perform additional testing for other maximum brightnesses (4 nits to 300 nits, 1200 nits to 2175 nits) except the first maximum brightness ML1. The voltage setting device ED may determine the first power supply voltage ELVSS for other maximum brightnesses (4 nits to 300 nits, 1200 nits to 2175 nits) by adding or subtracting an offset value from the first power supply voltage ELVSS determined for the first maximum brightness ML1.

[0115] For example, for maximum luminances greater than or equal to the third maximum luminance ML3 (100 nits to 2175 nits), the first power supply voltage ELVSS can be set to a higher value as the maximum luminance increases. Here, the magnitude of the first power supply voltage ELVSS is based on an absolute value. Therefore, at maximum luminances (100 nits to 2175 nits), even if the emission duty cycle is the same, the brightness of the display device 10 can be adjusted by utilizing the difference between the second power supply voltage ELVDD and the first power supply voltage ELVSS. Alternatively, the same first power supply voltage ELVSS can be set for a portion of adjacent maximum luminances (e.g., 1600 nits and 2175 nits).

[0116] For maximum brightness (4 nits to 100 nits) less than or equal to the third maximum brightness ML3, the same first power supply voltage ELVSS may be set.

[0117] Next, the voltage setting device ED may set a black data voltage for the maximum brightness (4 nits to 2175 nits) based on the second maximum brightness ML2 (S103). The first maximum brightness ML1, the second maximum brightness ML2, the third maximum brightness ML3, and the fourth maximum brightness ML4 may be different from each other. For example, the second maximum brightness ML2 may be greater than the first maximum brightness ML1, the third maximum brightness ML3, and the fourth maximum brightness ML4. At the brightest maximum brightness (2175 nits) among the maximum brightnesses (4 nits to 2175 nits), black image expression may be most fragile (i.e., black excitation is likely to occur easily). Therefore, the second maximum brightness ML2 is preferably set to the maximum brightness (2175 nits).

[0118] For the second maximum brightness ML2, the differences VAR_RG and VAR_B between the anode initialization voltage VAINT and the first power supply voltage ELVSS can be preset. The anode initialization voltage VAINT can be higher than the first power supply voltage ELVSS, so the differences VAR_RG and VAR_B can be positive numbers. For example, the difference VAR_RG for the first and second colors can be set to 0.25 volts, and the difference VAR_B for the third color can be set to 1.00 volts. 0.25 volts can be the minimum value of the differences VAR_RG, and 1.00 volts can be the minimum value of the differences VAR_B.

[0119] A smaller difference between the anode initialization voltage VAINT and the first power supply voltage ELVSS facilitates the expression of low grayscales. For example, black excitation can be reduced. On the other hand, a larger difference leads to faster pixel response and lower temperature sensitivity. Taking these advantages into account, it is preferable to set the differences VAR_RG and VAR_B relatively small for the second maximum luminance ML2, which is susceptible to black excitation.

[0120] The voltage setting device ED can repeatedly test the temporary black data voltage (e.g., 4.8 volts to 6.2 volts) based on the differences VAR_RG and VAR_B for the second maximum brightness ML2, thereby setting the black data voltage for the second maximum brightness ML2 to display a black image. For example, the voltage setting device ED can gradually increase the temporary black data voltage from 4.8 volts and confirm whether the brightness of the black image is below a reference value. If the brightness of the black image drops below the reference value, the voltage setting device ED can determine the corresponding temporary black data voltage as the black data voltage for the second maximum brightness ML2. The brighter the displayed image, the shorter the brightness measurement time of the brightness measurement unit 110. Therefore, it is advantageous to test the temporary black data voltage by gradually increasing it from a minimum value to a maximum value.

[0121] Next, the voltage setting device ED may apply an offset to the black data voltage for the second maximum brightness ML2, thereby setting the black data voltage for the remaining maximum brightnesses (4 nits to 1600 nits). Applying the offset to the black data voltage for the second maximum brightness ML2 may mean adding the offset to the black data voltage for the second maximum brightness ML2. The offset may have a value less than 0. For example, when the black data voltage for the first color for the second maximum brightness ML2 is set to 6.0 volts, the black data voltage for the first color at the maximum brightness (30 nits) will be set to 5.962 volts. For example, the lower the maximum brightness, the lower the black data voltage may be set.

[0122] Next, the voltage setting device ED or the display device 10 can set the difference VAR_RG and VAR_B between the anode initialization voltage VAINT and the first power supply voltage ELVSS for the remaining maximum brightnesses (4 nits to 1600 nits) among the maximum brightnesses (4 nits to 2175 nits) except the second maximum brightness ML2 based on the third maximum brightness ML3 and the fourth maximum brightness ML4 (S104).

[0123] First, the voltage setting device ED may repeatedly test the temporary difference values ​​T_VAR_RG and T_VAR_B based on the black data voltage set for the third maximum brightness ML3, thereby setting the difference values ​​VAR_RG and VAR_B for the third maximum brightness ML3 to display a black image. For example, for the third maximum brightness ML3, the temporary difference value T_VAR_RG for the first color and the second color may range from 0.3 volts to 0.5 volts. For example, for the third maximum brightness ML3, the temporary difference value T_VAR_B for the third color may range from 1.05 volts to 1.15 volts. Figure 10 , the pair of temporary differences T_VAR_RG and T_VAR_B can be pre-set. For example, when the temporary difference T_VAR_RG is 0.3 volts, the temporary difference T_VAR_B can be set to 1.05 volts. For example, when the temporary difference T_VAR_RG is 0.4 volts, the temporary difference T_VAR_B can be set to 1.10 volts. However, the pair of temporary differences T_VAR_RG and T_VAR_B can also be determined by a relationship such as the following mathematical formula 1.

[0124] [Mathematical formula 1]

[0125] T_VAR_B=T_VAR_RG*0.2+1.15

[0126] For reference, the temporary difference T_VAR_B obtained by equation 1 is Figure 10The numerical value of is irrelevant. Mathematical formula 1 is an example, and the multiplication constant (for example, 0.2) and the addition constant (for example, 1.15) can be changed arbitrarily.

[0127] In one embodiment, the voltage setting device ED may gradually decrease the temporary differences T_VAR_RG and T_VAR_B from 0.5 volts and 1.15 volts, respectively, and determine whether the brightness of the black image is below a reference value. If the brightness of the black image decreases below the reference value, the voltage setting device ED may determine the corresponding temporary differences T_VAR_RG and T_VAR_B as the differences VAR_RG and VAR_B corresponding to the third maximum brightness ML3. The brighter the displayed image, the shorter the brightness measurement time required by the brightness measurement unit 110. Therefore, it is advantageous to test the temporary differences T_VAR_RG and T_VAR_B by gradually decreasing them from a maximum value to a minimum value.

[0128] Next, when setting the first difference value VAR_RG for a maximum luminance (200 nits to 1600 nits) less than the second maximum luminance ML2 and greater than the third maximum luminance ML3, the voltage setting device ED or the display device 10 may perform a first interpolation between the difference value VAR_RG set for the second maximum luminance ML2 and the difference value VAR_RG set for the third maximum luminance ML3. As described above, the difference value VAR_RG for the second maximum luminance ML2 may be pre-set to 0.25 volts (see step (S103)). Based on the luminance measurement, it is assumed that the difference value VAR_RG for the third maximum luminance ML3 is set to 0.40 volts. In this case, the first difference value VAR_RG for the maximum luminance (200 nits to 1600 nits) may be set to a value between 0.25 volts and 0.40 volts.

[0129] At this time, a first interpolation may be performed so that the difference between the first difference values ​​VAR_RG is proportional to the difference between the first power voltages ELVSS corresponding to the maximum brightness. Figure 11 It can be confirmed that the graph of the difference value VAR_RG for the maximum brightness shows a similar trend to the graph of the first power supply voltage ELVSS for the maximum brightness. For example, the first difference value VAR_RG for the maximum brightness of the object (for example, one of 200 nits to 1600 nits) can be derived by the following mathematical formula 2.

[0130] [Mathematical formula 2]

[0131] VAR_X1=VAR_2175+(ELVSS_X1-ELVSS_2175)*(VAR_100-VAR_2175) / (ELVSS_100-ELVSS_2175)

[0132] VAR_X1 may be the first difference value VAR_RG of the maximum brightness of the object. VAR_2175 may be the first difference value VAR_RG of the second maximum brightness ML2. For example, Figure 9 VAR_2175 may be 0.25. ELVSS_X1 may be the first power supply voltage ELVSS for the maximum brightness of the object. The first power supply voltage ELVSS for the maximum brightness of the object may be predetermined in step (S102). ELVSS_2175 may be the first power supply voltage ELVSS for the second maximum brightness ML2. The first power supply voltage ELVSS for the second maximum brightness ML2 may be predetermined in step (S102). VAR_100 may be the first difference VAR_RG for the third maximum brightness ML3. The first difference VAR_RG for the third maximum brightness ML3 may be determined by brightness measurement before the first interpolation in step (S104). ELVSS_100 may be the first power supply voltage ELVSS for the third maximum brightness ML3. The first power supply voltage for the third maximum brightness ML3 may be predetermined in step (S102).

[0133] At this time, the first difference value VAR_B of the third color can be determined by various methods. For example, after determining the first difference value VAR_RG of the first color and the second color, the first difference value VAR_B of the third color can be determined by a relationship such as Mathematical Formula 1. Alternatively, after determining the first difference value VAR_RG of the first color and the second color, the first difference value VAR_B of the third color can be determined by referring to Figure 10 Alternatively, a first interpolation such as that shown in Mathematical Formula 2 may be performed on the first difference value VAR_B of the third color to determine the first difference value VAR_B of the third color.

[0134] In one embodiment, at least one maximum brightness setting with the minimum light-emitting duty cycle (e.g., 8.9%) among the light-emitting duty cycles may be set as the fourth maximum brightness ML4. When there are two or more at least one maximum brightness (4 nits, 10 nits), the largest maximum brightness (10 nits) among the at least one maximum brightness (4 nits, 10 nits) may be set as the fourth maximum brightness ML4.

[0135] First, the voltage setting device ED may repeatedly test the temporary differences T_VAR_RG, T_VAR_B based on the black data voltage set for the fourth maximum brightness ML4 , thereby setting the differences VAR_RG, VAR_B for the fourth maximum brightness ML4 to display a black image.

[0136] For example, for the fourth maximum brightness ML4, the temporary difference T_VAR_RG for the first color and the second color may range from 0.5 volts to 1.2 volts. For example, for the fourth maximum brightness ML4, the temporary difference T_VAR_B for the third color may range from 1.15 volts to 1.50 volts. Figure 10 , the pair of temporary differences T_VAR_RG and T_VAR_B can be pre-set. For example, when the temporary difference T_VAR_RG is 0.5 volts, the temporary difference T_VAR_B can be set to 1.15 volts. For example, when the temporary difference T_VAR_RG is 0.6 volts, the temporary difference T_VAR_B can also be set to 1.20 volts. In addition, the pair of temporary differences T_VAR_RG and T_VAR_B can also be determined using a relationship such as the aforementioned mathematical formula 1.

[0137] For example, the voltage setting device ED may gradually decrease the temporary differences T_VAR_RG and T_VAR_B from 1.2 volts and 1.50 volts, respectively, and determine whether the brightness of the black image is below a reference value. If the brightness of the black image decreases below the reference value, the voltage setting device ED may determine the corresponding temporary differences T_VAR_RG and T_VAR_B as the differences VAR_RG and VAR_B corresponding to the fourth maximum brightness ML4. The brighter the displayed image, the shorter the brightness measurement time required by the brightness measurement unit 110. Therefore, it is advantageous to test the temporary differences T_VAR_RG and T_VAR_B by gradually decreasing them from a maximum value to a minimum value.

[0138] Next, the voltage setting device ED or the display device 10, when setting the second difference VAR_RG for the maximum brightness (15 nits to 90 nits) that is less than the third maximum brightness ML3 and greater than the fourth maximum brightness ML4, can perform a second interpolation on the difference VAR_RG set for the third maximum brightness ML3 and the difference VAR_RG set for the fourth maximum brightness ML4.

[0139] The brightness measurement assumes that the difference value VAR_RG is set to 0.40 volts for the third maximum brightness ML3. Furthermore, the brightness measurement assumes that the difference value VAR_RG is set to 1.10 volts for the fourth maximum brightness ML4. In this case, the second difference value VAR_RG for the maximum brightness (15 nits to 90 nits) can be set to a value between 0.40 volts and 1.10 volts.

[0140] In this case, a second interpolation can be performed so that the difference between the second difference values ​​VAR_RG is proportional to the difference between the corresponding emission duty cycles at the maximum brightness. That is, the first power supply voltage ELVSS is set identically for the maximum brightness (15 nits to 90 nits) that is the target of the second interpolation, so interpolation cannot be performed proportionally to the difference between the first power supply voltages ELVSS. Therefore, unlike the first interpolation, the second interpolation is preferably performed proportionally to the difference between the emission duty cycles. In this case, the same difference value VAR_RG can be set for maximum brightness with the same emission duty cycle (4 nits, 10 nits).

[0141] Reference Figure 12 , it can be confirmed that the graph of the difference value VAR_RG for maximum brightness shows a similar trend to the graph of the emission duty cycle for maximum brightness. However, if the slope of the graph of the difference value VAR_RG for maximum brightness is negative, the slope of the graph of the emission duty cycle for maximum brightness is positive, and the signs of the slopes may be opposite. For example, the second difference value VAR_RG for the maximum brightness of the object (for example, one of 15 nits to 90 nits) can be derived using the following mathematical formula 3.

[0142] [Mathematical formula 3]

[0143] VAR_X2=VAR_100+(AOR_X2-AOR_100)*(VAR_10-VAR_100) / (AOR_10-AOR_100)

[0144] VAR_X2 may be a second difference value VAR_RG of the maximum brightness of the object. VAR_100 may be a difference value VAR_RG of the third maximum brightness ML3. The difference value VAR_RG of the third maximum brightness ML3 may be determined by brightness measurement before the first interpolation in step (S104). AOR_X2 may be a luminous duty cycle of the maximum brightness of the object. The luminous duty cycle of the maximum brightness of the object may be predetermined in step (S101). AOR_100 may be a luminous duty cycle of the third maximum brightness ML3. The luminous duty cycle of the third maximum brightness ML3 may be predetermined in step (S101). VAR_10 may be a difference value VAR_RG of the fourth maximum brightness ML4. The difference value VAR_RG of the fourth maximum brightness ML4 may be determined by brightness measurement before the second interpolation in step (S104). AOR_10 may be a luminous duty cycle of the fourth maximum brightness ML4. The luminous duty cycle of the fourth maximum brightness ML4 may be predetermined in step (S101).

[0145] At this time, the second difference value VAR_B of the third color can be determined by various methods. For example, after determining the second difference value VAR_RG of the first color and the second color, the second difference value VAR_B of the third color can be determined by a relationship such as Mathematical Formula 1. Alternatively, after determining the second difference value VAR_RG of the first color and the second color, the second difference value VAR_B of the third color can be determined by referring to Figure 10 Alternatively, a second interpolation such as that shown in Mathematical Formula 3 may be performed on the second difference value VAR_B of the third color to determine the second difference value VAR_B of the third color.

[0146] In one embodiment, the voltage setting method may include an additional step after step (S104). For example, the additional step may be a step of increasing a margin value to the black data voltage for the second maximum brightness ML2. For example, the margin value may be 0.3 volts. If the black data voltage for the second maximum brightness ML2 is determined to be 6.0 volts in step (S103), the black data voltage for the second maximum brightness ML2 may be adjusted to 6.3 volts in the additional step.

[0147] As described in step (S103), the black data voltage at the maximum brightness (4 nits to 1600 nits) can be set to a value that is offset from the black data voltage at the second maximum brightness ML2. Therefore, through the first additional step, the margin value for the black data voltage can be increased for all maximum brightnesses, which can further effectively prevent black excitation.

[0148] Figure 13 is a diagram for explaining a voltage setting method according to another embodiment of the present invention.

[0149] Reference Figure 13 , it can be confirmed that the difference value VAR_R for the first color, the difference value VAR_G for the second color, and the difference value VAR_B for the third color can be set independently.

[0150] This embodiment can be applied to a display device in which different anode initialization voltages VAINT are supplied to pixels PXij including first color light emitting elements LD, pixels PXij including second color light emitting elements LD, and pixels PXij including third color light emitting elements LD.

[0151] The drawings and detailed description of the invention referred to so far are merely illustrative of the present invention and are intended solely for the purpose of illustrating the present invention. They are not intended to limit or restrict the scope of the invention as set forth in the claims. Therefore, anyone with ordinary skill in the art will appreciate that various modifications and equivalent embodiments are possible. Therefore, the true technical scope of the present invention is determined by the technical concepts of the appended claims.

Claims

1. A method for setting a voltage of a display device, wherein: The voltage setting method of the display device includes: displaying an image with a maximum brightness selected based on the maximum brightness; The step of setting a light emission duty cycle for the maximum brightness; Based on a first maximum brightness, setting a first power supply voltage for the maximum brightness; Based on the second maximum brightness, setting a black data voltage for the maximum brightness; and The step of setting a difference between an anode initialization voltage and the first power supply voltage for the remaining maximum luminances except the second maximum luminance based on the third maximum luminance and the fourth maximum luminance.

2. The voltage setting method for a display device according to claim 1, wherein: The second maximum brightness is greater than the third maximum brightness and the fourth maximum brightness.

3. The voltage setting method for a display device according to claim 2, wherein: The same first power supply voltage is set for the maximum brightness among the maximum brightness that is less than or equal to the third maximum brightness.

4. The voltage setting method for a display device according to claim 3, wherein: For the maximum brightness among the maximum brightnesses that is greater than or equal to the third maximum brightness, the same light emission duty ratio is set.

5. The voltage setting method for a display device according to claim 4, wherein: At least one maximum brightness for which the minimum light emission duty ratio among the light emission duty ratios is set is set as the fourth maximum brightness.

6. The voltage setting method for a display device according to claim 5, wherein: When the number of the at least one maximum brightness is two or more, the largest maximum brightness among the at least one maximum brightness is set as the fourth maximum brightness.

7. The voltage setting method for a display device according to claim 5, wherein: When setting a first difference value related to a maximum brightness smaller than the second maximum brightness and larger than the third maximum brightness among the difference values, first interpolation is performed using the difference value set for the second maximum brightness and the difference value set for the third maximum brightness.

8. The voltage setting method for a display device according to claim 7, wherein: The first interpolation is performed such that a difference between the first difference values ​​is proportional to a difference between first power supply voltages corresponding to maximum brightness.

9. The voltage setting method for a display device according to claim 8, wherein: When setting a second difference value related to a maximum brightness smaller than the third maximum brightness and larger than the fourth maximum brightness among the difference values, second interpolation is performed using the difference value set for the third maximum brightness and the difference value set for the fourth maximum brightness.

10. The voltage setting method for a display device according to claim 9, wherein: The second interpolation is performed so that a difference between the second difference values ​​is proportional to a difference between light emission duties of corresponding maximum brightnesses.

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