Manufacturing process of multilayer insulation press high-voltage printed circuit board

By defining the target field strength distribution and polarization response in the manufacturing of multilayer printed circuit boards, the dielectric properties and layer sequence are inferred, and interface activation strategies and lamination programs are formulated. This solves the insulation system problem of multilayer printed circuit boards under DC bias superimposed high-frequency pulse stress, achieving electric field peak clipping, interface stability and thickness uniformity, reducing failure risk and ensuring the controllability and consistency of the manufacturing process.

CN120692786BActive Publication Date: 2025-12-30ANHUI QUANZHAO ELECTRONICS CO LTD
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Patent Information

Application Number
CN202511182111.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-08-22
Publication Date
2025-12-30
Estimated Expiration
2045-08-22

AI Technical Summary

Technical Problem

Existing technologies struggle to effectively address the combined stress of DC bias and high-frequency pulses when manufacturing multilayer printed circuit boards. This leads to a significant increase in transient and cumulative loads on the insulation system, increased partial discharge sensitivity, space charge accumulation, and uneven interface polarization, which in turn causes delayed puncture and conductor anode wire migration failure. Existing design specifications fail to systematically cover the inner layer field distribution and time-related mechanisms.

Method used

By defining the target field strength distribution and polarization response, the thickness dielectric properties and segmented layer sequence are inversely derived to form a baseline for the barrier stack parameter set. An interface activation strategy and pressing program are formulated, and pre-drying, vacuuming, isothermal infiltration, sequential curing and controlled cooling are implemented. Dielectric proxy and discharge proxy are detected, and conductor boundaries and vias are optimized to achieve electric field peak reduction, interface stability and thickness uniformity.

Benefits of technology

It effectively weakens the peak value of the interlayer electric field, controls the polarization response, reduces the accumulation of space charge and the probability of delayed puncture, ensures the replicability and consistency of the manufacturing process, avoids relying on tail failure experience iteration, achieves rapid and low-cost deviation capture and correction, and meets the electrical and geometric objectives of high-frequency pulse and DC coexistence scenarios.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a multilayer insulation press high-voltage printed circuit board manufacturing process, relates to the technical field of high-voltage PCB, and comprises the following steps: in step one, a target field intensity distribution and a polarization response are used as a traction to reversely push a thick dielectric attribute and a segmented layer sequence, a barrier layer stack parameter set version baseline is formed, and serves as a manufacturing input; in step two, an interface activation strategy and a press program are formulated according to the baseline, pre-drying, vacuum extraction, isothermal infiltration, sequential curing and controlled cooling are implemented, and records are recorded; in step three, dielectric proxy quantity and discharge proxy quantity detection are carried out by using a verification piece group, and a manufacturing release package is generated by comparing the baseline. In step three, a field plate and a voltage equalization pattern are set under the baseline, a conductor boundary and a via are optimized, edge sealing and coating are implemented, and the application is suitable for a scene where a direct current bias and a high-frequency pulse coexist, and the application realizes electric field peak clipping, interface stability, thickness uniformity and controlled alignment.
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Description

TECHNICAL FIELD

[0001] The application relates to the technical field of high-voltage PCBs, in particular to a manufacturing process for a multilayer insulation-pressed high-voltage printed circuit board. BACKGROUND

[0002] In new energy electric drive, rail traction, energy storage inverter, aviation power supply and high-voltage fast charging applications, the board-level insulation is subjected to the combined stress of direct current bias superimposed on high-frequency pulses for a long time. The rapid commutation caused by the wide-bandgap device makes the voltage rising edge steep and the harmonics rich, significantly increasing the transient and cumulative load on the insulation system. Related research has linked this type of waveform to partial discharge and reduced service life. At the same time, industry design and release are still mainly based on external geometric indicators such as creepage distance and electrical clearance, as well as short-time dielectric strength or partial discharge threshold type test criteria. This criterion is mostly derived from the IEC 60664 electrical clearance and creepage distance framework, the IPC-2221 board-level spacing rules, and the UL 796 board component requirements, which are difficult to reflect the field distribution and time effect of inner-layer multi-material laminates in a timely manner. For partial discharge measurement, IEC 60270 provides a common measurement method, but it is easily disturbed in high-frequency pulse and wideband noise scenarios, and engineering implementation often involves a trade-off between sensitivity and noise immunity.

[0003] On the other hand, multi-layer boards are commonly vacuum laminated and pressed in multiple stages. Batch differences in pre-preg moisture, resin flow window and curing process can induce micro-cavities, delamination and interface non-uniformity. The embedded copper structure further introduces geometric discontinuity and thermal-electric coupling hotspots. These manufacturing and structural factors can increase the sensitivity of local electric field and partial discharge. Industry data also suggests that the risk of conductor anode wire migration increases under hot and humid bias conditions, becoming a hidden danger for board failure. At the same time, epoxy-based substrates exhibit space charge accumulation, interface polarization and time-evolving field redistribution in direct current or pulse fields, easily changing the aging path and breakdown location. The above phenomena are more pronounced in real working conditions of high-frequency pulse and direct current alternation, and existing design specifications and release processes do not systematically cover these inner-layer and time-dependent mechanisms, resulting in evaluation and control gaps.

[0004] Based on the above background, in the face of mixed substrate multilayer copper-embedded printed circuit board in the actual working condition of double-pass vacuum pressing manufacturing, it is difficult to build and stabilize the interface trap spectrum of segmented and functionally graded barrier layer stack, resulting in the gradual injection and trapping of space charge in the stack, the non-uniform and time-dependent electric field redistribution of interface polarization under the stress of direct current bias and high frequency pulse, and then triggering low-start local discharge in the geometric high gradient area of copper-embedded boundary, corner and cutting edge and expanding along the micro-cavity and thickness fluctuation; The direct cause of this problem is that the different curing histories of the inner layer interface introduced by segmented pressing, the difference in surface energy and chemical bonding forms different capture states, the gas retention caused by the insufficient wetness of the prepreg and vacuum extraction induces micro-cavities, the in-plane thickness and alignment deviation caused by the influence of material and equipment deviation on the rheological window of the resin is amplified, and the geometric discontinuity of the copper-embedded structure superimposes the field peak of local thermal-electric coupling.

[0005] In this scenario, even if the short-time withstand voltage or traditional local discharge threshold meets the standard, late-onset puncture, surface tracking and conductor anode wire migration failure may still occur during the service period, because the existing release criteria based on external spacing and short-time indicators do not include the internal field distribution and time effect in the manufacturing constraints and in-process detection; More importantly, the space charge and interface polarization behavior of epoxy-based insulation under direct current and pulse switching changes the local electric field distribution, which erodes the initial "safety margin" on the service time axis, which is particularly significant in the high commutation stress environment of wide-bandgap device driving.

[0006] Therefore, it is necessary to prioritize target field distribution and polarization response as design drivers and translate it into a manufacturable barrier layer stack and interface activation strategy, while introducing dielectric and low-stress partial discharge indicators related to real working conditions for in-process verification, otherwise the above problems will accumulate and evolve into sudden failure in new energy electric drive, rail traction, energy storage inverter, aviation power supply and high-voltage fast charging scenarios. SUMMARY

[0007] (I) Technical problems solved

[0008] To address the shortcomings of existing technologies, this invention provides a multilayer insulating lamination high-voltage printed circuit board manufacturing process. By using the target field strength distribution and polarization response as a guide, the thickness-oriented dielectric properties and segmented layer sequence are inversely derived to form a baseline of the barrier layer stack parameter set, which serves as the manufacturing input. Step two involves formulating an interface activation strategy and lamination program based on the baseline, implementing pre-drying, vacuuming, isothermal infiltration, sequential curing, and controlled cooling, and recording the results. Dielectric and discharge proxy quantities are tested on the verification wafer set, and a manufacturing release package is generated by comparing the results with the baseline. While maintaining the baseline, a field plate and equalization pattern are set, conductor boundaries and vias are optimized, and edge sealing and coating are performed. This process is suitable for scenarios with both DC bias and high-frequency pulses, achieving electric field peak reduction, interface stability, uniform thickness, and controlled alignment, thereby solving the technical problems described in the background art.

[0009] (II) Technical Solution

[0010] To achieve the above objectives, the present invention is implemented through the following technical solution: a multilayer insulating lamination high-voltage printed circuit board manufacturing process, including defining the target field strength distribution and polarization response, back-deriving the thickness dielectric property gradient and segmented layer sequence according to the target, forming a barrier layer stack parameter set version baseline, and using it as a unified input item for the interface activation strategy and the lamination process;

[0011] Based on the baseline of the barrier stack parameter set version, an interface activation strategy and a pressing program are formulated, which are carried out by pre-drying, vacuuming and isothermal penetration, followed by sequential curing and controlled cooling, implementing edge flow control and vacuum frame, and generating a pressing program record and an interface activation strategy record.

[0012] According to the pressing program record and the interface activation strategy record, the verification chip group is extracted, the dielectric proxy amount and discharge proxy amount are detected, and compared with the baseline of the barrier layer stack parameter set version to form the release criteria and program adjustment suggestions for the manufacturing release package.

[0013] After meeting the manufacturing release criteria, the baseline of the barrier stack parameter set version is maintained, and the field plate and equalization pattern, conductor boundary and via optimization, edge cutting and barrier exposure sealing coating are performed. The manufacturing release package, the record and the program are then solidified.

[0014] Furthermore, the target field strength distribution is solved by the three-dimensional electric field and the target tangential field strength is obtained on the plate surface, while the target polarization time curve is generated; the dielectric property gradient is discretized into a barrier layer sequence by the material-side threshold domain projection operator, and organized into a design parameter vector and stored in the barrier layer stack parameter set version baseline, and the layer thickness tolerance and uniformity fields are marked, and the target tangential field strength is used to delineate the planar uniform field design domain.

[0015] Furthermore, the parameter transfer matrix is ​​a full-rank block upper triangular structure containing material sequence channels, temperature, pressure, vacuum channels, and recording channels, which accepts the design parameter vector and outputs the original process setting vector.

[0016] A time-stamped set of isothermal penetration and sequential curing is generated, the entries of which correspond one-to-one with the interface activation strategy and the pressing program and can be parsed by the equipment, and are stored in the design channel of the manufacturing release package with uniform units and field names.

[0017] Furthermore, the interface activation strategy simultaneously sets the vacuum chamber pressure trajectory, process temperature trajectory, and pressure head trajectory during the isothermal infiltration stage, and uses the alignment reference as an anchor to arrange the flow control at the edge of the panel.

[0018] The pressing process is executed in the sequence of pre-drying, vacuuming, isothermal infiltration, sequential curing and controlled cooling, and generates a pressing process record and a process sensing record, which includes the time series of temperature, pressure, vacuum and displacement.

[0019] Furthermore, the interface activation strategy implements interface energy modulation at the end of the isothermal permeation stage, uses the activation atmosphere composition and energy delivery curve to define adsorption and cross-linking conditions, and simultaneously limits the vacuum steady-state section and the heating slope.

[0020] The edge flow control and the vacuum frame are pressed together at the alignment nodes and recorded as an interface activation strategy record for subsequent indexing and tracing. At the same time, the timing identifiers of activation atmosphere, energy, vacuum and temperature rise are written into the record.

[0021] Furthermore, the verification chip group uses the pressing program record and the interface activation strategy record as indexes, and places points around the copper embedding boundary, the barrier layer boundary and the thickness extreme value to finally form a dielectric proxy spectrum and thickness position correspondence.

[0022] Furthermore, the discharge proxy quantity is obtained by acquiring waveforms using the on-board induction loop and low-stress test signal, and the energy distribution is obtained by time-scale energy analysis and compared with the target energy spectrum. The target energy spectrum is preferentially generated in the copper-embedded neighborhood based on the barrier layer stack parameter set version baseline and the functional target functional, and a unified spatial coordinate is set with the dielectric proxy quantity spectrum. Waveform acquisition rules are established with the same sampling window and trigger threshold.

[0023] Furthermore, the uniform pressure pattern density field is discretized into field plate and uniform pressure pattern layout parameters by the geometric side threshold projection operator, and the conductor boundary and via optimization are jointly generated based on the curvature target and peak field strength limit to generate the shape trajectory.

[0024] The obtained layout parameters, along with the original process setting vector and the pressing program record, are archived together as a geometric setting vector, and a field mapping is established for use by the parameter transfer matrix extension component.

[0025] Furthermore, the edge sealing and coating thickness distribution are set according to boundary weights, which are obtained by aggregating dielectric deviation density, space charge deviation density and discharge deviation density in the boundary neighborhood;

[0026] The thickness distribution and material number are organized into a surface layer setting vector, and written together with the geometric setting vector into the layout and surface layer channel of the manufacturing release package.

[0027] Furthermore, the manufacturing release package includes a set of release evidence objects, a release criterion, and a semantic signature. The release criterion uses the worst-case release inequality to evaluate the supremacy of the tolerance vector of the tolerance set. The mass production process setting vector is generated by merging the parameter transfer matrix extension and is bound to the semantic signature for integrated distribution and archiving on the equipment side. The association key and storage period of the execution record and release evidence are also specified.

[0028] (III) Beneficial Effects

[0029] This invention provides a manufacturing process for high-voltage printed circuit boards with multilayer insulating lamination, which has the following beneficial effects:

[0030] The baseline of the barrier layer stack parameter set is constructed based on the target field strength distribution and polarization response. The thickness dielectric properties are arranged in a segmented, gradual, and sequential manner, so that the electric field peaks in the interlayer and copper-embedded neighborhood are directionally weakened, the polarization response remains controllable, and the actual withstand voltage is no longer dominated by local field distortion, thereby reducing the probability of space charge accumulation and delayed puncture from the source.

[0031] By translating the baseline of the barrier layer stack parameter set into an executable process setting vector through the parameter transfer matrix, and in conjunction with the interface activation strategy and the isothermal penetration, sequential curing and controlled cooling of the two-way vacuum pressing, the resin is wetting is more complete, the voids are fewer, the interface traps are more stable, the thickness uniformity and the alignment error are significantly reduced, and the manufacturing actions correspond one-to-one with the design semantics, ensuring reproducibility and consistency under different equipment and batches.

[0032] The dual-channel in-process verification of dielectric and discharge proxy quantities replaces the single withstand voltage release. The verification of the wafer set is indexed and located by the pressing program record and the interface activation strategy record. Spectroscopic information and low-stress discharge characteristics are quantified, compared and mapped into clear entries for revising the process setting vector, thereby achieving rapid, low-cost and traceable deviation capture and correction, avoiding the lag situation of relying on tail failure experience iteration.

[0033] Without changing the baseline of the barrier stack parameter set, the topology density design of the field plate and voltage equalization pattern, the control of conductor boundary curvature, and the analytical setting of edge sealing and coating thickness distribution are adopted to unify the thickness target with the planar geometry and boundary surface. The field peaks in highly sensitive areas such as copper-embedded edges, corners and cut edges are structurally weakened, the surface tracking risk is controlled, and the electrical and geometric targets are synergistically satisfied, reflecting the innovative path of pattern and material coupling.

[0034] The worst-case release criteria incorporate dielectric deviation, space charge deviation, discharge deviation, and thickness uniformity extreme values ​​into the same release caliber. The manufacturing release package serves as the sole carrier to bind the barrier layer stack parameter set version baseline, mass production process setting vector, geometry and surface layer settings, and semantic signature. Release and traceability can maintain semantic invariance across batches and factories. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the manufacturing process of the multilayer insulating laminated high-voltage printed circuit board of the present invention. Detailed Implementation

[0036] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] Please see Figure 1 This invention provides a manufacturing process for multilayer insulating lamination high-voltage printed circuit boards, including:

[0038] First, the target field strength distribution and polarization response are determined by the electrical stress spectrum and geometric boundary. Then, the target is translated into the dielectric property gradient and segmentation sequence along the thickness direction. At the same time, the controllability of interface traps and the docility of space charge are constrained. Finally, a baseline version of the barrier stack parameter set is formed, which serves as the sole input source for subsequent interface activation strategies and pressing programs.

[0039] This approach is compatible with but not bound by existing creepage gap rules. It emphasizes the pre-control of time-dependent and interface-dependent mechanisms of inner layer insulation, while taking into account the boundary reinforcement and thermoelectric coupling effects of the copper-embedded area. This provides a unified parameter and documentation basis for the manufacturability and verifiability of two-pass vacuum lamination.

[0040] Step 1: Driven by the target field strength distribution and polarization response, reverse-engineer and solidify the baseline of the barrier stack parameter set version, so that it takes into account electric field equilibrium, space charge docility and interface trap controllability, and can be directly parsed and executed by the manufacturing system.

[0041] Step 101: Using the copper-embedded geometry and stress spectrum as boundaries, establish the target field strength distribution and polarization response, and based on this, deduce the gradient and segmentation order of dielectric properties to form the barrier layer sequence vector and the initial barrier layer stack parameter set. The hybrid substrate and copper-embedded structure cause electric field concentration and heat flow non-uniformity in the thickness direction and local plane. If only external spacing and short-term withstand voltage are relied upon, internal layer field peaks and delayed puncture risks will remain.

[0042] Therefore, before the materials and layer sequence are determined, the target field strength distribution and polarization response with physical meaning should be used to guide the subsequent material combination and thickness ratio, so that each layer of the sequence undertakes a clear peak clipping and polarization adjustment function, and this function still holds near the copper embedding boundary.

[0043] First, based on the device application, the stress spectra of DC and pulse are given, which are abstracted into a time-frequency joint description within a representative operating cycle. Then, the geometric domain is divided into an insulating domain and a copper-embedded domain, and a continuous dielectric property field is introduced in the thickness direction so as to back-derive the discrete fabricatable sequence through variational methods. Finally, the target field strength distribution and polarization response are translated into a functional objective functional, and fabricatable smoothing and loss constraints are introduced so that the solution results can be naturally applied to the set of sequence and material number.

[0044] The target field strength distribution and polarization response are set in the continuous domain of thickness coordinates. The dielectric constant distribution and conductivity distribution are inversely derived by functional minimization. The continuous distribution is then projected into a discrete compressible sequence.

[0045] Therefore, a functional objective is defined. :

[0046]

[0047] Target field strength distribution Prioritizing the local uniform field at the copper embedding boundary to guide the gradual change of dielectric properties along the thickness direction, and then distributing the dielectric constant through threshold projection. With conductivity distribution Discretize it into barrier layer sequence vectors.

[0048] Where: target field strength distribution The expected thickness field strength curve is a non-negative real number; the measured field strength... : By potential The solved and converted thickness field strength is a non-negative real number; weighting coefficients The weighting factor for the field strength deviation term is a positive real number.

[0049] Peak constraint function The smoothing penalty function for local field peaks can be a piecewise smoothing penalty formula, which is a non-negative real number; exponential order. : The exponential order of the deviation measure, which is a real number greater than one;

[0050] Dielectric constant distribution The relative permittivity along the thickness direction is continuously described, representing the permissible range of the material; conductivity distribution. The equivalent conductivity along the thickness direction is continuously described, representing the permissible range of the material; smoothness coefficient. : Smoothing weights for the dielectric constant gradient, which are non-negative real numbers; loss weights The constraint weight for the total conductivity is a non-negative real number; thickness integral domain. The thickness section from the lower surface to the upper surface is a closed section.

[0051] By approximating the target field strength distribution with a functional objective and explicitly penalizing field peaks and losses, the solved dielectric gradient satisfies the electrical objective and has manufacturable smoothness, facilitating subsequent discretization and material selection.

[0052] To incorporate time-dependent polarization response and space charge trainability into a single driving force, an auxiliary objective of polarization-charge coupling is established, and discrete sequences are constrained accordingly. The polarization-charge objective is defined as follows:

[0053]

[0054] in: It is obtained from the equivalent transport-capture equation. The desired polarization relaxation time distribution;

[0055] Then, the threshold projection operator is used. Will Mapping to discrete sequence The discrete parameter set was then organized into an initial version of the barrier layer stack parameter set.

[0056] space charge density The thickness charge density at the reference time is a real number; the polarization relaxation time is... The equivalent polarization relaxation time of the material at a local point is a positive real number; the desired polarization relaxation time is... : Target polarization time distribution, which is a positive real number; weighting coefficients : The weighting factor for residual charge, a positive real number; The tradeoff coefficient for polarization time deviation is a positive real number; exponential order. : The exponential order of the deviation measure, a real number greater than 1;

[0057] Threshold projection operator Operators that map continuous attribute fields to discrete layers form a set of mapping rules; barrier layer order vectors. Material numbers and thickness sets arranged in order of thickness are optional combinations in the material library.

[0058] By incorporating polarization and charge targets into the early design, the discretized sequence can still suppress space charge accumulation in the time dimension, thereby improving adaptability to operating conditions where pulses and DC coexist.

[0059] Step 102: The aim is to construct a pipeline of solution-verification-discretion-compilation using stress spectrum, geometry and material library as input, output the baseline of the barrier stack parameter set version, and generate a file object for the manufacturing system to parse.

[0060] Layer sequence vectors alone are insufficient to guide manufacturing. Stress weighting, boundary conditions, conductor equipotentials in copper-embedded regions, and thermal coupling effects need to be written into the solution. The computational output should be organized into a manufacturing-readable file object to ensure that the interface activation strategy and the pressing program can consume this data in the same semantic way.

[0061] First, a time-frequency weighted stress spectrum aggregation index is constructed to constrain the target field strength distribution throughout the entire working spectrum. Then, the potential field is solved on the geometry containing the copper-embedded domain to generate field strength and energy density maps, which are then verified according to the polarization-charge target. Subsequently, the continuous distribution is mapped to entries such as material number, thickness, and tolerance to form the baseline of the barrier layer stack parameter set. Finally, a parameter transfer matrix is ​​generated to stably transfer the sequence and material properties to the manufacturing system.

[0062] To account for the combined effects of DC and pulse, a stress spectrum weighting index is defined:

[0063]

[0064] in: Determined by operating conditions Let the aforementioned field peak constraint function be used. The solution is as follows:

[0065]

[0066] Obtain the potential field, then calculate With energy density, using weighted index As a cross-spectral verification, an equipotential and thermally conductive boundary is applied at the copper embedding boundary, so that the actual coupling of electricity and heat is reflected in the target field strength distribution.

[0067] Where: weighted index The peak-shaving evaluation based on a combination of time and thickness is represented by non-negative real numbers; the weighting function... The function that characterizes the importance of stress by frequency and time is a non-negative real number; for example, it can be a two-segmented power-weighted type or a high-frequency pulse superposition type. Power or Gaussian modulation are common weighting strategies. The parameters can be adjusted in the positive real number range according to the application scenario (electric drive, traction, fast charging, etc.).

[0068] Potential function The thick-section potential solution is a real number. The potential function is solved based on a simplified one-dimensional quasi-electrostatic model of Maxwell's equations or a multi-layer analytical iterative method, which is a standard procedure for electric field design. Publicly available equations, boundary conditions, and recursive relationships are sufficient to replicate the solution process. The required material parameters are given by the barrier stack parameter set. Energy density... The local energy density calculated from the electric field is a non-negative real number; upper frequency-time limit. : The upper bound of the representative working period, which is a positive real number.

[0069] By using stress spectrum weighting to unify the peak reduction targets under different operating conditions and incorporating the copper embedding boundary into the same solution, the target is made close to the operating period during the design phase, thereby reducing the risk of retrospective adjustments after manufacturing.

[0070] The continuous solution results are discretized into material library entries to form the baseline of the barrier stack parameter set version. A parameter transfer matrix is ​​established to feed to the manufacturing system, ensuring that the interface activation strategy and pressing program can read the layer sequence and attributes in a one-to-one correspondence. A linear transfer relationship is defined:

[0071]

[0072] in: Organized by the baseline version of the barrier stack parameter set, it includes material number sequence, thickness sequence, dielectric constant sequence and conductivity sequence, and parameter vector extracted from the baseline version of the barrier stack parameter set, which is a mixture of real numbers and signs; The process setting vector for the manufacturing system includes the settings for the pre-drying schedule, vacuuming stage, isothermal permeation stage, and controlled cooling stage. It is a set of settings for manufacturing execution and is a real number vector. The parameter passing matrix records the mapping from design entries to process settings, and the mapping matrix from design to manufacturing. It is a matrix that ensures semantic consistency.

[0073] Then, the baseline of the barrier stack parameter set version was set. With parameter transfer matrix The stress spectrum and boundary definitions are compiled into a document and output as a file object that can be parsed by the manufacturing system, so that subsequent interface activation strategies and pressing programs can directly reference it.

[0074] Barrier stack parameter set version baseline The final data object in this step is a structured collection.

[0075] The baseline version of the barrier stack parameter set is stably transformed into a manufacturing-executable setting using matrix mapping, enabling step two to seamlessly inherit the results of step one and avoiding semantic ambiguity and aperture drift. Starting with the target field strength distribution and polarization response, the dielectric gradient and segmentation order are established through functional objective functionals, and the space charge doctrinality is constrained using polarization-charge objectives. Subsequently, stress spectrum weighting and copper embedding boundary are used for unified solution, finally outputting the baseline version of the barrier stack parameter set and the parameter transfer matrix.

[0076] Barrier stack parameter set version baseline The parameter transfer matrix will serve as the sole input for subsequent interface activation strategies and pressing procedures. Responsible for converting design items into equivalent process setting vectors The stress spectrum weighted index and functional objectives Polarization-charge target The threshold value will be used as the comparison benchmark for subsequent detection.

[0077] This step is based on the baseline of the barrier stack parameter set version. With parameter transfer matrix Using this as the sole input, a systematic technical path is constructed for the dual-pass vacuum lamination process of multilayer copper-embedded PCBs with hybrid substrates, establishing an interface activation strategy and lamination procedure.

[0078] The design intent of the target field strength distribution and polarization response is translated into an executable trajectory of isothermal penetration, controlled curing and confined flow, so that the interface trap spectrum and void volume fraction can be modulated, and the thickness uniformity and alignment error are stably reduced to within the tolerance of the barrier layer stack parameter set version baseline. Then, a traceable pressing program record and interface activation strategy record are generated for subsequent comparison and retrieval of dielectric and discharge proxy quantities.

[0079] Step 2: Based on the baseline version of the barrier layer stack parameter set By reverse-engineering the interface activation strategy and pressing program, the void volume fraction and interface trap spectrum are converged in a directional manner, and the consistency of the target field strength distribution is maintained near the copper embedding boundary.

[0080] Step 201: Determine the trajectory of isothermal penetration and surface energy modulation through the interface activation strategy to ensure that the dielectric gradient and segmentation order of the barrier stack parameter set version baseline are faithfully represented at the physical level, and provide a quantitative benchmark for penetration depth and gas release flux for the pressing process.

[0081] The hybrid substrate and the copper-embedded geometry create a competitive relationship between resin rheology and gas release channels in the thickness direction. If only empirical heating and vacuuming are relied upon, the void volume fraction is difficult to decrease in a predictable manner, and the interface trap spectrum will also become uncontrollable due to uneven cross-linking. Therefore, it is necessary to establish an interface activation strategy that works in conjunction with resin wetting, gas release flux, and interfacial energy, using the baseline of the barrier stack parameter set as an anchor point. This will ensure that the isothermal infiltration stage does not result in excessive resin loss and can form stable wetting in the fiber interlacing region, thereby providing an executable infiltration and curing prior for subsequent two-pass vacuum pressing.

[0082] First, the parameter passing matrix is ​​used. Acting on the design parameter vector Obtain the process setting vector Then, the initial trajectory of the compression program is constructed using a time-series generation operator. Finally, the trajectory is optimized with the combined objective of three elements: permeation, gas release, and interfacial energy, so that the interfacial trap spectrum approaches the desired shape. Within the vacuum chamber, the vacuum chamber pressure trajectory is... Temperature trajectory With the pressure trajectory of the pressure head Together they constitute the set of trajectories in the preceding segment:

[0083]

[0084] and based on void volume fraction With gas release flux To determine the target quantity, a trajectory shaping functional is established. :

[0085]

[0086] in, The expected release curves of volatile components derived from the baseline of the barrier stack parameter set version are given;

[0087] Optimization A lower void volume fraction and smooth gas release flux can be achieved within the isothermal permeation time window, thereby inhibiting micropore nucleation. As a result, the void volume fraction and interfacial wettability are improved simultaneously.

[0088] Time limit : Duration of the isothermal infiltration phase, a positive real number; weighting coefficient Importance coefficient of void volume fraction, a positive real number; weighting coefficient. The importance coefficient of the gas release flux deviation is a positive real number.

[0089] Weighting coefficient : Smoothing weight of the rate of temperature change, a non-negative real number; void volume fraction The instantaneous void ratio of the resin-fiber system is 0 to 1; the gas release flux is... : The amount of volatile components released per unit time, a non-negative real number; the expected gas release flux. The target flux estimated from the baseline of the barrier stack parameter set version is a non-negative real number; exponential order. Deviation penalty index, a real number greater than 1; temperature trajectory The process temperature inside the cavity and the billet is a real number; the pressure trajectory... The normal pressure applied by the pressure head to the billet is a non-negative real number; the pressure trajectory of the vacuum chamber. : Absolute pressure of the cavity, a non-negative real number.

[0090] By using integrable functionals to simultaneously suppress void volume fraction and unstable gas release, the isothermal permeation stage is ensured to be fully wetted while avoiding local gas blockage, providing an executable thermo-pressure vacuum trajectory for the first stage of two-pass vacuum pressing.

[0091] Interface Trap Spectrum With the expected interface trap spectrum The deviation between the two phases is determined by both thermo-chemical activation and surface energy state. Therefore, interfacial energy modulation is superimposed at the end of the isothermal infiltration stage to simultaneously optimize the adsorption state and crosslinking degree of the fiber bundle and resin phase. A trap spectral deviation functional is constructed. :

[0092]

[0093] in, For the surface energy distribution of the interface, The desired surface energy distribution;

[0094] Optimization At that time, by utilizing the controllable activation energy input and atmosphere composition in the interface activation strategy, the isothermal permeation terminal achieves a predetermined adsorption state and cross-linking degree, so that the interface trap spectrum approaches the polarization time target required by the barrier stack parameter set version baseline.

[0095] Thickness domain The thickness range from the bottom surface to the top surface is a closed interval; weighting coefficient. : The weight of the interface trap spectrum deviation, which is a positive real number; weight coefficient The weight of the surface energy deviation is a positive real number; exponential order. Bias penalty index, a real number greater than 1; Interface trap spectrum. The density of trapped states at the interface is a non-negative real number; the expected interface trap spectrum. : Target captured state density distribution, which is a non-negative real number; surface energy : Effective surface energy of the interface, a non-negative real number; Expected surface energy : The surface energy distribution of the target is a non-negative real number.

[0096] Furthermore, by minimizing the combined bias of interface trap spectrum deviation and surface energy deviation, we ensure that the activation energy release and atmosphere setting have a clear convergence direction, so that the polarization-charge target is realized at the interface scale and remains consistent with the baseline of the barrier stack parameter set version.

[0097] Step 202: Based on the trajectory output by the interface activation strategy, construct a full-process pressing program for two-stage vacuum pressing, so that the first stage focuses on permeation-gas release and initial cross-linking, and the second stage focuses on volume convergence and controlled cooling, with thickness uniformity and alignment error as explicit targets, while implementing edge flow control and vacuum frame.

[0098] If thickness uniformity and alignment error are not incorporated into the same molding process, the copper-embedded boundary will become a decisive weak point in the actual pressure resistance. Therefore, it is necessary to design two interconnected pressure, temperature, and vacuum trajectories based on the layer sequence thickness and tolerance given by the barrier layer parameter set version baseline, and to set a peelable flow control structure at the edge of the panel to keep the resin flow orderly on both the in-plane and thickness scales. The optimal result of the isothermal penetration section is used as the starting point of the first stage, and the curing temperature rise and pressure plateau are designed as the core of the second stage. Finally, the thickness uniformity index and alignment error index are used as readback values ​​to reshape the pressing program and generate an executable pressing program record.

[0099] To simultaneously stabilize thickness distribution and limit excessive resin outflow, a thickness uniformity index is introduced. With penetration depth index And establish a two-way trajectory shaping functional :

[0100]

[0101] Through optimization By obtaining the combined settings of the temperature trajectory, pressure trajectory and vacuum chamber pressure trajectory of the first and second stages, the target penetration depth is achieved during the isothermal penetration period and the in-plane thickness is kept stable, thereby suppressing edge extrusion and interlayer displacement during the curing period.

[0102] Where: upper limit of time The end time of the first leg is a positive real number; the upper limit of time. The end time of the second stage is greater than Positive real numbers; weighting coefficients : The weight of the penetration depth deviation, which is a positive real number; weighting coefficient The weight of the thickness uniformity in the first pass is a positive real number;

[0103] Weighting coefficient The weight of the thickness uniformity in the second stage is a positive real number; the penetration depth. : The instantaneous penetration scale of the resin in the thickness direction, which is a non-negative real number; Target penetration depth The desired penetration curve derived from the interface activation strategy is a non-negative real number; thickness uniformity. : In-plane thickness deviation measure, a non-negative real number;

[0104] Target thickness uniformity The target value given by the baseline version of the barrier layer stack parameter set is a non-negative real number, which serves to unify the thickness diameter; exponential order. The deviation penalty exponent is a real number greater than one, which increases the sensitivity to local anomalies. A dual-interval functional simultaneously constrains penetration and thickness, ensuring a clear division of labor between the first and second stages and consistent execution across the same metrics. This maintains thickness and penetration targets consistent with the baseline of the barrier stack parameter set version.

[0105] To suppress interlayer misalignment and copper-intercalation boundary field peaks, an alignment correction segment is inserted between the second heating plateau and the pressure plateau, and the alignment error index is used as the standard. With edge stress index To determine the readback quantity, construct a robust functional. :

[0106]

[0107] Through optimization The timing of the linkage between the vacuum frame sealing and the edge flow control structure ensures that the alignment error and edge stress are mitigated according to the target curve, and provides a more stable force and field distribution for the thin layer in the barrier layer stack parameter set version baseline at the copper embedding boundary.

[0108] Where: weighting coefficient Alignment error weight, a positive real number; weighting coefficient. Edge stress weight, a positive real number; exponential order. Deviation penalty index, a real number greater than 1; alignment error : The relative position deviation of the layers, which is a non-negative real number;

[0109] Edge stress The equivalent stress of the tangential edge and the flow control zone is a non-negative real number; the target edge stress. The target stress, determined based on the baseline of the barrier stack parameter set version, is a non-negative real number.

[0110] By incorporating alignment and edge forces into the same functional, the second process achieves a balance between solidification and geometric stability, ensuring the dual equilibrium of the electric and mechanical fields at the copper-embedded boundary and serving the consistency of the target field strength distribution.

[0111] Based on the baseline of the barrier stack parameter set version With parameter transfer matrix Starting from this point, the trajectory of isothermal infiltration-release and surface energy reshaping is first determined through an interface activation strategy, forming a directional convergence for the void volume fraction and interface trap spectrum; then, a two-stage vacuum pressing program is constructed, so that the infiltration depth and thickness uniformity are controlled in the first stage, and the alignment error and edge stress are converged in the second stage.

[0112] The corresponding pressing program record and interface activation strategy record will serve as the index for S3 extraction of verification wafer sets, and will be linked to the process setting vector. Stress spectrum weighting index Functional Objective Function With polarization-charge target The thresholds together constitute the comparison caliber.

[0113] Based on the baseline of the barrier stack parameter set version Parameter transfer matrix Process setting vector Using lamination process records and interface activation strategy records as the sole upstream inputs, this method constructs a systematic verification method for dielectric and discharge proxy quantities for in-process interpretation of hybrid substrate multilayer copper-embedded PCBs after double-pass vacuum lamination.

[0114] Using the target field strength distribution and polarization response as references, the spectral and discharge information of the verification sheet group in the thickness direction and in-plane sensitive region is extracted and compared with... The expected responses are aligned one by one, and release criteria and program adjustment suggestions are generated in the manufacturing release package, so that subsequent mass production can reuse the same caliber under the same semantics.

[0115] Step 3: Verify the baseline of the barrier stack parameter set version by performing dual-channel on-premises verification using both dielectric and discharge proxy quantities. Whether the electric field clipping and polarization stabilization intentions are faithfully realized in manufacturing, and whether the deviations are translated into process setting vectors. Specific adjustment recommendations.

[0116] Step 301: Using dielectric surrogate as the main thread, construct a measurable, solvable, and comparable spectroscopic link around the polarization-charge mechanism, and use sensitive points at the copper embedding boundary and thickness direction as observation anchors to form an interpretation scale consistent with the target field strength distribution. The delayed puncture risk of space charge is rooted in the coupling of polarization relaxation and interface traps; a single breakdown voltage test cannot reveal its time correlation. Therefore, it is necessary to characterize the manageability of polarization and loss using the joint structure of the dielectric surrogate spectrum in the frequency domain and thickness direction, thereby connecting with... The polarization time target and the dielectric gradient target are compared.

[0117] First, the parameter passing matrix is ​​used. Read process setting vector The timescales of the isothermal infiltration and curing sections are used to determine the sampling time and sampling site of the verification sheet group; then, the dielectric surcharge spectrum is obtained by spectroscopic measurement and a continuous-discrete consistency metric is constructed; finally, the functional form is compared with the expected curve, and the difference is mapped to the interpretation space of interface traps and sequence matching.

[0118] To ensure that the dielectric surcharge is coordinated with the target field strength distribution, a frequency-thickness joint dielectric surcharge spectrum is established. And the weighted bias-smoothing composite functional metric and the expected spectrum are used. Consistency:

[0119]

[0120] Where: thickness domain The sample thickness region is a closed real region; frequency domain. The frequency domain for dielectric conductivity measurement is the positive real range.

[0121] Dielectric spectral density The equivalent relative permittivity spectrum of the sampling point is a positive real number;

[0122] Expected dielectric spectral density :Depend on The derived target spectrum is a positive real number; the weighting function Frequency domain importance weights are non-negative real functions; bias exponent. The exponent of the metric is a real number greater than 1, which enhances the sensitivity to peak deviation.

[0123] Fractional order The fractional derivative order of frequency domain smoothing, ranging from 0 to 1; the smoothing coefficient. : Smoothing term weight, which is a non-negative real number.

[0124] During implementation, the verification array was arranged around the copper embedding boundary, the barrier layer interface, and the extreme point of in-plane thickness, and the electrode contact conditions were kept constant using a uniform fixture; the dielectric surcharge spectrum was collected. First, frequency domain noise reduction and electrode polarization correction are performed, and then dielectric deviation measurement is performed. The calculation.

[0125] Due to the expected dielectric constant spectrum Given the target field strength distribution and polarization time target, therefore, the dielectric deviation metric... The size can be directly mapped to the diagnostic level of whether the material selection meets the baseline of the barrier layer stack parameter set version and whether isothermal penetration achieves uniform wetting;

[0126] If dielectric deviation is measured An excessively large value in the low-frequency weight region indicates anomalies such as interface traps and polarization hysteresis; an excessively large value in the high-frequency weight region suggests that the dielectric gradient is not presented in a segmented order. By using a joint functional to quantitatively align the dielectric surrogate spectrum with the expected spectrum, the diagnostic conclusions are consistent with... The design variables are matched one-to-one to avoid subjective uncertainty caused by empirical interpretation.

[0127] To capture the risk of delayed generation, a memory kernel-driven inversion expression is established by inverting polarization intensity based on dielectric surrogate spectrum and deriving space charge surrogate density:

[0128]

[0129] Where: space charge surcharge density : Charge surrogate quantity at the thick-axis location, a real number, representing the residual after injection-capture; memory core The polarization-charge coupling memory weights are non-negative integrable functions; they are taken from a completely monotonic family of kernels and satisfy the following conditions: , And it remains nonnegative for any finite difference sequence;

[0130] polarization intensity Equivalent polarization response, which is a real number; kernel function The frequency-time mapping kernel is a non-negative function that functions to map the dielectric surcharge spectrum. Projected into the time domain; taken from a family of causal, dispersive, uniform kernels, satisfying for each fixed... of Integrability and for each fixed of Continuity, and consistency with the Cauchy principal integral of the dielectric response, ensures that... Polarization intensity obtained by projection Satisfying causality; upper time limit : The upper bound of the representative loading period, which is a positive real number.

[0131] In implementation, kernel function Select a nucleus shape that satisfies both causality and dispersion consistency to maximize polarization intensity. The establishment conforms to the physics of material response; subsequently, through memory kernels Extracting the hysteresis contribution yields the space charge surrogate density. .

[0132] To align with the baseline of the barrier stack parameter set version polarization-charge target in Unify and construct a space charge deviation metric:

[0133]

[0134] Where: weight function Thickness weights are non-negative real functions; target space charge surrogate quantity. :Depend on The derived target distribution is a real number, which serves as the criterion for judgment; exponential order. : The exponent of the deviation measure, a real number greater than 1.

[0135] Space charge deviation measurement Anomalies will be marked at specific locations within the validation chip set, serving as the basis for subsequent program adjustment suggestions. Frequency-time mapping and memory kernel inversion are used to transcribe spectroscopic information into space charge proxies, enabling the quantification of delayed-onset risk, and... Target semantic alignment.

[0136] Step 302: Using discharge surcharge as the main line, capture partial discharge signs under low stress conditions without touching the destructive threshold, and identify characteristic energies related to the copper embedding boundary and barrier layer interface in the time-scale coordinate system, and then... Target field strength distribution and The peak suppression target is mapped and compared. Partial discharge is the result of the synergy between field distortion and micro-voids, and its early events are characterized by temporal sparsity and scale bias. The single peak criterion is easily misled by sporadic noise, so a structured metric of time-scale energy is needed for robust identification. First, the low-stress discharge waveform is obtained through the on-board induction loop and the shielded sampling path, and then the energy distribution is obtained through time-scale transformation. Subsequently, the deviation is calculated with the target energy spectrum as a reference, and the dielectric deviation metric on the dielectric side is connected. Measurement of space charge deviation Perform a consistency check. The trigger threshold is defined as the statistical multiple of the rise in the device noise floor, rather than the absolute voltage value; the sampling channel must meet the dynamic range requirements on a logarithmic scale to ensure time-scale energy. Stable computation;

[0137] The original sequence is formed by the discharge voltage test signal and the response of the on-board induction loop. The energy distribution is obtained through reversible time-scale transformation. and with target energy map For reference, define the deviation functional:

[0138]

[0139] Where: time domain The time interval for discharge measurement is the positive real interval; the scale domain is... The scale interval of the time-scale transformation is the positive real interval; time-scale energy. Energy distribution, a non-negative real number, captures the scale characteristics of discharge events. It is an energy metric that simultaneously expands a transient electrical signal to two dimensions: occurrence time and characteristic scale.

[0140] Target energy map : Baseline of barrier layer stack parameter set version Functional Objective The derived reference distribution is a non-negative real number, serving as the comparison benchmark; the weighting function... Scale weights are non-negative real functions, such as power-order piecewise, Gaussian impulse superposition, and logarithmic amplification forms; exponential order. : The exponent of the deviation measure, a real number greater than 1.

[0141] To suppress the misleading effect of occasional noise, a cross-channel consistency indicator is introduced. :

[0142]

[0143] Where: weight kernel The weights generated by the copper-embedded boundary neighborhood priority rule are non-negative real functions, such as spatial-frequency weight kernels and boundary convolution weight kernels.

[0144] When the deviation functional Cross-channel consistency indicator When amplified in the same direction, it is determined that there is a repeatable discharge tendency at the copper insertion boundary or barrier layer interface; if the deviation functional Larger cross-channel consistency indicator If normal, prioritize checking for contact and shielding issues;

[0145] If cross-channel consistency indicator Large and biased functionals If normal, it indicates a slow variable bias on the dielectric side, but no significant discharge has yet been triggered. By coupling and comparing time-scale energy with the dielectric-side weighting kernel, the robustness of early discharge identification is improved, and the interpretation is made more accurate. To maintain consistency with the target semantics.

[0146] To unify the expression of the three types of deviations into release and adjustment recommendations, a weighted fusion index is introduced:

[0147]

[0148] And by adjusting the mapping operator:

[0149]

[0150] Generate new process setting vectors This is used to suggest program revisions and release criteria.

[0151] Where: fusion weight The weights of each deviation component are non-negative real numbers; extreme values ​​of thickness uniformity. The extreme values ​​of in-plane thickness deviation extracted from the pressing program are non-negative real numbers.

[0152] Stress spectrum weighted index The cross-spectral peak reduction index is a non-negative real number. To unify the constraint strength under different operating conditions, it converts the complex stress waveforms of DC, AC, and high-frequency pulses into a unified dimensional scale using a pre-defined weighting rule. This facilitates a consistent measurement of the overall electrical stress the board bears across design, manufacturing, release, and traceability stages. (Functional objective functional) Field strength deviation - smoothing target, a non-negative real number, used to evaluate peak reduction consistency; polarization - charge target. Polarization and charge targets are non-negative real numbers;

[0153] Adjusting the mapping operator The operator that translates risk indicators and target objects into revised process setting vectors is a set of mapping operators whose function is to generate revised process setting vectors. Specifically: ① Divide dielectric, space charge, partial discharge, and thickness deviation by their respective thresholds to obtain a dimensionless risk vector; ② Multiply this vector by a pre-calibrated sensitivity matrix to calculate the increments of adjustable process parameters such as temperature, pressure, vacuum, and time; ③ Multiply the overall increments by a step size coefficient less than one to control the adjustment range; ④ Compare the results item by item with the limits of the equipment and materials. If any exceed the limits, the limit is truncated, and the truncation information is written into the release package. In this way, within a linear-limiting framework, detection deviations can be quickly converted into executable process revision values.

[0154] Original process setting vector : A real number vector; a vector for revising process settings. The revision generated based on the criteria in this step is a real number vector.

[0155] In implementation, the mapping operator is adjusted. Dielectric deviation measurement The low-frequency amplification is preferentially mapped to prolong the isothermal permeation time history or improve the steady-state level of vacuum pumping, and the space charge deviation is measured. The thickness-oriented concentration preferential mapping is to reduce the heating slope and extend the plateau to improve crosslinking uniformity, and to modify the deviation functional The edge band amplification priority mapping is used to enhance the compression timing of the vacuum frame seal and edge flow control.

[0156] Subsequently, the process setting vector was revised. Baseline of barrier stack parameter set version The entries are passed to the matrix via parameters. Write back to the release criteria and program adjustment recommendations for the manufacturing release package to ensure that the next batch is executed according to the same semantics. Use unified fusion metrics and adjustment mappings to converge multi-source deviations into executable recommendations, while maintaining the baseline of the barrier stack parameter set version. The one-to-one correspondence ensures a stable interpretation and revision channel during the mass production stage.

[0157] The dual-channel verification of dielectric and discharge proxy quantities is completed around the verification wafer set. The output, along with the pressing program record and interface activation strategy record, is written into the release criteria and program adjustment suggestions of the manufacturing release package. This provides a common interpretation caliber and a common objective function reference for the conductor boundary averaging and sealing processing in step four. Based on this, step four can proceed without changing the baseline version of the barrier stack parameter set. Under the premise of implementing end-point convergence, the hybrid substrate multilayer copper embedded PCB maintains the consistency of target field strength distribution and polarization response under mass production conditions, and achieves synergistic improvement on the two observation chains of discharge and dielectric.

[0158] By designing the topological density of the field plate and voltage equalization pattern, controlling the hypercurvature of conductor boundary curvature and via boundary, and setting the solvable distribution of sealing and coating thickness, the dielectric surmutation spectrum is obtained. Space charge surcharge density The time-scale discharge energy anomalies are translated into executable modifications to the geometry and surface layer, and then passed as a parameter transfer matrix. Deliver the layout settings to the manufacturing release package to facilitate mass production replication and traceability.

[0159] Step 4: Maintain the baseline of the barrier layer stack parameter set version. Under unchanged conditions, the target field strength distribution and polarization response are made stable and consistent on both the plane and boundary scales by means of field plate and equalization pattern, conductor boundary curvature control, and edge sealing and coating thickness distribution, and the deviation of the two observation chains of dielectric and discharge is converted into the convergence of geometry and surface layer.

[0160] Step 401: For field peak suppression within the conductor plane and field homogenization of the copper-intercalated neighborhood, a topology density design for the field plate and voltage equalization pattern is provided, supplemented by hypercurvature control of conductor boundaries and via boundaries, to ensure the baseline of the barrier stack parameter set version. The thickness of the target is consistent with the planar field distribution.

[0161] Barrier stack parameter set version baseline Dielectric gradients and segmentation sequences have been established along the thickness direction, but copper embedding geometry, corners, and via edges still focus electric fields in the plane and trigger edge stress increases, affecting the functional target. The attempt to smooth out peaks is thwarted locally; therefore, without altering the stratigraphic sequence, it is necessary to flatten the tangential field and gently transition the curvature using in-plane equipotential or controlled potential patterns, thereby enabling... The transspectral constraints are realized at the geometric end.

[0162] First, set the vector according to the revised process. Extreme values ​​of thickness uniformity Alignment error Based on the statistical results, the design domains of the copper embedding neighborhood, corners, and vias are determined; then, a joint objective of the topological density field and the boundary curvature field is constructed to obtain the spatial distribution of the field plate and the equalization pattern, as well as the curvature trimming trajectory of the conductor boundary; finally, the obtained geometric setting vector is incorporated into the parameter transfer matrix. The layout channel outputs a buildable layout configuration object.

[0163] To establish a feasible voltage equalization network in the copper-embedded neighborhood, the design domain is defined. mean field density field and the target tangential field strength For reference, minimize the following topological density objective functional:

[0164]

[0165] Where: Design domain The area involved in the design within the plane is the plate surface subdomain; the mean field geometric density field. A continuous field between 0 and 1, which is a closed interval;

[0166] Target tangential field strength Based on the baseline version of the barrier stack parameter set Functional Objective The derived tangential field target is a non-negative real number; the target tangential field strength Electric field solved from three dimensions Obtained by tangential projection onto the plate surface, and compared with the functional objective function. Thick-axis constraint coupling generation.

[0167] Actual tangential field strength The tangential field strength obtained from the three-dimensional solution is a non-negative real number; mean field weight distribution. The weights for the copper-embedded neighborhood and corners are emphasized and are non-negative real functions, such as two-dimensional Gaussian weights, concentric ring step weights, inverse distance weights, and local field strength feedback weights, etc., exponential. : Deviation penalty index, a real number greater than 1;

[0168] Smoothing coefficient : Smoothing weights for density gradients, which are non-negative real numbers; Connection constraint weights The penalty coefficient for connectivity is a non-negative real number; the connection constraint function. : A function that ensures the connectivity of the equalizing pathway, is a non-negative real number, constrains network continuity, and is a connection constraint function. The weighted sum of connectivity penalty and minimum channel width penalty is used to ensure that the voltage equalization network is electrically connected and that the narrowest point is not lower than the process resolution.

[0169] This objective makes the mean-field geometric density field A continuous voltage equalization channel is formed between the copper-embedded edge and the high-gradient band, and a parameter transfer matrix is ​​used. Mean field geometric density field The projection shows a list of specific field plates and voltage equalization patterns. Technical effects: Tangential field peaks are directionally suppressed, and the energy density distribution in the copper-embedded neighborhood is more gradual, thus providing... It provides planar-side protection for the transspectral peak reduction target.

[0170] To avoid field focusing caused by excessively small boundary curvature, the conductor's boundary parameter curve should be considered. A curvature objective is introduced, and synchronous constraints are applied to the perimeter of the via, establishing a boundary shaping functional:

[0171]

[0172] Where: boundary parameters : The arc length parameter along the conductor boundary, which is a non-negative real interval; weighting function Emphasizing the weight of corners and via edges, it is a non-negative real function; actual curvature : Geometric curvature at the boundary, a non-negative real number; target curvature :in accordance with and The target curvature is set as a non-negative real number; neighborhood The solution neighborhood near the boundary is a plate-like subdomain; peak field strength. The maximum field strength in the neighborhood is a non-negative real number; the target peak field strength is... :Depend on The given upper limit distribution consists of non-negative real numbers; the coefficients... : The weight of the peak field strength deviation, which is a non-negative real number.

[0173] This objective determines the chamfer radius, smooth transition, and via flare geometry together, and integrates them with the mean-field pattern density field. This is achieved in conjunction with a pressure equalization network. Technical effect: The uniform convergence of boundary curvature prevents the local electric field from being dominated by sharp corners, and the stress and electric field around the via are simultaneously alleviated.

[0174] Step 402: After the planar averaging is completed, the analytical settings for edge sealing and coating thickness distribution are given to address the risks of surface tracking and environmental drift at the cut edges and exposed barrier areas. The spatial density of the dielectric and discharge deviations is converted into boundary weights to generate a manufacturable coating thickness and material list.

[0175] The surface energy and roughness of the cut edges and exposed barrier areas are highly sensitive to surface tracking and moisture adsorption. If the thickness distribution along the boundary is not consistent with... Alignment of the target field strength distribution Sideband events and space charge deviation measurement The thickness concentration will be more easily amplified at the boundary; therefore, it is necessary to use the boundary coordinates as the independent variable and a differentiable thickness function and surface energy function to jointly set the sealing and coating, so that the boundary becomes a buffer zone for field and polarization.

[0176] First of all , , The local contribution is mapped to the boundary weight, and then optimized together with the thickness function and the objective function for tracking susceptibility. Finally, the thickness distribution and material properties are written into the parameter transfer matrix. The surface layer channel outputs a combined layout and process setting. Using boundary arc length coordinates... Define coating thickness distribution And to track susceptibility index With target index To constrain the process, a thickness optimization objective is constructed. :

[0177]

[0178] Where: boundary weights The weights, generated by the local deviation density of dielectric and discharge, are non-negative real functions, such as Gaussian convolution, triangular kernel convolution, and inverse distance weighting; tracking susceptibility index. Surface tracking index, influenced by surface energy and roughness, is a non-negative real number; target tracking susceptibility. :in accordance with and The target value is a non-negative real number; coating thickness. The local thickness of the sealing and coating is a non-negative real number, used to adjust the surface electric field and surface energy; smoothness coefficient. : The smoothing weight for thickness variation, a non-negative real number; exponent : The deviation penalty index, which is consistent with the previous one, is a real number greater than 1.

[0179] This thickness optimization objective optimizes thickness distribution and surface tracking sensitivity simultaneously, and uses... The thickness of high-risk areas is automatically increased. Technical effect: Edge sealing and coating thickness are allocated as needed, and susceptible curved sections for surface tracking are significantly suppressed. The sideband events are structurally weakened.

[0180] To convert the spatial bias density of the validation patch into boundary weights, a local bias convolutional mapping is defined:

[0181]

[0182] Where: Boundary neighborhood : Boundary points The neighborhood centered at the center is the plate surface subfield; kernel function : A positive kernel that decays with distance, which is a non-negative real function, such as a Gaussian kernel or a trigonometric kernel; local dielectric deviation Measured by dielectric deviation The spatial distribution obtained by density processing is a non-negative real number; local charge deviation Measured by space charge deviation The spatial distribution obtained by density processing is a non-negative real number; partial discharge deviation :Depend on The spatial distribution obtained by density reduction is a non-negative real number; weighting coefficients , , The fusion weight of the three types of bias is a non-negative real number, which serves to emphasize different risk sources according to the scenario.

[0183] To ensure the synergy between the coating and the pressure equalization pattern, a joint convergence target is introduced. :

[0184]

[0185] Where: Field target weight : Focuses on the weights of the gaps and boundary neighborhoods in the equal-pressure network, which are non-negative real functions, such as network gap-driven, field gradient-tracking, and field gradient-tracking types; electric field intensity : Local field strength within the plane, a non-negative real number; Target tangential field strength : is a non-negative real number, is used as a convergence reference; weighting coefficient , : These represent the weights for thickness smoothness and density smoothness, respectively; are non-negative real numbers; exponents : The deviation penalty index, which is consistent with the previous one, is a real number greater than 1.

[0186] When dielectric deviation density or discharge deviation density In the border neighborhood When focusing, prioritize increasing the coating thickness of that arc segment. And supplement the density of the equalization pattern at this location. The two through The weights of all components decrease together to the target.

[0187] By minimizing the joint convergence objective This can increase the coating thickness. With mean field geometric density field Cooperative descent on the same objective function, with matrix passed as parameters The output geometry setting vector and surface layer setting vector are merged into the manufacturing release package. The boundary coating and the equalization pattern complement each other, achieving simultaneous peak suppression and surface tracking protection. and The objective is consistently achieved at the boundary scale.

[0188] Step 403: Based on the consistent approach of release-traceability-re-execution, first establish a robust release criterion with the worst-case constraint of risk fusion indicators, then align the design and manufacturing semantics to the same data object with the parameter transfer matrix extension, and assign semantic signatures to the verification entries, and finally output a manufacturing release package that can directly drive mass production.

[0189] Actual production involves material batch variations, equipment fluctuations, and geometric slight deviations. If release relies solely on a single measurement, the target field strength distribution and polarization response may drift in subsequent batches. Therefore, it is necessary to introduce a worst-case evaluation of tolerance disturbances so that the thresholds for acceptance and revision do not depend on random samples.

[0190] First , , With thickness uniformity extreme value The fusion index is constructed, and then set constraints are applied to the tolerance vector for supremacy evaluation. Subsequently, the geometric settings and surface layer settings are encoded into vectors, the parameter transfer matrix is ​​expanded, and an executable process setting vector is generated. Semantic signatures are generated accordingly to ensure that the execution caliber of subsequent batches remains unchanged.

[0191] To avoid misjudgments caused by luck in local statistics, a worst-case release inequality is constructed with fusion indicators as the core, explicitly incorporating tolerance disturbances and target objects:

[0192]

[0193] Where: tolerance vector The perturbation vectors of materials, geometry, and equipment are sets. Tolerance set The reachable set defined by supply and equipment capacity is a bounded closed set; fusion weights The weights of the four deviations and thickness extrema are non-negative real numbers; dielectric deviation : A measure of consistency between the dielectric constant spectrum and the target spectrum, expressed as a non-negative real number; charge deviation The deviation measure of space charge surcharge density is a non-negative real number that reflects the risk of delayed onset; discharge deviation. : A measure of the deviation in time-scale discharge energy distribution, expressed as a non-negative real number; extreme values ​​of thickness uniformity. The extreme values ​​of in-plane thickness deviation are non-negative real numbers; threshold. : The upper bound of the worst-case scenario, which is a positive real number and serves as the boundary between approval and revision.

[0194] To bind version semantics to thresholds, define the set of release evidence objects and generate a release package:

[0195]

[0196] Where: the set of evidence objects for release : The set of objects that bear the design and testing specifications, which is an ordered set; manufacturing release package : A collection of objects containing evidence objects and thresholds, which is a structured collection.

[0197] Release and revision have been elevated to a tolerance-oriented upper bound comparison, and mass production transition no longer depends on the randomness of a single measurement; The objective function, geometry, process, and inspection parameters are unified, and subsequent batches are executed within the same threshold. To make geometry, surface layer, and process setting vectors readily available on the equipment side, geometry and surface layer setting vectors are introduced, and the parameter transfer matrix is ​​extended to generate mass production process setting vectors. Semantic signatures are used to ensure object consistency.

[0198]

[0199] Where: Mass production process setting vector : The executable settings after merging geometry and surface layers are real number vectors; parameter passing matrix extension. :exist The augmented mapping matrix is ​​a matrix; design the parameter vector. Source: The entry vector, a mixture of real numbers and symbols, serves to carry the sequence and material properties; the geometric setting vector... :Depend on The discretized layout parameters are real-valued vectors, defining the field plate and equalization pattern; the surface layer sets the vector. :Depend on The parameterized coating parameters are real-valued vectors; semantic signature. : By signature function The generated verification identifier is a fixed-length identifier to ensure object consistency and traceability; signature function. A function that performs an irreversible mapping on an input object; it is a family of functions whose purpose is to... and A unique identifier is assigned, selected from a family of functions that satisfy collision resistance and fixed-length output properties, to be used in generating the release packet. Vector of mass production process settings Generate unique semantic signature .

[0200] On the execution side, vectors are set using mass production processes. Direct-connect device timing control and vacuum cavity strategy; semantic signatures on the traceability side. As a pairing key between release evidence and execution records, it achieves a one-to-one correspondence between evidence, settings, and execution. The extended matrix combines layout and process settings into a single control vector, reducing the risk of manual interpretation and secondary transcription; semantic signatures ensure that the same settings remain semantically unchanged across multiple batches and factories, and deviation analysis can quickly locate the object version.

[0201] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0202] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0203] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0204] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0205] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A manufacturing process for multilayer insulated press-bonded high-voltage printed circuit board, characterized by: Comprising, defining target field intensity distribution and polarization response, inversely deducing thickwise dielectric property gradient and segmented layer sequence from target, forming barrier layer stack parameter set version baseline, and taking it as unified input item of interface activation strategy and pressing program; around the barrier layer stack parameter set version baseline, interface activation strategy and pressing program are formulated, and pre-drying, vacuumizing and isothermal infiltration are carried out in sequence, followed by sequential solidification and controlled cooling, edge flow control and vacuum frame are implemented, pressing program record and interface activation strategy record are generated; according to the pressing program record and the interface activation strategy record, a verification piece group is extracted, dielectric and discharge proxy quantity detection is carried out, and compared with the barrier layer stack parameter set version baseline, release criteria and program adjustment suggestions of manufacturing release package are formed; after meeting the release criteria of the manufacturing release package, the barrier layer stack parameter set version baseline is kept, field plate and voltage equalization pattern, conductor boundary and via optimization, edge cutting and edge sealing coating are implemented, and the manufacturing release package and the pressing program record are solidified.

2. The multilayer insulated press-bonding high-voltage printed circuit board manufacturing process according to claim 1, wherein: the target field intensity distribution is solved by three-dimensional electric field and the target tangential field intensity is obtained on the board surface, and the target polarization time curve is generated; the thickwise dielectric property gradient is discretized into barrier layer sequence by material side threshold projection operator, and is arranged into design parameter vector and stored in the barrier layer stack parameter set version baseline, and the layer thickness tolerance and uniformity field are labeled, and the target tangential field intensity is used for planar uniform field design domain demarcation.

3. The multilayer insulated press-bonding high-voltage printed circuit board manufacturing process according to claim 2, wherein: the parameter transfer matrix is a full rank block upper triangular structure, including material layer sequence channel, temperature pressure vacuum channel and record channel, and accepts design parameter vector and outputs original process setting vector; the time scale set of isothermal infiltration and sequential solidification is generated, and its entries correspond to the interface activation strategy and the pressing program one by one and can be parsed by equipment, and is saved in the design channel of the manufacturing release package with unified unit and field name.

4. The multilayer insulated press-bonding high-voltage printed circuit board manufacturing process according to claim 3, wherein: the interface activation strategy sets the vacuum cavity pressure trajectory, process temperature trajectory and pressure head pressure trajectory at the same time in the isothermal infiltration stage, and arranges the plate edge flow control with the anchor as the reference; the pressing program is executed in the time sequence of pre-drying, vacuumizing, isothermal infiltration, sequential solidification and controlled cooling, and generates pressing program record and process sensing record, and the process sensing record includes time series of temperature, pressure, vacuum and displacement.

5. The multilayer insulated press-bonding high-voltage printed circuit board manufacturing process according to claim 4, wherein: the interface activation strategy implements interface energy modulation at the end of isothermal infiltration, and defines adsorption and crosslinking conditions by using active atmosphere composition and energy delivery curve, and simultaneously limits the vacuum steady state segment and the temperature rise slope; the edge flow control and the vacuum frame are pressed according to the alignment node, and are recorded as interface activation strategy record for subsequent indexing and tracing, and the time sequence of active atmosphere, energy, vacuum and temperature rise is written into the record.

6. The manufacturing process of multilayer insulated press-bonded high-voltage printed circuit board according to claim 5, wherein: The verification sheet set is indexed by the press-bonding program record and the interface activation strategy record, and is distributed around the copper-embedded boundary, the barrier layer interface, and the thickness extreme value, finally forming a correspondence between the dielectric proxy spectrum and the thickness position.

7. The manufacturing process of multilayer insulated press-bonded high-voltage printed circuit board according to claim 6, wherein: The discharge proxy uses an on-board induction loop and a low-stress heuristic signal to obtain a waveform, and time-scale energy analysis is used to obtain an energy distribution and compare it with a target energy spectrum. The target energy spectrum is generated based on the barrier layer stack parameter set version baseline and the functional target functional in the copper-embedded neighborhood, and is set with the same spatial coordinates as the dielectric proxy spectrum, and the same sampling window and trigger threshold are used to establish the waveform collection rule.

8. The manufacturing process of multilayer insulated press-bonded high-voltage printed circuit board according to claim 7, wherein: The pressure-equalizing pattern density field is discretized into field plates and pressure-equalizing pattern layout parameters by a geometric side threshold domain projection operator, and the conductor boundary and via optimization are generated based on the curvature target and peak field strength limit joint to generate the shape trajectory; The resulting layout parameters and the original process setting vector, the press-bonding program record are jointly archived as a geometric setting vector, and a field mapping is established for parameter transfer matrix extension component call.

9. The manufacturing process of multilayer insulated press-bonded high-voltage printed circuit board according to claim 8, wherein: The edge sealing and the coating thickness distribution are set according to the boundary weight, which is aggregated by the dielectric deviation density, the space charge deviation density, and the discharge deviation density in the boundary neighborhood; The thickness distribution and the material number are sorted into a surface layer setting vector, and are written into the layout and surface layer channel of the manufacturing release package together with the geometric setting vector.

10. The manufacturing process of multilayer insulated press-bonded high-voltage printed circuit board according to claim 9, wherein: The manufacturing release package includes a release evidence object set, a release criterion, and a semantic signature, and the release criterion uses a worst-case release inequality to evaluate the upper bound of the tolerance vector of the tolerance set; The mass production process setting vector is generated by the parameter transfer matrix extension component, and is bound with the semantic signature for device-side integrated delivery and archiving, and the association key and storage period of the execution record and release evidence are specified.

Citation Information

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