Display panel, preparation method of display panel and display device of display panel

Abstract

The invention relates to a display panel, a preparation method of the display panel and a display device of the display panel. According to the method, an array substrate, a light-emitting device layer, a protection structure, a first planarization layer, a barrier structure and a second planarization layer are included; the first planarization layer is arranged on one side, far away from the array substrate, of the protection structure and is arranged in the groove; the blocking structure is arranged on the side, away from the array substrate, of the first planarization layer, the orthographic projection of the blocking structure on the array substrate covers the orthographic projection of the first planarization layer on the array substrate, and the surface of the side, close to the array substrate, of the blocking structure makes contact with the surface of the side, away from the array substrate, of the first planarization layer; the second planarization layer is arranged on the side, away from the array substrate, of the blocking structure. The barrier structure is arranged in the display panel, and when the planarization layers are subjected to heat treatment in the preparation process of the display panel, the barrier structure can shield or prevent water vapor released by the first planarization layer or prevent the first planarization layer from absorbing water, so that the problem of pixel failure of the display panel is solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel, a method for preparing a display panel, and a display device thereof. Background Art

[0002] Organic Light-Emitting Diodes (OLEDs) have attracted widespread attention due to their self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, and low energy consumption. As a new generation of display technology, they have begun to gradually replace traditional liquid crystal displays and are widely used in electronic devices such as watches, bracelets, mobile phones, tablets, and information kiosks in public halls.

[0003] However, current OLED display panels have the problem of pixel failure. Summary of the Invention

[0004] Based on this, it is necessary to provide a display panel, a preparation method and a display device thereof to address the above technical problems.

[0005] In a first aspect, an embodiment of the present application provides a display panel, comprising:

[0006] array substrate;

[0007] A light-emitting device layer is provided on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals;

[0008] A protective structure is provided on one side of the array substrate and is located between adjacent light-emitting functional portions; a surface of the protective structure away from the array substrate is provided with a groove, the groove being located between adjacent light-emitting functional portions; an orthographic projection of the groove on the array substrate is located within an orthographic projection of the protective structure on the array substrate;

[0009] A first planarization layer is provided on a side of the protection structure away from the array substrate; the first planarization layer is provided in the groove;

[0010] a barrier structure disposed on a side of the first planarization layer away from the array substrate; an orthographic projection of the barrier structure on the array substrate covers an orthographic projection of the first planarization layer on the array substrate; and a surface of the barrier structure close to the array substrate contacts a surface of the first planarization layer away from the array substrate;

[0011] The second planarization layer is arranged on a side of the barrier structure away from the array substrate; the orthographic projection of the second planarization layer on the array substrate covers the orthographic projection of the barrier structure on the array substrate.

[0012] In one embodiment, the orthographic projection area of ​​the first planarization layer on the array substrate is smaller than the orthographic projection area of ​​the second planarization layer on the array substrate.

[0013] In one embodiment, the orthographic projection area of ​​the barrier structure on the array substrate is greater than or equal to the orthographic projection area of ​​the groove on the array substrate.

[0014] In one embodiment, the orthographic projection area of ​​the barrier structure on the array substrate is larger than the orthographic projection area of ​​the first planarization layer on the array substrate.

[0015] In one embodiment, the orthographic projection area of ​​the barrier structure on the array substrate is smaller than the orthographic projection area of ​​the second planarization layer on the array substrate.

[0016] In one embodiment, the surface of the barrier structure close to the array substrate, the surface of the side wall of the protective structure away from the array substrate, and the surface of the first planarization layer away from the array substrate are all located on the same plane, and the barrier structure extends to the surface of the side wall of the protective structure away from the array substrate.

[0017] In one embodiment, a surface of the second planarization layer close to the array substrate contacts a surface of the barrier structure away from the array substrate.

[0018] In one embodiment, a surface of the barrier structure close to the array substrate and a surface of the second planarization layer close to the array substrate are located on the same plane.

[0019] In one embodiment, a surface of the second planarization layer close to the array substrate and a surface of the first planarization layer away from the array substrate are located on the same plane.

[0020] In one embodiment, an orthographic projection area of ​​the groove on the array substrate is smaller than an orthographic projection area of ​​the second planarization layer on the array substrate.

[0021] In one embodiment, the orthographic projection of the groove on the array substrate coincides with the orthographic projection of the first planarization layer on the array substrate.

[0022] In one embodiment, an orthographic projection of the second planarization layer on the array substrate overlaps with an orthographic projection of the protection structure on the array substrate.

[0023] In one embodiment, the second planarization layer extends to the side surface of the barrier structure and the surface of the sidewall of the protection structure away from the array substrate.

[0024] In one embodiment, the orthographic projection of the protection structure on the array substrate surrounds and separates the light-emitting functional portion, and the orthographic projection of the protection structure on the array substrate does not overlap with the orthographic projection of the light-emitting functional portion on the array substrate.

[0025] In one embodiment, a surface of the second planarization layer away from the array substrate is a curved surface.

[0026] In one embodiment, the light-emitting functional portion includes a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate.

[0027] In one embodiment, a side surface of the light emitting unit is disposed in contact with at least a portion of a side surface of the protection structure, and a side surface of the electron transport layer is disposed in contact with at least a portion of a side surface of the protection structure.

[0028] In one embodiment, the surface of the light emitting functional portion away from the array substrate, the surface of the sidewall of the protection structure away from the array substrate, and the surface of the first planarization layer away from the array substrate are all located on the same plane.

[0029] In one embodiment, the orthographic projection of the light emitting unit on the array substrate overlaps with the orthographic projection of the electron transport layer on the array substrate.

[0030] In one embodiment, the light-emitting device layer further includes a common layer disposed on a side of the light-emitting functional layer and the second planarization layer away from the array substrate.

[0031] In one embodiment, the display panel further includes:

[0032] The encapsulation layer is arranged on a side of the second electrode layer away from the array substrate; the orthographic projection of the encapsulation layer on the array substrate overlaps with the orthographic projection of the second electrode layer on the array substrate.

[0033] In a second aspect, an embodiment of the present application provides a method for manufacturing a display panel, the method comprising:

[0034] providing an array substrate;

[0035] A light-emitting device layer is formed on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals;

[0036] A protective structure is formed on one side of the array substrate; the protective structure is located between adjacent light-emitting functional portions; a groove is provided on a surface of the protective structure away from the array substrate, the groove being located between adjacent light-emitting functional portions; an orthographic projection of the groove on the array substrate is located within an orthographic projection of the protective structure on the array substrate;

[0037] forming a first planarization layer on a side of the protection structure away from the array substrate; the first planarization layer is disposed in the groove;

[0038] forming a barrier structure on a side of the first planarization layer away from the array substrate; an orthographic projection of the barrier structure on the array substrate covers an orthographic projection of the first planarization layer on the array substrate; and a surface of the barrier structure on a side close to the array substrate contacts a surface of the first planarization layer on a side away from the array substrate;

[0039] A second planarization layer is formed on a side of the barrier structure away from the array substrate; the orthographic projection of the second planarization layer on the array substrate covers the orthographic projection of the barrier structure on the array substrate.

[0040] In one embodiment, forming a first planarization layer on a side of the protection structure away from the array substrate includes:

[0041] forming a sacrificial layer on a side of the light-emitting functional layer away from the array substrate;

[0042] forming a protective layer on a side of the sacrificial layer away from the array substrate;

[0043] forming an initial planarization layer on a side of the protective layer away from the array substrate;

[0044] The initial planarization layer is etched to form a first planarization layer; a surface of the first planarization layer away from the array substrate and a surface of the light-emitting functional layer away from the array substrate are located on the same plane.

[0045] In one embodiment, forming a second planarization layer on a side of the barrier structure away from the array substrate includes:

[0046] forming a barrier layer on at least a portion of the protective layer and the first planarization layer on a side away from the array substrate;

[0047] forming an overlying planarization layer on a side of the barrier layer away from the array substrate; wherein the distance between a surface of the overlying planarization layer away from the array substrate and a surface of the light-emitting functional layer away from the array substrate is greater than the distance between a surface of the barrier layer away from the array substrate and a surface of the light-emitting functional layer away from the array substrate;

[0048] The stacked planarization layer, the barrier layer, the protective layer and the sacrificial layer are sequentially etched to expose the light-emitting functional layer;

[0049] The remaining planarization layer is thermally treated to form a second planarization layer.

[0050] In a third aspect, an embodiment of the present application further provides a display device, comprising a display panel as in any embodiment of the first aspect.

[0051] The display panel, the preparation method of the display panel and the display device provided in the embodiments of the present application include: an array substrate, a light-emitting device layer, a protective structure, a first planarization layer, a barrier structure and a second planarization layer; the light-emitting device layer is arranged on one side of the array substrate, the light-emitting device layer includes a first electrode layer, a light-emitting functional layer and a second electrode layer, the light-emitting functional layer is located on the side of the first electrode layer away from the array substrate, the second electrode layer is located on the side of the light-emitting functional layer away from the array substrate, the light-emitting functional layer includes a plurality of light-emitting functional parts, and the light-emitting functional parts are arranged at intervals; the protective structure is arranged on one side of the array substrate and is located between adjacent light-emitting functional parts, a groove is provided on the surface of the protective structure on the side away from the array substrate, the groove is located between adjacent light-emitting functional parts, and the orthographic projection of the groove on the array substrate is located within the orthographic projection of the protective structure on the array substrate; the first planarization layer is arranged on the side of the protective structure away from the array substrate, the first planarization layer is arranged in the groove inside; the barrier structure is arranged on the side of the first planarization layer away from the array substrate, the orthographic projection of the barrier structure on the array substrate covers the orthographic projection of the first planarization layer on the array substrate, and the surface of the barrier structure close to the array substrate is in contact with the surface of the first planarization layer away from the array substrate; the second planarization layer is arranged on the side of the barrier structure away from the array substrate, and the orthographic projection of the second planarization layer on the array substrate covers the orthographic projection of the barrier structure on the array substrate; the above-mentioned display panel is provided with a barrier structure, which separates the planarization layer in the display panel into a first planarization layer and a second planarization layer, so that when the planarization layer is heat-treated during the preparation process of the display panel, it can block or prevent the water vapor released by the first planarization layer, or block or prevent the first planarization layer from absorbing water when placed in the air, thereby avoiding degradation of the material of the OLED layer, thereby solving the problem of pixel failure of the prepared display panel and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 A schematic cross-sectional view of a display panel provided in one embodiment;

[0053] Figure 2 for Figure 1 A schematic diagram of a partial top view of the display panel in the embodiment;

[0054] Figure 3 is a schematic diagram of a partial top view of the display panel in another embodiment;

[0055] Figure 41 is a schematic flow chart of steps of a method for preparing a display panel in one embodiment;

[0056] Figure 5 A schematic diagram of a cross-sectional structure of a display panel during preparation in one embodiment;

[0057] Figure 6 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment;

[0058] Figure 7 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;

[0059] Figure 8 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;

[0060] Figure 9 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;

[0061] Figure 10 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;

[0062] Figure 11 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment;

[0063] Figure 12 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;

[0064] Figure 13 FIG. 1 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment.

[0065] Description of reference numerals:

[0066] 10. Display panel; 11. Array substrate; 12. Light-emitting device layer; 121. First electrode layer; 122. Light-emitting functional layer; 1221. Light-emitting functional portion; 1221a. Light-emitting unit; 1221b. Electron transport layer; 123. Second electrode layer; 1231. First electrode portion; 1232. Second electrode portion; 124. Common layer; 1241. First common structure; 1242. Second common structure; 13. Protective structure; 13a. Groove; 131. Sidewall; 14. First planarization layer; 15. Barrier structure; 16. Second planarization layer; 161. Outer surface; 162. Inner surface; 17. Encapsulation layer; 171. First encapsulation portion; 172. Second encapsulation portion; 19. Protective layer; 18. Sacrificial layer; 20. Initial planarization layer; 21. Barrier layer; 22. Superimposed planarization layer; 23. Remaining planarization layer. DETAILED DESCRIPTION

[0067] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present application.

[0068] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.

[0069] When describing positional relationships, unless otherwise specified, when an element, such as a layer, film, or substrate, is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present. Furthermore, when a layer is referred to as being "under" another layer, it can be directly below or one or more light-emitting units may be present. It is also understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more light-emitting units may be present.

[0070] In the case of using “including,” “having,” and “comprising” described herein, another component may be added unless a clear limiting term such as “only,” “consisting of,” etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as having one number.

[0071] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this application.

[0072] It should also be understood that when interpreting an element, even if not explicitly described, the element is interpreted as including a range of error, which should be within the acceptable deviation range of the specific value determined by those skilled in the art. For example, "approximately," "approximately," or "substantially" can mean within one or more standard deviations, and is not limited here.

[0073] Furthermore, in the specification, the phrase “planar distribution diagram” refers to a drawing when the target portion is viewed from above, and the phrase “cross-sectional diagram” refers to a drawing when a section taken by vertically cutting the target portion is viewed from the side.

[0074] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the elements in the drawings are drawn only as examples and not necessarily according to the true scale.

[0075] Organic Light-Emitting Diodes (OLEDs) have attracted widespread attention due to their self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, and low energy consumption. As a new generation of display technology, they have begun to gradually replace traditional liquid crystal displays and are widely used in electronic devices such as watches, bracelets, mobile phones, tablets, and information kiosks in public halls.

[0076] In the related art, during the display panel manufacturing process, the light-emitting functional units, sacrificial layers, side protection layers, and planarization layers are sequentially formed away from the array substrate, with the planarization layer positioned between the light-emitting functional units. The planarization layer, side protection layers, and sacrificial layers are then sequentially etched, and the resulting planarized structure is then heat-treated to form a curved planarization structure that facilitates the slope of the cathode layer in the display panel. However, OLED display panels in the related art can suffer from pixel failure.

[0077] After research, the applicant found that the cause of the above-mentioned problem is that when the planarization layer is heat-treated during the preparation of the display panel, the OLED layer (including the anode layer and the light-emitting functional layer) is already exposed. In this way, the water vapor released by the planarization layer during the heat treatment process, or the first planarization layer exposed to the air will absorb water, thereby directly affecting the OLED layer, causing the material of the OLED layer to deteriorate, affecting the lifespan, and even causing pixel failure.

[0078] In view of this, the embodiments of the present application provide a display panel 10, a method for manufacturing the display panel 10, and a display device thereof. Figure 1As shown, the display panel 10 includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13, a first planarization layer 14, a barrier structure 15 and a second planarization layer 16; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11, and the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and the light-emitting functional parts 1221 are arranged at intervals; the protective structure 13 is arranged on one side of the array substrate 11 and is located between adjacent light-emitting functional parts 1221, and a groove 13a is provided on the surface of the side of the protective structure 13 away from the array substrate 11, and the groove 13a is located at the opposite side. Between adjacent light-emitting functional portions 1221, the orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the protective structure 13 on the array substrate 11; the first planarization layer 14 is arranged on the side of the protective structure 13 away from the array substrate 11, and the first planarization layer 14 is arranged in the groove 13a; the barrier structure 15 is arranged on the side of the first planarization layer 14 away from the array substrate 11, and the orthographic projection of the barrier structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11, and the surface of the barrier structure 15 close to the array substrate 11 is in contact with the surface of the first planarization layer 14 away from the array substrate 11; the second planarization layer 16 is arranged on the side of the barrier structure 15 away from the array substrate 11, and the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate 11.

[0079] The barrier structure 15 in the display panel 10 provided in the present application separates the planarization layer in the display panel 10 into a first planarization layer 14 and a second planarization layer 16. In this way, when the planarization layer is heat-treated during the preparation process of the display panel 10, it can block or prevent the water vapor released by the first planarization layer 14, or block or prevent the first planarization layer from absorbing water when placed in the air, thereby avoiding degradation of the material of the OLED layer, thereby solving the problem of pixel failure of the display panel 10 and improving the display effect of the display panel 10.

[0080] Based on the above technical problems, the present application provides a display panel 10 , a method for manufacturing the display panel 10 , and a display device thereof, so as to avoid pixel failure of the display panel 10 as much as possible.

[0081] An embodiment of the present application provides a display panel 10 , which may be an organic light emitting diode (OLED) display panel 10 or a quantum dot electroluminescent (QLED) display panel 10 .

[0082] Specifically, see Figure 1 The display panel 10 includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13, a first planarization layer 14, a barrier structure 15 and a second planarization layer 16; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11, and the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and each light-emitting functional part 1221 is arranged at intervals; the protective structure 13 is arranged on one side of the array substrate 11 and is located between adjacent light-emitting functional parts 1221, and a groove 13a is provided on the surface of the side of the protective structure 13 away from the array substrate 11, and the groove 13a is located at the opposite side. Between adjacent light-emitting functional portions 1221, the orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the protective structure 13 on the array substrate 11; the first planarization layer 14 is arranged on the side of the protective structure 13 away from the array substrate 11, and the first planarization layer 14 is arranged in the groove 13a; the barrier structure 15 is arranged on the side of the first planarization layer 14 away from the array substrate 11, and the orthographic projection of the barrier structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11, and the surface of the barrier structure 15 close to the array substrate 11 is in contact with the surface of the first planarization layer 14 away from the array substrate 11; the second planarization layer 16 is arranged on the side of the barrier structure 15 away from the array substrate 11, and the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate 11.

[0083] The array substrate 11 in the display panel 10 can be an inorganic substrate, an organic substrate, or a composite substrate formed by stacking an inorganic substrate and an organic substrate. The array substrate 11 can include a substrate. The substrate can be a rigid substrate or a flexible substrate. When the substrate is a rigid substrate, the substrate material can be glass or a silicon wafer, etc.; when the substrate is a flexible substrate, the substrate material can be polyimide.

[0084] In the embodiment of the present application, the light-emitting device layer 12 in the display panel 10 may include a first electrode layer 121, a light-emitting device layer 12, and a second electrode layer 123 stacked in sequence in a direction away from the array substrate 11. The first electrode layer 121 is an anode layer, and the second electrode layer 123 is a cathode layer.

[0085] Optionally, the first electrode layer 121 may be made of a conductive metal material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or a metal alloy. Meanwhile, the second electrode layer 123 may also be made of a conductive metal material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or a metal alloy. In practical applications, the materials of the first electrode layer 121 may be the same or different, and this embodiment of the present application does not limit this.

[0086] It should be noted that the light emitting device layer 12 can emit light of three different colors (including red, green and blue). The first electrode layer 121 and the light emitting device layer 12 in the display panel 10 can both be referred to as OLED layers.

[0087] Furthermore, the light-emitting functional layer 122 includes a plurality of light-emitting functional units 1221, which are arranged at intervals. In the embodiment of the present application, different light-emitting functional units 1221 can emit light of different colors or the same color. Each light-emitting functional unit 1221 corresponds to a pixel outputted by the display panel 10, and the plurality of light-emitting functional units 1221 can emit light of three different colors.

[0088] Optionally, the heights or thicknesses of the light-emitting functional portions 1221 in a target direction may be equal, the target direction may be a direction perpendicular to the array substrate 11 , and the light-emitting functional portions 1221 may be located on the same horizontal plane.

[0089] At the same time, the protective structure 13 in the display panel 10 can be located between adjacent light-emitting functional units 1221 to suppress crosstalk between adjacent light-emitting functional units 1221. A groove 13a is provided on a surface of the protective structure 13 on a side away from the array substrate 11. The groove 13a is located between adjacent light-emitting functional units 1221. Optionally, the cross-sectional shape of the groove 13a can be U-shaped, V-shaped, trapezoidal, or sawtooth-shaped. In the embodiment of the present application, a square cross-sectional shape of the groove 13a is used as an example for description.

[0090] Optionally, the material of the protective structure 13 can be aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride and / or silicon oxynitride, etc., and the protective structure 13 can be manufactured by sputtering, chemical vapor deposition, molecular beam epitaxy, physical evaporation, atomic layer deposition, etc.

[0091] The orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the protection structure 13 on the array substrate 11 . This means that the orthographic projection area of ​​the groove 13a on the array substrate 11 is smaller than the orthographic projection area of ​​the protection structure 13 on the array substrate 11 .

[0092] In addition, the first planarization layer 14 in the display panel 10 is arranged on the side of the protective structure 13 away from the array substrate 11, and the first planarization layer 14 is arranged in the groove 13a, so that the first planarization layer 14 can fill the gaps between different light-emitting functional parts 1221, making the surface of the display panel 10 smoother and flatter, and can also improve the adhesion between different light-emitting functional parts 1221, and form good chemical bonding or physical adsorption with the protective structure 13 on the side close to the array substrate 11 and other functional layers on the side away from the array substrate 11, so that the bonding between the layers is tighter, thereby improving the stability of the structure of the entire display panel 10 and preventing problems such as interlayer peeling during use.

[0093] Among them, the first planarization layer 14 can flatten the groove 13a and separate the adjacent light-emitting functional parts 1221, which can effectively prevent the mixing of light and color between adjacent pixels, improve the independence of each pixel in the display panel 10, and facilitate independent and precise control of each pixel, thereby improving the display accuracy of the display panel 10. In addition, the first planarization layer 14 can also provide a support structure for the adjacent light-emitting functional parts 1221, which helps to maintain the relative position stability between adjacent pixels in the display panel 10.

[0094] Optionally, the material of the first planarization layer 14 may be an inorganic material (such as silicon dioxide, silicon nitride), or a polymer (such as polyimide, benzocyclobutene, photoresist), or a glass material (such as borosilicate glass).

[0095] At the same time, the barrier structure 15 in the display panel 10 can be disposed on a side of the first planarization layer 14 away from the array substrate 11, and the orthographic projection of the barrier structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11. The orthographic projection of the barrier structure 15 on the array substrate 11 covering the orthographic projection of the first planarization layer 14 on the array substrate 11 can be understood as the orthographic projection area of ​​the barrier structure 15 on the array substrate 11 being equal to the orthographic projection area of ​​the first planarization layer 14 on the array substrate 11, or the orthographic projection area of ​​the barrier structure 15 on the array substrate 11 being greater than the orthographic projection area of ​​the first planarization layer 14 on the array substrate 11.

[0096] Optionally, the surface of the barrier structure 15 close to the array substrate 11 contacts the surface of the first planarization layer 14 away from the array substrate 11. It can be understood that the surface of the barrier structure 15 close to the array substrate 11 and the surface of the first planarization layer 14 away from the array substrate 11 are closed. In this way, during the heat treatment of the planarization layer in the display panel 10, the barrier structure 15 can block or prevent the water vapor released by the first planarization layer 14 in the planarization layer as much as possible, or block or prevent the first planarization layer from absorbing water when placed in the air, thereby avoiding degradation of the OLED layer material, thereby solving the problem of pixel failure of the display panel 10.

[0097] The barrier structure 15 may be made of inorganic materials (such as titanium oxide, silicon oxide, aluminum oxide, etc.), polymer materials (such as polyvinylidene chloride, ethylene-vinyl alcohol copolymer, polyamide), nanocomposites (such as two-dimensional nanosheet composites, nanoparticle-filled composites), etc.

[0098] In addition, the second planarization layer 16 in the display panel 10 can be provided on the side of the barrier structure 15 away from the array substrate 11, and the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate 11. The orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate 11, which can be understood as the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11 is equal to or greater than the orthographic projection area of ​​the barrier structure 15 on the array substrate 11. Figure 2 The diagram shows a top view of the second planarization layer 16 and the light-emitting functional layer 122 in the display panel 10. The positions of the light-emitting functional layers 122 of different colors in the display panel 10 are not limited to Figure 2 Each light-emitting functional layer 122 shown, and Figure 2 In the figure, the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11 is greater than or equal to the orthographic projection area of ​​the protection structure 13 on the array substrate 11 as an example for illustration.

[0099] The display panel 10 in the embodiment of the present application includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13, a first planarization layer 14, a barrier structure 15 and a second planarization layer 16; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11. The array substrate 11 includes a plurality of light-emitting functional portions 1221, each light-emitting functional portion 1221 being arranged at intervals; a protective structure 13 is provided on one side of the array substrate 11 and is located between adjacent light-emitting functional portions 1221; a groove 13a is provided on the surface of the protective structure 13 away from the array substrate 11, the groove 13a is located between adjacent light-emitting functional portions 1221, and the orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the protective structure 13 on the array substrate 11; a first planarization layer 14 is provided on the side of the protective structure 13 away from the array substrate 11, and the first planarization layer 14 is provided on the side of the protective structure 13 away from the array substrate 11. The first planarization layer 14 is arranged in the groove 13a; the barrier structure 15 is arranged on the side of the first planarization layer 14 away from the array substrate 11, the orthographic projection of the barrier structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11, and the surface of the barrier structure 15 close to the array substrate 11 is in contact with the surface of the first planarization layer 14 away from the array substrate 11; the second planarization layer 16 is arranged on the side of the barrier structure 15 away from the array substrate 11, and the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate The orthographic projection on the board 11; the display panel 10 is provided with a barrier structure 15, which separates the planarization layer in the display panel 10 into a first planarization layer 14 and a second planarization layer 16. In this way, when the planarization layer is heat-treated during the preparation process of the display panel 10, the barrier structure 15 can block or prevent the water vapor released by the first planarization layer 14, or can block or prevent the first planarization layer 14 from absorbing water when placed in the air, thereby avoiding degradation of the material of the OLED layer, thereby solving the problem of pixel failure of the prepared display panel 10 and improving the display effect of the display panel 10.

[0100] In one embodiment, the orthographic projection area of ​​the first planarization layer 14 in the display panel 10 on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11 .

[0101] Among them, the orthographic projection area of ​​the first planarization layer 14 in the display panel 10 on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11. It can be understood that the orthographic projection of the first planarization layer 14 in the display panel 10 on the array substrate 11 is located within the orthographic projection of the second planarization layer 16 on the array substrate 11.

[0102] In one embodiment, the orthographic projection area of ​​the barrier structure 15 on the array substrate 11 is greater than or equal to the orthographic projection area of ​​the groove 13 a on the array substrate 11 .

[0103] Optionally, the orthographic projection area of ​​the blocking structure 15 on the array substrate 11 is greater than or equal to the orthographic projection area of ​​the groove 13a on the array substrate 11 , which can be understood as the orthographic projection of the blocking structure 15 on the array substrate 11 covers the orthographic projection of the groove 13a on the array substrate 11 .

[0104] In this way, the first planarization layer 14 can be completely covered, and when the planarization layer is heat-treated, the moisture released by the first planarization layer 14 can be shielded or prevented as much as possible, or the first planarization layer 14 can be shielded or prevented from absorbing water when placed in the air.

[0105] In one embodiment, the orthographic projection area of ​​the barrier structure 15 on the array substrate 11 is larger than the orthographic projection area of ​​the first planarization layer 14 on the array substrate 11 .

[0106] Among them, the orthographic projection area of ​​the blocking structure 15 on the array substrate 11 is larger than the orthographic projection area of ​​the first planarization layer 14 on the array substrate 11. It can be understood that the orthographic projection of the blocking structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11.

[0107] In one embodiment, the orthographic projection area of ​​the barrier structure 15 on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11 .

[0108] Optionally, the orthographic projection area of ​​the blocking structure 15 on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11. It can be understood that the orthographic projection of the blocking structure 15 on the array substrate 11 is located within the orthographic projection of the second planarization layer 16 on the array substrate 11.

[0109] In one embodiment, the surface of the barrier structure 15 close to the array substrate 11, the surface of the side wall 131 of the protective structure 13 away from the array substrate 11, and the surface of the first planarization layer 14 away from the array substrate 11 are all located on the same plane, and the barrier structure 15 extends to the surface of the side wall 131 of the protective structure 13 away from the array substrate 11.

[0110] In practical applications, the protection structure 13 may include a side wall 131 and a bottom wall 132. It should be noted that the barrier structure 15 extends to the surface of the side wall 131 of the protection structure 13 away from the array substrate 11. This means that the surface of the barrier structure 15 close to the array substrate 11 and the surface of the side wall 131 of the protection structure 13 away from the array substrate 11 are in contact with or located on the same plane.

[0111] In one embodiment, a surface of the second planarization layer 16 close to the array substrate 11 contacts a surface of the barrier structure 15 away from the array substrate 11 .

[0112] In the embodiment of the present application, the surface of the second planarization layer 16 close to the array substrate 11 may have a concave structure. The surface of the second planarization layer 16 close to the array substrate 11 contacts the surface of the barrier structure 15 away from the array substrate 11. This can be understood as the inner surface 162 of the second planarization layer 16 close to the array substrate 11 contacts the upper surface of the barrier structure 15 away from the array substrate 11.

[0113] In addition, in the embodiment of the present application, the sidewall 131 of the surface of the second planarization layer 16 close to the array substrate 11 may be in contact with the side surface of the barrier structure 15 .

[0114] In one embodiment, the orthographic projection area of ​​the groove 13 a on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11 .

[0115] Among them, the orthographic projection area of ​​the groove 13a on the array substrate 11 is smaller than the orthographic projection area of ​​the second planarization layer 16 on the array substrate 11. It can be understood that the orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the second planarization layer 16 on the array substrate 11.

[0116] In this way, the surface of the second planarization layer 16 close to the array substrate 11 and the surface of the protection structure 13 away from the array substrate 11 can be more closely adhered to each other, and the structure is more stable.

[0117] In one embodiment, the orthographic projection of the groove 13 a on the array substrate 11 coincides with the orthographic projection of the first planarization layer 14 on the array substrate 11 .

[0118] At the same time, the orthographic projection of the groove 13a on the array substrate 11 coincides with the orthographic projection of the first planarization layer 14 on the array substrate 11. It can be understood that the orthographic projection area of ​​the groove 13a on the array substrate 11 is equal to the orthographic projection area of ​​the first planarization layer 14 on the array substrate 11.

[0119] In this way, the first planarization layer 14 can be arranged in close contact with the inner wall of the groove 13 a , thereby improving the stability between the first planarization layer 14 and the groove 13 a .

[0120] In one embodiment, see Figure 1 As shown, the surface of the second planarization layer 16 away from the array substrate 11 is a curved surface.

[0121] In the embodiment of the present application, the surface of the second planarization layer 16 away from the array substrate 11 may be a mesh-shaped wavy surface, which is beneficial for subsequent slope climbing of the second electrode layer 123 during the manufacturing process of the display panel 10 .

[0122] In one embodiment, see Figure 1 As shown, the surface of the barrier structure 15 close to the array substrate 11 and the surface of the second planarization layer 16 close to the array substrate 11 are located on the same plane, and the surface of the second planarization layer 16 close to the array substrate 11 and the surface of the first planarization layer 14 away from the array substrate 11 are located on the same plane.

[0123] The surface of the barrier structure 15 near the array substrate 11 and the surface of the second planarizing layer 16 near the array substrate 11 can be approximately located on the same plane. In the embodiment of the present application, the surface of the barrier structure 15 near the array substrate 11 and the surface of the second planarizing layer 16 near the array substrate 11 are located on the same plane. This can be understood as the surface of the barrier structure 15 near the array substrate 11, the outer surface 161 of the second planarizing layer 16 near the array substrate 11, and the surface of the first planarizing layer 14 away from the array substrate 11 are located on the same plane. In this way, during the heat treatment of the planarizing layer, the barrier structure 15 can completely block or prevent the first planarizing layer 14 from releasing water vapor, or block or prevent the first planarizing layer 14 from absorbing water when exposed to air, thereby largely preventing pixel failure in the display panel 10.

[0124] In one embodiment, the orthographic projection of the second planarization layer 16 on the array substrate 11 overlaps with the orthographic projection of the protection structure 13 on the array substrate 11 .

[0125] Optionally, the orthographic projection of the second planarization layer 16 on the array substrate 11 overlaps with the orthographic projection of the protective structure 13 on the array substrate 11. It can be understood that the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the protective structure 13 on the array substrate 11, or the orthographic projection of the second planarization layer 16 on the array substrate 11 is smaller than or larger than the orthographic projection area of ​​the protective structure 13 on the array substrate 11.

[0126] In one embodiment, the second planarization layer 16 extends to the side surface of the barrier structure 15 and the surface of the sidewall 131 of the protection structure 13 away from the array substrate 11 .

[0127] Among them, the second planarization layer 16 extends to the side surface of the barrier structure 15 and the surface of the side wall 131 of the protective structure 13 away from the array substrate 11. It can be understood that the surface of the second planarization layer 16 close to the array substrate 11 is in contact with or located on the same plane as the side surface of the barrier structure 15 and the surface of the side wall 131 of the protective structure 13 away from the array substrate 11.

[0128] In one embodiment, the orthographic projection of the protection structure 13 on the array substrate 11 surrounds and separates the light-emitting functional portion 1221 , and the orthographic projection of the protection structure 13 on the array substrate 11 does not overlap with the orthographic projection of the light-emitting functional portion 1221 on the array substrate 11 .

[0129] The orthographic projection of the protective structure 13 on the array substrate 11 surrounds and separates the light-emitting functional portion 1221, that is, the orthographic projection of the protective structure 13 on the array substrate 11 and the orthographic projection of the light-emitting functional portion 1221 on the array substrate 11 in the display panel can be a mesh projection, such as Figure 3 shown.

[0130] In the embodiment of the present application, the orthographic projection of the protection structure 13 on the array substrate 11 is adjacent to and does not overlap with the orthographic projection of the light-emitting functional portion 1221 on the array substrate 11 .

[0131] In one embodiment, see Figure 1 As shown, the light emitting function portion 1221 in the light emitting device layer 12 includes a light emitting unit 1221 a and an electron transport layer 1221 b stacked in a direction away from the array substrate 11 .

[0132] The light-emitting functional portion 1221 may include a light-emitting unit 1221 a and may further include at least one of an electron transport layer (ETL) 1221 b and a hole block layer (HBL).

[0133] In the embodiment of the present application, each light-emitting functional portion 1221 in the light-emitting device layer 12 may include a light-emitting unit 1221a and an electron transport layer 1221b stacked in a direction away from the array substrate 11. The light-emitting units 1221a in different light-emitting functional portions 1221 may emit light of different colors or the same color. Optionally, the material of the light-emitting unit 1221a may be an organic material, an inorganic material, or a quantum dot material.

[0134] Optionally, the material of the electron transport layer 1221 b may be an organic material (such as a heteroaromatic compound) or an inorganic material (such as zinc oxide, titanium dioxide, etc.) with high electron transport properties. Of course, it may also be an organic metal complex, etc.

[0135] In one embodiment, a side surface of the light emitting unit 1221 a is in contact with at least a portion of a side surface of the protection structure 13 , and a side surface of the electron transport layer 1221 b is in contact with at least a portion of a side surface of the protection structure 13 .

[0136] Among them, the side of the light-emitting unit 1221a is arranged in contact with at least part of the side of the protective structure 13, and the side of the electron transport layer 1221b is arranged in contact with at least part of the side of the protective structure 13. It can be understood that the side of the light-emitting unit 1221a and the side of the electron transport layer 1221b are approximately on the same vertical plane, which is a plane perpendicular to the array substrate 11.

[0137] In one embodiment, the surface of the light-emitting functional portion 1221 away from the array substrate 11, the surface of the sidewall 131 of the protection structure 13 away from the array substrate 11, and the surface of the first planarization layer 14 away from the array substrate 11 are all located on the same plane.

[0138] Optionally, the surface of the light-emitting functional portion 1221 away from the array substrate 11, the surface of the side wall 131 of the protective structure 13 away from the array substrate 11, and the surface of the first planarization layer 14 away from the array substrate 11 can be approximately located on the same plane. In the embodiment of the present application, the surface of the light-emitting functional portion 1221 away from the array substrate 11, the surface of the side wall 131 of the protective structure 13 away from the array substrate 11, and the surface of the first planarization layer 14 away from the array substrate 11 are all located on the same plane.

[0139] In one embodiment, the orthographic projection of the light emitting unit 1221 a on the array substrate 11 overlaps with the orthographic projection of the electron transport layer 1221 b on the array substrate 11 .

[0140] Optionally, the orthographic projection of the light-emitting unit 1221a on the array substrate 11 overlaps with the orthographic projection of the electron transport layer 1221b on the array substrate 11. It can be understood that the orthographic projection area of ​​the light-emitting unit 1221a on the array substrate 11 is equal to the orthographic projection area of ​​the electron transport layer 1221b on the array substrate 11, the orthographic projection area of ​​the light-emitting unit 1221a on the array substrate 11 is slightly smaller than the orthographic projection area of ​​the electron transport layer 1221b on the array substrate 11, or the orthographic projection area of ​​the light-emitting unit 1221a on the array substrate 11 is slightly larger than the orthographic projection area of ​​the electron transport layer 1221b on the array substrate 11.

[0141] In one embodiment, please continue to see Figure 1 Please continue to see Figure 1 As shown, the light emitting device layer 12 further includes a common layer 124 , which is disposed on a side of the light emitting function layer 122 and the second planarization layer 16 away from the array substrate 11 .

[0142] Alternatively, the common layer 124 may be disposed on a side of the light-emitting functional layer 122 , the second planarization layer 16 , and at least a portion of the protection structure 13 away from the array substrate 11 .

[0143] It should be noted here that when the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the protective structure 13 on the array substrate 11, the common layer 124 in the light-emitting device layer 12 is arranged on the side of the light-emitting functional layer 122 and the second planarization layer 16 away from the array substrate 11.

[0144] The common layer 124 in the light-emitting device layer 12 can be referred to as an OLED common layer, an OLED common layer, or an electron injection layer. Optionally, the common layer 124 can be made of an alkali metal compound, an alkali metal fluoride, an organometallic complex, and / or an organic small molecule with a specific structure. In practical applications, the common layer 124 can be disposed on a side of the light-emitting functional layer 122 and the planarization layer away from the array substrate 11.

[0145] It should be noted here that please continue to refer to Figure 1 As shown, the common layer 124 may include a first common structure 1241 and a second common structure 1242, and the first common structure 1241 and the second common structure 1242 may be an integrated structure; the surface of the first common structure 1241 away from the array substrate 11 and the surface of the first common structure 1241 close to the array substrate 11 may both be mesh-shaped wavy surfaces, and the surface of the first common structure 1241 away from the array substrate 11 is similar in shape to the surface of the second planarization layer 16 away from the array substrate 11, and the surface of the first common structure 1241 close to the array substrate 11 is similar in shape to the surface of the second planarization layer 16 close to the array substrate 11.

[0146] Optionally, the orthographic projection of the first common structure 1241 on the array substrate 11 may cover the orthographic projection of the second planarization layer 16 on the array substrate 11, or the orthographic projection of the second planarization layer 16 on the array substrate 11 may be located within the orthographic projection of the first common structure 1241 on the array substrate 11. Simultaneously, the orthographic projection of the second common structure 1242 in the common layer 124 on the array substrate 11 may cover at least a portion of the orthographic projection of the light-emitting functional layer 122 on the array substrate 11, or the orthographic projection of the light-emitting functional layer 122 on the array substrate 11 may be located within the orthographic projection of the second common structure 1242 on the array substrate 11.

[0147] In one embodiment, the orthographic projection of the second electrode layer 123 on the array substrate 11 overlaps with the orthographic projection of the common layer 124 on the array substrate 11, and the orthographic projection of the second electrode layer 123 on the array substrate 11 covers the orthographic projections of the light-emitting functional layer 122, the planarization layer and the protective structure 13 on the array substrate 11.

[0148] Among them, the overlap of the orthographic projection of the common layer 124 on the array substrate 11 and the orthographic projection of the second electrode layer 123 on the array substrate 11 can be understood as the orthographic projection area of ​​the common layer 124 on the array substrate 11 is equal to the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11, the orthographic projection area of ​​the common layer 124 on the array substrate 11 is slightly smaller than the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11, or the orthographic projection area of ​​the common layer 124 on the array substrate 11 is slightly larger than the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11.

[0149] In practical applications, please continue to refer to Figure 1 As shown, the second electrode layer 123 may include a first electrode portion 1231 and a second electrode portion 1232, and the first electrode portion 1231 and the second electrode portion 1232 may be an integrated structure; the surface of the first electrode portion 1231 away from the array substrate 11 and the surface of the first electrode portion 1231 close to the array substrate 11 may be a mesh-shaped wavy surface, the surface of the first electrode portion 1231 away from the array substrate 11 is similar in shape to the surface of the first common structure 1241 away from the array substrate 11, and the surface of the first electrode portion 1231 close to the array substrate 11 is similar in shape to the surface of the first common structure 1241 close to the array substrate 11.

[0150] Optionally, the orthographic projection of the first electrode portion 1231 on the array substrate 11 may cover the orthographic projection of the first common structure 1241 on the array substrate 11, or the orthographic projection of the first common structure 1241 on the array substrate 11 may be located within the orthographic projection of the first electrode portion 1231 on the array substrate 11. Simultaneously, the orthographic projection of the second electrode portion 1232 in the second electrode layer 123 on the array substrate 11 may cover the orthographic projection of the second common structure 1242 on the array substrate 11, or the orthographic projection of the second common structure 1242 on the array substrate 11 may be located within the orthographic projection of the second electrode portion 1232 on the array substrate 11.

[0151] In one embodiment, see Figure 1 As shown, the display panel 10 further includes: an encapsulation layer 17 ; the encapsulation layer 17 is arranged on a side of the second electrode layer 123 away from the array substrate 11 , and the orthographic projection of the encapsulation layer 17 on the array substrate 11 overlaps with the orthographic projection of the second electrode layer 123 on the array substrate 11 .

[0152] Among them, the material of the encapsulation layer 17 in the display panel 10 can be an inorganic material (such as silicon nitride, aluminum oxide, etc.), an organic material (such as polyimide, cycloolefin polymer, etc.) or an organic-inorganic composite material (such as coating an organic material such as polyimide on an inorganic film such as silicon nitride or aluminum oxide, or using an organic-inorganic hybrid sol-gel material, etc.).

[0153] Optionally, the overlap of the orthographic projection of the encapsulation layer 17 on the array substrate 11 and the orthographic projection of the second electrode layer 123 on the array substrate 11 can be understood as the orthographic projection area of ​​the encapsulation layer 17 on the array substrate 11 is equal to the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11, the orthographic projection area of ​​the encapsulation layer 17 on the array substrate 11 is slightly smaller than the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11, or the orthographic projection area of ​​the encapsulation layer 17 on the array substrate 11 is slightly larger than the orthographic projection area of ​​the second electrode layer 123 on the array substrate 11.

[0154] In the meantime, please continue to see Figure 1 As shown, the encapsulation layer 17 may include a first encapsulation portion 171 and a second encapsulation portion 172, and the first encapsulation portion 171 and the second encapsulation portion 172 may be an integrated structure; the surface of the first encapsulation portion 171 close to the array substrate 11 may be a mesh-shaped wavy surface, and is similar in shape to the surface of the first electrode portion 1231 close to the array substrate 11 and the surface of the second planarization layer 16 close to the array substrate 11.

[0155] Optionally, the orthographic projection of the first encapsulation portion 171 on the array substrate 11 may cover the orthographic projection of the first electrode portion 1231 on the array substrate 11, or the orthographic projection of the first electrode portion 1231 on the array substrate 11 may be located within the orthographic projection of the first encapsulation portion 171 on the array substrate 11. Simultaneously, the orthographic projection of the second encapsulation portion 172 in the encapsulation layer 17 on the array substrate 11 may cover the orthographic projection of the second electrode portion 1232 on the array substrate 11, or the orthographic projection of the second electrode portion 1232 on the array substrate 11 may be located within the orthographic projection of the second encapsulation portion 172 on the array substrate 11.

[0156] In this way, the encapsulation layer 17 in the display panel 10 can effectively reduce the impact of external impact on the internal components of the display panel 10, reduce the probability of failures such as cracking and disconnection of the display panel 10, and can effectively isolate the external environment, ensuring that the internal components of the display panel 10 are always in a dry and clean environment, preventing the probability of damage to the internal components, and improving the service life of the display panel 10.

[0157] See Figure 4 One embodiment of the present application provides a method for manufacturing a display panel 10, the method comprising:

[0158] S100 , providing an array substrate 11 .

[0159] S200, forming a light-emitting device layer 12 on one side of the array substrate 11; the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11; the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and the light-emitting functional parts 1221 are arranged at intervals.

[0160] Among them, forming the light-emitting device layer 12 on one side of the array substrate 11 can be understood as forming a first electrode layer 121 on one side of the array substrate 11, forming a light-emitting functional layer 122 on the side of the first electrode layer 121 away from the array substrate 11, and forming a second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11.

[0161] S300, forming a protective structure 13 on one side of the array substrate 11; the protective structure 13 is located between adjacent light-emitting functional parts 1221; a groove 13a is provided on the surface of the side of the protective structure 13 away from the array substrate 11, and the groove 13a is located between adjacent light-emitting functional parts 1221; the orthographic projection of the groove 13a on the array substrate 11 is located within the orthographic projection of the protective structure 13 on the array substrate 11.

[0162] S400 , forming a first planarization layer 14 on a side of the protection structure 13 away from the array substrate 11 ; the first planarization layer 14 is disposed in the groove 13 a .

[0163] S500, forming a barrier structure 15 on a side of the first planarization layer 14 away from the array substrate 11; the orthographic projection of the barrier structure 15 on the array substrate 11 covers the orthographic projection of the first planarization layer 14 on the array substrate 11; the surface of the barrier structure 15 close to the array substrate 11 is in contact with the surface of the first planarization layer 14 away from the array substrate 11.

[0164] S600 , forming a second planarization layer 16 on a side of the barrier structure 15 away from the array substrate 11 ; the orthographic projection of the second planarization layer 16 on the array substrate 11 covers the orthographic projection of the barrier structure 15 on the array substrate 11 .

[0165] It should be noted that, during the execution of the above-mentioned process S200, the above-mentioned processes S300-S600 are executed, that is, the above-mentioned steps S300-S600 are executed before the process of forming the second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11. Figure 5FIG. 1 is a partial structural diagram of the display panel 10 before a process of forming the second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11 is performed.

[0166] The display panel 10 in the embodiment of the present application is provided with a barrier structure 15, which separates the planarization layer in the display panel 10 into a first planarization layer 14 and a second planarization layer 16. In this way, when the planarization layer is heat-treated during the preparation process of the display panel 10, the barrier structure 15 can block or prevent the first planarization layer 14 from releasing water vapor, or can block or prevent the first planarization layer from absorbing water when placed in the air, thereby avoiding degradation of the material of the OLED layer, thereby solving the problem of pixel failure in the prepared display panel 10 and improving the display effect of the display panel 10.

[0167] In one embodiment, Figure 6 As shown, the step of forming the first planarization layer 14 on the side of the protection structure 13 away from the array substrate 11 in the above S400 may include the following steps:

[0168] S410 , forming a sacrificial layer 18 on a side of the light emitting functional layer 122 away from the array substrate 11 .

[0169] In the embodiment of the present application, the sacrificial layer 18 may be referred to as a mask layer and may be a film having high resistance to etching, such as a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, or other inorganic film. The sacrificial layer 18 may be prepared by sputtering, evaporation, chemical vapor deposition, atomic layer deposition, or the like.

[0170] Optionally, the material of the sacrificial layer 18 can be metal (such as gold, silver, platinum, magnesium, nickel, tungsten, etc.), metal oxide (such as indium gallium zinc oxide, indium zinc oxide, indium oxide, etc.), alloy material containing metal material or inorganic insulating material (such as aluminum oxide, hafnium oxide, silicon oxide, etc.), etc.

[0171] In practical applications, a sacrificial portion may be formed on the side of the light emitting functional layer 122 away from the array substrate 11. In this way, the formed sacrificial layer 18 can act as a buffer to protect the formed light emitting functional layer 122 from damage during subsequent processes.

[0172] It should be noted that the process in S410 can be performed after forming the first electrode layer 121 on one side of the array substrate 11 and forming the light-emitting functional layer 122 on the side of the first electrode layer 121 away from the array substrate 11. Figure 7 FIG. 4 is a diagram showing a structure generated after the process in S410 is executed.

[0173] S420 , forming a protective layer 19 on the sacrificial layer 18 and at least a portion of the array substrate 11 on a side away from the array substrate 11 .

[0174] The protective layer 19 here can be called the whole surface protection structure 13. Figure 8 FIG. 4 is a diagram showing a structure generated after the process in S420 is executed.

[0175] S430 , forming an initial planarization layer 20 on a side of the protection layer 19 away from the array substrate 11 .

[0176] The initial planarization layer 20 here can be called a full-surface planarization layer. Figure 9 FIG. 4 is a diagram showing a structure generated after the process in S430 is executed.

[0177] Among them, the surface of the initial planarization layer 20 away from the array substrate 11 can be higher than the surface of the protective layer 19 away from the array substrate 11, that is, the spacing distance between the surface of the initial planarization layer 20 away from the array substrate 11 and the surface of the protective layer 19 away from the array substrate 11 is greater than 0.

[0178] S440 , etching the initial planarization layer 20 to form a first planarization layer 14 ; a surface of the first planarization layer 14 away from the array substrate 11 and a surface of the light-emitting functional layer 122 away from the array substrate 11 are located on the same plane.

[0179] Specifically, the initial planarization layer 20 may be etched by dry etching to form the first planarization layer 14. In the embodiment of the present application, the initial planarization layer 20 may be etched by wet etching to form the first planarization layer 14. Figure 10 The structure diagram generated after the process in S440 is executed is shown. The etching solution used in the wet etching method can be a hydrofluoric acid solution, a hot phosphoric acid solution, aqua regia, oxalic acid, an iron oxide solution, etc.

[0180] Among them, the surface of the first planarization layer 14 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 can be approximately located on the same plane. In the embodiment of the present application, the surface of the first planarization layer 14 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 are located on the same plane.

[0181] According to the technical solution in the embodiment of the present application, a sacrificial layer 18 is formed on the side of the light-emitting functional layer 122 away from the array substrate 11, a protective layer 19 is formed on the side of the sacrificial layer 18 away from the array substrate 11, an initial planarization layer 20 is formed on the side of the protective layer 19 away from the array substrate 11, and the initial planarization layer 20 is etched to form a first planarization layer 14. The surface of the first planarization layer 14 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 are located on the same plane; in the above method, the surface of the first planarization layer 14 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 are located on the same plane, so that the barrier structure 15 prepared subsequently can cover the first planarization layer 14, completely block or prevent the water vapor released by the first planarization layer 14 during the heat treatment process, or block or prevent the first planarization layer from absorbing water when placed in the air.

[0182] In one embodiment, Figure 11 As shown, the step of forming the second planarization layer 16 on the side of the barrier structure 15 away from the array substrate 11 in the above S600 may include the following steps:

[0183] S610 , forming a barrier layer 21 on at least a portion of the protection layer 19 and the first planarization layer 14 on a side away from the array substrate 11 .

[0184] S620, forming an overlapping planarization layer 22 on the side of the barrier layer 21 away from the array substrate 11; the spacing distance between the surface of the overlapping planarization layer 22 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 is greater than the spacing distance between the surface of the barrier layer 21 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11.

[0185] Among them, the spacing distance between the surface of the stacked planarization layer 22 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 is greater than the spacing distance between the surface of the barrier layer 21 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11. It can be understood that the surface of the stacked planarization layer 22 away from the array substrate 11 is higher than the surface of the barrier layer 21 away from the array substrate 11.

[0186] S630 , sequentially etching the stacked planarization layer 22 , the barrier layer 21 , the protection layer 19 and the sacrificial layer 18 to form a remaining planarization layer 23 , the barrier structure 15 and the protection structure 13 , so as to expose the light-emitting functional layer 122 .

[0187] In actual applications, the spacing distance between the surface of the remaining planarization layer 23 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 can be smaller than the spacing distance between the surface of the protective layer 19 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11, that is, the surface of the remaining planarization layer 23 away from the array substrate 11 is lower than the surface of the protective layer 19 away from the array substrate 11; the spacing distance between the surface of the remaining planarization layer 23 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 can be greater than the spacing distance between the surface of the sacrificial layer 18 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11, that is, the surface of the remaining planarization layer 23 away from the array substrate 11 is higher than the surface of the sacrificial layer 18 away from the array substrate 11.

[0188] In addition, the spacing distance between the surface of the blocking structure 15 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11 can be smaller than the spacing distance between the surface of the sacrificial layer 18 away from the array substrate 11 and the surface of the light-emitting functional layer 122 away from the array substrate 11.

[0189] S640 , performing a heat treatment on the remaining planarization layer 23 to form a second planarization layer 16 .

[0190] It should be noted that the heat treatment of the remaining planarization layer 23 can be understood as the overall heat treatment of the layers formed by the previous process, so that the remaining planarization layer 23 forms the second planarization layer 16. In the embodiment of the present application, the surface of the second planarization layer 16 away from the array substrate 11 can be a mesh-shaped wavy surface. Figure 12 FIG. 4 shows a structure diagram generated after the process in S640 is executed.

[0191] In one embodiment, when the light emitting functional layer 122 leaks out, Figure 13 As shown, the above preparation method may further include the following process:

[0192] S700 , forming a common layer 124 on a side of the light-emitting functional layer 122 and the second planarization layer 16 away from the array substrate 11 .

[0193] Alternatively, a common layer 124 may be formed on the side of the light-emitting functional layer 122 , the second planarization layer 16 , and at least a portion of the protection structure 13 away from the array substrate 11 .

[0194] S800 , forming a second electrode layer 123 on a side of the common layer 124 away from the array substrate 11 .

[0195] S900 , forming an encapsulation layer 17 on a side of the second electrode layer 123 away from the array.

[0196] The technical solution in the embodiment of the present application can prepare a barrier structure 15 after the first planarization layer 14 is formed, so that the barrier structure 15 can be used to block or prevent the water vapor released by the first planarization layer 14 during the heat treatment of the planarization layer, or can be placed in the air to block or prevent the first planarization layer from absorbing water.

[0197] An embodiment of the present application further provides a display device, comprising the display panel 10 in any of the above embodiments.

[0198] The display device can be a laptop computer, a mobile phone, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc.

[0199] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A display panel, characterized in that: include: array substrate; a light-emitting device layer disposed on one side of the array substrate; the light-emitting device layer comprising a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer being located on a side of the first electrode layer away from the array substrate, and the second electrode layer being located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer comprising a plurality of light-emitting functional portions, each of which being arranged at intervals; a protective structure disposed on one side of the array substrate and located between adjacent light-emitting functional units; a groove is provided on a surface of the protective structure away from the array substrate, the groove being located between adjacent light-emitting functional units; an orthographic projection of the groove on the array substrate being located within an orthographic projection of the protective structure on the array substrate; A first planarization layer is provided on a side of the protection structure away from the array substrate; the first planarization layer is provided in the groove; a barrier structure, disposed on a side of the first planarization layer away from the array substrate; an orthographic projection of the barrier structure on the array substrate covering an orthographic projection of the first planarization layer on the array substrate; A surface of the barrier structure close to the array substrate is in contact with a surface of the first planarization layer away from the array substrate; The second planarization layer is provided on a side of the barrier structure away from the array substrate; the orthographic projection of the second planarization layer on the array substrate covers the orthographic projection of the barrier structure on the array substrate.

2. The display panel according to claim 1, wherein: An orthographic projection area of ​​the first planarization layer on the array substrate is smaller than an orthographic projection area of ​​the second planarization layer on the array substrate.

3. The display panel according to claim 1 or 2, wherein: The orthographic projection area of ​​the barrier structure on the array substrate is greater than or equal to the orthographic projection area of ​​the groove on the array substrate; Optionally, an orthographic projection area of ​​the barrier structure on the array substrate is larger than an orthographic projection area of ​​the first planarization layer on the array substrate; Optionally, an orthographic projection area of ​​the barrier structure on the array substrate is smaller than an orthographic projection area of ​​the second planarization layer on the array substrate; Optionally, a surface of the barrier structure close to the array substrate, a surface of the sidewall of the protection structure away from the array substrate, and a surface of the first planarization layer away from the array substrate are all located on the same plane, and the barrier structure extends to the surface of the sidewall of the protection structure away from the array substrate. Optionally, a surface of the second planarization layer close to the array substrate contacts a surface of the barrier structure away from the array substrate.

4. The display panel according to claim 3, wherein: A surface of the barrier structure close to the array substrate and a surface of the second planarization layer close to the array substrate are located on the same plane; Optionally, a surface of the second planarization layer close to the array substrate and a surface of the first planarization layer away from the array substrate are located on the same plane.

5. The display panel according to claim 1 or 2, wherein: The orthographic projection area of ​​the groove on the array substrate is smaller than the orthographic projection area of ​​the second planarization layer on the array substrate; Optionally, an orthographic projection of the groove on the array substrate coincides with an orthographic projection of the first planarization layer on the array substrate.

6. The display panel according to claim 1 or 2, characterized in that: The orthographic projection of the second planarization layer on the array substrate overlaps with the orthographic projection of the protection structure on the array substrate; Optionally, the second planarization layer extends to the side surface of the barrier structure and the surface of the side wall of the protection structure away from the array substrate; Optionally, the orthographic projection of the protection structure on the array substrate surrounds and separates the light-emitting functional portion, and the orthographic projection of the protection structure on the array substrate does not overlap with the orthographic projection of the light-emitting functional portion on the array substrate.

7. The display panel according to claim 1 or 2, characterized in that: A surface of the second planarization layer away from the array substrate is a curved surface.

8. The display panel according to claim 1 or 2, wherein: The light-emitting functional portion includes a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate; Optionally, a side surface of the light-emitting unit is arranged in contact with at least a portion of a side surface of the protective structure, and a side surface of the electron transport layer is arranged in contact with at least a portion of a side surface of the protective structure; Optionally, a surface of the light-emitting functional portion away from the array substrate, a surface of the sidewall of the protection structure away from the array substrate, and a surface of the first planarization layer away from the array substrate are all located on the same plane.

9. The display panel according to claim 8, wherein: An orthographic projection of the light emitting unit on the array substrate overlaps with an orthographic projection of the electron transport layer on the array substrate.

10. The display panel according to claim 1 or 2, characterized in that: The light emitting device layer further includes a common layer, which is arranged on a side of the light emitting function layer and the second planarization layer away from the array substrate.

11. The display panel according to claim 1 or 2, wherein: The display panel further includes: The encapsulation layer is arranged on a side of the second electrode layer away from the array substrate; the orthographic projection of the encapsulation layer on the array substrate overlaps with the orthographic projection of the second electrode layer on the array substrate.

12. A method for preparing a display panel, characterized in that: The method comprises: providing an array substrate; A light-emitting device layer is formed on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals; A protective structure is formed on one side of the array substrate; the protective structure is located between adjacent light-emitting functional units; a groove is provided on a surface of the protective structure away from the array substrate, the groove being located between adjacent light-emitting functional units; an orthographic projection of the groove on the array substrate is located within an orthographic projection of the protective structure on the array substrate; forming a first planarization layer on a side of the protection structure away from the array substrate; the first planarization layer is disposed in the groove; forming a barrier structure on a side of the first planarization layer away from the array substrate; an orthographic projection of the barrier structure on the array substrate covers an orthographic projection of the first planarization layer on the array substrate; and a surface of the barrier structure close to the array substrate contacts a surface of the first planarization layer away from the array substrate; A second planarization layer is formed on a side of the barrier structure away from the array substrate; the orthographic projection of the second planarization layer on the array substrate covers the orthographic projection of the barrier structure on the array substrate.

13. The method according to claim 12, characterized in that The step of forming a first planarization layer on a side of the protection structure away from the array substrate comprises: forming a sacrificial layer on a side of the light-emitting functional layer away from the array substrate; forming a protective layer on a side of the sacrificial layer away from the array substrate; forming an initial planarization layer on a side of the protective layer away from the array substrate; The initial planarization layer is etched to form the first planarization layer; a surface of the first planarization layer away from the array substrate and a surface of the light-emitting functional layer away from the array substrate are located on the same plane.

14. The method according to claim 12 or 13, characterized in that The forming of a second planarization layer on a side of the barrier structure away from the array substrate comprises: forming a barrier layer on at least a portion of the protective layer and a side of the first planarization layer away from the array substrate; forming an overlaying planarization layer on a side of the barrier layer away from the array substrate; wherein a surface height of the overlaying planarization layer on the side away from the array substrate is greater than a surface height of the barrier layer on the side away from the array substrate; Sequentially etching the stacked planarization layer, the barrier layer, the protective layer, and the sacrificial layer to form a remaining planarization layer, the barrier structure, and the protective structure, so as to expose the light-emitting functional layer; The remaining planarization layer is thermally treated to form the second planarization layer.

15. A display device, characterized in that: The display panel comprises the display panel according to any one of claims 1 to 11.

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