Display panel, preparation method of display panel and display device of display panel
Patent Information
- Application Number
- CN202510875762.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-26
- Publication Date
- 2025-09-23
AI Technical Summary
Existing OLED display panels have pixel failure problems during the manufacturing process, mainly due to the direct contamination of the OLED layer by water, oxygen or organic matter released during the heat treatment of the planarization layer.
During the preparation of the display panel, a groove is designed on the side of the protective structure away from the array substrate, and a sacrificial layer is partially etched in the groove so that part of the sacrificial layer can shield water, oxygen or organic matter during the heat treatment of the planarization layer to avoid direct contamination of the OLED layer.
It effectively solves the problem of pixel failure, improves the display effect and stability of the display panel, prevents interlayer peeling, and enhances the independence and display accuracy of pixels.
Smart Images

Figure CN120693037A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel, a method for preparing a display panel, and a display device thereof. Background Art
[0002] Organic Light-Emitting Diodes (OLEDs) have attracted widespread attention due to their self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, and low energy consumption. As a new generation of display technology, they have begun to gradually replace traditional liquid crystal displays and are widely used in electronic devices such as watches, bracelets, mobile phones, tablets, and information kiosks in public halls.
[0003] However, current OLED display panels have the problem of pixel failure. Summary of the Invention
[0004] Based on this, it is necessary to provide a display panel, a method for manufacturing a display panel, and a display device thereof in order to address the above technical issues.
[0005] In a first aspect, an embodiment of the present application provides a display panel, comprising:
[0006] an array substrate;
[0007] A light-emitting device layer is provided on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals;
[0008] A protective structure is provided on one side of the array substrate and is located between adjacent light-emitting functional portions; a groove is provided on a surface of the protective structure on a side away from the array substrate, the groove being located between adjacent light-emitting functional portions; an edge height of the groove on the side away from the array substrate is greater than a surface height of the light-emitting functional layer on the side away from the array substrate;
[0009] A planarization layer is arranged on a side of the protective structure away from the array substrate; and at least a portion of the planarization layer is arranged in the groove, the orthographic projection area of the groove on the array substrate is smaller than the orthographic projection area of the planarization layer on the array substrate, and the surface height of the planarization layer on the side away from the array substrate in the direction perpendicular to the array substrate is greater than the surface height of the light-emitting functional layer on the side away from the array substrate.
[0010] In one embodiment, the planarization layer includes a first planar structure and a second planar structure, and the first planar structure and the second planar structure are an integrated structure; the orthographic projection of the first planar structure on the array substrate coincides with the orthographic projection of the groove on the array substrate, and the orthographic projection of the first planar structure on the array substrate is located within the orthographic projection of the second planar structure on the array substrate.
[0011] In one embodiment, a surface of the second planar structure away from the array substrate is a curved surface.
[0012] In one embodiment, the orthographic projection of the second planar structure on the array substrate is located within the orthographic projection of the protection structure on the array substrate.
[0013] In one embodiment, a surface of the first planar structure away from the array substrate and a surface of the second planar structure close to the array substrate are located on the same plane.
[0014] In one embodiment, the light-emitting functional portion includes a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate.
[0015] In one embodiment, the light-emitting functional portion is a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate.
[0016] In one embodiment, a side surface of the light-emitting unit is in contact with at least a portion of a side surface of the protective structure, and a side surface of the electron transport layer is in contact with at least a portion of a side surface of the protective structure;
[0017] Optionally, an orthographic projection of the light emitting unit on the array substrate overlaps with an orthographic projection of the electron transport layer on the array substrate.
[0018] In one embodiment, the light-emitting device layer further includes a common layer disposed on a side of the light-emitting functional layer, the planarization layer, and at least a portion of the protection structure away from the array substrate;
[0019] Optionally, the orthographic projection of the second electrode layer on the array substrate overlaps with the orthographic projection of the common layer on the array substrate, and the orthographic projection of the common layer on the array substrate covers the orthographic projections of the light-emitting functional layer, the planarization layer and the protection structure on the array substrate.
[0020] In one embodiment, the display panel further includes:
[0021] The encapsulation layer is arranged on a side of the second electrode layer away from the array substrate; the orthographic projection of the encapsulation layer on the array substrate overlaps with the orthographic projection of the second electrode layer on the array substrate.
[0022] In a second aspect, an embodiment of the present application provides a method for manufacturing a display panel, the method comprising:
[0023] providing an array substrate;
[0024] A light-emitting device layer is formed on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals;
[0025] A protective structure is formed on one side of the array substrate; the protective structure is located between adjacent light-emitting functional portions, and a groove is provided on a surface on a side away from the array substrate, the groove being located between adjacent light-emitting functional portions; the height of an edge of the groove on the side away from the array substrate is greater than the height of a surface of the light-emitting functional layer on the side away from the array substrate;
[0026] A planarization layer is formed on a side of the protective structure away from the array substrate; at least a portion of the planarization layer is disposed in the groove, an orthographic projection area of the groove on the array substrate is smaller than an orthographic projection area of the planarization layer on the array substrate, and a surface height of the planarization layer on a side away from the array substrate in a direction perpendicular to the array substrate is greater than a surface height of the light-emitting functional layer on a side away from the array substrate.
[0027] In one embodiment, before forming the planarization layer on the side of the protection structure away from the array substrate, the method further includes:
[0028] forming a sacrificial layer on a side of the light-emitting functional layer away from the array substrate;
[0029] forming a protective layer on a side of the sacrificial layer away from the array substrate;
[0030] A first planarization layer is formed on a side of the protection layer away from the array substrate.
[0031] In one embodiment, the sacrificial layer includes a first sacrificial portion and a second sacrificial portion stacked in sequence in a direction away from the array substrate; and a planarization layer is formed on a side of the protective structure away from the array substrate, including:
[0032] The first planarization layer is etched to form a second planarization layer; the surface height of the second planarization layer on a side away from the array substrate is less than the surface height of the sacrificial layer on a side away from the array substrate;
[0033] The protective layer is etched to expose the sacrificial layer and form a protective structure; the surface of the protective structure away from the array substrate and the surface of the sacrificial layer away from the array substrate are located on the same plane;
[0034] The second sacrificial portion in the sacrificial layer is etched to form a first sacrificial portion in the sacrificial layer; the height of the surface of the second planarization layer on the side away from the array substrate is greater than the height of the surface of the first sacrificial portion on the side away from the array substrate;
[0035] The second planarization layer is heat-treated to form a planarization layer; a surface of the planarization layer away from the array substrate is a curved surface.
[0036] In one embodiment, the method further includes:
[0037] When the planarization layer is formed, the first sacrificial portion in the sacrificial layer is etched to expose each light-emitting functional portion.
[0038] In a third aspect, an embodiment of the present application further provides a display device, comprising a display panel as in any embodiment of the first aspect.
[0039] The display panel, the method for preparing the display panel, and the display device thereof provided in the embodiments of the present application include: an array substrate, a light-emitting device layer, a protective structure, and a planarization layer; the light-emitting device layer is arranged on one side of the array substrate, the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on the side of the first electrode layer away from the array substrate, the second electrode layer is located on the side of the light-emitting functional layer away from the array substrate, and the light-emitting functional layer includes a plurality of light-emitting functional portions, each light-emitting functional portion being arranged at intervals; the protective structure is arranged on one side of the array substrate and is located between adjacent light-emitting functional portions, a groove is provided on the surface of the side of the protective structure away from the array substrate, the groove is located between adjacent light-emitting functional portions, and the edge height of the groove on the side away from the array substrate is greater than the surface height of the light-emitting functional layer on the side away from the array substrate; the planarization layer is arranged on the side of the protective structure away from the array substrate, and at least a portion of the planarization layer is arranged in the groove, the orthographic projection area of the groove on the array substrate is smaller than the orthographic projection area of the planarization layer on the array substrate, and the surface height of the planarization layer on the side away from the array substrate in a direction perpendicular to the array substrate is greater than the surface height of the light-emitting functional layer on the side away from the array substrate. The protective structure in the above-mentioned display panel is provided with a groove on the surface away from the array substrate, and the distance between the edge of the groove away from the array substrate and the surface of the protective structure close to the array substrate is greater than the distance between the surface of the light-emitting functional layer away from the array substrate and the surface of the protective structure close to the array substrate. This design structure is that during the preparation process of the display panel, a part of the sacrificial layer is etched before and after the heat treatment of the flattening layer, so that during the heat treatment of the flattening layer, a part of the sacrificial layer will shield or block the water oxygen or organic matter released by the flattening layer from directly contaminating the OLED layer, thereby solving the problem of pixel failure of the display panel and improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] Figure 1 A schematic cross-sectional view of a display panel provided in one embodiment;
[0041] Figure 2 for Figure 1A schematic diagram of a top view of the display panel in the embodiment;
[0042] Figure 3 is a schematic diagram of a partial cross-sectional structure of a display panel in another embodiment;
[0043] Figure 4 1 is a schematic flow chart of steps of a method for preparing a display panel in one embodiment;
[0044] Figure 5 A schematic diagram of a cross-sectional structure of a display panel during preparation in one embodiment;
[0045] Figure 6 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment;
[0046] Figure 7 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0047] Figure 8 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0048] Figure 9 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0049] Figure 10 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment;
[0050] Figure 11 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0051] Figure 12 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0052] Figure 13 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0053] Figure 14 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0054] Figure 15 A schematic diagram of a partial cross-sectional structure of a display panel during preparation in another embodiment;
[0055] Figure 16 FIG. 1 is a schematic flow chart of steps of a method for preparing a display panel in another embodiment.
[0056] Description of reference numerals:
[0057] 10. Display panel; 11. Array substrate; 12. Light-emitting device layer; 121. First electrode layer; 122. Light-emitting functional layer; 1221. Light-emitting functional portion; 1221a. Light-emitting unit; 1221b. Electron transport layer; 123. Second electrode layer; 1231. First electrode portion; 1232. Second electrode portion; 13. Protective structure; 131. Groove; 14. Planarization layer; 141. First planarization structure; 142. Second planarization structure; 15. Common layer; 151. First common structure; 152. Second common structure; 16. Encapsulation layer; 161. First encapsulation portion; 162. Second encapsulation portion; 17. Sacrificial layer; 171. First sacrificial portion; 172. Second sacrificial portion; 18. Protective layer; 19. First planarization layer; 20. Second planarization layer. DETAILED DESCRIPTION
[0058] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present application.
[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The term "and / or" as used herein includes any and all combinations of one or more of the relevant listed items.
[0060] When describing positional relationships, unless otherwise specified, when an element, such as a layer, film, or substrate, is referred to as being "on" another element, it can be directly on the other element or intervening elements may be present. Furthermore, when a layer is referred to as being "under" another layer, it can be directly below or one or more light-emitting units may be present. It is also understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers or one or more light-emitting units may be present.
[0061] In the case of using “including,” “having,” and “comprising” described herein, another component may be added unless a clear limiting term such as “only,” “consisting of,” etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as having one number.
[0062] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this application.
[0063] It should also be understood that when interpreting an element, even if not explicitly described, the element is interpreted as including a range of error, which should be within the acceptable deviation range of the specific value determined by those skilled in the art. For example, "approximately," "approximately," or "substantially" can mean within one or more standard deviations, and is not limited here.
[0064] Furthermore, in the specification, the phrase “planar distribution diagram” refers to a drawing when the target portion is viewed from above, and the phrase “cross-sectional diagram” refers to a drawing when a section taken by vertically cutting the target portion is viewed from the side.
[0065] In addition, the drawings are not drawn to a 1:1 scale, and the relative sizes of the elements in the drawings are drawn only as examples and not necessarily according to the true scale.
[0066] Organic Light-Emitting Diodes (OLEDs) have attracted widespread attention due to their self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, and low energy consumption. As a new generation of display technology, they have begun to gradually replace traditional liquid crystal displays and are widely used in electronic devices such as watches, bracelets, mobile phones, tablets, and information kiosks in public halls.
[0067] In the related art, during the display panel manufacturing process, the light-emitting functional units, sacrificial layers, side protection layers, and initial planarization layers are sequentially formed away from the array substrate, with the planarization layer positioned between the light-emitting functional units. The initial planarization layer, side protection layers, and sacrificial layers are then sequentially etched, and the etched initial planarization layer is then heat-treated to form a planarization layer with a curved surface structure to facilitate the sloped cathode layer in the display panel. The surface of the etched side protection layer away from the array substrate and the surfaces of the light-emitting functional units away from the array substrate are approximately coplanar. However, OLED display panels in the related art can suffer from pixel failure.
[0068] After research, the applicant found that the cause of the above-mentioned problem is that the surface of the side protection layer in the display panel away from the array substrate and the surface of each light-emitting functional part away from the array substrate are approximately on the same plane. This is because when the planarization layer is heat-treated during the preparation process, the OLED layer (including the anode layer and the light-emitting functional layer) has been exposed. Therefore, the water, oxygen or organic matter released by the planarization layer during the heat treatment will directly contaminate the OLED layer, resulting in pixel failure.
[0069] In view of this, the embodiments of the present application provide a display panel 10, a method for manufacturing the display panel 10, and a display device thereof. Figure 1 As shown, the display panel 10 includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13 and a planarization layer 14; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11, and the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and each light-emitting functional part 1221 is arranged at intervals; the protective structure 13 is arranged on one side of the array substrate 11 and is located between adjacent light-emitting functional parts 1221, and the protective structure 13 is away from A groove 131 is provided on the surface of one side of the array substrate 11, and the groove 131 is located between adjacent light-emitting functional parts 1221. The edge height of the groove 131 away from the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11; the planarization layer 14 is arranged on the side of the protective structure 13 away from the array substrate 11, and at least part of the planarization layer 14 is arranged in the groove 131, the orthographic projection area of the groove 131 on the array substrate 11 is smaller than the orthographic projection area of the flattening layer 14 on the array substrate 11, and the surface height of the flattening layer 14 away from the array substrate 11 in the direction perpendicular to the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11.
[0070] The protective structure 13 in the display panel 10 provided in the present application is provided with a groove 131 on the surface away from the array substrate 11, and the distance between the edge of the groove 131 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11 is greater than the distance between the surface of the light-emitting functional layer 122 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11. This design structure is that during the preparation process of the display panel 10, a portion of the sacrificial layer 17 is etched before and after the heat treatment of the planarization layer 14, so that during the heat treatment process of the planarization layer 14, a portion of the sacrificial layer 17 will shield the water oxygen or organic matter released by the planarization layer 14 from directly contaminating the OLED layer, thereby solving the problem of pixel failure of the display panel 10 and improving the display effect of the display panel 10.
[0071] Based on the above technical problems, the present application provides a display panel 10 , a method for manufacturing the display panel 10 , and a display device thereof, so as to avoid pixel failure of the display panel 10 as much as possible.
[0072] An embodiment of the present application provides a display panel 10 , which may be an organic light emitting diode (OLED) display panel or a quantum dot light emitting diode (QLED) display panel.
[0073] Specifically, see Figure 1The display panel 10 includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13 and a planarization layer 14; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11, and the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and each light-emitting functional part 1221 is arranged at intervals; the protective structure 13 is arranged on one side of the array substrate 11 and is located between adjacent light-emitting functional parts 1221, and a groove 131 is provided on the surface of the side of the protective structure 13 away from the array substrate 11, and the groove 131 is located at the side of the first electrode layer 121 away from the array substrate 11. Between adjacent light-emitting functional parts 1221, the spacing distance between the edge of the groove 131 on the side away from the array substrate 11 and the surface of the protective structure 13 on the side close to the array substrate 11 is greater than the spacing distance between the surface of the light-emitting functional layer 122 on the side away from the array substrate 11 and the surface of the protective structure 13 on the side close to the array substrate 11; the planarization layer 14 is arranged on the side of the protective structure 13 away from the array substrate 11, and at least part of the planarization layer 14 is arranged in the groove 131, the orthographic projection area of the groove 131 on the array substrate 11 is smaller than the orthographic projection area of the flattening layer 14 on the array substrate 11, and the surface height of the flattening layer 14 on the side away from the array substrate 11 in the direction perpendicular to the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 on the side away from the array substrate 11.
[0074] The array substrate 11 in the display panel 10 can be an inorganic substrate, an organic substrate, or a composite substrate formed by stacking an inorganic substrate and an organic substrate. The array substrate 11 can include a substrate. The substrate can be a rigid substrate or a flexible substrate. When the substrate is a rigid substrate, the substrate material can be glass or a silicon wafer, etc.; when the substrate is a flexible substrate, the substrate material can be polyimide.
[0075] In the embodiment of the present application, the light-emitting device layer 12 in the display panel 10 may include a first electrode layer 121, a light-emitting device layer 12, and a second electrode layer 123 stacked in sequence in a direction away from the array substrate 11. The first electrode layer 121 is an anode layer, and the second electrode layer 123 is a cathode layer.
[0076] Optionally, the material of the first electrode layer 121 can be a conductive metal material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or a metal alloy. Meanwhile, the material of the second electrode layer 123 can also be a conductive metal material, such as indium tin oxide (ITO), indium zinc oxide (IZO), or a metal alloy. In practical applications, the materials of the first electrode layer 121 can be the same or different, and this embodiment of the application does not limit this.
[0077] It should be noted that the light emitting device layer 12 can emit light of three different colors (including red, green and blue). The first electrode layer 121 and the light emitting device layer 12 in the display panel 10 can both be referred to as OLED layers.
[0078] Furthermore, the light-emitting functional layer 122 includes a plurality of light-emitting functional units 1221, which are arranged at intervals. In the embodiment of the present application, different light-emitting functional units 1221 can emit light of different colors or the same color. Each light-emitting functional unit 1221 corresponds to a pixel outputted by the display panel 10, and the plurality of light-emitting functional units 1221 can emit light of three different colors.
[0079] Optionally, the heights or thicknesses of the light-emitting functional portions 1221 in a target direction may be equal, the target direction may be a direction perpendicular to the array substrate 11 , and the light-emitting functional portions 1221 may be located on the same horizontal plane.
[0080] At the same time, the protective structure 13 in the display panel 10 can be located between adjacent light-emitting functional units 1221 to suppress crosstalk between adjacent light-emitting functional units 1221. A groove 131 is provided on a surface of the protective structure 13 on a side away from the array substrate 11. The groove 131 is located between adjacent light-emitting functional units 1221. Optionally, the cross-sectional shape of the groove 131 can be U-shaped, V-shaped, trapezoidal, or sawtooth-shaped. In the embodiment of the present application, a square cross-sectional shape of the groove 131 is used as an example for description.
[0081] Optionally, the material of the protective structure 13 can be aluminum oxide, magnesium oxide, hafnium oxide, gallium oxide, indium gallium zinc oxide, silicon nitride and / or silicon oxynitride, etc., and the protective structure 13 can be manufactured by sputtering, chemical vapor deposition, molecular beam epitaxy, physical evaporation, atomic layer deposition, etc.
[0082] In addition, a planarization layer 14 is further provided in the display panel 10. At least a portion of the planarization layer 14 on the side close to the array substrate 11 is provided in the groove 131, which can fill the gaps between different light-emitting functional parts 1221, making the surface of the display panel 10 smoother and flatter. It can also improve the adhesion between different light-emitting functional parts 1221, and form good chemical bonding or physical adsorption with the protective structure 13 on the side close to the array substrate 11 and other functional layers on the side away from the array substrate 11, so that the combination between the layers is tighter, thereby improving the stability of the structure of the entire display panel 10 and preventing problems such as interlayer peeling during use.
[0083] The planarization layer 14 can flatten the grooves 131 and separate adjacent light-emitting functional portions 1221, which can effectively prevent light and color mixing between adjacent pixels, improve the independence of each pixel in the display panel 10, and facilitate independent and precise control of each pixel, thereby improving the display accuracy of the display panel 10. In addition, the planarization layer 14 can also provide a support structure for adjacent light-emitting functional portions 1221, helping to maintain the relative position stability between adjacent pixels in the display panel 10. Figure 2 FIG. 1 is a schematic diagram of a top view of the planarization layer 14 and the light-emitting functional layer 122 in the display panel.
[0084] It should be noted here that the edge height of the groove 131 away from the side of the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11. It can be understood that the spacing distance between the edge of the groove 131 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11 is greater than the spacing distance between the surface of the light-emitting functional layer 122 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11; wherein, from the cross-sectional perspective of the display panel 10, there is a certain spacing distance between the edge of the groove 131 away from the array substrate 11 and the surface of the light-emitting device layer 12 away from the array substrate 11, and the spacing distance is greater than 0. The spacing distance here is caused by the fact that during the preparation process of the display panel 10, the etching process of the sacrificial layer 17 is performed in two steps. A part of the sacrificial layer 17 is etched away before the planarization layer 14 is heat-treated, and the remaining part of the sacrificial layer 17 is etched away after the planarization layer 14 is heat-treated.
[0085] Optionally, the thickness of the remaining portion of the sacrificial layer 17 in the target direction is equal to the spacing distance between the surface of the light-emitting functional layer 122 away from the array substrate 11 and the edge of the groove 131 away from the array substrate 11 .
[0086] In the embodiment of the present application, in the direction perpendicular to the array substrate 11, the surface height of the planarization layer 14 on the side away from the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 on the side away from the array substrate 11. It can be understood that the spacing distance between the surface of the side of the planarization layer 14 away from the array substrate 11 and the surface of the side of the first electrode layer 121 away from the array substrate 11 is greater than the spacing distance between the surface of the side of the light-emitting functional layer 122 away from the array substrate 11 and the surface of the side of the first electrode layer 121 away from the array substrate 11.
[0087] Optionally, the material of the planarization layer 14 may be an inorganic material (such as silicon dioxide, silicon nitride), or a polymer (such as polyimide, benzocyclobutene, photoresist), or a glass material (such as borosilicate glass).
[0088] The display panel 10 in the embodiment of the present application includes: an array substrate 11, a light-emitting device layer 12, a protective structure 13 and a planarization layer 14; the light-emitting device layer 12 is arranged on one side of the array substrate 11, and the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11, and the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and each light-emitting functional part 1221 is arranged at intervals; the protective structure 13 is arranged on one side of the array substrate 11 and is located between adjacent light-emitting functional parts 1221, and the protective structure 13 is away from the array substrate 11. A groove 131 is provided on the surface of one side away from the array substrate 11, and the groove 131 is located between adjacent light-emitting functional parts 1221. The edge height of the groove 131 away from the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11; the planarization layer 14 is arranged on the side of the protective structure 13 away from the array substrate 11, and at least part of the planarization layer 14 is arranged in the groove 131, the orthographic projection area of the groove 131 on the array substrate 11 is smaller than the orthographic projection area of the planarization layer 14 on the array substrate 11, and the surface height of the planarization layer 14 away from the array substrate 11 in the direction perpendicular to the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11. The protective structure 13 in the above-mentioned display panel 10 is provided with a groove 131 on the surface away from the array substrate 11, and the distance between the edge of the groove 131 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11 is greater than the distance between the surface of the light-emitting functional layer 122 away from the array substrate 11 and the surface of the protective structure 13 close to the array substrate 11. This design structure is that during the preparation process of the display panel 10, a portion of the sacrificial layer 17 is etched before and after the heat treatment of the planarization layer 14, so that during the heat treatment process of the planarization layer 14, a portion of the sacrificial layer 17 will shield or block the water, oxygen or organic matter released by the planarization layer 14 from directly contaminating the OLED layer, thereby solving the problem of pixel failure of the display panel 10 and improving the display effect of the display panel 10.
[0089] In one embodiment, see Figure 3 As shown, the planarization layer 14 in the display panel 10 includes a first planar structure 141 and a second planar structure 142, and the first planar structure 141 and the second planar structure 142 are an integrated structure; the orthographic projection of the first planar structure 141 on the array substrate 11 coincides with the orthographic projection of the groove 131 on the array substrate 11, and the orthographic projection of the first planar structure 141 on the array substrate 11 is located within the orthographic projection of the second planar structure 142 on the array substrate 11.
[0090] The orthographic projection of the planarization layer 14 in the display panel 10 on the array substrate 11 may be a mesh structure, including a first planar structure 141 and a second planar structure 142. In the embodiment of the present application, the first planar structure 141 and the second planar structure 142 may be an integrated structure.
[0091] Optionally, the first flat structure 141 and the second flat structure 142 are made of the same material. In practical applications, the orthographic projection of the first flat structure 141 on the array substrate 11 coincides with the orthographic projection of the groove 131 on the array substrate 11, that is, the first flat structure 141 is embedded in the groove 131, and the outer wall of the first flat structure 141 is in contact with the inner wall of the groove 131.
[0092] At the same time, the orthographic projection of the first flat structure 141 on the array substrate 11 is located within the orthographic projection of the second flat structure 142 on the array substrate 11. It can also be understood that the orthographic projection area of the first flat structure 141 on the array substrate 11 is smaller than the orthographic projection area of the second flat structure 142 on the array substrate 11. In this way, the surface of the second flat structure 142 close to the array substrate 11 and the surface of the protective structure 13 away from the array substrate 11 can be more closely fitted.
[0093] In one embodiment, please continue to see Figure 3 As shown, the surface of the second flat structure 142 away from the array substrate 11 is a curved surface.
[0094] In the embodiment of the present application, the surface of the second flat structure 142 away from the array substrate 11 may be a mesh-shaped wavy surface, which is beneficial for subsequent slope climbing of the second electrode layer 123 during the manufacturing process of the display panel 10 .
[0095] In one embodiment, please continue to see Figure 3 As shown, the surface of the first planar structure 141 in the planarization layer 14 away from the array substrate 11 and the surface of the second planar structure 142 close to the array substrate 11 are located on the same plane.
[0096] Optionally, the surface of the first flat structure 141 in the flattening layer 14 away from the array substrate 11 and the surface of the second flat structure 142 close to the array substrate 11 can be approximately located on the same plane; in the embodiment of the present application, the surface of the first flat structure 141 in the flattening layer 14 away from the array substrate 11 and the surface of the second flat structure 142 close to the array substrate 11 are located on the same plane as an example for explanation.
[0097] Among them, the surface of the first flat structure 141 away from the array substrate 11 can be understood as the surface of the first flat structure 141 that is located on the same horizontal plane as the edge of the groove 131 away from the array substrate 11. In the embodiment of the present application, the horizontal plane is parallel to the plane where the array substrate 11 is located.
[0098] In this way, the planarization layer 14 formed by combining the two planar structures and the second planarization structure 142 can make the combination between the planarization layer 14 and the protection structure 13 tighter and more stable.
[0099] In one embodiment, the orthographic projection of the second planar structure 142 in the planarization layer 14 on the array substrate 11 is located within the orthographic projection of the protection structure 13 on the array substrate 11 .
[0100] Among them, the orthographic projection of the second flat structure 142 in the planarization layer 14 on the array substrate 11 can be located within the orthographic projection of the protective structure 13 on the array substrate 11, that is, the orthographic projection of the protective structure 13 on the array substrate 11 covers the orthographic projection of the second flat structure 142 on the array substrate 11, so that the surface of the second flat structure 142 close to the array substrate 11 and the surface of the protective structure 13 away from the array substrate 11 are more closely fitted, thereby improving the structural stability between the planarization layer 14 and the protective structure 13.
[0101] In one embodiment, see Figure 1 As shown, the light emitting function portion 1221 in the light emitting device layer 12 includes a light emitting unit 1221 a and an electron transport layer 1221 b stacked in a direction away from the array substrate 11 .
[0102] The light-emitting functional portion 1221 may include a light-emitting unit 1221 a and may further include at least one of an electron transport layer (ETL) 1221 b and a hole block layer (HBL).
[0103] In the embodiment of the present application, each light-emitting functional portion 1221 in the light-emitting device layer 12 may include a light-emitting unit 1221a and an electron transport layer 1221b stacked in a direction away from the array substrate 11. The light-emitting units 1221a in different light-emitting functional portions 1221 may emit light of different colors or the same color. Optionally, the material of the light-emitting unit 1221a may be an organic material, an inorganic material, or a quantum dot material.
[0104] Optionally, the material of the electron transport layer 1221 b may be an organic material (such as a heteroaromatic compound) or an inorganic material (such as zinc oxide, titanium dioxide, etc.) with high electron transport properties. Of course, it may also be an organic metal complex, etc.
[0105] In one embodiment, the light-emitting functional portion 1221 in the light-emitting device layer 12 is a light-emitting unit 1221 a and an electron transport layer 1221 b stacked in a direction away from the array substrate 11 .
[0106] In one embodiment, a side surface of the light emitting unit 1221 a is in contact with at least a portion of a side surface of the protection structure 13 , and a side surface of the electron transport layer 1221 b is in contact with at least a portion of a side surface of the protection structure 13 .
[0107] Among them, the side of the light-emitting unit 1221a is arranged in contact with at least part of the side of the protective structure 13, and the side of the electron transport layer 1221b is arranged in contact with at least part of the side of the protective structure 13. It can be understood that the side of the light-emitting unit 1221a and the side of the electron transport layer 1221b are approximately on the same vertical plane, which is a plane perpendicular to the array substrate 11.
[0108] In one embodiment, the orthographic projection of the light emitting unit 1221 a on the array substrate 11 overlaps with the orthographic projection of the electron transport layer 1221 b on the array substrate 11 .
[0109] Optionally, the orthographic projection of the light-emitting unit 1221a on the array substrate 11 overlaps with the orthographic projection of the electron transport layer 1221b on the array substrate 11. It can be understood that the orthographic projection area of the light-emitting unit 1221a on the array substrate 11 is equal to the orthographic projection area of the electron transport layer 1221b on the array substrate 11, the orthographic projection area of the light-emitting unit 1221a on the array substrate 11 is slightly smaller than the orthographic projection area of the electron transport layer 1221b on the array substrate 11, or the orthographic projection area of the light-emitting unit 1221a on the array substrate 11 is slightly larger than the orthographic projection area of the electron transport layer 1221b on the array substrate 11.
[0110] In one embodiment, please continue to see Figure 1 As shown, the light emitting device layer 12 further includes a common layer 15 , which is disposed on a side of the light emitting functional layer 122 , the planarization layer 14 and at least a portion of the protection structure 13 away from the array substrate 11 .
[0111] The common layer 15 in the light-emitting device layer 12 can be referred to as an OLED common layer, an OLED common layer, or an electron injection layer. Alternatively, the material of the common layer 15 can be an alkali metal compound, an alkali metal fluoride, an organometallic complex, and / or an organic small molecule with a specific structure. In practical applications, the common layer 15 can be disposed on a side of the light-emitting functional layer 122 and the planarization layer 14 away from the array substrate 11.
[0112] It should be noted here that please continue to refer to Figure 1 As shown, the common layer 15 may include a first common structure 151 and a second common structure 152, and the first common structure 151 and the second common structure 152 may be an integrated structure; the surface of the first common structure 151 away from the array substrate 11 and the surface of the first common structure 151 close to the array substrate 11 may both be mesh-shaped wavy surfaces, and the surface of the first common structure 151 away from the array substrate 11 is similar in shape to the surface of the second flat structure 142 away from the array substrate 11, and the surface of the first common structure 151 close to the array substrate 11 is similar in shape to the surface of the second flat structure 142 close to the array substrate 11.
[0113] Optionally, the orthographic projection of the first common structure 151 on the array substrate 11 may cover the orthographic projection of the planarization layer 14 on the array substrate 11, or the orthographic projection of the planarization layer 14 on the array substrate 11 may be located within the orthographic projection of the first common structure 151 on the array substrate 11. Simultaneously, the orthographic projection of the second common structure 152 in the common layer 15 on the array substrate 11 may cover the orthographic projection of each light-emitting functional portion 1221 on the array substrate 11, or the orthographic projection of each light-emitting functional portion 1221 on the array substrate 11 may be located within the orthographic projection of the second common structure 152 on the array substrate 11. Furthermore, the orthographic projection of the second common structure 152 on the array substrate 11 may also cover the orthographic projection of the protective structure 13 on the array substrate 11, or the orthographic projection area of the second common structure 152 on the array substrate 11 may be equal to or greater than the orthographic projection area of the protective structure 13 on the array substrate 11.
[0114] In one embodiment, the orthographic projection of the second electrode layer 123 on the array substrate 11 overlaps with the orthographic projection of the common layer 15 on the array substrate 11, and the orthographic projection of the common layer 15 on the array substrate 11 covers the orthographic projections of the light-emitting functional layer 122, the planarization layer 14 and the protective structure 13 on the array substrate 11.
[0115] Among them, the overlap of the orthographic projection of the second electrode layer 123 on the array substrate 11 and the orthographic projection of the common layer 15 on the array substrate 11 can be understood as the orthographic projection area of the second electrode layer 123 on the array substrate 11 is equal to the orthographic projection area of the common layer 15 on the array substrate 11, the orthographic projection area of the second electrode layer 123 on the array substrate 11 is slightly smaller than the orthographic projection area of the common layer 15 on the array substrate 11, or the orthographic projection area of the second electrode layer 123 on the array substrate 11 is slightly larger than the orthographic projection area of the common layer 15 on the array substrate 11.
[0116] In practical applications, please continue to refer to Figure 1 As shown, the second electrode layer 123 may include a first electrode portion 1231 and a second electrode portion 1232, and the first electrode portion 1231 and the second electrode portion 1232 may be an integrated structure; the surface of the first electrode portion 1231 away from the array substrate 11 and the surface of the first electrode portion 1231 close to the array substrate 11 may be a mesh-shaped wavy surface, the surface of the first electrode portion 1231 away from the array substrate 11 is similar in shape to the surface of the first common structure 151 away from the array substrate 11, and the surface of the first electrode portion 1231 close to the array substrate 11 is similar in shape to the surface of the first common structure 151 close to the array substrate 11.
[0117] Optionally, the orthographic projection of the first electrode portion 1231 on the array substrate 11 may overlap the orthographic projection of the first common structure 151 on the array substrate 11, or the orthographic projection of the first common structure 151 on the array substrate 11 may be located within the orthographic projection of the first electrode portion 1231 on the array substrate 11. Simultaneously, the orthographic projection of the second electrode portion 1232 in the second electrode layer 123 on the array substrate 11 may overlap the orthographic projection of the second common structure 152 on the array substrate 11, or the orthographic projection of the second common structure 152 on the array substrate 11 may be located within the orthographic projection of the second electrode portion 1232 on the array substrate 11. Furthermore, the orthographic projection of the second electrode portion 1232 on the array substrate 11 may also overlap the orthographic projection of the protection structure 13 on the array substrate 11, or the orthographic projection area of the second electrode portion 1232 on the array substrate 11 may be larger than the orthographic projection area of the protection structure 13 on the array substrate 11.
[0118] In one embodiment, see Figure 1 As shown, the display panel 10 further includes: an encapsulation layer 16 ; the encapsulation layer 16 is arranged on a side of the second electrode layer 123 away from the array substrate 11 , and the orthographic projection of the encapsulation layer 16 on the array substrate 11 overlaps with the orthographic projection of the second electrode layer 123 on the array substrate 11 .
[0119] Among them, the material of the encapsulation layer 16 in the display panel 10 can be an inorganic material (such as silicon nitride, aluminum oxide, etc.), an organic material (such as polyimide, cycloolefin polymer, etc.) or an organic-inorganic composite material (such as coating an organic material such as polyimide on an inorganic film such as silicon nitride or aluminum oxide, or using an organic-inorganic hybrid sol-gel material, etc.).
[0120] Optionally, the overlap of the orthographic projection of the encapsulation layer 16 on the array substrate 11 and the orthographic projection of the second electrode layer 123 on the array substrate 11 can be understood as the orthographic projection area of the encapsulation layer 16 on the array substrate 11 is equal to the orthographic projection area of the second electrode layer 123 on the array substrate 11, the orthographic projection area of the encapsulation layer 16 on the array substrate 11 is slightly smaller than the orthographic projection area of the second electrode layer 123 on the array substrate 11, or the orthographic projection area of the encapsulation layer 16 on the array substrate 11 is slightly larger than the orthographic projection area of the second electrode layer 123 on the array substrate 11.
[0121] In the meantime, please continue to see Figure 1 As shown, the encapsulation layer 16 may include a first encapsulation portion 161 and a second encapsulation portion 162, and the first encapsulation portion 161 and the second encapsulation portion 162 may be an integrated structure; the surface of the first encapsulation portion 161 close to the array substrate 11 may be a mesh-shaped wavy surface, and is similar in shape to the surface of the first electrode portion 1231 close to the array substrate 11 and the surface of the second flat structure 142 close to the array substrate 11.
[0122] Optionally, the orthographic projection of the first encapsulation portion 161 on the array substrate 11 may overlap the orthographic projection of the first electrode portion 1231 on the array substrate 11, or the orthographic projection of the first electrode portion 1231 on the array substrate 11 may be located within the orthographic projection of the first encapsulation portion 161 on the array substrate 11. Simultaneously, the orthographic projection of the second encapsulation portion 162 in the encapsulation layer 16 on the array substrate 11 may overlap the orthographic projection of the second electrode portion 1232 on the array substrate 11, or the orthographic projection of the second electrode portion 1232 on the array substrate 11 may be located within the orthographic projection of the second encapsulation portion 162 on the array substrate 11. Furthermore, the orthographic projection of the second encapsulation portion 162 on the array substrate 11 may also overlap the orthographic projection of the protection structure 13 on the array substrate 11, or the orthographic projection area of the second encapsulation portion 162 on the array substrate 11 may be greater than the orthographic projection area of the protection structure 13 on the array substrate 11.
[0123] In this way, the encapsulation layer 16 in the display panel 10 can effectively reduce the impact of external impact on the internal components of the display panel 10, reduce the probability of failures such as cracking and disconnection of the display panel 10, and can effectively isolate the external environment, ensuring that the internal components of the display panel 10 are always in a dry and clean environment, preventing the probability of damage to the internal components, and improving the service life of the display panel 10.
[0124] See Figure 4 One embodiment of the present application provides a method for manufacturing a display panel 10, the method comprising:
[0125] S100 , providing an array substrate 11 .
[0126] S200, forming a light-emitting device layer 12 on one side of the array substrate 11; the light-emitting device layer 12 includes a first electrode layer 121, a light-emitting functional layer 122 and a second electrode layer 123, the light-emitting functional layer 122 is located on the side of the first electrode layer 121 away from the array substrate 11, and the second electrode layer 123 is located on the side of the light-emitting functional layer 122 away from the array substrate 11; the light-emitting functional layer 122 includes a plurality of light-emitting functional parts 1221, and the light-emitting functional parts 1221 are arranged at intervals.
[0127] Among them, forming the light-emitting device layer 12 on one side of the array substrate 11 can be understood as forming a first electrode layer 121 on one side of the array substrate 11, forming a light-emitting functional layer 122 on the side of the first electrode layer 121 away from the array substrate 11, and forming a second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11.
[0128] S300, forming a protective structure 13 on one side of the array substrate 11; the protective structure 13 is located between adjacent light-emitting functional parts 1221, and a groove 131 is provided on the surface of the side away from the array substrate 11, and the groove 131 is located between adjacent light-emitting functional parts 1221; the edge height of the groove 131 away from the array substrate 11 is greater than the surface height of the light-emitting functional layer 122 away from the array substrate 11.
[0129] S400. A planarization layer 14 is formed on a side of the protective structure 13 away from the array substrate 11; at least a portion of the planarization layer 14 is disposed in the groove 131, and the orthographic projection area of the groove 131 on the array substrate 11 is smaller than the orthographic projection area of the planarization layer 14 on the array substrate 11; and in a direction perpendicular to the array substrate 11, a surface height of the planarization layer 14 on a side away from the array substrate 11 is greater than a surface height of the light-emitting functional layer 122 on a side away from the array substrate 11.
[0130] It should be noted that, during the execution of the above-mentioned process S200, the above-mentioned processes S300-S400 are executed, that is, the above-mentioned steps S300-S400 are executed before the process of forming the second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11. Figure 5 FIG. 1 is a partial structural diagram of the display panel 10 before a process of forming the second electrode layer 123 on the side of the light-emitting functional layer 122 away from the array substrate 11 is performed.
[0131] In the embodiment of the present application, the groove 131 set on the surface of the protective structure 13 of the display panel 10 on the side away from the array substrate 11 has a smaller orthographic projection area on the array substrate 11 than the orthographic projection area of the planarization layer 14 on the array substrate 11. This can make the flattening layer 14 and the protective structure 13 more tightly fitted, and reduce the gap between the flattening layer 14 and the protective structure 13. On this basis, during the preparation process of the display panel 10, it can prevent water, oxygen or organic matter released during the heat treatment of the planarization layer 14 from penetrating into the OLED layer in the display panel 10 through the gap to increase the contamination level of the OLED layer, thereby avoiding pixel failure in the display panel 10 as much as possible and improving the display effect of the display panel 10.
[0132] In one embodiment, Figure 6 As shown, before performing the step in S400, the preparation method may further include the following steps:
[0133] S500 , forming a sacrificial layer 17 on a side of the light emitting functional layer 122 away from the array substrate 11 .
[0134] In the embodiment of the present application, the sacrificial layer 17 may be referred to as a mask layer and may be a film having high resistance to etching, such as a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, or other inorganic film. The sacrificial layer 17 may be prepared by sputtering, evaporation, chemical vapor deposition, atomic layer deposition, or the like.
[0135] Optionally, the material of the sacrificial layer 17 can be a metal (such as gold, silver, platinum, magnesium, nickel, tungsten, etc.), a metal oxide (such as indium gallium zinc oxide, indium zinc oxide, indium oxide, etc.), an alloy material containing a metal material, or an inorganic insulating material (such as aluminum oxide, hafnium oxide, silicon oxide, etc.), etc.
[0136] In practical applications, a sacrificial portion may be formed on the side of the light emitting functional layer 122 away from the array substrate 11. In this way, the formed sacrificial layer 17 can act as a buffer to protect the formed light emitting functional layer 122 from damage during subsequent processes.
[0137] It should be noted that the process in S500 can be performed after forming the first electrode layer 121 on one side of the array substrate 11 and forming the light-emitting functional layer 122 on the side of the first electrode layer 121 away from the array substrate 11. Figure 7 FIG. 5 shows a structure generated after the process in S500 is executed.
[0138] S600 , forming a protection layer 18 on a side of the sacrificial layer 17 away from the array substrate 11 .
[0139] In the embodiment of the present application, forming the protective layer 18 on the side of the sacrificial layer 17 away from the array substrate 11 can be understood as forming the protective layer 18 on the side of the sacrificial layer 17 away from the array substrate 11 and on a part of the side of the array substrate 11. The protective layer 18 here can be called a full-surface protection structure. Figure 8 FIG. 1 shows a structure diagram generated after the process in S600 is executed.
[0140] S700 , forming a first planarization layer 19 on a side of the protection layer 18 away from the array substrate 11 .
[0141] Specifically, a first planarization layer 19 may be formed on the side of the protective layer 18 away from the array substrate 11, so as to further form the planarization layer 14 in the display panel 10 based on the first planarization layer 19. The first planarization layer 19 here may be referred to as a full-surface planarization layer. Figure 9 FIG. 1 shows a structure diagram generated after the process in S700 is executed.
[0142] Among them, the surface of the first planarization layer 19 away from the array substrate 11 can be higher than the surface of the protective layer 18 away from the array substrate 11, that is, the spacing distance between the surface of the first planarization layer 19 away from the array substrate 11 and the surface of the protective layer 18 away from the array substrate 11 is greater than 0.
[0143] The technical solution in the embodiment of the present application forms a sacrificial layer 17 on the side of the light-emitting functional layer 122 away from the array substrate 11, and forms a protective layer 18 on the side of the sacrificial layer 17 away from the array substrate 11, and then forms a first planarization layer 19 on the side of the protective layer 18 away from the array substrate 11; the above method can form the first planarization layer 19 in the preparation order to provide a basis for preparing the planarization layer 14 in the display panel 10.
[0144] In one embodiment, the sacrificial layer 17 includes a first sacrificial portion 171 and a second sacrificial portion 172 sequentially stacked in a direction away from the array substrate 11; Figure 10 As shown, the step of forming the planarization layer 14 on the side of the protection structure 13 away from the array substrate 11 in the above S400 may include:
[0145] S410 , etching the first planarization layer 19 to form a second planarization layer 20 ; the surface height of the second planarization layer 20 away from the array substrate 11 is smaller than the surface height of the sacrificial layer 17 away from the array substrate 11 .
[0146] In the embodiment of the present application, the sacrificial layer 17 may include a first sacrificial portion 171 and a second sacrificial portion 172 stacked in a direction away from the array substrate 11. Optionally, the thickness or height of the first sacrificial portion 171 in the target direction may be smaller than the thickness or height of the second sacrificial portion 172 in the target direction.
[0147] Specifically, the first planarization layer 19 may be etched by dry etching to form the second planarization layer 20. In the embodiment of the present application, the first planarization layer 19 may be etched by wet etching to form the second planarization layer 20. Figure 11 The structure diagram generated after the process in S410 is executed is shown. The etching solution used in the wet etching method can be a hydrofluoric acid solution, a hot phosphoric acid solution, aqua regia, oxalic acid, an iron oxide solution, etc.
[0148] Among them, the surface height of the second planarization layer 20 on the side away from the array substrate 11 is less than the surface height of the sacrificial layer 17 on the side away from the array substrate 11. It can be understood that the spacing distance between the surface of the second planarization layer 20 on the side away from the array substrate 11 and the surface of the first electrode layer 121 on the side away from the array substrate 11 is greater than the spacing distance between the surface of the sacrificial layer 17 on the side away from the array substrate 11 and the surface of the first electrode layer 121 on the side away from the array substrate 11.
[0149] S420 , etching the protection layer 18 to expose the sacrificial layer 17 and form a protection structure 13 ; the surface of the protection structure 13 away from the array substrate 11 and the surface of the sacrificial layer 17 away from the array substrate 11 are located on the same plane.
[0150] Specifically, dry etching can be used to etch the protective layer 18 to expose the sacrificial layer 17 and form the protective structure 13. The edge of the protective structure 13 away from the array substrate 11 and the edge of the sacrificial layer 17 away from the array substrate 11 are approximately located on the same plane. In addition, the edge of the protective structure 13 away from the array substrate 11 can be lower than the side surface of the second planarization layer 20 away from the array substrate 11.
[0151] In the embodiment of the present application, the protective layer 18 can be etched by wet etching to expose the sacrificial layer 17 and form the protective structure 13. Figure 12The structure diagram after executing the process in S420 is shown. Leaking of the sacrificial layer 17 can be understood as leaking the surface of the second sacrificial portion 172 of the sacrificial layer 17 away from the array substrate 11. Optionally, after executing the process in S420, the surface of the protective structure 13 away from the array substrate 11 and the surface of the sacrificial layer 17 away from the array substrate 11 can be approximately on the same plane.
[0152] S430 , etching the second sacrificial portion 172 in the sacrificial layer 17 to form the first sacrificial portion 171 in the sacrificial layer 17 ; the surface height of the second planarization layer 20 away from the array substrate 11 is greater than the surface height of the first sacrificial portion 171 away from the array substrate 11 .
[0153] Specifically, the second sacrificial portion 172 in the sacrificial layer 17 may be etched by dry etching to form the first sacrificial portion 171 in the sacrificial layer 17. In the embodiment of the present application, the second sacrificial portion 172 in the sacrificial layer 17 may be etched by wet etching to form the first sacrificial portion 171 in the sacrificial layer 17. Figure 13 FIG. 4 is a diagram showing a structure generated after the process in S430 is executed.
[0154] Optionally, the height of the side surface of the second planarization layer 20 away from the array substrate 11 is greater than the height of the side surface of the first sacrificial portion 171 away from the array substrate 11. It can be understood that the spacing distance between the side surface of the second planarization layer 20 away from the array substrate 11 and the side surface of the first electrode layer 121 away from the array substrate 11 is greater than the spacing distance between the side surface of the first sacrificial portion 171 away from the array substrate 11 and the side surface of the first electrode layer 121 away from the array substrate 11.
[0155] It should be noted that the first sacrificial portion 171 and the second sacrificial portion 172 of the sacrificial element 17 are an integrated structure. Accordingly, during the manufacturing process of the sacrificial element 17, the first sacrificial portion 171 and the second sacrificial portion 172 of the sacrificial element 17 are formed simultaneously. The first sacrificial portion 171 and the second sacrificial portion 172 are made of the same material.
[0156] S440 , heat-treating the second planarization layer 20 to form a planarization layer 14 ; a surface of the planarization layer 14 away from the array substrate 11 is a curved surface.
[0157] It should be noted that the heat treatment of the second planarization layer 20 can be understood as the heat treatment of all the layers formed by the above process, so that the second planarization layer 20 forms the planarization layer 14. In the embodiment of the present application, the surface of the second planarization layer 20 away from the array substrate 11 can be a mesh-shaped flat surface, and the surface of the planarization layer 14 away from the array substrate 11 can be a mesh-shaped wavy curved surface. Figure 14FIG. 4 is a diagram showing a structure generated after the process in S440 is executed.
[0158] In one embodiment, in order to subsequently fabricate the common layer 15, the second electrode layer 123, and the encapsulation layer 16 in the display panel 10, it is necessary to expose the electron transport layer 1221b in each light-emitting functional portion 1221. The following describes a process for exposing the electron transport layer 1221b in each light-emitting functional portion 1221. In one embodiment, after performing the step S440 above, the fabrication method may further include: etching the first sacrificial portion 171 in the sacrificial layer 17 while forming the planarization layer 14, so as to expose each light-emitting functional portion 1221.
[0159] In practical applications, after forming the planarization layer 14, the first sacrificial portion 171 in the sacrificial layer 17 may be etched by dry etching to expose each light-emitting functional portion 1221. In the embodiment of the present application, the first sacrificial portion 171 in the sacrificial layer 17 may be etched by wet etching to expose each light-emitting functional portion 1221. Figure 15 The figure shows the structure produced after the process is completed.
[0160] In one embodiment, when each light emitting functional portion 1221 is leaked, Figure 16 As shown, the above preparation method may further include the following process:
[0161] S450 , forming a common layer 15 on the side of the light-emitting functional layer 122 , the planarization layer 14 , and at least a portion of the protection structure 13 away from the array substrate 11 .
[0162] S460 , forming a second electrode layer 123 on a side of the common layer 15 away from the array substrate 11 .
[0163] S470 , forming an encapsulation layer 16 on a side of the second electrode layer 123 away from the array substrate 11 .
[0164] The technical solution in the embodiment of the present application is to etch the first planarization layer 19 to form the second planarization layer 20, etch the protective layer 18 to expose the sacrificial layer 17 and form the protective structure 13, etch the second sacrificial portion 172 in the sacrificial layer 17 to form the first sacrificial portion 171 in the sacrificial layer 17, and heat-treat the second planarization layer 20 to form the planarization layer 14; the above preparation method etches a portion of the sacrificial layer 17 before heat-treating the second planarization layer 20, so that the remaining portion of the sacrificial layer 17 can shield or block the water, oxygen or organic matter released by the planarization layer during the heat treatment process, which will directly contaminate the OLED layer.
[0165] An embodiment of the present application further provides a display device, comprising the display panel 10 in any of the above embodiments.
[0166] The display device can be a laptop computer, a mobile phone, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc.
[0167] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.
Claims
1. A display panel, characterized in that: include: an array substrate; a light-emitting device layer disposed on one side of the array substrate; the light-emitting device layer comprising a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer being located on a side of the first electrode layer away from the array substrate, and the second electrode layer being located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer comprising a plurality of light-emitting functional portions, each of which being arranged at intervals; A protective structure is provided on one side of the array substrate and is located between adjacent light-emitting functional portions; a groove is provided on a surface of the protective structure on a side away from the array substrate, the groove being located between adjacent light-emitting functional portions; an edge height of the groove on the side away from the array substrate is greater than a surface height of the light-emitting functional layer on the side away from the array substrate; A planarization layer is arranged on a side of the protective structure away from the array substrate; and at least a portion of the planarization layer is arranged in the groove, the orthographic projection area of the groove on the array substrate is smaller than the orthographic projection area of the planarization layer on the array substrate, and the surface height of the planarization layer on the side away from the array substrate in a direction perpendicular to the array substrate is greater than the surface height of the light-emitting functional layer on the side away from the array substrate.
2. The display panel according to claim 1, wherein: The planarization layer includes a first planar structure and a second planar structure, and the first planar structure and the second planar structure are an integrated structure; the orthographic projection of the first planar structure on the array substrate coincides with the orthographic projection of the groove on the array substrate, and the orthographic projection of the first planar structure on the array substrate is located within the orthographic projection of the second planar structure on the array substrate.
3. The display panel according to claim 2, wherein: A surface of the second flat structure away from the array substrate is a curved surface.
4. The display panel according to claim 3, wherein: The orthographic projection of the second flat structure on the array substrate is located within the orthographic projection of the protection structure on the array substrate; Optionally, the second flat structure is in overlapping contact with the protective structure.
5. The display panel according to any one of claims 2 to 4, characterized in that: A surface of the first flat structure away from the array substrate and a surface of the second flat structure close to the array substrate are located on the same plane.
6. The display panel according to any one of claims 1 to 4, characterized in that: The light-emitting functional portion includes a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate; Optionally, the light-emitting functional portion is a light-emitting unit and an electron transport layer stacked in a direction away from the array substrate.
7. The display panel according to claim 6, wherein: The side surface of the light-emitting unit is in contact with at least a portion of the side surface of the protective structure, and the side surface of the electron transport layer is in contact with at least a portion of the side surface of the protective structure.
8. The display panel according to claim 7, wherein: An orthographic projection of the light emitting unit on the array substrate overlaps with an orthographic projection of the electron transport layer on the array substrate.
9. The display panel according to any one of claims 1 to 4, characterized in that: The light-emitting device layer further includes a common layer, which is disposed on a side of the light-emitting functional layer, the planarization layer, and at least a portion of the protection structure away from the array substrate; Optionally, the orthographic projection of the second electrode layer on the array substrate overlaps with the orthographic projection of the common layer on the array substrate, and the orthographic projection of the common layer on the array substrate covers the orthographic projections of the light-emitting functional layer, the planarization layer and the protective structure on the array substrate.
10. The display panel according to any one of claims 1 to 4, characterized in that: The display panel further includes: The encapsulation layer is arranged on a side of the second electrode layer away from the array substrate; the orthographic projection of the encapsulation layer on the array substrate overlaps with the orthographic projection of the second electrode layer on the array substrate.
11. A method for preparing a display panel, characterized in that: The method comprises: providing an array substrate; A light-emitting device layer is formed on one side of the array substrate; the light-emitting device layer includes a first electrode layer, a light-emitting functional layer, and a second electrode layer, the light-emitting functional layer is located on a side of the first electrode layer away from the array substrate, and the second electrode layer is located on a side of the light-emitting functional layer away from the array substrate; the light-emitting functional layer includes a plurality of light-emitting functional portions, and the light-emitting functional portions are arranged at intervals; A protective structure is formed on one side of the array substrate; the protective structure is located between adjacent light-emitting functional portions, and a groove is provided on a surface of a side away from the array substrate, the groove being located between adjacent light-emitting functional portions; an edge height of the groove away from the array substrate is greater than a surface height of the light-emitting functional layer away from the array substrate; A planarization layer is formed on the side of the protective structure away from the array substrate; at least a portion of the planarization layer is arranged in the groove, the orthographic projection area of the groove on the array substrate is smaller than the orthographic projection area of the planarization layer on the array substrate, and the surface height of the planarization layer on the side away from the array substrate in the direction perpendicular to the array substrate is greater than the surface height of the light-emitting functional layer on the side away from the array substrate.
12. The method according to claim 11, characterized in that Before forming the planarization layer on the side of the protection structure away from the array substrate, the method further includes: forming a sacrificial layer on a side of the light-emitting functional layer away from the array substrate; forming a protective layer on a side of the sacrificial layer away from the array substrate; A first planarization layer is formed on a side of the protection layer away from the array substrate.
13. The method according to claim 12, characterized in that The sacrificial layer includes a first sacrificial portion and a second sacrificial portion stacked in sequence in a direction away from the array substrate; the planarization layer is formed on a side of the protection structure away from the array substrate, comprising: Etching the first planarization layer to form a second planarization layer; wherein a surface height of the second planarization layer on a side away from the array substrate is smaller than a surface height of the sacrificial layer on a side away from the array substrate; The protective layer is etched to expose the sacrificial layer and form the protective structure; the surface of the protective structure away from the array substrate and the surface of the sacrificial layer away from the array substrate are located on the same plane; The second sacrificial portion in the sacrificial layer is etched to form a first sacrificial portion in the sacrificial layer; the height of the surface of the second planarization layer on the side away from the array substrate is greater than the height of the surface of the first sacrificial portion on the side away from the array substrate; The second planarization layer is subjected to heat treatment to form the planarization layer, wherein a surface of the planarization layer away from the array substrate is a curved surface.
14. The method according to any one of claims 11 to 13, characterized in that The method further comprises: When the planarization layer is formed, the first sacrificial portion in the sacrificial layer is etched to expose the light-emitting functional layer.
15. A display device, characterized in that: The device comprises a display panel according to any one of claims 1 to 10.