Task distribution method, electronic equipment and storage medium

Abstract

The invention relates to the technical field of chip design, in particular to a task distribution method, electronic equipment and a storage medium, N pipelines are obtained, each pipeline comprises an arbiter, the arbiter comprises a first input channel and a second input channel, and the output of the arbiter is connected with a computing unit; wherein the first input channels of the N pipelines are sequentially connected to form a first input channel chain, and the second input channels of the N pipelines are sequentially connected to form a second input channel chain; the second input channel chain further comprises a cache unit; sequentially inputting the tasks in the task group WGi of the ith user into the first input channel chain, and distributing the tasks to the matched calculation units, namely distributing the tasks when the tasks are matched with the calculation units in the first input channel chain, and otherwise, storing the tasks into a cache unit; and the tasks in the cache unit are input into the second input channel chain to be matched again, so that the task does not need to be distributed after the previous task is distributed, and the task distribution speed is increased.

Description

Technical Field

[0001] The present invention relates to the field of chip design technology, and in particular to a task distribution method, electronic equipment and storage medium. Background Art

[0002] In the field of chip design, the task allocation mechanism is crucial to improving the overall performance of the system. The common task allocation method is that all users queue up and wait in turn for the allocation of computing units. The specific allocation mechanism is to screen out the computing units that meet the current task conditions from all computing units, and then assign the task to the unit for processing. Among them, the current task conditions are the requirements of the current task on the computing unit. The conditions may vary from task to task. For example, the current task conditions may be that the computing power of the computing unit must match the computational complexity of the task, or that the storage capacity of the computing unit must be able to meet the data storage requirements during the task operation. If the task generates a large amount of intermediate data, the computing unit needs to have sufficient cache unit space.

[0003] The above allocation mechanism has the following drawbacks: because all users are waiting in a queue, each task assignment requires traversing all computing units in turn to find an object that meets the requirements. This process involves a large amount of judgment and screening operations, resulting in extremely slow task allocation. Therefore, an efficient task distribution method is urgently needed. Summary of the Invention

[0004] In order to solve the above technical problems, the present invention adopts a technical solution: a task distribution method, which includes the following steps: S100. Obtain N pipelines, each pipeline including an arbiter, the arbiter including a first input channel and a second input channel, and the output of the arbiter connected to a computing unit; wherein the first input channels of the N pipelines are sequentially connected to form a first input channel chain, and the second input channels of the N pipelines are sequentially connected to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being used to store unassigned tasks from the first input channel chain or the second input channel chain.

[0005] S200, obtaining the task group WG of the i-th user i , the WG i It includes M tasks of the i-th user, where i and M are both greater than or equal to 1.

[0006] S300, the WG i The tasks in the first input channel chain are sequentially input to distribute the tasks to the matching computing units; wherein the WG i The jth task i,j The matching steps, where 1≤j≤M, include: S310, the task i,j Arrives at the rth computing unit AP through the first input channel chain r When the first input channel is r and task i,j Whether the requirements are matched, if so, the task i,j Distribute to AP r ; If not, the task i,j Continue along the first input channel chain to reach AP r+1 .

[0007] S320: When the N first input channels all fail to match, the task i,j The tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

[0008] In addition, the present invention also provides a non-transitory computer-readable storage medium, which stores at least one instruction or at least one program, and the at least one instruction or at least one program is loaded and executed by a processor to implement the above method.

[0009] In addition, the present invention also provides an electronic device including a processor and the above-mentioned non-transitory computer-readable storage medium.

[0010] The present invention has at least the following beneficial effects: Embodiments of the present invention provide a task distribution method, electronic device, and storage medium. These methods utilize a first input channel chain, a second input channel chain, and a cache unit. Tasks are distributed when they match a computing unit in the first input channel chain; otherwise, they are stored in the cache unit. Tasks in the cache unit are then input into the second input channel chain for further matching. This coordination eliminates the need to wait for a previous task to be distributed before distributing them, thereby improving task distribution speed. Furthermore, task distribution eliminates the need to select a single computing unit from all available units for distribution each time. Instead, tasks are matched one by one, reducing the computational complexity of the matching process. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0012] Figure 1 A flow chart of a task distribution method provided by an embodiment of the present invention; Figure 2 WG provided by the embodiment of the present invention i The jth task i,j Flowchart of matching steps; Figure 3 A schematic diagram of the structure of N pipelines provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0013] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.

[0014] Unless otherwise defined, all technical and scientific terms used in the embodiments of the present invention have the same meanings as commonly understood by those skilled in the art.

[0015] See also Figure 1 , which shows a flow chart of a task distribution method, the method comprising the following steps: S100. Obtain N pipelines, each pipeline including an arbiter, the arbiter including a first input channel and a second input channel, and the output of the arbiter connected to a computing unit; wherein the first input channels of the N pipelines are sequentially connected to form a first input channel chain, and the second input channels of the N pipelines are sequentially connected to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being used to store unassigned tasks from the first input channel chain or the second input channel chain.

[0016] See also Figure 3 , which shows a schematic diagram of the structure of N pipelines. The figure includes N pipelines. The arbiter in each pipeline includes two input channels: the first input channel and the second input channel. The output of the arbiter is directly connected to an independent computing unit. Among them, the arbiter ARB in the rth pipeline r Includes two input channels: the first input channel LC r and the second input channel HC r , ARB r The output of the rth computing unit AP is directly connected r , where r ranges from 1 to N. The first input channel chain includes {LC1, LC2, ..., LC r ,…,LC N}, the input of the first input channel chain is the task group input by the user, for example, the input of the first input channel chain is the task group WG of the i-th user iWhen a task does not find a matching computing unit in the first input channel chain, it is temporarily stored in the cache unit MEM. The task stored in the cache unit MEM is the input of the second input channel chain. The second input channel chain is connected in sequence {HC1, HC2, ..., HC r ,…,HC N ,MEM}, where the input of MEM is the task of the computing unit that has no matching found in the first input channel chain and the second input channel chain, and the output of MEM is connected to HC1 of the second input channel chain.

[0017] The cache unit is used to store the task data generated by P users. In one embodiment, the cache unit is a first-in-first-out queue, and the capacity of the queue is the capacity of P tasks.

[0018] In one embodiment, a computing unit can only process one task at a time. When a computing unit connected to an arbitrator matches the tasks of the first input channel and the second input channel at the same time, since the tasks in the second input channel are tasks that have not been matched after passing through the first input channel chain and are stored in the cache unit for waiting, in order to avoid various factors such as timeout, the tasks in the second input channel should be allocated first. Therefore, in one embodiment, the arbitrator does not authorize the first input channel and the second input channel to distribute tasks to the computing unit at the same time, and the arbitration priority of the second input channel is higher than that of the first input channel. Other types of arbitration strategies also fall within the scope of protection of the present invention.

[0019] S200, obtaining the task group WG of the i-th user i , the WG i It includes M tasks of the i-th user, where i and M are both greater than or equal to 1.

[0020] In one embodiment, the task is a thread.

[0021] S300, the WG i The tasks in are sequentially input into the first input channel chain, and the tasks are distributed to the matching computing units.

[0022] It should be noted that, under the action of the clock, tasks in the first input channel chain and the second channel chain are cyclically moved to the next pipeline in each clock cycle. When a task enters the second channel chain from the first input channel chain, it is first queued in the cache unit of the second channel chain.

[0023] Among them, see Figure 2 , the WG i The jth task i,j The matching steps, where 1≤j≤M, include: S310, the task i,j Arrives at the rth computing unit AP through the first input channel chain r When the first input channel is r and task i,j Whether the requirements are matched, if so, the task i,j Distribute to AP r ; If not, the task i,j Continue along the first input channel chain to reach AP r+1 .

[0024] Each task must be matched sequentially with each computing unit on the first input channel chain, starting from AP1. When the first successfully matched computing unit is found, the current task is distributed to the first matched computing unit. In the prior art, where all users queue up and wait for the assignment of computing units, each task distribution requires checking the conditions of all computing units and selecting one to distribute the task, resulting in complex calculations and long waiting times. However, the present invention only requires sequential matching when distributing tasks, and only distributes the task if a match is successful, without the need to check all computing units. This reduces the computational complexity of the matching process and enables rapid task distribution.

[0025] In one embodiment, in S310, the task i,j Requirements include AP r The status is available, and when the task i,j Distribute to AP r AP r The status is configured to be available after T clock cycles. By directly marking whether the current computing unit is available through the status, the matching efficiency of the system is further improved, thereby speeding up the distribution of tasks. In scenarios with a large amount of tasks, the task distribution process is continuous, which can achieve fast in and out of tasks and achieve the effect of an assembly line. And N computing units can realize parallel processing, which improves the processing efficiency by N times compared to the prior art solution in which all users queue up and wait for the allocation of computing units in turn. Other types of demand conditions also fall within the scope of protection of the present invention.

[0026] For example, assume that in T = 4, tasks are dispatched to AP1 in the first clock cycle, AP2 in the second, AP3 in the third, and AP4 in the fourth. In the fifth clock cycle, AP1 becomes available again, and tasks are dispatched to AP1 again. In the sixth clock cycle, AP2 becomes available again, and tasks are dispatched to AP2 again. In the seventh clock cycle, AP3 becomes available again, and tasks are dispatched to AP3 again. In the eighth clock cycle, AP4 becomes available again, and tasks are dispatched to AP4 again. In the ninth clock cycle, AP1 becomes available again, and tasks are dispatched to AP1 again. This continues in this order, creating a pipeline effect. In each clock cycle, AP1-AP4 execute their respective tasks, achieving parallel processing.

[0027] In one embodiment, T=N. Other values ​​of T also fall within the scope of protection of the present invention.

[0028] S320: When the N first input channels all fail to match, the task i,j The tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

[0029] It should be noted that in the prior art, where all users queue up and wait for a computing unit to be assigned, if no qualified computing unit is currently available, the task must be dispatched only after a suitable computing unit is released, blocking the dispatch of subsequent tasks. In this embodiment of the present invention, when a task is not dispatched on the first input channel chain, it directly enters the cache unit of the second input channel chain and continues matching through the second channel chain, eliminating the need to wait and further accelerating task dispatch.

[0030] In one embodiment, S320 further includes: S321, when the task i,j When the N second input channels in the second input channel chain all fail to match, the task i,j The undistributed tasks are stored in the cache unit again. That is, there is no need to wait in the second input channel chain. Instead, the undistributed tasks are stored in the cache unit again, ensuring that both the first input channel chain and the second input channel chain are unobstructed channels, ensuring the distribution speed of subsequent tasks, and further accelerating the distribution speed of tasks.

[0031] In one embodiment, S320 further includes: S322, when the WG i When the number of tasks entering the second input channel chain is equal to M, WG is not allowed i The task inputs the first input channel chain and allows the tth user WG tInput tasks to the first input channel chain, t≠i, to ensure that users do not interfere with each other. This method can ensure that when a user's task blocks the channel chain, other users can still distribute tasks normally, ensuring the user experience.

[0032] In summary, an embodiment of the present invention provides a task distribution method that, through the coordination of a first input channel chain, a second input channel chain, and a cache unit, distributes tasks when they match a computing unit in the first input channel chain; otherwise, they are stored in the cache unit. Tasks in the cache unit are then input into the second input channel chain for further matching. This coordination eliminates the need to wait for the previous task to be distributed before distributing tasks, thereby improving task distribution speed. Furthermore, during task distribution, there is no need to select a single computing unit from all available units for distribution each time; instead, tasks are matched one by one, reducing the computational complexity of the matching process.

[0033] An embodiment of the present invention also provides a non-transitory computer-readable storage medium, which can be set in an electronic device to store at least one instruction or at least one program related to implementing a method in a method embodiment. The at least one instruction or the at least one program is loaded and executed by the processor to implement the method provided in the above embodiment.

[0034] An embodiment of the present invention further provides an electronic device including a processor and the aforementioned non-transitory computer-readable storage medium.

[0035] An embodiment of the present invention further provides a computer program product comprising program code. When the program product is run on an electronic device, the program code is used to enable the electronic device to execute the steps of the method according to various exemplary embodiments of the present invention described above in this specification.

[0036] Those skilled in the art will clearly understand that for the sake of convenience and brevity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0037] Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A task distribution method, characterized in that: The method comprises the following steps: S100: Obtain N pipelines, each pipeline including an arbiter, the arbiter including a first input channel and a second input channel, the output of the arbiter connected to a computing unit; wherein the first input channels of the N pipelines are sequentially connected to form a first input channel chain, and the second input channels of the N pipelines are sequentially connected to form a second input channel chain; the second input channel chain also includes a cache unit, the cache unit being configured to store unassigned tasks from the first input channel chain or the second input channel chain; S200, obtaining the task group WG of the i-th user i , the WG i includes M tasks of the i-th user, where i and M are both greater than or equal to 1; S300, the WG i The tasks in the first input channel chain are sequentially input to distribute the tasks to the matching computing units; wherein the WG i The jth task i,j The matching steps, where 1≤j≤M, include: S310, the task i,j Arrives at the rth computing unit AP through the first input channel chain r When the first input channel is r and task i,j Whether the requirements are matched, if so, the task i,j Distribute to AP r ; If not, the task i,j Continue along the first input channel chain to reach AP r+1 ; S320: When the N first input channels all fail to match, the task i,j The tasks in the cache unit are distributed to the matching computing units through the second input channel chain.

2. The method according to claim 1, characterized in that The S320 also includes: S321, when the task i,j When the N second input channels in the second input channel chain all fail to match, the task i,j and storing it in the cache unit again.

3. The method according to claim 1, characterized in that The S320 also includes: S322, when the WG i When the number of tasks entering the second input channel chain is equal to M, WG is not allowed i The task inputs the first input channel chain and allows the tth user WG t Input tasks to the first input channel chain, t≠i.

4. The method according to claim 1, wherein The arbitrator does not simultaneously authorize the first input channel and the second input channel to distribute tasks to the computing unit, and the arbitration priority of the second input channel is higher than that of the first input channel.

5. The method according to claim 1, wherein In S310, the task i,j Requirements include AP r The status is available, and when the task i,j Distribute to AP r AP r The state is configured to be available after T clock cycles.

6. The method according to claim 1, characterized in that T=N.

7. The method according to claim 1, characterized in that The task is a thread.

8. The method according to claim 1, characterized in that The cache unit is a first-in-first-out queue, and the capacity of the queue is the capacity of P tasks.

9. A non-transitory computer-readable storage medium, wherein at least one instruction or at least one program is stored in the storage medium, characterized in that: The at least one instruction or the at least one program is loaded and executed by a processor to implement the method according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The device comprises a processor and the non-transitory computer-readable storage medium as claimed in claim 9.

Images