VCD file compression method based on function relation, value prediction and bit plane recombination

Abstract

The invention discloses a VCD file compression method based on a function relation, value prediction and bit plane recombination, and belongs to the field of file compression. According to the method, compression strategies are respectively designed for different parts such as the header information area, the node information area and the numerical value change area of the VCD file, so that the compression efficiency is improved. Meanwhile, by analyzing the function relation between the signals of the numerical value change area and combining the technologies of variable length coding, signal value prediction, bit plane recombination and the like, the compression rate is remarkably improved.

Description

Technical Field

[0001] The present invention relates to the technical field of file compression, and in particular to a VCD file compression method based on functional relationship, value prediction and bit plane reorganization. Background Art

[0002] With the continuous increase in integrated circuit complexity and the continuous shrinking of process nodes, efficient circuit verification has become a core challenge in semiconductor design. As an indispensable part of the verification process, logic simulation can identify potential design flaws, optimize performance indicators, and ensure compliance with functional specifications and timing constraints before tapeout by simulating circuit functions and timing behaviors. This technology builds multi-level abstract models from the gate level to the system level based on hardware description languages. Through input stimulus driving and output response monitoring, it generates digital waveforms that represent signal behavior, such as VCD files, providing a key basis for design verification and optimization.

[0003] However, with the exponential growth in the scale of integrated circuits, the storage and transmission overhead of VCD files generated by simulations has increased dramatically due to the massive amount of signal timing information they record. For example, the state transitions of multi-bit signals within a single clock cycle significantly increase file size. This problem has become a bottleneck restricting simulation efficiency, especially in ultra-large-scale circuit design.

[0004] Compression methods for VCD files can be divided into lossless compression and lossy compression. Lossy compression (such as that used in audio / video encoding or approximate computing scenarios) sacrifices data accuracy in exchange for high compression rates and is suitable for error-tolerant application scenarios. However, as the gold standard for circuit functional verification, VCD files must strictly retain signal value accuracy (including x / z uncertainty states). Therefore, although lossy schemes have high compression rates, the errors introduced are difficult to meet the requirements. In the field of lossless compression, existing schemes such as LZW encoding, Brotli algorithm, and general compression tools (zip / tar) do not fully exploit the spatiotemporal correlation of waveform data, resulting in limited compression rates. In addition, although the commercial tool FSDB supports VCD compression, its closed-source nature limits the transparency of the algorithm and customized optimization. Summary of the Invention

[0005] The present invention provides a VCD file compression method based on functional relationship, value prediction and bit plane reorganization to solve the problem that the storage and transmission of VCD files become bottlenecks as the scale of integrated circuit design continues to expand.

[0006] The first aspect of the present invention provides a VCD file compression method based on functional relationship, value prediction and bit plane reorganization, comprising the following steps:

[0007] Aiming at the structural heterogeneity of VCD files, a domain-specific compression strategy is adopted to compress the header information area, node information area, and signal change area of ​​VCD files separately. Variable-length coding is used to compress the header information area and node information area. When compressing the signal change area, a method of finding signal function relationships is used to represent partial signal and signal value information. For signals and signal values ​​that cannot be represented by signal function relationships, a value prediction method is used to increase the number of zeros in the signal values. Bit-plane reorganization technology is then used to rearrange the data in the signal values.

[0008] The compressed data obtained from the header information area, the node information area, and the signal change area are stored in a file, and then the compressed data in the file are compressed using secondary compression to obtain a compressed file of the VCD file.

[0009] Optionally, in one embodiment of the present invention, compressing the header information area includes:

[0010] The four data items in the header information area are represented by four character strings. Labels from 00 to 11 are assigned to these four data items. An 8-bit space is used to represent the order of the data items. The content of each data item is represented by recording its length and the corresponding character string data. The length is compressed as an integer list using variable-length encoding.

[0011] Optionally, in one embodiment of the present invention, compressing the node information area includes:

[0012] Node information is divided into five categories: type, bit width, identifier, name and bit width range, and processed separately;

[0013] Use 2 bits of space to store the tags of high-frequency types, and use 5 bits to store tags for other low-frequency types. It is also necessary to record the position information of uncommon types. Use type_pos to store the position information of uncommon types, and type_lst to store all types of tags.

[0014] For integer lists, variable-length coding is used for processing, using width_lst to store the bit width information of all signals. For multi-bit signals, only the left boundary value is stored, which is stored through the integer list radius_lst;

[0015] Identifiers and signal names are stored using the string lists alias_lst and name_lst.

[0016] Optionally, in one embodiment of the present invention, the variable length coding technology includes:

[0017] Leading zero removal: After converting the 32-bit integer data to binary, remove the leading zeros until the first valid 1;

[0018] Byte alignment: fill the remaining bits with zeros to a multiple of 7 to form several 7-bit data segments;

[0019] Identifier bit embedding: A 1-bit identifier is added before each segment. If the bit is 1, it indicates that the subsequent bytes belong to the same integer; if it is 0, it indicates the start of a new integer.

[0020] Optionally, in one embodiment of the present invention, compressing the signal change region specifically includes:

[0021] The numerical changes are divided into three parts for processing: simulation time point, keyword and signal value;

[0022] When processing simulation time points, we first process them according to the rules of arithmetic progression. When the difference between adjacent time points does not match the difference of arithmetic progression, we take the current time point as the beginning of a new arithmetic progression.

[0023] Process each value change block in turn, use a list to store the sequence number of the value change block where the keyword appears, and use another list to store the corresponding keyword flag;

[0024] When processing the value change blocks one by one, the signals compressed by the signal function relationship and their corresponding identifiers and signal values ​​are removed. All signal identifiers in each value change block are stored through alias_lst. In multiple value change blocks, the hash table alias_hash is used to store different alias_lst and their occurrence frequencies in the value change blocks. When traversing the value change blocks, the corresponding alias_lst is first searched in alias_hash. If found, its occurrence count is increased and the key value of the hash table is returned; if not found, the new alias_lst is added to alias_hash and its occurrence count is initialized to 1.

[0025] For signal value compression, the signal value consists of four symbols: 0, 1, x, and z. 2-bit encoding is used to represent 0 as 00, 1 as 01, x as 10, and z as 11, thus compressing the signal value that originally required 8 bits to only 2 bits for storage.

[0026] The signal value at the previous time node is stored, and then the signal value at the current time node is predicted based on the signal value, and the bit plane reconstruction technology is used to increase the ratio of consecutive 0s.

[0027] Optionally, in one embodiment of the present invention, the plane reconstruction technology includes:

[0028] The highest bit of the signal value of a signal in multiple simulation time nodes is extracted to form a string, and then the highest bit of the remaining signal value is extracted to form another string. This process is repeated until the signal values ​​at all signal bits are processed.

[0029] The VCD file compression method based on functional relationships, value prediction, and bit-plane reorganization in this embodiment of the present invention improves compression efficiency by designing compression strategies for different parts of the VCD file, such as the header information area, node information area, and value change area. Furthermore, by analyzing the functional relationships between signals in the value change area and combining techniques such as variable-length coding, signal value prediction, and bit-plane reorganization, the compression ratio is significantly improved.

[0030] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0032] Figure 1 A flowchart of a VCD file compression method based on functional relationship, value prediction and bit plane reorganization provided according to an embodiment of the present invention;

[0033] Figure 2 This is an example diagram of node information area storage according to an embodiment of the present invention;

[0034] Figure 3 Schematic diagram of the node information area storage format according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The following describes embodiments of the present invention in detail, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and are not to be construed as limiting the present invention.

[0036] During integrated circuit logic simulation, the number of simulation time nodes ranges from hundreds of thousands to hundreds of millions, and each time point may contain tens of thousands of digital signal value changes. To address the storage issues associated with the resulting large-scale digital waveform files, this paper aims to design an efficient, precision-free digital waveform compression storage format and related algorithms to significantly reduce waveform data storage overhead.

[0037] Figure 1The present invention provides a flowchart of a VCD file compression method based on functional relationship, value prediction and bit plane reorganization according to an embodiment of the present invention.

[0038] like Figure 1 As shown, the VCD file compression method based on functional relationship, value prediction and bit plane reorganization includes the following steps:

[0039] Step 1: In view of the structural heterogeneity of VCD files, a domain-specific compression strategy is used to separately compress the header information area, node information area, and signal change area of ​​the VCD file. Variable-length coding is used to compress the header information area and the node information area. When compressing the signal change area, a method of finding a signal function relationship is used to represent information about some signals and signal values. For signals and signal values ​​that cannot be represented by a signal function relationship, a value prediction method is used to increase the number of zeros in the signal values. Bit-plane reorganization technology is then used to rearrange the data in the signal values.

[0040] Step 2: Store the compressed data obtained from the header information area, the node information area, and the signal change area into a file, and then use secondary compression to compress the compressed data in the file to obtain a compressed file of the VCD file.

[0041] Since the data characteristics of the header information area, node information area, and signal change area of ​​a VCD file are significantly different, the embodiments of the present invention adopt a domain-specific compression strategy (i.e., compressing the header information area, node information area, and signal change area separately) to address the structural heterogeneity of VCD files, design optimization algorithms for each part of the data, and finally merge the outputs to maximize compression efficiency.

[0042] Since the information in the header information area and the node information area of ​​the VCD file accounts for a relatively small proportion, and the information in the signal change area accounts for about 90%, the compression method for the header information area and the node information area is relatively simple. To compress the signal change area, the present invention adopts a method of finding signal relationships to represent the information of part of the signal and the signal value, and for the signals and signal values ​​that cannot be represented by signal relationships, a value prediction method is used to increase the number of 0s in the signal value, and then a bit plane reorganization technology is used to rearrange the data in the signal value, thereby increasing the probability of continuous 0s in the signal value, making it convenient to use an integer to save the original continuous 0 situation. Finally, the data obtained by processing each information area is stored in a file, and then the obtained file is further compressed by secondary compression to obtain the final compressed file. Through the above strategy, the present invention realizes a lossless compression method for VCD files based on signal function relationship, value prediction and bit plane reorganization.

[0043] In the embodiment of the present invention, variable length coding and bit plane reorganization technology are used. These two methods can be used to process intermediate data to improve the compression rate. The core process of variable length coding is as follows:

[0044] Leading Zero Stripping: After converting a 32-bit integer to binary, leading zeros are removed until the first valid 1. Byte Alignment: Remaining bits are padded with zeros to a multiple of 7, forming multiple 7-bit data segments. Flag Bit Embedding: A flag bit is added before each segment. If it is 1, it indicates that the subsequent bytes belong to the same integer; if it is 0, it indicates the beginning of a new integer. For example, the integer value 13,320 has a binary representation of 00000000000000000011010000010000. After the above processing, it can be compressed to 2 bytes: 10101000 00010000 (flag bit in bold). This encoding scheme reduces storage overhead in most scenarios. Only when the integer value exceeds 268,435,455 (i.e., binary 0x0FFFFFFF) does the encoded data size exceed the original 32-bit length.

[0045] Next, we'll introduce bit-plane reconstruction. This involves extracting the highest bit of a signal's value across multiple simulation time points to form a string. Then, we extract the highest bit of the remaining signal value to form another string. This process repeats until all signal values ​​are processed. This increases the probability of consecutive zeros and their number.

[0046] For example, if the signal values ​​of the signal clk at three consecutive simulation times are 00000001, 00000101, and 00000011, the bit plane reconstruction technology will result in 000000000000000010001111, so that consecutive 0s can be obtained.

[0047] In an embodiment of the present invention, the header information area compression scheme is as follows: the four data items in the header information area, namely date ($date), simulator version ($version), time precision ($timescale), and comment ($comment), can be represented by four character strings. Considering that the order of these data items may be random, these four data items are assigned labels from 00 to 11, so only 8 bits of space (header_sort) are needed to represent the order of these data items. In addition, if sorting is not performed, they can also be stored in a fixed order to avoid storing keywords. The content of each data item is represented by recording its length (header_len) and the corresponding character string data (header_info). Header_len, as an integer list (int list), can be further processed using variable-length encoding to improve compression efficiency.

[0048] The specific algorithm is as follows:

[0049] Enter the header information area of ​​the .VCD file

[0050] Output. Processed file file1

[0051] Step 1. Initialize header_sort, header_len, header_info

[0052] Step 2. Process the four data items in order. If it is $date, add '00' to header_sort. If it is $version, add '01' to header_sort. If it is $timescale, add '10' to header_sort. If it is $comment, add '11' to header_sort.

[0053] Step 3. Use header_sort to store the length of each data item, and then use variable-length encoding to process header_sort

[0054] Step 4. Use header_info to store the string for each data item

[0055] Step 5. Write the above processing results into file1.

[0056] In an embodiment of the present invention, the node information area compression scheme: the node information area in the VCD file records the type and name of the range, the type, bit width, bit width range of the variable signal, and signal identifier. For example, in Figure 2 In the VCD code shown, $var indicates the start of the signal variable declaration, reg indicates that the signal is a register type, 3 indicates that the width of the signal next is 3, [2:0] indicates that its bit width ranges from bit 0 to bit 2, and next is a signal in the test_fsm1 module.

[0057] To improve compression efficiency, node information is divided into five categories: type, bit width, identifier, name, and bit width range, and processed separately. Since the types of $var and $scope can be directly inferred from the signal type, they do not need to be processed separately.

[0058] The most common signal types are module and upscope, while the most common types in the var section are wire and reg. Therefore, 2 bits can be used to store the labels of these high-frequency types (00 to 11). For the other 19 low-frequency types, 5 bits are used to store the labels. It is also necessary to record the position of these less common types, that is, the number of the signal type in the sequence of all types. To do this, type_pos can be used to store the position information of the less common types, and type_lst can be used to store the labels of all types.

[0059] For type_pos (integer list), variable-length coding can be used. Similarly, width_lst stores the bit width information of all signals, while single-bit signals omit the bit width range. Multi-bit signals only store the left boundary value, which is stored through the integer list radius_lst.

[0060] In addition, the node information area also includes identifiers and signal names, which are respectively Figure 3 The string lists alias_lst and name_lst are stored in the above method. All node information can be processed, such as Figure 2 As shown, the node information on the left is processed to be more concise and easier to process. Finally, further processing and compression are performed to achieve a higher compression rate. This solution also overcomes the shortcomings of insufficient processing of identifier ranges and semantic features. The specific algorithm is as follows:

[0061] Enter the node information area of ​​the .VCD file

[0062] Output. Processed file file2

[0063] Step1. Initialize type_pos, type_lst, width_lst, radius_lst, alias_lst, name_lst, pos

[0064] Step2.while traversing node information is not finished do{

[0065] Step 3. If the type of the information is module, unscope, wire and reg. then {

[0066] Step 4. Use '00' to '11' to mark the four types; add the labels to type_lst.

[0067] Step 5. Get the bit width of the information and add it to width_lst; add the signal name to name_lst; add the alias to alias_lst; and add the left boundary value to radius_lst.

[0068] Step6.else{Use 5 bits to store the tag type; add the tag to type_lst; add pos to type_pos; execute Step5.}

[0069] Step7.pos++}

[0070] Step 8. Use variable-length encoding to process width_lst and type_pos

[0071] Step9. Write type_pos, type_lst, width_lst, radius_lst, alias_lst, name_lst, pos into file2.

[0072] In an embodiment of the present invention, a signal change region compression scheme records signal changes at each simulation time point in the value change region of a VCD file. Signal changes are represented by signal values ​​at different simulation time points. Furthermore, certain keywords in the VCD file, such as $dumpvars, also appear in the value change region, indicating the initial values ​​of subsequent variable signals.

[0073] To improve compression efficiency, numerical changes are processed by dividing them into three parts: simulation time points, keywords, and signal values. Since simulation time points are often arranged in an ascending arithmetic progression, they are first processed according to the rules of the arithmetic progression. If the difference between adjacent time points does not match the difference in the arithmetic progression, the current time point is used as the beginning of a new arithmetic progression. This method allows multiple original time points to be represented by a single integer: the starting value, the difference, and the number of nodes.

[0074] To facilitate the handling of keywords and signal changes, each value change block is processed sequentially. Since there are fewer keywords, they can be treated as special cases, similar to how special types are handled in the node information section. One list is used to store the sequence number of the value change block where the keyword appears, and another list is used to store the corresponding keyword flag.

[0075] In the numerical change section of a VCD file, the signal and its corresponding signal value at each time node are the core information, so it is called a numerical change block. Because each signal in a VCD file originates from variables in the pre-simulation code, these variables may have specific functional relationships. For example, if variable y is equal to the value of variable x in the code, then at each time node in the VCD file, the signal value of y is equal to the signal value of x. Therefore, only the signal value of x and the functional relationship between y and x need to be stored to derive the value of y, thus reducing storage requirements. This article considers the following three simple functional relationships:

[0076] Linear correlation: There is a linear relationship between the two signals.

[0077] Clock synchronization: The signal value switches between 0 and 1 periodically.

[0078] Monotonic change: The signal value increases / decreases with a fixed step size.

[0079] Simple functional relationships are chosen because complex functional relationships increase search time. Once the functional relationship is determined, the identifiers and values ​​of the dependent signals can be removed from the corresponding value change blocks. The more functional relationships found, the fewer signal identifiers and values ​​are required in each VCB, reducing storage space and improving compression. Signals that serve as independent variables and those without simple functional relationships require further processing.

[0080] First, the processing algorithm for the node information area specifically handles the simulation time and keyword key_word. Then, in the value change area of ​​the VCD file, the signal and its corresponding signal value at each time node are the core information. Since each signal in the VCD file originates from variables in the pre-simulation code, these variables may have specific functional relationships. Finding simple functions helps to efficiently compress the space. Since signal identifiers and signal values ​​are different types of data, this paper proposes a method to process these two types of data separately. When processing each value change block, signals, their corresponding identifiers, and signal values ​​that can be compressed through functional relationships are first removed. Next, all signal identifiers in each value change block are stored in alias_lst. Since multiple value change blocks may have the same alias_lst, a hash table alias_hash is used to store different alias_lsts and their occurrence frequencies in the VCB. When traversing the value change blocks, the corresponding alias_lst is first searched in alias_hash. If found, its occurrence count is incremented and the hash table key value is returned. If not found, the new alias_lst is added to alias_hash and its occurrence count is initialized to 1. Given that VCD files may contain a large number of blocks with varying values, the number of different alias_lst instances will also increase. Therefore, to prevent the hash table from becoming too large, it is recommended to update alias_hash after processing a certain number of VCBs and delete alias_lst instances that appear less frequently. In addition, since the order of all signal identifiers and their corresponding signal values ​​in a VCB is random, this paper adopts an ascending sorting method to improve the hit rate of hash table lookups, thereby further improving compression.

[0081] Regarding signal value compression, considering that signal values ​​consist of four symbols: 0, 1, x, and z, a 2-bit encoding can be used to represent 0 as 00, 1 as 01, x as 10, and z as 11, thereby compressing the signal value that originally required 8 bits to only 2 bits for storage. Given that x and z appear less frequently in signal values, these special values ​​are treated separately, that is, the time nodes at which x and z appear are stored and encoded according to the above encoding method. For most signal values ​​that do not contain x and z, it can be simplified to encode 0 as 0 and 1 as 1, thus requiring only 1 bit to store the signal value.

[0082] When storing signal values, if consecutive zeros appear across multiple VCBs, less storage space can be used. For example, if the signal value of a 12-bit signal across 100 consecutive VCBs is a string containing 50 consecutive zeros, these 50 zeros can be represented by an integer indicating the starting position of the consecutive zeros and an integer indicating the number of zeros. To increase the number of consecutive zeros in the string of signal values, this paper adopts a prediction scheme proposed in related art. Specifically, the signal value at the previous time node (signal_lst) is stored. The signal value at the current time node (signal_prediction) is then predicted based on this signal value. The prediction accuracy is then determined by performing an exclusive OR (XOR) operation with the actual signal value. If the prediction is accurate, the number of zeros in the XOR result will increase, further reducing the required storage space. To further improve prediction accuracy, a simple prediction strategy is implemented: the last bit of the signal value is inverted.

[0083] Because the high-order bits of a signal typically change less when its value changes, a bit-plane reassembly technique is used to increase the rate of consecutive zeros. Specifically, the highest-order bits of a signal's values ​​across multiple VCBS are extracted to form a string. The highest-order bits of the remaining values ​​are then extracted to form another string. This process repeats until all signal values ​​in the value-changing blocks have been processed. This increases the probability of consecutive zeros, increases their number, and improves the compression ratio.

[0084] The specific algorithm is as follows:

[0085]

[0086]

[0087] Furthermore, after processing each part of the VCD file, it is stored in a file and compressed twice using an existing compression algorithm. Experimental results show that the compression rate of xz is much higher than that of the other three compression algorithms, so xz is selected as the secondary compression tool.

[0088] At this point, all information in the VCD file has been processed and compressed, resulting in a compressed file. This demonstrates a lossless compression method for VCD files based on signal function relationships, value prediction, and bit-plane reorganization. This method addresses the inadequate processing of control instructions by existing methods. Furthermore, the signal function relationship and prediction-based method reduces the space required for signal changes in some signals and optimizes the density of zero values. This method performs optimally in large-scale VCD files, demonstrating its ability to efficiently compress the bulk of digital waveform data.

[0089] The present invention proposes a VCD file compression method based on signal function relationship, value prediction and bit plane reorganization. In KB-level files (such as 4KB test cases), the compression ratio reaches 5.8 times, which is 81.3% higher than the mainstream algorithm xz. In MB-level files (such as 432MB test cases), the compression ratio is increased to 86.9 times, and the advantage is more significant as the file size increases. At the same time, the present invention solves the problem of insufficient control instruction processing in existing methods through sparse keyword indexing (such as $dumpon). In addition, the method based on signal function relationship and prediction saves the space required for signal changes of some signals and optimizes the density of 0 values. Therefore, it performs best in large-scale VCD files, verifying its efficient compression capability for digital waveform data bodies.

[0090] This paper proposes a lossless compression method that integrates signal value prediction, bit-plane reorganization, and structural features based on the implicit functional dependencies (such as linear relationships and clock synchronization) between signals in Verilog simulation-generated VCD files. First, a signal value derivation rule base is established by leveraging the explicit or implicit functional relationships (such as linear dependencies and clock synchronization) between signals in the Verilog code to eliminate redundant signal storage. Combining bit-plane reorganization and prediction mechanisms, the bit-plane matrix composed of signal values ​​at different simulation time points is converted into a sequence with a high zero-value density.

[0091] Experiments show that the present invention achieves an 86.9-fold compression ratio for MB-level files, a 142% improvement over existing methods, and a 5.8-fold compression ratio for KB-level files, more than double the performance of similar solutions. This invention provides a high-compression, low-overhead waveform storage solution for large-scale integrated circuit simulation.

[0092] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction.

[0093] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of technical features indicated. Thus, a feature specified as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "N" means at least two, such as two, three, etc., unless otherwise specifically defined.

[0094] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or N executable instructions for implementing a custom logical function or step of a process, and the scope of the preferred embodiments of the present invention includes alternative implementations in which functions may be performed out of the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention pertain.

Claims

1. A VCD file compression method based on functional relationship, value prediction and bit plane reorganization, characterized in that: The following steps are involved: Aiming at the structural heterogeneity of VCD files, a domain-specific compression strategy is adopted to compress the header information area, node information area, and signal change area of ​​VCD files separately. Variable-length coding is used to compress the header information area and node information area. When compressing the signal change area, a method of finding signal function relationships is used to represent partial signal and signal value information. For signals and signal values ​​that cannot be represented by signal function relationships, a value prediction method is used to increase the number of zeros in the signal values. Bit-plane reorganization technology is then used to rearrange the data in the signal values. The compressed data obtained from the header information area, the node information area, and the signal change area are stored in a file, and then the compressed data in the file are compressed using secondary compression to obtain a compressed file of the VCD file.

2. The method according to claim 1, characterized in that The compression of the header information area includes: The four data items in the header information area are represented by four character strings. Labels from 00 to 11 are assigned to these four data items. An 8-bit space is used to represent the order of the data items. The content of each data item is represented by recording its length and the corresponding character string data. The length is compressed as an integer list using variable-length encoding.

3. The method according to claim 1, characterized in that Compress the node information area, including: Node information is divided into five categories: type, bit width, identifier, name and bit width range, and processed separately; Use 2 bits of space to store the tags of high-frequency types, and use 5 bits to store tags for other low-frequency types. It is also necessary to record the position information of uncommon types. Use type_pos to store the position information of uncommon types, and type_lst to store all types of tags. For integer lists, variable-length coding is used for processing, using width_lst to store the bit width information of all signals. For multi-bit signals, only the left boundary value is stored, which is stored through the integer list radius_lst; Identifiers and signal names are stored using the string lists alias_lst and name_lst.

4. The method according to claim 2 or 3, characterized in that Variable length coding techniques include: Leading zero removal: After converting the 32-bit integer data to binary, remove the leading zeros until the first valid 1; Byte alignment: fill the remaining bits with zeros to a multiple of 7 to form several 7-bit data segments; Identifier bit embedding: A 1-bit identifier is added before each segment. If the bit is 1, it indicates that the subsequent bytes belong to the same integer; if it is 0, it indicates the start of a new integer.

5. The method according to claim 1, wherein Compress the signal change area, including: The numerical changes are divided into three parts for processing: simulation time point, keyword and signal value; When processing simulation time points, we first process them according to the rules of arithmetic progression. When the difference between adjacent time points does not match the difference of arithmetic progression, we take the current time point as the beginning of a new arithmetic progression. Process each value change block in turn, use a list to store the sequence number of the value change block where the keyword appears, and use another list to store the corresponding keyword flag; When processing the value change blocks one by one, the signals compressed by the signal function relationship and their corresponding identifiers and signal values ​​are removed. All signal identifiers in each value change block are stored through alias_lst. In multiple value change blocks, the hash table alias_hash is used to store different alias_lst and their occurrence frequencies in the value change blocks. When traversing the value change blocks, the corresponding alias_lst is first searched in alias_hash. If found, its occurrence count is increased and the key value of the hash table is returned; if not found, the new alias_lst is added to alias_hash and its occurrence count is initialized to 1. For signal value compression, the signal value consists of four symbols: 0, 1, x, and z. 2-bit encoding is used to represent 0 as 00, 1 as 01, x as 10, and z as 11, thus compressing the signal value that originally required 8 bits to only 2 bits for storage. The signal value at the previous time node is stored, and then the signal value at the current time node is predicted based on the signal value, and the bit plane reconstruction technology is used to increase the ratio of consecutive 0s.

6. The method according to claim 5, characterized in that Planar reconstruction techniques include: The highest bit of the signal value of a signal in multiple simulation time nodes is extracted to form a string, and then the highest bit of the remaining signal value is extracted to form another string. This process is repeated until the signal values ​​at all signal bits are processed.

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