Probability symbol generation method, probability symbol operation method and equipment

Abstract

The invention discloses a probability symbol generation method, a probability symbol operation method and equipment, relates to the field of digital signal processing, and solves the problems of high hardware complexity, low nonlinear operation efficiency, insufficient probability calculation precision and large conversion loss of traditional fixed-point calculation. According to the technical scheme, by fusing the advantages of fixed-point and probability calculation, a numerical value is divided into a high-bit fixed-point integer and a low-bit probabilistic part, a multi-bit probability symbol which meets the requirement for expectation unbiasedness and is controllable in variance is constructed, a class fixed-point, class probability and iterative calculation triple system is designed, and the probability of the multi-bit probability symbol is calculated. The multiplexing standard arithmetic unit processes the probability symbol stream to guarantee the linear calculation precision; single-stage multiply-accumulate operation and nonlinear interpolation are realized through a multiplexer, and discrete value selection and weighting are driven by probability; iterative resources are optimized in combination with dynamic filtering conversion. According to the method, a new normal form is provided for a high-energy-efficiency communication chip and a storage and calculation integrated framework, and digital signal processing is promoted to evolve towards the high-precision and low-power-consumption direction.

Description

Technical Field

[0001] The present invention relates to the field of digital signal processing, and more particularly to a probability symbol generation method, a probability symbol operation method and a device. Background Art

[0002] Fixed-point computing, or the binary complement representation and calculation system, is a traditional implementation method for computing circuits. While it boasts high precision and suitability for linear computations, it also suffers from high complexity and long critical paths. More importantly, fixed-point computing is ill-suited for nonlinear computations, which are often implemented through polynomial fitting, CORDIC algorithms, and lookup tables, all of which suffer from high complexity and long critical paths.

[0003] Stochastic computing is a technique that represents numerical values ​​as an unweighted random bit stream for computation. Compared to the traditional two's complement system, stochastic computing can implement complex operations using simple circuits or logic. For example, multiplication can be implemented using an AND gate, and multiply-accumulate operations can be implemented using a multiplexer (MUX). Furthermore, due to the random and serial nature of stochastic computing, nonlinear computations can be implemented using methods such as finite state machines. At the same time, the "randomness" of stochastic computing requires a trade-off between computational accuracy and the number of clock cycles required. Given the significant difference in precision between a random bit and a fixed-point number, computations often require more clock cycles to complete. Furthermore, computations often require back-and-forth conversions between the two's complement system and the random bit stream, resulting in low hardware efficiency and limiting its application scenarios.

[0004] Therefore, how to research and design a probability symbol representation method and probability symbol operation method that can overcome the above-mentioned defects is a problem that we urgently need to solve. Summary of the Invention

[0005] In order to address the deficiencies in the prior art, the purpose of the present invention is to provide a probability symbol generation method, a probability symbol operation method and a device, which integrates the advantages of fixed-point and probability calculations through multi-bit probability symbols, uses high-bit fixed-point to ensure accuracy, and uses low-bit probabilistic calculations to reduce complexity. Combined with optimized probability distribution and operation methods, the defects of high complexity and low nonlinear operation efficiency in fixed-point calculations and low precision and low hardware efficiency in probability calculations are solved, while improving accuracy and achieving efficient hardware design, expanding the application scope of probability calculations in fields such as digital signal processing.

[0006] The above technical objectives of the present invention are achieved through the following technical solutions:

[0007] In a first aspect, a method for generating a probabilistic symbol is provided, comprising the following steps:

[0008] Divide the digital signal represented by binary number into high-bit part and low-bit part according to the resolution;

[0009] Probabilize the low-order part to obtain a probabilistic result;

[0010] The probabilistic result is added to the high-order part to obtain a probability symbol.

[0011] Furthermore, the probabilistic result is the product of resolution and probability bits, and the probability bits obey Bernoulli distribution.

[0012] Furthermore, each time the bit stream length of the probability symbol doubles, the variance is reduced to 1 / 4 of the original value.

[0013] In a second aspect, a method for adding probability symbols is provided, comprising the following steps:

[0014] Inputting probabilistic symbols of two digital signals, wherein the probabilistic symbols are generated using a probabilistic symbol generation method according to any one of the first aspects;

[0015] Directly inputting the two probability symbols into a fixed-point adder to perform an addition operation to obtain a calculation result;

[0016] The expectation of the calculation result is equal to the sum of the expectations of the two probability symbols, and the low-order probability bits of the two probability symbols are independent of each other.

[0017] In a third aspect, a method for multiplying probabilistic symbols is provided, comprising the following steps:

[0018] Inputting probabilistic symbols of two digital signals, wherein the probabilistic symbols are generated using a probabilistic symbol generation method according to any one of the first aspects;

[0019] Inputting the two probability symbols into a fixed-point multiplier to perform a multiplication operation and outputting a result probability symbol;

[0020] The low-order probability bits of the two probability symbols satisfy a mutual independence condition, and the expectation of the result probability symbol is equal to the product of the expectations of the two probability symbols.

[0021] In a fourth aspect, a method for multiplying and accumulating probabilistic symbols is provided, comprising the following steps:

[0022] A multiplexer is configured, wherein a data input terminal of the multiplexer is connected to a multi-channel probability symbol stream, and a selection terminal is connected to a weight parameter probability symbol stream; wherein the probability symbols in the multi-channel probability symbol stream are generated using a probability symbol generation method as described in any one of the first aspects;

[0023] Controlling the selection probability based on the expected value of the probability symbol stream of the weight parameter, and gating one path of the probability symbol from the multiple paths of the probability symbol stream as a gating result in each clock cycle;

[0024] Performing an arithmetic average on the gating results of a plurality of consecutive clock cycles, and outputting a probability symbol as a multiplication-accumulation operation result.

[0025] In a fifth aspect, a nonlinear operation method for probability symbols is provided, comprising the following steps:

[0026] Pre-store probability symbols of the target nonlinear function at discrete quantization points, where the discrete quantization points are divided into equal intervals according to the probability symbol resolution; wherein the probability symbols are generated using a probability symbol generation method as described in any one of the first aspects;

[0027] Converting the low-order portion of the input probability symbol into a selection control signal to drive the multiplexer to dynamically switch between the probability symbols corresponding to two adjacent quantization points;

[0028] A table lookup is performed according to the function values ​​corresponding to the discrete quantization points to implement linear interpolation of the function values, and the expectation of the output probability symbol stream is the linear interpolation result of the nonlinear function.

[0029] In the sixth aspect, a digital signal processing device is provided, which is used to implement a probabilistic symbol generation method as described in the first aspect; and / or, to implement an operation method as described in any one of the second to fifth aspects.

[0030] Furthermore, the digital signal processing device includes any one or more of a baseband signal demodulation module, a channel estimation module, a signal detection module, a pre-coding module, a demodulation module and an LDPC decoding module.

[0031] In a seventh aspect, an electronic device is provided, comprising at least one digital signal processing device as described in the sixth aspect.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] 1. This invention fuses fixed-point and probabilistic calculations through multi-bit probability symbols, ensuring computational accuracy in the high-order portion (integer representation) while reducing hardware complexity in the low-order probabilistic portion (Bernoulli distribution). The variance formula for the probability symbol shows that by adjusting the resolution and the low-order value, the error range can be actively controlled, and the variance is reduced to 1 / 4 with each doubling of the bitstream length. This exponentially increases accuracy with computing resources, breaking through the bottleneck of traditional probability calculation accuracy and achieving a breakthrough balance between accuracy and complexity.

[0034] 2. The present invention directly reuses fixed-point adders / multipliers in fixed-point linear operations to complete probability symbol stream operations, uses the natural expansion characteristics of hardware to achieve computational closure, and avoids the frequent numerical conversion overhead in traditional probability calculations; in probabilistic linear operations, a multiplexer (MUX) is used to use the probability symbol stream as a weight, and a single-stage circuit implements multiplication and accumulation operations, which reduces the critical path delay compared to the multiplication-accumulation cascade structure of traditional fixed-point calculations, and is particularly suitable for large-scale matrix operation scenarios (such as 5G channel estimation); in probabilistic nonlinear operations, based on probability symbol-driven MUX selection and linear interpolation, the table lookup method is combined with probabilistic interpolation, which reduces storage requirements while achieving nonlinear function approximation with super-fixed-point precision (such as nonlinear update in LDPC decoding), achieving a revolutionary improvement in hardware efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The drawings described herein are used to provide a further understanding of the embodiments of the present invention, constitute a part of this application, and do not constitute a limitation of the embodiments of the present invention. In the drawings:

[0036] Figure 1 This is the digital signal processing flow for the uplink transmit link in the 5G-NR system in an embodiment of the present invention;

[0037] Figure 2 This is the digital signal processing flow for the uplink receive link in the 5G-NR system in an embodiment of the present invention;

[0038] Figure 3 1 is a schematic diagram of the principle of converting binary to probabilistic symbols proposed in an embodiment of the present invention;

[0039] Figure 4 is a comparison chart of the representation accuracy of the probabilistic symbols proposed in the embodiment of the present invention;

[0040] Figure 5 1 is a principle diagram and operation accuracy diagram of a fixed-point linear operation of a probabilistic symbolic calculation proposed in an embodiment of the present invention;

[0041] Figure 6 1 is a principle diagram and operation accuracy diagram of the linear operation of the class probability of the probabilistic symbol calculation proposed in the embodiment of the present invention;

[0042] Figure 7 4 is a diagram showing the principle of nonlinear operation of class probability in the probability symbol calculation proposed in an embodiment of the present invention. DETAILED DESCRIPTION

[0043] The present invention will be further described in detail below in conjunction with test examples and specific embodiments. However, this should not be understood as limiting the scope of the present invention to the following embodiments, and all technologies implemented based on the present invention fall within the scope of the present invention.

[0044] Embodiment: A probability symbol generation method, probability symbol calculation method and device.

[0045] In digital signal processing represented by digital communication, the signal x is first characterized, and then various operations are performed to implement modules such as channel estimation, signal detection, and channel decoding. Figure 1 and Figure 2 The digital signal processing flows for the 5G-NR uplink transmit and receive links are shown separately. Table 1 summarizes the operations involved in the mainstream implementation methods.

[0046] Table 1 Operations involved in digital signal processing for 5G-NR uplink transmit and receive links

[0047]

[0048]

[0049] It can be seen that basic operators such as multiplication, addition, multiplication-accumulation, and nonlinear function calculation are widely used in communication digital signal processing. How to efficiently represent numerical values, how to efficiently implement these basic operators and adapt them to communication systems is an important issue.

[0050] In probability calculation, the value x is represented as the probability that a bit in an unweighted random bit stream is 1, that is, one of the probability bits b x The expectation of is equal to the value of the representation, that is:

[0051] E(b x =1) = E(b x )=x (1).

[0052] The representation ability of probability bits is very limited, resulting in poor calculation accuracy. In order to improve the representation and calculation accuracy, the present invention creatively proposes a new representation method of probability symbols, which converts 1 bit of probability bit b into x Expanded to n-bit probability symbol s x , then similarly, the expectation of one of the probability symbols should be equal to the value represented, that is:

[0053] E(sx )=x (2).

[0054] The core issue is how to construct this probability symbol so that it can not only achieve the purpose of improving representation accuracy, but also be implemented with lower hardware complexity and avoid bringing additional computational limitations.

[0055] refer to Figure 3 In order to solve the above problems, the present invention creatively proposes the concept of multi-bit random variables, hoping to solve the problem that it is difficult to improve the accuracy of probability bits.

[0056] For multi-bit random variables, there are multiple ways to represent the same value, which is very different from the representation of probability bits. Suppose for a 2-bit probability symbol, its possible values ​​are s x ∈{s 0 ,s 1 ,s 2 ,s 3}={00,01,10,11}, assuming that each possible value corresponds to a unique weight, the value of the weight w∈{w 0 ,w 1 ,w 2 ,w 3}={0.0,0.5,1.0,1.5}.

[0057] As shown in Table 2, there are many possible representations, including those in the existing literature. Although the means are consistent, the variances (also known as mean squared errors, MSE) vary, suggesting that there may be an optimal representation.

[0058] Table 2 Comparison of multi-bit random variable representation methods

[0059]

[0060] Assume that the weight w grows linearly, that is:

[0061] w i =i·Δ.

[0062] Among them, w i is the weight corresponding to the i-th symbol, Δ is a positive constant indicating the representation accuracy, and i represents the i-th symbol.

[0063] Our optimization goal is to minimize the variance, that is, D(s x ) is the smallest, D(s x ) formula is:

[0064]

[0065] Among them, s xis the probability symbol of the binary number x, K is the number of all possible symbols, p i is the probability of the i-th symbol appearing, w i is the weight corresponding to the i-th symbol.

[0066] Since the x to be represented is a fixed value, only The minimum is sufficient, and thus the optimization model can be established:

[0067]

[0068]

[0069] p i ≥0,i=0,1,…,K-1,.

[0070] This is a standard linear programming problem. When kΔ≤x≤(k+1)Δ, the optimal solution of this linear programming problem is:

[0071]

[0072] Among them, p i is the probability of the i-th symbol appearing, k is a non-negative integer, the specific value is determined by the value of x, Δ is the resolution of the probability symbol, and x is a binary number.

[0073] After conversion, the optimal solution can be understood as: converting the low-order part x of a binary number x L Probabilize and combine the probabilistic result with the high-order part x H The representation scheme of the probability symbol is obtained by adding them together, namely:

[0074] x=x H +x L

[0075]

[0076] Δ=2 -n

[0077]

[0078] Where Δ is the resolution of the probability symbol, b xL is the probability bit of the low-order part, which obeys the Bernoulli distribution, and n is the bit width of the probability symbol.

[0079] According to (3), we have:

[0080]

[0081] Satisfies the requirements in (2). The variance (mean square error, MSE) of its representation is:

[0082]

[0083] Among them, s x is the probability symbol of the binary number x, is the probability bit of the low-order part, Δ is the resolution of the probability symbol, x L is the low-order part of the binary number x, H The high-order part of the binary number x.

[0084] Similar to the probability bit stream, if a probability symbol stream is used to represent a value, then the variance (mean square error, MSE) of its representation is:

[0085]

[0086] Where Δ is the resolution of the probability symbols, is the probability symbol s x The i-th symbol in the probability symbol stream formed, N is the length of the probability symbol stream, is the probability bit of the low-order part of the i-th probability symbol in the probability symbol stream.

[0087] Its specific characterization accuracy reference Figure 4 The number of bits in the figure represents the number of high-order bits. When its value is 0, it is equivalent to the probability bit representation. It can be seen that the probability symbol representation accuracy has similar properties to the fixed-point representation accuracy, that is, when the bit stream length is doubled, the variance is reduced to the original value. Compared with probabilistic bit calculation, the accuracy of representation is greatly improved.

[0088] refer to Figure 5 , the probability symbols can be used to directly calculate multiplication and addition like fixed-point calculations. First consider addition, where the probability symbols of the input signals x and y are s x and s y ,have:

[0089] E(s x +s y )=E(s x )+E(s y )

[0090] =x+y (7).

[0091] As can be seen, addition requires no additional conditions. Compared to probability bits, which can only be represented by a single bit and cannot be naturally expanded, often require scaling or saturation. Therefore, an adder cannot be directly used, resulting in a certain loss of precision. Probabilistic symbols, on the other hand, allow for natural expansion, significantly improving precision. Compared to fixed-point arithmetic, fixed-point addition is the addition of two numbers. While probabilistic symbol addition still uses a fixed-point adder, it essentially adds two streams of probability symbols. The output is also a single stream of probability symbols, not just a single number. This property makes probabilistic symbols closed to addition, making it possible to cascade more complex calculations.

[0092] The same goes for multiplication:

[0093]

[0094] in and As with the multiplication operation in probability calculation, mutual independence must be satisfied. Analyzing the error in the multiplication result, we have:

[0095] D(s x ·s y )=E((s x ·s y ) 2 )-E 2 (s x ·s y )

[0096] =x L (Δ-x L )[(y H ) 2 +2y H y L ]

[0097] +y L (Δ-y L )[(x H ) 2 +2x H x L ]

[0098] +x L y L (Δ 2 -x L y L )(9).

[0099] Through simulation, we know that the error can still be reduced to the original value for every doubling of the bit rate. Compared to probabilistic bits, multiplication of probabilistic bits, while simple in hardware, is difficult to improve in accuracy. Probabilistic symbols introduce the concept of multi-bit random variables, allowing for natural bit expansion during multiplication, thus ensuring computational accuracy. Similarly, while probabilistic symbol multiplication borrows the same multiplier from fixed-point arithmetic, it essentially multiplies two streams of probabilistic symbols, and its output is also a single stream of probabilistic symbols, not just a single number. This property makes probabilistic symbols closed to multiplication, making it possible to cascade more complex calculations.

[0100] refer to Figure 6 (a), probability symbols can perform some probability domain operations like probability bits. In probability bit calculation, multiplexers (MUX) can efficiently implement multiplication and accumulation operations. Since the meaning of probability symbol representation is also the expectation of the numerical value, the multiplication and accumulation operation based on MUX can be directly applied to probability symbol calculation. Taking the FIR filter as an example, assuming that the corresponding filter coefficient y at the selection end is i The random symbol is K, where i = 1, 2, ... L, L is the length of the vector of input multiplication and accumulation, then the output probability symbol s z The expectation is:

[0101]

[0102] The only difference is that the MUX changes from selecting 1 bit of probability bit to selecting n bits of probability symbol. In other words, the processing flow of the MUX selection end is the same as the probability bit calculation, and the MUX input end requires n times the hardware overhead of the probability bit. After some optimization, its calculation accuracy is referenced Figure 6 (b) The horizontal axis represents the fixed-point bit width or symbol stream length. The number of bits in the figure represents the number of high-order bits. When its value is 0, it is equivalent to the probabilistic bit representation. It can be seen that after adding a small number of bits, its calculation accuracy can even exceed that of fixed-point calculation, while the hardware overhead is much less than that of fixed-point calculation.

[0103] After combining with finite state machines, probabilistic bit calculation can utilize the characteristics of serial calculation to complete the calculation of nonlinear functions through fitting. In communication signal processing, it mainly involves single variable nonlinear function operations such as trigonometric functions, exponential functions, and logarithmic functions. Figure 7 The input and output of the nonlinear function calculation module of the probability symbol can be represented by the probability symbol. The input probability symbol is used as the selection end of the MUX to select the function value of the target nonlinear function with the value represented by the probability symbol as the independent variable. Considering that the input probability symbol only jumps between two symbols, there are only two function values ​​to be selected, which are set as w0 and w1, and the probability bit in the input probability symbol is set as b in , with a resolution of Δ in, the probability bit in the output probability symbol is b out , with a resolution of Δ out , the output is y, then we can write the probability distribution, we have:

[0104]

[0105] Among them, b in is the probability bit in the input probability symbol, Δ in The resolution of the input probability symbol is b, and the probability bits in the output probability symbol are b. out , with a resolution of Δ out , the output is y, w0 and w1 are the function values ​​corresponding to the only two possible symbols that generate probability symbols, is the high-order part of w0 used to generate the output probability symbol, is the low-order part of w0 used to generate the output probability symbol, is the high-order part of w1 used to generate the output probability symbol, is the low-order part of w1 used to generate the output probability symbol, and P is the probability of a random event occurring.

[0106] Calculate its expectation, we have:

[0107]

[0108] That is, it can be regarded as a linear interpolation between these discrete function points. Its mean square error is:

[0109]

[0110] Compared to probabilistic bits, probabilistic bits cannot implement such nonlinear functions because they only have two possible values ​​and their precision is too low. Compared to fixed-point arithmetic, although probabilistic symbols use a table lookup similar to fixed-point arithmetic, they can perform linear interpolation based on the table lookup, resulting in even higher precision than fixed-point arithmetic. In summary, probabilistic symbols offer advantages in calculating nonlinear functions that neither probabilistic symbols nor fixed-point arithmetic can achieve.

[0111] In probability calculation, to address the issue of long computational clock cycles, the concept of dynamic probability calculation or bit-by-bit calculation has been proposed. Here, each sampling point of the input continuous signal is represented by a single bit, rather than a bit stream. After passing through a signal processing module similar to traditional probability calculation, it is converted back to binary using a low-pass filter. If the output result is re-entered into this iterative process, this is the concept of bit-by-bit iteration. This concept also applies to probability symbol calculation. A specific example is the iterative calculation in the LDPC decoder. In the LDPC decoder, the iterative information represented by the probability symbols needs to be weighted and accumulated, that is, low-pass filtered, and then converted back to probability symbols for the next iteration.

[0112] Working principle: The present invention dynamically decomposes the binary value represented by the input signal into a high-bit part and a low-bit probabilistic part, and uses quantization rules and probability symbol generation formulas to generate probability symbols, thereby realizing the organic fusion of high-precision fixed-point information and low-complexity probability calculation; secondly, through three types of calculation methods, namely fixed-point linear operations, probabilistic linear operations and probabilistic nonlinear operations, traditional arithmetic logic operations, random calculation multiplication and accumulation, and nonlinear interpolation processing methods are respectively adopted according to different calculation requirements, which significantly reduces the calculation complexity while ensuring the calculation accuracy; effectively solves the technical difficulties of high conversion overhead and slow convergence speed of traditional probability calculation, and finally achieves the coordinated optimization effect of taking into account both calculation accuracy and hardware efficiency.

[0113] Those skilled in the art will appreciate that the embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application can adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0114] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0115] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0116] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operational steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0117] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A probabilistic symbol generation method, characterized in that: The following steps are involved: Divide the digital signal represented by binary number into high-bit part and low-bit part according to the resolution; Probabilize the low-order part to obtain a probabilistic result; The probabilistic result is added to the high-order part to obtain a probability symbol.

2. A probabilistic symbol generation method according to claim 1, characterized in that: The probabilistic result is the product of resolution and probability bits, and the probability bits obey Bernoulli distribution.

3. A probabilistic symbol generation method according to claim 1, characterized in that: Each time the bit stream length of the probability symbol doubles, the variance is reduced to 1 / 4 of the original value.

4. A method for adding probability symbols, characterized in that: The following steps are involved: Inputting probability symbols of two digital signals, wherein the probability symbols are generated using a probability symbol generation method according to any one of claims 1 to 3; Directly inputting the two probability symbols into a fixed-point adder to perform an addition operation to obtain a calculation result; The expectation of the calculation result is equal to the sum of the expectations of the two probability symbols, and the low-order probability bits of the two probability symbols are independent of each other.

5. A method for multiplication of probability symbols, characterized in that: The following steps are involved: Inputting probability symbols of two digital signals, wherein the probability symbols are generated using a probability symbol generation method according to any one of claims 1 to 3; Inputting the two probability symbols into a fixed-point multiplier to perform a multiplication operation and outputting a result probability symbol; The low-order probability bits of the two probability symbols satisfy a mutual independence condition, and the expectation of the result probability symbol is equal to the product of the expectations of the two probability symbols.

6. A method for multiplication and accumulation of probability symbols, characterized in that: The following steps are involved: A multiplexer is configured, wherein a data input terminal of the multiplexer is connected to a multi-channel probability symbol stream, and a selection terminal is connected to a weight parameter probability symbol stream; wherein the probability symbols in the multi-channel probability symbol stream are generated using a probability symbol generation method according to any one of claims 1 to 3; Controlling the selection probability based on the expected value of the probability symbol stream of the weight parameter, and gating one path of the probability symbol from the multiple paths of the probability symbol stream as a gating result in each clock cycle; Performing an arithmetic average on the gating results of a plurality of consecutive clock cycles, and outputting a probability symbol as a multiplication-accumulation operation result.

7. A nonlinear operation method for probability symbols, characterized in that: The following steps are involved: Pre-store probability symbols of the target nonlinear function at discrete quantization points, wherein the discrete quantization points are divided into equal intervals according to the probability symbol resolution; wherein the probability symbols are generated using a probability symbol generation method according to any one of claims 1 to 3; Converting the low-order portion of the input probability symbol into a selection control signal to drive the multiplexer to dynamically switch between the probability symbols corresponding to two adjacent quantization points; A table lookup is performed according to the function values ​​corresponding to the discrete quantization points to implement linear interpolation of the function values, and the expectation of the output probability symbol stream is the linear interpolation result of the nonlinear function.

8. A digital signal processing device, characterized in that: The digital signal processing device is used to implement a probabilistic symbol generation method as described in any one of claims 1-3; and / or, to implement an operation method as described in any one of claims 4-7.

9. The digital signal processing device according to claim 8, characterized in that: The digital signal processing device includes any one or more of a baseband signal demodulation module, a channel estimation module, a signal detection module, a pre-coding demodulation module, a demodulation module and an LDPC decoding module.

10. An electronic device, characterized in that: The electronic device comprises at least one digital signal processing device according to claim 8.

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