Processor configuration system, method and controller for scene baking

Abstract

The invention relates to a processor configuration system and method for scene baking and a controller, and belongs to the technical field of computer graphics, the system comprises a controller, a client, a scheduler and a rendering manager; wherein the controller is configured to send an authorization request to the authorization end in response to a target baking request, sent by the client, for carrying out a target baking task for a target scene; when the authorization end feeds back that authorization is passed, the client is indicated to establish a data connection relationship with a scheduler, so that the client sends task configuration information of the target baking task and scene data of the target scene to the scheduler; determining a rendering manager associated with the task configuration information; and setting a graphics processor matched with the rendering manager to execute the target baking task for processing the scene data.

Description

Technical Field

[0001] The present disclosure relates to the technical field of computer graphics, and more particularly, to a processor configuration system, method, and controller for scene baking. Background Art

[0002] With the rapid development of the gaming industry, the demand for higher-quality graphics is increasing, and the virtual scenes constructed in games have evolved from simple two-dimensional scenes to three-dimensional scenes. Currently, to achieve more realistic visual effects in virtual scenes, lighting baking can be performed on each object in the virtual scene. However, existing lighting baking technologies, such as Enlighten and Progressive Lightmapper, typically use a single CPU for baking, resulting in low baking efficiency. Summary of the Invention

[0003] An object of the embodiments of the present disclosure is to provide a new technical solution for processor configuration for scene baking.

[0004] According to a first aspect of the present disclosure, there is provided a processor configuration system for scene baking, the system comprising a controller, a client, a scheduler, and a rendering manager;

[0005] The controller is configured to: send an authorization request to an authorization end in response to a target baking request sent by a client for a target baking task for a target scene; when the authorization end feeds back that the authorization is passed, instruct the client to establish a data connection relationship with a scheduler, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler; determine the rendering manager associated with the task configuration information; and set a graphics processor matched by the rendering manager to execute the target baking task for processing the scene data.

[0006] In one possible implementation, the controller is further configured to: before instructing the client to establish a data connection relationship with the scheduler, determine the task identifiers corresponding to the remaining baking tasks in a preset processor processing queue; when the number of the task identifiers exceeds a set threshold, configure the task identifier of the target baking task in the processor processing queue.

[0007] In one possible implementation, when the scheduler receives a data transmission channel sent by the client through a command connection relationship, the scheduler sends a data start indication, a channel address, and a maximum number of channels to the client; when the client receives the data start indication, the channel address, and the maximum number of channels, it initiates a data connection request to the scheduler, so that the client establishes a data relationship with the scheduler.

[0008] In a possible implementation, the target baking task includes applying a target light source to the target scene;

[0009] The graphics processor matched by the rendering manager is configured to: determine the bidirectional reflection distribution function of the virtual model surface in the target scene and the light source illumination conditions of the target light source; determine the probability density distribution function of the virtual light in the target scene based on the bidirectional reflection distribution function and the light source illumination conditions; and determine the position distribution information of the virtual light in the target scene based on the probability density distribution function.

[0010] In one possible implementation, the graphics processor matched by the rendering manager is configured to: perform path tracing on multiple virtual light rays in the target baking task through the configured OptiX toolkit to obtain a lighting rendering image; perform unbiased solution on the transport equations of multiple virtual light rays in the target baking task through the configured Monte Carlo integration model to obtain an unbiased numerical solution; and obtain a lighting map of the target scene based on the lighting rendering image and the unbiased numerical solution.

[0011] In a possible implementation, the graphics processor matched with the rendering manager is further configured to: perform noise reduction processing on the light map by using a configured image noise reduction model and an audio noise reduction model to obtain a denoised light map.

[0012] According to a second aspect of the present disclosure, a processor configuration method for scene baking is further provided. The processor configuration method for scene baking adopts the processor configuration system for scene baking as described in the first aspect. The system includes a controller, a client, a scheduler, and a rendering manager. The controller is the executing entity of the method. The method further includes:

[0013] In response to a target baking request sent by the client for performing a target baking task on a target scene, sending an authorization request to the authorization end;

[0014] When the authorization end returns a feedback indicating that the authorization is passed, the authorization end instructs the client to establish a data connection relationship with the scheduler, so that the client sends the task configuration information of the target baking task to the scheduler;

[0015] Determining a rendering manager associated with the task configuration information;

[0016] A graphics processor matched with the rendering manager is set to execute the target baking task for processing the scene data.

[0017] In one possible implementation, before instructing the client to establish a data connection relationship with the scheduler, the method includes:

[0018] Determine the task identifiers corresponding to the remaining baking tasks in the preset processor processing queue;

[0019] When the number of the task identifiers exceeds a set threshold, the task identifiers of the target baking tasks are configured in the processor processing queue.

[0020] According to a third aspect of the present disclosure, a controller is further provided, comprising:

[0021] A response module, configured to send an authorization request to an authorization end in response to a target baking request sent by a client to perform a target baking task for a target scene;

[0022] an instruction module, configured to instruct the client to establish a data connection relationship with the scheduler when the authorization end feeds back that the authorization is passed, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler;

[0023] A determination module, configured to determine a rendering manager associated with the task configuration information;

[0024] A setting module is used to set a graphics processor matched by the rendering manager to execute the target baking task of processing the scene data.

[0025] According to a fourth aspect of the present disclosure, a computer system is provided. The computer system includes a processor. When the processor executes program instructions or code, the computer system implements the processor configuration method for scene baking described in the first aspect. Exemplarily, the computer system also includes a memory for storing the program instructions or code.

[0026] According to a fifth aspect of the present disclosure, a computer-readable storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the above-mentioned processor configuration method for scene baking when running.

[0027] According to a sixth aspect of the present disclosure, a computer program product is further provided, comprising a computer program, which, when executed, enables a computer to perform the above-mentioned processor configuration method steps for scene baking.

[0028] According to a seventh aspect of the present disclosure, a controller is further provided, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to execute the processor configuration method for scene baking through the computer program.

[0029] One beneficial effect of the embodiments of the present disclosure is that the processor configuration system for scene baking provided by the embodiments of the present disclosure has a controller that can respond to a target baking request issued by a client and send an authorization request to an authorization end. When the authorization end returns the feedback that the authorization is passed, the controller instructs the client to establish a data connection relationship with the scheduler. The client can send the response task configuration information to the scheduler, so that the scheduler can instruct the corresponding rendering manager to process the scene data with each graphics processor matched by the rendering manager. The data transmission between multiple graphics processors is constructed through the controller, scheduler, and rendering manager to realize the efficient transmission and synchronization of scene data between multiple graphics processors, effectively reducing the scene data transmission delay and improving the baking efficiency of virtual scene lighting.

[0030] Features and advantages of the embodiments of the present specification will become apparent from the following detailed description of exemplary embodiments of the present specification with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the specification and, together with the description, serve to explain the principles of the embodiments of the specification.

[0032] Figure 1 A schematic structural diagram of a processor configuration system for scene baking according to an embodiment of the present disclosure is shown;

[0033] Figure 2 A schematic diagram of a client authorization process according to some embodiments is shown;

[0034] Figure 3 A schematic diagram showing a process of data interaction between a client and a scheduler according to some embodiments is shown;

[0035] Figure 4 A schematic diagram showing a flow chart of data interaction between a scheduler and a rendering manager according to some embodiments;

[0036] Figure 5 A schematic flow chart of a processor configuration method for scene baking according to some embodiments is shown;

[0037] Figure 6 A schematic structural diagram of a controller according to some embodiments is shown.

[0038] Figure 7 A schematic diagram of the hardware structure of a controller according to some embodiments is shown. DETAILED DESCRIPTION

[0039] Various exemplary embodiments of the present specification will now be described in detail with reference to the accompanying drawings.

[0040] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the embodiments of this specification, its application, or uses.

[0041] It should be noted that like reference numerals and letters refer to like items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0042] It should be noted that all actions of acquiring signals, information or data in the embodiments of the present disclosure are performed in compliance with the corresponding data protection laws and policies of the country where they are located and with the authorization given by the owner of the corresponding device.

[0043] <System Example>

[0044] Figure 1 A structural diagram of a processor configuration system for scene baking that can be used to implement an embodiment of the present disclosure is shown.

[0045] like Figure 1 As shown, the system includes a controller 10 (Center), a client 20 (Client), a scheduler 30 (Scheduler) and a rendering manager 40 (RenderNode);

[0046] Among them, the controller 10 is configured to: respond to the client 20 sending a target baking request for a target baking task for a target scene, send an authorization request to the authorization terminal 50; when the authorization terminal 50 feedbacks that the authorization is passed, instruct the client 20 to establish a data connection relationship with the scheduler 30, so that the client 20 sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler 30; determine the rendering manager 40 associated with the task configuration information; set the graphics processor matched by the rendering manager 40 to execute the target baking task of processing scene data.

[0047] In this embodiment, the client 20 can be configured with a front-end plug-in, such as a Unity plug-in, an Unreal plug-in, an Ejoy plug-in, and a RhinoX plug-in, so that the user can edit a virtual scene by calling the editor of the front-end plug-in, and submit a baking request for the corresponding baking task of the virtual scene after the editing is completed.

[0048] In this embodiment, after the user submits the baking request, the client 20 initiates a connection request to the controller 10 and sends the client identification token of the client 20. The controller 10 responds to the connection request and receives the client identification token. The controller 10 then initiates a connection request to the authorization terminal 50 and sends the client identification token of the client 20. The authorization terminal 50 determines whether the client 20 with the client identification token can be authorized and returns the authorization result of the client 20 to the controller 10. By setting a client identification for each client 20, the controller 10 can distinguish between the various clients 20, thereby implementing lighting baking for virtual scenes that need to be baked by multiple clients 20.

[0049] In this embodiment, if Figure 2 As shown, when the authorization result received by the controller 10 is authorization passed, the controller 10 can determine the rendering cluster assigned to the client 20 and the cluster identifier ClusterID representing the rendering cluster, then return the authorization result to the client 20 and send the scheduler address and cluster identifier ClusterID to the client 20. When the client 20 receives the scheduler address, cluster identifier ClusterID and the authorization result, the client 20 can initiate a connection request to the scheduler 30 and send the cluster identifier ClusterID and the scene data of the target scene. In other words, the client 20 sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler 30.

[0050] In this embodiment, if Figure 2 As shown, when the authorization result received by the controller 10 is authorization failure, the controller 10 can feedback authorization failure to the client 20 and end the baking task.

[0051] In this embodiment, if Figure 4 As shown, there are multiple rendering managers 40, and the multiple rendering managers 40 can receive partial scene data about the target scene sent by the scheduler 30 and allocate matching graphics processors to process the partial scene data.

[0052] In this embodiment, each rendering manager 40 is also matched with at least one graphics processing unit (GPU). Each graphics processing unit matched with a rendering manager 40 can calculate the direct and indirect lighting of the target scene under the call of the rendering manager 40 to render the corresponding light map. The controller 10 can set the scheduling criteria of the scheduler 30 and feedback the scheduling criteria to the scheduler 30. The scheduling criteria here are generally based on the scene characteristics of the virtual scene to be baked to schedule the corresponding rendering manager 40. The scene characteristics may include the geometric complexity, material, texture resources, number of light sources and spatial scale of all models in the virtual scene. Based on the scheduling criteria, the scheduler 30 can determine the rendering manager 40 associated with the corresponding task matching information. The scheduler 30 feedbacks the scene data of the target scene to the associated rendering manager 40, so that the associated rendering manager 40 can call the corresponding graphics processor to process the scene data of the target scene to achieve lighting baking for the target scene.

[0053] In this embodiment, the controller 10 of the processor configuration system for scene baking can respond to the target baking request issued by the client 20 and send an authorization request to the authorization terminal 50. When the authorization terminal 50 feedbacks that the authorization is passed, the controller 10 instructs the client 20 to establish a data connection relationship with the scheduler 30. The client 20 can send the response task configuration information to the scheduler 30, so that the scheduler 30 can instruct the corresponding rendering manager 40 to process the scene data with each graphics processor matched by the rendering manager 40. Through the controller 10, scheduler 30 and rendering manager 40, data transmission between multiple graphics processors is established to achieve the efficient transmission and synchronization of scene data between multiple graphics processors, effectively reducing the scene data transmission delay and improving the baking efficiency of virtual scene lighting.

[0054] In some embodiments, the controller 10 is further configured to: determine the task identifiers corresponding to the remaining baking tasks in the preset processor processing queue before instructing the client 20 to establish a data connection relationship with the scheduler 30; when the number of task identifiers exceeds a set threshold, configure the task identifier of the target baking task in the processor processing queue.

[0055] In this embodiment, the controller 10 can obtain the load of each rendering manager 40 or graphics processor through the scheduler 30. When the load exceeds a set load, the controller 10 enters queuing mode. In queuing mode, the controller 10 extracts the task ID of the baking task to be processed and assigns the task ID to the processing position in the processor processing queue according to the chronological order of the baking task. The load here is generally measured in terms of the number of users, and the set load can be a pre-set upper limit on the number of users.

[0056] In this embodiment, the set threshold may be 0. There is one task ID in the processor processing queue, and the task ID is ranked first. If the number of task IDs exceeds the set threshold, the target baking task is configured at the second position in the processor processing queue.

[0057] In this embodiment, by setting a processor processing queue, it is possible to effectively avoid overloading of the graphics processor, thereby reducing the subsequent maintenance cost of the graphics processor.

[0058] In some embodiments, when the scheduler 30 receives a data transmission channel sent by the client 20 through a command connection relationship, the scheduler 30 sends a data start indication, a channel address, and a maximum number of channels to the client 20; when the client 20 receives the data start indication, the channel address, and the maximum number of channels, it initiates a data connection request to the scheduler 30, so that the client 20 establishes a data relationship with the scheduler 30.

[0059] In this embodiment, the client 20 can send a data transmission channel (TRANSFER_ESTABLISH_CHANNELS) to the scheduler 30 by commanding a connection relationship. Subsequently, the scheduler 30 can feedback a data start indication (TRANSFER_ESTABLISH_START), a channel address, and a maximum number of channels to the client 20, so that the client 20 determines whether it meets the configuration requirements of the scheduler 30 based on the channel address and maximum number of channels of the scheduler 30. When the client 20 meets the configuration requirements of the scheduler 30, it initiates a data connection request to the scheduler 30, so that the client 20 establishes a data relationship with the scheduler 30. In other words, by predetermining the configuration requirements of the scheduler 30 by the client 20 and establishing a data relationship when the client 20 meets the configuration requirements of the scheduler 30, the computing resources occupied by the scheduler 30 can be effectively reduced.

[0060] In some embodiments, the target baking task includes applying a target light source to a target scene;

[0061] The graphics processor matched by the rendering manager 40 is configured to: determine the bidirectional reflection distribution function of the virtual model surface in the target scene and the light source illumination conditions of the target light source; determine the probability density distribution function of the virtual light in the target scene based on the bidirectional reflection distribution function and the light source illumination conditions; and determine the position distribution information of the virtual light in the target scene based on the probability density distribution function.

[0062] In this embodiment, based on the principle of importance sampling, the graphics processor matched by the rendering manager 40 can be specifically optimized for virtual models with mirrored and Lambert surfaces in the target scene. Specifically, the graphics processor can determine the bidirectional reflectance distribution function (BRDF) of the virtual model surface in the target scene and the illumination conditions of the target light source in the target scene. By analyzing these factors, the graphics processor can calculate the most matching probability density distribution function (PDF) in the target scene and generate light rays based on the PDF, thereby determining the position distribution information of virtual light rays in the target scene.

[0063] In this embodiment, by introducing the importance sampling principle, the distribution of sample points is changed, thereby improving the accuracy of light estimation. Through a comprehensive analysis of the bidirectional reflectance distribution function and the illumination conditions of the light source, it is relatively accurate to determine that the light in some directions contributes the most to the final image, thereby concentrating more computing resources in these directions. Through the bidirectional reflectance distribution function (BRDF) and the illumination conditions of the light source, the highlight reflection part in the mirror surface of the virtual model and the diffuse reflection part in the Lambert surface of the virtual model can be determined to ensure the consistency and authenticity of the overall lighting, thereby improving the efficiency of rendering and enhancing the realism and detail expression of the light map.

[0064] In some embodiments, the graphics processor matched by the rendering manager 40 is configured to: perform path tracing on multiple virtual light rays in the target baking task through the configured OptiX toolkit to obtain a lighting rendering map; perform unbiased solution on the transport equations of multiple virtual light rays in the target baking task through the configured Monte Carlo integration model to obtain an unbiased numerical solution; and obtain a lighting map of the target scene based on the lighting rendering map and the unbiased numerical solution.

[0065] In this embodiment, in view of the fact that each ray in the path tracing rendering technology can be calculated separately, NVIDIA's CUDA (Compute Unified Device Architecture) can be used to give full play to the parallel computing capabilities of the GPU. The highly parallel characteristics of CUDA are highly consistent with the fact that each ray in the path tracing rendering technology can be calculated separately, thereby greatly improving rendering efficiency. Through the configuration of NVIDIA's OptiX toolkit OptiX, multiple rays can be emitted simultaneously, and the throughput can reach tens of millions of rays per second. This efficient parallel processing capability greatly improves the rendering speed and makes real-time path tracing possible. Through the configuration of NVIDIA's OptiX toolkit, rich functions and optimizations are provided to implement complex ray tracing algorithms.

[0066] Through the Monte Carlo integration model, the transport equations of multiple virtual rays in the target baking task can be solved unbiasedly, which means that the accuracy of the results is guaranteed in a statistical sense. On the one hand, it can handle complex lighting effects, and on the other hand, it can effectively reduce noise and improve the image quality of the light map.

[0067] In some embodiments, the graphics processor matched with the rendering manager 40 is further configured to: perform noise reduction processing on the light map by using a configured image noise reduction model and an audio noise reduction model to obtain a denoised light map.

[0068] In this embodiment, by training a large-scale data set, the configured image denoising model and audio denoising model can accurately identify and eliminate image noise and audio noise in the image. Among them, the image denoising model can be an Optix AI denoising model and an OpenImageDenoise AI denoising model. The Optix AI denoising model utilizes NVIDIA's OptiX ray tracing engine in combination with AI, which can efficiently process complex ray tracing tasks on the GPU and optimize image quality in real time through AI algorithms. The OpenImageDenoise AI denoising model provides high-quality, high-performance image denoising capabilities. The denoising model uses advanced machine learning methods to remove noise from the image while maintaining details. The audio denoising model can be a Radeon AI denoising model, which uses AMD hardware acceleration features to improve the speed and effect of denoising.

[0069] In this embodiment, these different denoising interfaces effectively meet the performance and accuracy requirements of different users, while also providing diverse options for lightmap denoising.

[0070] In the embodiments of the present disclosure, the memory of the controller 10 is used to store a computer program that controls the processor of the controller 10 to operate according to the processor configuration method for scene baking in accordance with any embodiment. A skilled person can design a computer program based on the solutions of the embodiments of the present disclosure. How the computer program controls the processor operation is well known in the art and will not be described in detail here.

[0071] <Method Example>

[0072] Figure 5 This is a flowchart of a method for configuring a processor for scene baking according to an embodiment. Figure 1 Middle controller 10.

[0073] like Figure 5 As shown, the processor configuration method for scene baking in this embodiment may include the following steps S510 to S540:

[0074] Step S510 : in response to the client sending a target baking request for performing a target baking task for a target scene, sending an authorization request to an authorization terminal.

[0075] In this embodiment, if Figure 2 As shown, after the user submits the above baking request, the client 20 initiates a connection request to the controller 10 and sends the client identification TOKEN of the client 20. The controller 10 responds to the connection request and receives the client identification TOKEN. The controller 10 initiates a connection request to the authorization terminal 50 and sends the client identification TOKEN of the client 20. The authorization terminal 50 determines whether the client 20 with the client identification TOKEN can be authorized and returns the authorization result of the client 20 to the controller 10. By setting a client identification for each client 20, the controller 10 can distinguish between each client 20 to implement lighting baking for virtual scenes that need to be baked by multiple clients 20.

[0076] Step S520: When the authorization end feeds back that the authorization is passed, the client is instructed to establish a data connection relationship with the scheduler, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler.

[0077] In this embodiment, if Figure 2As shown, when the authorization result received by the controller 10 is authorization passed, the controller 10 can determine the rendering cluster assigned to the client 20 and the cluster identifier ClusterID representing the rendering cluster, then return the authorization result to the client 20 and send the scheduler address and cluster identifier ClusterID to the client 20. When the client 20 receives the scheduler address, cluster identifier ClusterID and the authorization result, the client 20 can initiate a connection request to the scheduler 30 and send the cluster identifier ClusterID and the scene data of the target scene. In other words, the client 20 sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler 30.

[0078] Step S530: Determine the rendering manager associated with the task configuration information.

[0079] In this embodiment, if Figure 4 As shown, there are multiple rendering managers 40, and the multiple rendering managers 40 can receive partial scene data about the target scene sent by the scheduler 30 and allocate matching graphics processors to process the partial scene data.

[0080] Step S540: Setting the graphics processor matched by the rendering manager to execute the target baking task for processing the scene data.

[0081] In this embodiment, each rendering manager is also matched with at least one graphics processing unit (GPU). Each graphics processing unit matched with a rendering manager can calculate the direct illumination and indirect illumination of the target scene under the call of the rendering manager to render the corresponding light map (Lightmap). The controller can set the scheduling standard of the scheduler and feedback the scheduling standard to the scheduler. The scheduling standard here is generally to schedule the corresponding rendering manager based on the scene characteristics of the virtual scene to be baked. The scene characteristics may include the geometric complexity, material, texture resources, number of light sources and spatial scale of all models in the virtual scene. Based on the scheduling standard, the scheduler can determine the rendering manager associated with the corresponding task matching information. The scheduler feeds back the scene data of the target scene to the associated rendering manager, so that the associated rendering manager can call the corresponding graphics processor to process the scene data of the target scene to achieve lighting baking for the target scene.

[0082] In this embodiment, the controller of the processor configuration system for scene baking can respond to target baking requests issued by the client and send an authorization request to the authorization end. When the authorization end responds that the authorization is approved, the controller instructs the client to establish a data connection relationship with the scheduler. The client can send the response task configuration information to the scheduler, so that the scheduler can instruct the corresponding rendering manager to process the scene data with each graphics processor matched by the rendering manager. Through the controller, scheduler, and rendering manager, data transmission between multiple graphics processors is established to achieve the efficient transmission and synchronization of scene data between multiple graphics processors, effectively reducing the delay of scene data transmission and improving the baking efficiency of virtual scene lighting.

[0083] In some embodiments, before instructing the client to establish a data connection relationship with the scheduler, the method further includes the following steps S610 and S620:

[0084] Step S610: determining the task identifiers corresponding to the remaining baking tasks in the preset processor processing queue.

[0085] Step S620 : When the number of task identifiers exceeds a set threshold, the task identifier of the target baking task is configured in a processor processing queue.

[0086] In this embodiment, the controller can obtain the load of each rendering manager or graphics processor through the scheduler. When the load exceeds a set load, it enters queuing mode. In queuing mode, the controller can extract the task ID of the baking task to be processed and assign the task ID to the processing position in the processor processing queue according to the chronological order of the baking task. The load here is generally measured in terms of the number of users, and the set load can be a pre-set upper limit on the number of users.

[0087] In this embodiment, the set threshold may be 0. There is one task ID in the processor processing queue, and the task ID is ranked first. If the number of task IDs exceeds the set threshold, the target baking task is configured at the second position in the processor processing queue.

[0088] In this embodiment, by setting a processor processing queue, it is possible to effectively avoid overloading of the graphics processor, thereby reducing the subsequent maintenance cost of the graphics processor.

[0089] <Device Example>

[0090] Figure 6 FIG. 1 shows a schematic diagram of the structure of a controller according to an embodiment of the present disclosure. Figure 6 As shown, the controller 600 includes a response module 610 , an indication module 620 , a determination module 630 and a setting module 640 .

[0091] The response module 610 is configured to send an authorization request to the authorization end in response to a target baking request sent by the client to perform a target baking task for a target scene;

[0092] The instruction module 620 is used to instruct the client to establish a data connection relationship with the scheduler when the authorization end feedbacks that the authorization is passed, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler;

[0093] The determination module 630 is used to determine the rendering manager associated with the task configuration information;

[0094] The setting module 640 is used to set the graphics processor matched by the rendering manager to execute the target baking task for processing scene data.

[0095] In some embodiments, the controller 600 includes a configuration module for determining task identifiers corresponding to remaining baking tasks in a preset processor processing queue; when the number of task identifiers exceeds a set threshold, configuring the task identifier of the target baking task in the processor processing queue.

[0096] <Equipment Example>

[0097] Figure 7 Schematic diagram of the hardware structure of electronic devices according to other embodiments is shown. Figure 7 As shown, the electronic device 700 includes a processor 710 and a memory 720, wherein the memory 720 is used to store a computer program, and the computer program is used to control the processor 710 to operate so as to control the electronic device 700 to execute the processor configuration method for scene baking according to any embodiment of the present disclosure.

[0098] An embodiment of the present disclosure further provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, the computer program implements the processor configuration method for scene baking according to any embodiment of the present disclosure.

[0099] The embodiments of the present disclosure further provide a computer program product, which includes a computer program or instructions. When the computer program or instructions are executed by a processor, the processor configuration method for scene baking according to any embodiment of the disclosure is implemented.

[0100] The various embodiments in this specification are described in a progressive manner. Similar portions between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the device and apparatus embodiments are generally similar to the method embodiments, so their descriptions are relatively simplified. For relevant portions, reference can be made to the descriptions of the method embodiments.

[0101] The foregoing description of this specification describes specific embodiments. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0102] The embodiments of this specification may be devices, methods, and / or computer program products. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the embodiments of this specification.

[0103] A computer-readable storage medium can be a tangible device that can hold and store instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination thereof. As used herein, a computer-readable storage medium is not to be construed as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through an electrical wire.

[0104] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routing units, firewalls, switches, gateway computers, and / or edge service units. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0105] The computer program instructions for executing the embodiments of the present specification may be assembly instructions, instruction set architecture (ISA) instructions, machine unit instructions, machine unit dependent instructions, microcode, firmware instructions, state setting data, or source code or first code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" language or similar programming languages. The computer readable program instructions may be executed entirely on the first user computer, partially on the first user computer, as an independent software package, partially on the first user computer and partially on a remote computer, or entirely on a remote computer or service unit. In the case of a remote computer, the remote computer may be connected to the first user computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, by utilizing state information of computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit can execute the computer-readable program instructions to implement various aspects of the embodiments of this specification.

[0106] Various aspects of the embodiments of this specification are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of this specification. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0107] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine unit, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0108] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0109] The flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to the multiple embodiments of this specification. In this regard, each box in the flowchart or block diagram can represent a module, program segment or part of an instruction, and a part of the module, program segment or instruction contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order than that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart, can be implemented by a dedicated hardware-based system that performs the specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions. It is well known to those skilled in the art that implementation by hardware, implementation by software, and implementation by a combination of software and hardware are all equivalent.

[0110] The embodiments of the present specification have been described above. The above description is illustrative and not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A processor configuration system for scene baking, wherein: The system includes a controller, a client, a scheduler, and a rendering manager; The controller is configured to: send an authorization request to an authorization end in response to a target baking request sent by a client for a target baking task for a target scene; when the authorization end feeds back that the authorization is passed, instruct the client to establish a data connection relationship with a scheduler, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler; determine the rendering manager associated with the task configuration information; and set a graphics processor matched by the rendering manager to execute the target baking task for processing the scene data.

2. The processor configuration system for scene baking according to claim 1, wherein: The controller is further configured to: before instructing the client to establish a data connection relationship with the scheduler, determine the task identifiers corresponding to the remaining baking tasks in a preset processor processing queue; when the number of the task identifiers exceeds a set threshold, configure the task identifier of the target baking task in the processor processing queue.

3. The processor configuration system for scene baking according to claim 1, wherein: When the scheduler receives the data transmission channel sent by the client through the command connection relationship, the scheduler sends a data start indication, a channel address and a maximum number of channels to the client; When the client receives the data start indication, the channel address and the maximum number of channels, the client initiates a data connection request to the scheduler, so that the client establishes a data relationship with the scheduler.

4. The processor configuration system for scene baking according to claim 1, wherein: The target baking task includes a target light source acting on the target scene; The graphics processor matched by the rendering manager is configured to: determine the bidirectional reflection distribution function of the virtual model surface in the target scene and the light source illumination conditions of the target light source; determine the probability density distribution function of the virtual light in the target scene based on the bidirectional reflection distribution function and the light source illumination conditions; and determine the position distribution information of the virtual light in the target scene based on the probability density distribution function.

5. The processor configuration system for scene baking according to claim 1, wherein: The graphics processor matched with the rendering manager is configured to: perform path tracing on multiple virtual light rays in the target baking task through the configured OptiX toolkit to obtain a lighting rendering image; perform unbiased solution to the transport equations of multiple virtual light rays in the target baking task through the configured Monte Carlo integration model to obtain an unbiased numerical solution; and obtain a lighting map of the target scene based on the lighting rendering image and the unbiased numerical solution.

6. The processor configuration system for scene baking according to claim 5, wherein: The graphics processor matched by the rendering manager is further configured to perform noise reduction processing on the light map by using a configured image noise reduction model and an audio noise reduction model to obtain a denoised light map.

7. A processor configuration method for scene baking, wherein: The processor configuration method for scene baking adopts the processor configuration system for scene baking according to any one of claims 1 to 6, wherein the system includes a controller, a client, a scheduler, and a rendering manager. The controller is the executing entity of the method, and the method further includes: In response to a target baking request sent by the client to perform a target baking task for a target scene, sending an authorization request to the authorization end; When the authorization end provides feedback that the authorization is passed, the authorization end instructs the client to establish a data connection relationship with the scheduler, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler; Determining a rendering manager associated with the task configuration information; A graphics processor matched with the rendering manager is set to execute the target baking task for processing the scene data.

8. The processor configuration method for scene baking according to claim 7, wherein: Before instructing the client to establish a data connection relationship with the scheduler, the method includes: Determine the task identifiers corresponding to the remaining baking tasks in the preset processor processing queue; When the number of the task identifiers exceeds a set threshold, the task identifiers of the target baking tasks are configured in the processor processing queue.

9. A controller, wherein: The controller includes: A response module, configured to send an authorization request to an authorization end in response to a target baking request sent by a client to perform a target baking task for a target scene; an instruction module, configured to instruct the client to establish a data connection relationship with the scheduler when the authorization end feeds back that the authorization is passed, so that the client sends the task configuration information of the target baking task and the scene data of the target scene to the scheduler; A determination module, configured to determine a rendering manager associated with the task configuration information; A setting module is used to set a graphics processor matched by the rendering manager to execute the target baking task of processing the scene data.

10. A controller, characterized in that: The system comprises a memory and a processor, wherein the memory is used to store a computer program; and the processor is used to execute the computer program to implement the method according to claim 7 or 8.

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