Driving circuit, driving method and driver

Abstract

The invention provides a driving circuit, a driving method and a driver, the driving circuit comprises a resistor driving module, a capacitor driving module and a plurality of first selection modules, the resistor driving module outputs a plurality of first signals by using a resistor voltage division mode, and the capacitor driving module outputs a plurality of second signals by using a capacitor charging and discharging mode; and then receiving a first signal and a second signal corresponding to the first selection module through the first selection module, and selecting one of the first signal and the second signal corresponding to the first selection module, which has a larger voltage value, as a driving signal of the display screen to be output. Therefore, under the condition that the voltage value of the second signal output by the capacitor driving module is too low, the first signal with the voltage value larger than that of the second signal is selected as the driving signal to be output, and the situation that the voltage value of the driving signal is too low due to the large capacitance value error of the capacitor in the capacitor driving circuit in the related technology is avoided; and the display shadow phenomenon of the display screen is avoided.

Description

Technical Field

[0001] The present application belongs to the technical field of display screens, and specifically relates to a driving circuit, a driving method, and a driver. Background Art

[0002] In the related art, a capacitor driving circuit uses a capacitor charging and discharging method to output multiple different driving signals, thereby driving a display screen.

[0003] However, due to the large capacitance error of the capacitor in the capacitor driving circuit, the voltage value of the driving signal is too low, which causes the display screen to display a dark shadow phenomenon. Summary of the Invention

[0004] The present application aims to provide a driving circuit, a driving method and a driver, which at least solve the problem in the related art that due to the large capacitance value error of the capacitor in the capacitor driving circuit, the voltage value of the driving signal is too low, thereby causing the display screen to display dark shadows.

[0005] In order to solve the above technical problems, this application is implemented as follows:

[0006] In a first aspect, an embodiment of the present application provides a driving circuit, comprising: a resistance driving module, a capacitance driving module, and a plurality of first selection modules;

[0007] The resistance driving module is connected to each of the first selection modules respectively, and the resistance driving module is used to output a plurality of first signals using a resistance voltage division method;

[0008] The capacitor driving module is connected to each of the first selection modules respectively, and the capacitor driving module is used to output a plurality of second signals using a capacitor charging and discharging method;

[0009] Each of the first selection modules has a corresponding first signal and a second signal. The first selection module is used to receive the first signal and the second signal corresponding to the first selection module, and select the one with the larger voltage value between the first signal and the second signal corresponding to the first selection module as the driving signal of the display screen for output.

[0010] In a second aspect, an embodiment of the present application further provides a driving method, which is applied to the driving circuit according to the first aspect, and the method includes:

[0011] A plurality of first signals are obtained by using the resistance voltage division method, and a plurality of second signals are obtained by using the capacitor charge-discharge method; the first signals correspond to the second signals;

[0012] The one with the larger voltage value between the first signal and a second signal corresponding to the first signal is determined as the driving signal for the display screen.

[0013] In a third aspect, an embodiment of the present application further provides a driver, comprising the driving circuit as described in the first aspect, or implementing the driving method as described in the second aspect.

[0014] In an embodiment of the present application, a plurality of first signals are outputted by a resistor driving module using a resistor voltage division method, and a plurality of second signals are outputted by a capacitor driving module using a capacitor charging and discharging method, and then the first signal and the second signal corresponding to the first selection module are received by the first selection module, and the one with the larger voltage value among the first signal and the second signal corresponding to the first selection module is selected as the driving signal of the display screen for output, so that when the voltage value of the second signal outputted by the capacitor driving module is too low, the first signal with a larger voltage value than the second signal is selected as the driving signal for output, thereby avoiding the large capacitance error of the capacitor in the capacitor driving circuit in the related art causing the voltage value of the driving signal to be too low, thereby avoiding the display screen from displaying dark shadows. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0016] Figure 1 is a schematic diagram of a driving circuit provided in an embodiment of the present application;

[0017] Figure 2 is a schematic diagram of a selection submodule provided in an embodiment of the present application;

[0018] Figure 3 is a schematic diagram of a selection unit provided in an embodiment of the present application;

[0019] Figure 4 is a schematic diagram of a resistance driving module provided in an embodiment of the present application;

[0020] Figure 5 is a schematic diagram of a capacitor driving module provided in an embodiment of the present application;

[0021] Figure 6 This is a flowchart of the steps of a driving method provided in an embodiment of the present application.

[0022] Reference numerals:

[0023] 10-resistance driving module; 20-capacitor driving module; 21-charging submodule; 22-energy storage control submodule; 30-first selection module; 40-second selection module; 41-selection submodule; 411-selection unit; P1-first operational amplifier; P2-second operational amplifier; P3-third operational amplifier; D1-first diode; D2-second diode; K1-first switching device; K2-second switching device; K3-third switching device; K4-fourth switching device; K5-fifth switching device; K6-sixth switching device; K7-seventh switching device; R1-first resistor; R2-second resistor; R3-third resistor; R4-fourth resistor; R5-fifth resistor; R6-sixth resistor. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0025] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0026] Reference Figure 1 An embodiment of the present application provides a driving circuit, including: a resistance driving module 10, a capacitance driving module 20 and multiple first selection modules 30; the resistance driving module 10 is respectively connected to each of the first selection modules 30, and the resistance driving module 10 is used to output multiple first signals using a resistance voltage division method; the capacitance driving module 20 is respectively connected to each of the first selection modules 30, and the capacitance driving module 20 is used to output multiple second signals using a capacitance charging and discharging method; each of the first selection modules 30 has a corresponding first signal and a second signal, and the first selection module 30 is used to receive the first signal and the second signal corresponding to the first selection module 30, and select the one with the larger voltage value between the first signal and the second signal corresponding to the first selection module 30 as the driving signal for output as the display screen.

[0027] In some embodiments, each first selection module 30 outputs a driving signal, and the driving circuit outputs a plurality of driving signals in total to drive the display screen.

[0028] In some embodiments, the resistance driving module 10 is connected to a power source, and the capacitance driving module 20 is connected to a power source.

[0029] In some embodiments, the driving circuit may use a variety of bias modes, such as a 1 / 2 bias mode, a 1 / 3 bias mode, a 1 / 4 bias mode, or other bias modes with specific ratios.

[0030] The driving circuit includes a resistance driving module 10, a capacitance driving module 20 and p first selection modules 30, where p is a positive integer, the voltage value of the power supply is Vr, each first selection module 30 outputs a driving signal, and the driving circuit outputs a total of p driving signals, the p driving signals including a driving signal A1, a driving signal A2, ..., a driving signal Ap, and the voltage value of the kth driving signal is (k / p) × Vr, where k is a positive integer less than or equal to p.

[0031] For example, the driving circuit uses a 1 / 4 bias method. The driving circuit includes a resistance driving module 10, a capacitance driving module 20 and four first selection modules 30. The voltage value of the power supply is V1. Each first selection module 30 outputs a driving signal. The driving circuit outputs a total of four driving signals. The four driving signals include a driving signal A1, a driving signal A2, a driving signal A3 and a driving signal A4. The voltage value of the driving signal A1 is (1 / 4)×V1, the voltage value of the driving signal A2 is (2 / 4)×V1, the voltage value of the driving signal A1 is (3 / 4)×V1, and the voltage value of the driving signal A1 is (4 / 4)×V1.

[0032] For another example, the driving circuit uses a 1 / 3 bias method. The driving circuit includes a resistance driving module 10, a capacitance driving module 20 and three first selection modules 30. The voltage value of the power supply is V2. Each first selection module 30 outputs a driving signal. The driving circuit outputs a total of three driving signals. The three driving signals include a driving signal A5, a driving signal A6 and a driving signal A7. The voltage value of the driving signal A5 is (1 / 3)×V2, the voltage value of the driving signal A6 is (2 / 3)×V2, and the voltage value of the driving signal A7 is (3 / 3)×V2.

[0033] For another example, the driving circuit uses a 1 / 2 bias method. The driving circuit includes a resistance driving module 10, a capacitance driving module 20 and two first selection modules 30. The voltage value of the power supply is V3. Each first selection module 30 outputs a driving signal. The driving circuit outputs a total of two driving signals. The two driving signals include a driving signal A8 and a driving signal A9. The voltage value of the driving signal A8 is (1 / 2)×V3, and the voltage value of the driving signal A9 is (2 / 2)×V3.

[0034] In some embodiments, the voltage value of the first signal corresponding to each first selection module 30 is the same as the voltage value of the second signal.

[0035] In some embodiments, the resistance driving module 10 inputs a first signal corresponding to the first selection module 30 to the first selection module 30 , and the capacitance driving module 20 inputs a second signal corresponding to the first selection module 30 to the first selection module 30 .

[0036] In some embodiments, the capacitor driving module 20 may use a variety of bias modes, such as a 1 / 2 bias mode, a 1 / 3 bias mode, a 1 / 4 bias mode, or other bias modes with specific ratios.

[0037] In some embodiments, the resistance driving module 10 may use a variety of bias modes, such as a 1 / 2 bias mode, a 1 / 3 bias mode, a 1 / 4 bias mode, or other bias modes with specific ratios.

[0038] For example, the driving circuit includes a resistance driving module 10, a capacitance driving module 20, and four first selection modules 30. The resistance driving module 10 uses a 1 / 4 bias mode, and the resistance driving module 10 outputs a total of four first signals, which are respectively a first signal a1, a first signal a2, a first signal a3, and a first signal a4; the capacitance driving module 20 uses a 1 / 4 bias mode, and the capacitance driving module 20 outputs a total of four second signals, which are respectively a second signal b1, a second signal b2, a second signal b3, and a second signal b4;

[0039] Each first selection module 30 outputs a driving signal, and the driving circuit outputs a total of 4 driving signals, including driving signal A1, driving signal A2, driving signal A3 and driving signal A4. The resistance driving module 10 inputs the first signal a1 to the first first selection module 30, and the capacitance driving module 20 inputs the second signal b1 to the first first selection module 30. The first first selection module 30 selects the one with the larger voltage value from the first signal a1 and the second signal b1 as the driving signal A1 of the display screen; the resistance driving module 10 inputs the first signal a2 to the first first selection module 30, and the capacitance driving module 20 inputs the second signal b2 to the first first selection module 30. The first first selection module 30 selects the one with the larger voltage value from the first signal a1 and the second signal b1, and outputs it as the driving signal A1 of the display screen; 2 and the second signal b2, whichever has a larger voltage value, is output as the driving signal A2 of the display screen; the resistance driving module 10 inputs the first signal a3 to the first first selection module 30, and the capacitance driving module 20 inputs the second signal b3 to the first first selection module 30, and the first first selection module 30 selects the larger voltage value from the first signal a3 and the second signal b3 as the driving signal A3 of the display screen; the resistance driving module 10 inputs the first signal a4 to the first first selection module 30, and the capacitance driving module 20 inputs the second signal b4 to the first first selection module 30, and the first first selection module 30 selects the larger voltage value from the first signal a4 and the second signal b4 as the driving signal A4 of the display screen.

[0040] In some embodiments, the voltage value of each first signal is different.

[0041] In some embodiments, the voltage value of each second signal is different.

[0042] In some embodiments, the display screen may be a liquid crystal display (LCD) screen.

[0043] In an embodiment of the present application, the resistance driving module 10 uses a resistance voltage division method to output multiple first signals, and the capacitance driving module 20 uses a capacitance charging and discharging method to output multiple second signals, and then the first selection module 30 receives the first signal and the second signal corresponding to the first selection module 30, and selects the one with the larger voltage value of the first signal and the second signal corresponding to the first selection module 30 as the driving signal of the display screen for output. Therefore, when the voltage value of the second signal output by the capacitance driving module 20 is too low, the first signal with a larger voltage value than the second signal is selected as the driving signal for output, thereby avoiding the large capacitance error of the capacitor in the capacitance driving circuit in the related art causing the voltage value of the driving signal to be too low, thereby avoiding the display screen from displaying dark shadows.

[0044] Optionally, in some embodiments, the first selection module 30 includes a first operational amplifier P1, a first diode D1, a second operational amplifier P2, and a second diode D2; the non-inverting input terminal of the first operational amplifier P1 is used to receive the first signal corresponding to the first selection module 30, and the output terminal of the first operational amplifier P1 is connected to the positive electrode of the first diode D1; the cathode of the first diode D1 is respectively connected to the inverting input terminal of the first operational amplifier P1, the inverting input terminal of the second operational amplifier P2, and the output terminal of the first selection module 30; the non-inverting input terminal of the second operational amplifier P2 is used to receive the second signal corresponding to the first selection module 30, and the output terminal of the second operational amplifier P2 is connected to the positive electrode of the second diode D2; the cathode of the second diode D2 is respectively connected to the inverting input terminal of the first operational amplifier P1, the inverting input terminal of the second operational amplifier P2, and the output terminal of the first selection module 30.

[0045] In some embodiments, the positive electrode of the first operational amplifier P1 is connected to the power supply, and the negative electrode of the first operational amplifier P1 is grounded; the positive electrode of the second operational amplifier P2 is connected to the power supply, and the negative electrode of the second operational amplifier P2 is grounded.

[0046] In the embodiment of the present application, the first signal corresponding to the first selection module 30 is received through the non-inverting input terminal of the first operational amplifier P1, and the first signal is output through the output terminal of the first operational amplifier P1; the second signal corresponding to the first selection module 30 is received through the non-inverting input terminal of the second operational amplifier P2, and the second signal is output through the output terminal of the second operational amplifier P2; when the voltage value of the first signal is greater than the voltage value of the second signal, the first diode D1 is turned on and the second diode D2 is turned off, and the first operational amplifier P1 operates in the linear region. Due to the closed-loop negative feedback, the output terminal of the first selection module 30 outputs the first signal; when the voltage value of the first signal is less than the voltage value of the second signal, the first diode D1 is turned off and the second diode D2 is turned on, and the second operational amplifier P2 operates in the linear region. Due to the closed-loop negative feedback, the output terminal of the first selection module 30 outputs the second signal, thereby always maintaining the larger voltage value of the first signal and the second signal corresponding to the first selection module 30 as the driving signal of the display screen, so as to ensure that the voltage value of the driving signal of the display screen is larger and the brightness of the display screen is higher.

[0047] Optionally, in some embodiments, the driving circuit further includes a second selection module 40; the second selection module 40 is respectively connected to each of the first selection modules 30, and the second selection module 40 is used to connect to the driving end of the display screen and select one of the driving signals output by all the first selection modules 30 for output based on the received selection signal group.

[0048] In the embodiment of the present application, the second selection module 40 selects one of the driving signals output by all the first selection modules 30 according to the received selection signal group to output so as to drive the display screen.

[0049] Optionally, in some embodiments, the second selection module 40 includes multiple first switching devices K1 and a selection submodule 41; the first switching device K1 corresponds to the first selection module 30; the selection submodule 41 has multiple selection ends, and the selection ends correspond to the first switching device K1; the first end of the first switching device K1 is connected to the output end of the first selection module 30 corresponding to the first switching device K1, the second end of the first switching device K1 is connected to the driving end of the display screen, and the control end of the first switching device K1 is connected to the selection end corresponding to the first switching device K1; wherein, the selection submodule 41 is used to select one of all the first switching devices K1 to be turned on according to the selection signal group.

[0050] In some embodiments, the first switch device K1 may be a MOS (Metal-Oxide-Semiconductor Field-Effect Transistor), a triode, a relay, or other types of switch devices.

[0051] In some embodiments, the driving circuit includes four first selection modules 30, and the second selection module 40 includes four first switching devices K1. When the driving circuit uses a 1 / 4 bias mode, the selection submodule 41 selects one of the four first switching devices K1 to be turned on. When the driving circuit uses a 1 / 3 bias mode, the selection submodule 41 selects one of the three first switching devices K1 to be turned on.

[0052] In the embodiment of the present application, the selection submodule 41 selects one of all the first switch devices K1 to be turned on according to the selection signal group, so as to select one of the drive signals output by all the first selection modules 30 to be output.

[0053] Optionally, refer to Figure 2In some embodiments, the selection submodule 41 includes multiple selection units 411; the selection signal group includes multiple selection signals; the selection unit 411 has a corresponding first switch device K1 and a selection signal; the output end of the selection unit 411 is connected to the control end of the first switch device K1 corresponding to the selection unit 411, and the selection unit 411 is used to receive the selection signal corresponding to the selection unit 411, and turn on the first switch device K1 corresponding to the selection unit 411 when the selection signal corresponding to the selection unit 411 is at a first level, and turn off the first switch device K1 corresponding to the selection unit 411 when the selection signal corresponding to the selection unit 411 is at a second level.

[0054] In some embodiments, the first level is opposite to the second level, for example, the first level is a high level and the second level is a low level.

[0055] In an embodiment of the present application, the selection signal corresponding to the selection unit 411 is received by the selection unit 411, and when the selection signal corresponding to the selection unit 411 is at a first level, the first switching device K1 corresponding to the selection unit 411 is turned on, and when the selection signal corresponding to the selection unit 411 is at a second level, the first switching device K1 corresponding to the selection unit 411 is turned off, so as to select one of the drive signals output by all the first selection modules 30 for output.

[0056] Optionally, refer to Figure 3 In some embodiments, the selection unit 411 includes a first resistor R1, a second resistor R2, a third resistor R3, and a second switch device K2; in the selection unit 411, the first end of the first resistor R1 is used to connect to a power supply, and the second end of the first resistor R1 is respectively connected to the first end of the second switch device K2 and the control end of the first switch device K1; the first end of the second resistor R2 is connected to the second end of the second switch device K2, and the second end of the second resistor R2 is grounded; the first end of the third resistor R3 is used to receive a selection signal corresponding to the selection unit 411, and the second end of the third resistor R3 is connected to the control end of the second switch device K2; the first end of the second switch device K2 is connected to the control end of the first switch device K1.

[0057] In some embodiments, the second switch device K2 includes a MOS transistor, a triode, a relay, or other types of switch devices.

[0058] In the embodiment of the present application, the first resistor R1 and the second resistor R2 are both voltage-dividing resistors, and the third resistor R3 is a current-limiting resistor; when the control terminal of the second switch device K2 is at a first level, the second switch device K2 is turned on, and when the control terminal of the second switch device K2 is at a second level, the second switch device K2 is turned off.

[0059] Optionally, in some embodiments, the resistance driving module 10 includes n fourth resistors R4, where n is a positive integer; each of the fourth resistors R4 has a corresponding first selection module 30; the first end of the first fourth resistor R4 is used to connect to the power supply, the second end of the i-th fourth resistor R4 is connected to the first end of the i+1-th fourth resistor R4, and the second end of the n-th fourth resistor R4 is grounded, where i is a positive integer less than n; wherein the first end of the fourth resistor R4 is connected to the first input end of the first selection module 30 corresponding to the fourth resistor R4.

[0060] In some embodiments, the resistance value of each fourth resistor R4 is the same.

[0061] Reference Figure 4 In some embodiments, the driving circuit includes a resistance driving module 10, a capacitance driving module 20, and four first selection modules 30; the resistance driving module 10 includes four fourth resistors R4, wherein a first end of the first fourth resistor R4 is connected to a power supply, a second end of the first fourth resistor R4 is connected to a first end of a second fourth resistor R4, a second end of the second fourth resistor R4 is connected to a first end of a third fourth resistor R4, a second end of the third fourth resistor R4 is connected to a first end of a fourth fourth resistor R4, and a second end of the fourth fourth resistor R4 is grounded; a first end of the first fourth resistor R4 is connected to a first input end of the first first selection module 30, a first end of the second fourth resistor R4 is connected to a first input end of the second first selection module 30, a first end of the third fourth resistor R4 is connected to a first input end of the third first selection module 30, and a first end of the fourth fourth resistor R4 is connected to a first input end of the fourth first selection module 30.

[0062] In some embodiments, the voltage value of the first terminal of the first fourth resistor R4 is:

[0063] RCLL4=Vr

[0064] RCLL4 is the voltage value of the first end of the first fourth resistor R4, and Vr is the voltage value of the power supply.

[0065] In some embodiments, the voltage value of the first terminal of the second fourth resistor R4 is:

[0066]

[0067] Among them, RCLL3 is the voltage value of the first end of the second fourth resistor R4, r1 is the resistance value of the first fourth resistor R4, r2 is the resistance value of the second fourth resistor R4, r3 is the resistance value of the third fourth resistor R4, and r4 is the resistance value of the fourth fourth resistor R4.

[0068] In some embodiments, the voltage value of the first terminal of the third fourth resistor R4 is:

[0069]

[0070] RCLL2 is the voltage value of the first end of the third fourth resistor R4.

[0071] In some embodiments, the voltage value of the first terminal of the fourth resistor R4 is:

[0072]

[0073] RCLL1 is the voltage value of the first end of the fourth resistor R4.

[0074] In the embodiment of the present application, since the n fourth resistors R4 in the resistance driving module 10 are connected in series and form a loop with the power supply, the n fourth resistors R4 can be used to divide the voltage.

[0075] Optionally, in some embodiments, the capacitor driving module 20 includes a charging submodule 21, an energy storage control submodule 22 and m first capacitors, where m is a positive integer; each first capacitor has a corresponding first selection module 30; the charging submodule 21 is connected to the energy storage control submodule 22, and the charging submodule 21 is used to charge the energy storage control submodule 22; the energy storage control submodule 22 is respectively connected to each of the first capacitors, and the energy storage control submodule 22 is used to control the charging and discharging of each of the first capacitors; the first capacitor is connected to the first selection module 30 corresponding to the first capacitor.

[0076] In the embodiment of the present application, the energy storage control submodule 22 is charged by the charging submodule 21, and then the energy storage control submodule 22 controls the charging and discharging of each first capacitor, so that the capacitor driving module 20 outputs multiple second signals using the capacitor charging and discharging method.

[0077] Optionally, in some embodiments, the charging submodule 21 includes a third switching device K3, a fifth resistor R5, a sixth resistor R6 and a third operational amplifier P3; the first end of the third switching device K3 is used to connect to the power supply, the second end of the third switching device K3 is respectively connected to the first end of the fifth resistor R5 and the first end of the energy storage control submodule 22, and the control end of the third switching device K3 is connected to the output end of the third operational amplifier P3; the first end of the fifth resistor R5 is connected to the first end of the energy storage control submodule 22, and the second end of the fifth resistor R5 is respectively connected to the first end of the sixth resistor R6 and the inverting input end of the third operational amplifier P3; the first end of the sixth resistor R6 is connected to the inverting input end of the third operational amplifier P3, and the second end of the sixth resistor R6 is grounded; the non-inverting input end of the third operational amplifier P3 is used to receive a reference signal.

[0078] In some embodiments, the third switch device K3 includes a MOS transistor, a triode, a relay, or other types of switch devices.

[0079] In some embodiments, the voltage value of the reference signal is greater than zero volts.

[0080] In the embodiment of the present application, the fifth resistor R5 and the sixth resistor R6 are both voltage-dividing resistors; when a reference signal is input to the non-inverting input terminal of the third operational amplifier P3, the first end of the fifth resistor R5 outputs a charging current; when the reference signal is stopped from being input to the non-inverting input terminal of the third operational amplifier P3, the first end of the fifth resistor R5 has no output.

[0081] Optionally, in some embodiments, the energy storage control submodule 22 includes a second capacitor, a plurality of fourth switching devices K4, a plurality of fifth switching devices K5, a sixth switching device K6, and a seventh switching device K7; the jth first capacitor has a corresponding fourth switching device K4 and a fifth switching device K5, j is a positive integer less than m; the first end of the second capacitor is respectively connected to the first end of each of the fourth switching devices K4 and the first end of the seventh switching device K7, and the second end of the second capacitor is respectively connected to the first end of each of the fifth switching devices K5 and the first end of the sixth switching device K6; the first end of the jth first capacitor is respectively connected to the jth The second input end of the first selection module 30 corresponding to the first capacitor, the second end of the fourth switch device K4 and the second end of the fifth switch device K5 are connected; the first end of the mth first capacitor is respectively connected to the second end of the sixth switch device K6 and the second input end of the first selection module 30 corresponding to the mth first capacitor; the second end of each first capacitor is grounded; the second end of the fifth switch device K5 is connected to the second end of the fourth switch device K4 corresponding to the fifth switch device K5; the second end of the fifth switch device K5 corresponding to the first first capacitor is connected to the output end of the charging submodule 21; and the second end of the seventh switch device K7 is grounded.

[0082] In some embodiments, the type of the fourth switching device K4 , the type of each fifth switching device K5 , the type of the sixth switching device K6 , and the type of the seventh switching device K7 all include MOS transistors, triodes, relays, or other types of switching devices.

[0083] Reference Figure 5 In some embodiments, the driving circuit includes a resistance driving module 10, a capacitance driving module 20, and four first selection modules 30; the capacitance driving module 20 includes a charging submodule 21, an energy storage control submodule 22, and four first capacitors; the energy storage control submodule 22 includes a second capacitor, three fourth switching devices K4, three fifth switching devices K5, a sixth switching device K6, and a seventh switching device K7;

[0084] The first end of the second capacitor is connected to the first end of each fourth switch device K4 and the first end of the seventh switch device K7, respectively, and the second end of the second capacitor is connected to the first end of each fifth switch device K5 and the first end of the sixth switch device K6, respectively; the first end of the first first capacitor is connected to the second input end of the fourth first selection module 30, the second end of the first fourth switch device K4, and the second end of the first fifth switch device K5, respectively, and the first end of the second first capacitor is connected to the second input end of the third first selection module 30, the second end of the second fourth switch device K4, and the second end of the second fifth switch device K5, respectively. The first end of the third first capacitor is respectively connected to the second input end of the second first selection module 30, the second end of the third fourth switch device K4, and the second end of the third fifth switch device K5; the first end of the fourth first capacitor is respectively connected to the second end of the sixth switch device K6 and the second input end of the first first selection module 30; the second end of each first capacitor is grounded; the second end of the fifth switch device K5 is connected to the second end of the fourth switch device K4 corresponding to the fifth switch device K5; the second end of the first fifth switch device K5 is connected to the output end of the charging submodule 21; and the second end of the seventh switch device K7 is grounded.

[0085] In some embodiments, in the first stage, the seventh switch device K7 and the first fifth switch device K5 are both turned on, and each of the fourth switch device K4, the second fifth switch device K5, the third fifth switch device K5, and the sixth switch device K6 are turned off. A reference signal is input to the non-inverting input terminal of the third operational amplifier P3, and the first end of the fifth resistor R5 outputs a charging current, so that the charging submodule 21 charges the second capacitor. The voltage value of the second capacitor is:

[0086]

[0087] Wherein, VC2 is the voltage value of the second capacitor, Vref is the voltage value of the reference signal, r5 is the resistance value of the fifth resistor R5, and r6 is the resistance value of the sixth resistor R6.

[0088] At the same time, the charging submodule 21 also charges the first first capacitor. The voltage value of the first first capacitor is equal to the voltage value of the second capacitor. The voltage value of the first first capacitor is:

[0089]

[0090] Wherein, CVLL1 is the voltage value of the first first capacitor.

[0091] In the second stage, the reference signal is stopped from being input to the non-inverting input terminal of the third operational amplifier P3, and the first terminal of the fifth resistor R5 stops outputting the charging current. The first fourth switch device K4 and the second fifth switch device K5 are turned on, and the second fourth switch device K4, the third fourth switch device K4, the first fifth switch device K5, the third fifth switch device K5, the sixth switch device K6, and the seventh switch device K7 are turned off. The second capacitor, the first first capacitor, and the second first capacitor form a series circuit. The second capacitor and the first first capacitor jointly charge the second first capacitor. Then, the voltage value of the second first capacitor is:

[0092] CVLL2=2×CVLL1

[0093] Wherein, CVLL2 is the voltage value of the second first capacitor.

[0094] In the third stage, before charging the third first capacitor, the second capacitor is fully charged according to the method of the first stage, and the voltage value on the second capacitor is CVLL1. Then, the reference signal is stopped from being input to the non-inverting input terminal of the third operational amplifier P3, and the first end of the fifth resistor R5 stops outputting the charging current. The second fourth switch device K4 and the third fifth switch device K5 are turned on, and the first fourth switch device K4, the third fourth switch device K4, the first fifth switch device K5, the second fifth switch device K5, the sixth switch device K6 and the seventh switch device K7 are turned off. The second capacitor, the second first capacitor and the third first capacitor form a series circuit. The second capacitor and the second first capacitor jointly charge the third first capacitor. The voltage value of the third first capacitor is:

[0095] CVLL3=3×CVLL1

[0096] Wherein, CVLL3 is the voltage value of the third first capacitor.

[0097] In the fourth stage, before charging the fourth first capacitor, the second capacitor is fully charged in the manner of the first stage. The voltage value on the second capacitor is CVLL1. Then, the reference signal is stopped from being input to the non-inverting input terminal of the third operational amplifier P3. The first end of the fifth resistor R5 stops outputting the charging current, the third fourth switch device K4 and the sixth switch device K6 are turned on, and the first fourth switch device K4, the second fourth switch device K4, each fifth switch device K5 and the seventh switch device K7 are turned off. The second capacitor, the third first capacitor and the fourth first capacitor form a series circuit. The second capacitor and the third first capacitor jointly charge the fourth first capacitor. The voltage value of the fourth first capacitor is:

[0098] CVLL4=4×CVLL1

[0099] Wherein, CVLL4 is the voltage value of the fourth first capacitor.

[0100] In some embodiments, Vref, r5, and r6 are adjusted so that CVLL1 is equal to (1 / 4)Vr.

[0101] In the embodiment of the present application, the seventh switch device K7 and the first fifth switch device K5 are turned on, and each fourth switch device K4, the fifth switch device K5 other than the first fifth switch device K5 and the sixth switch device K6 are turned off, and a reference signal is input to the non-inverting input terminal of the third operational amplifier P3, so that the charging submodule 21 charges the second capacitor and the first first capacitor; by stopping the input of the reference signal to the non-inverting input terminal of the third operational amplifier P3, the first end of the fifth resistor R5 stops outputting the charging current, and then by turning on the jth fourth switch device K4 and the j+1th fifth switch device K5, and turning on the fourth switch device K4 other than the jth fourth switch device K4. Device K4, the fifth switch device K5 other than the j+1th fifth switch device K5, the sixth switch device K6, and the seventh switch device K7 are disconnected, so that the second capacitor and the jth first capacitor jointly charge the j+1th first capacitor; by stopping inputting the reference signal to the non-inverting input terminal of the third operational amplifier P3, the first end of the fifth resistor R5 stops outputting the charging current, and then by turning on the m-1th fourth switch device K4 and the sixth switch device K6, and disconnecting the fourth switch device K4 other than the m-1th fourth switch device K4, each fifth switch device K5, and the seventh switch device K7, the second capacitor and the m-1th first capacitor jointly charge the mth first capacitor.

[0102] To sum up, in the embodiment of the present application, the resistance driving module 10 uses a resistance voltage division method to output multiple first signals, and the capacitor driving module 20 uses a capacitor charging and discharging method to output multiple second signals, and then the first selection module 30 receives the first signal and the second signal corresponding to the first selection module 30, and selects the one with the larger voltage value between the first signal and the second signal corresponding to the first selection module 30 as the driving signal of the display screen for output. Therefore, when the voltage value of the second signal output by the capacitor driving module 20 is too low, the first signal with a larger voltage value than the second signal is selected as the driving signal for output, thereby avoiding the large capacitance error of the capacitor in the capacitor driving circuit in the related technology causing the voltage value of the driving signal to be too low, thereby avoiding the display screen from displaying dark shadows.

[0103] Figure 6 A driving method provided in an embodiment of the present application is applied to the aforementioned driving circuit, such as Figure 6 As shown, the method may include:

[0104] Step 101: Use the resistance voltage division method to obtain a plurality of the first signals, and use the capacitor charge and discharge method to obtain a plurality of the second signals; the first signals correspond to the second signals.

[0105] The implementation of this step is similar to the previous implementation process and will not be repeated here.

[0106] Step 102: Determine the one with the larger voltage value between the first signal and the second signal corresponding to the first signal as the driving signal for the display screen.

[0107] The implementation of this step is similar to the previous implementation process and will not be repeated here.

[0108] In an embodiment of the present application, a plurality of first signals are obtained by using a resistor voltage divider method, and a plurality of second signals are obtained by using a capacitor charge and discharge method, wherein the first signal corresponds to the second signal, and then the one with the larger voltage value between the first signal and the second signal corresponding to the first signal is determined as the driving signal of the display screen. Therefore, when the voltage value of the second signal obtained by using the capacitor charge and discharge method is too low, the first signal with a larger voltage value than the second signal is selected as the driving signal for output, thereby avoiding the large capacitance error of the capacitor in the capacitor driving circuit in the related art causing the voltage value of the driving signal to be too low, thereby avoiding the display screen from displaying dark shadows.

[0109] An embodiment of the present application further provides a driver, comprising the aforementioned driving circuit, or implementing the aforementioned driving method.

[0110] The specific implementation process of the driving circuit in the driver is similar to the above and will not be repeated here.

[0111] In the embodiment of the present application, by mixing the two methods of resistive voltage division driving and capacitor charging and discharging driving, a stable driving voltage is output, the LCD display shadow problem is solved, the display effect is optimized, the number of product scrapped is reduced, and the product manufacturing yield is improved.

[0112] To sum up, in the embodiment of the present application, the resistance driving module 10 uses a resistance voltage division method to output multiple first signals, and the capacitor driving module 20 uses a capacitor charging and discharging method to output multiple second signals, and then the first selection module 30 receives the first signal and the second signal corresponding to the first selection module 30, and selects the one with the larger voltage value between the first signal and the second signal corresponding to the first selection module 30 as the driving signal of the display screen for output. Therefore, when the voltage value of the second signal output by the capacitor driving module 20 is too low, the first signal with a larger voltage value than the second signal is selected as the driving signal for output, thereby avoiding the large capacitance error of the capacitor in the capacitor driving circuit in the related technology causing the voltage value of the driving signal to be too low, thereby avoiding the display screen from displaying dark shadows.

[0113] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0114] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. A driving circuit, characterized in that: include: A resistance driving module (10), a capacitance driving module (20) and a plurality of first selection modules (30); The resistance driving module (10) is respectively connected to each of the first selection modules (30), and the resistance driving module (10) is used to output a plurality of first signals using a resistance voltage division method; The capacitor driving module (20) is respectively connected to each of the first selection modules (30), and the capacitor driving module (20) is used to output a plurality of second signals using a capacitor charging and discharging method; Each of the first selection modules (30) has a corresponding first signal and a second signal. The first selection module (30) is used to receive the first signal and the second signal corresponding to the first selection module (30), and select the one with the larger voltage value between the first signal and the second signal corresponding to the first selection module (30) as a driving signal for outputting the display screen.

2. The driving circuit according to claim 1, wherein: The first selection module (30) includes a first operational amplifier (P1), a first diode (D1), a second operational amplifier (P2) and a second diode (D2); The non-inverting input terminal of the first operational amplifier (P1) is used to receive the first signal corresponding to the first selection module (30); the output terminal of the first operational amplifier (P1) is connected to the positive electrode of the first diode (D1); the negative electrode of the first diode (D1) is respectively connected to the negative input terminal of the first operational amplifier (P1), the negative input terminal of the second operational amplifier (P2), and the output terminal of the first selection module (30); The non-inverting input terminal of the second operational amplifier (P2) is used to receive the second signal corresponding to the first selection module (30); the output terminal of the second operational amplifier (P2) is connected to the positive electrode of the second diode (D2); and the negative electrode of the second diode (D2) is respectively connected to the negative input terminal of the first operational amplifier (P1), the negative input terminal of the second operational amplifier (P2), and the output terminal of the first selection module (30).

3. The driving circuit according to claim 1, wherein: The driving circuit further includes a second selection module (40); The second selection module (40) is connected to each of the first selection modules (30) respectively. The second selection module (40) is used to connect to the driving end of the display screen and select one of the driving signals output by all the first selection modules (30) for output according to the received selection signal group.

4. The driving circuit according to claim 3, wherein: The second selection module (40) includes a plurality of first switch devices (K1) and a selection submodule (41); the first switch devices (K1) correspond to the first selection module (30); the selection submodule (41) has a plurality of selection terminals, and the selection terminals correspond to the first switch devices (K1); A first end of the first switch device (K1) is connected to an output end of a first selection module (30) corresponding to the first switch device (K1), a second end of the first switch device (K1) is connected to a driving end of the display screen, and a control end of the first switch device (K1) is connected to a selection end corresponding to the first switch device (K1); The selection submodule (41) is used to select one of all the first switch devices (K1) to be turned on according to the selection signal group.

5. The driving circuit according to claim 4, wherein: The selection submodule (41) includes a plurality of selection units (411); the selection signal group includes a plurality of selection signals; the selection unit (411) has a corresponding first switch device (K1) and a selection signal; The output end of the selection unit (411) is connected to the control end of the first switch device (K1) corresponding to the selection unit (411), and the selection unit (411) is used to receive a selection signal corresponding to the selection unit (411), and to turn on the first switch device (K1) corresponding to the selection unit (411) when the selection signal corresponding to the selection unit (411) is at a first level, and to turn off the first switch device (K1) corresponding to the selection unit (411) when the selection signal corresponding to the selection unit (411) is at a second level.

6. The driving circuit according to claim 5, wherein: The selection unit (411) includes a first resistor (R1), a second resistor (R2), a third resistor (R3) and a second switch device (K2); In the selection unit (411), a first end of the first resistor (R1) is used to be connected to a power source, and a second end of the first resistor (R1) is respectively connected to a first end of the second switch device (K2) and a control end of the first switch device (K1); A first end of the second resistor (R2) is connected to a second end of the second switch device (K2), and a second end of the second resistor (R2) is grounded; A first end of the third resistor (R3) is used to receive a selection signal corresponding to the selection unit (411), and a second end of the third resistor (R3) is connected to a control end of the second switch device (K2); A first terminal of the second switching device (K2) is connected to a control terminal of the first switching device (K1).

7. The driving circuit according to claim 1, wherein: The resistance driving module (10) includes n fourth resistors (R4), where n is a positive integer; each fourth resistor (R4) has a corresponding first selection module (30); The first end of the first fourth resistor (R4) is used to be connected to a power supply, the second end of the i-th fourth resistor (R4) is connected to the first end of the i+1-th fourth resistor (R4), and the second end of the n-th fourth resistor (R4) is grounded, where i is a positive integer less than n; Wherein, the first end of the fourth resistor (R4) is connected to the first input end of the first selection module (30) corresponding to the fourth resistor (R4).

8. The driving circuit according to claim 1, wherein: The capacitor driving module (20) comprises a charging submodule (21), an energy storage control submodule (22), and m first capacitors, where m is a positive integer; each first capacitor has a corresponding first selection module (30); The charging submodule (21) is connected to the energy storage control submodule (22), and the charging submodule (21) is used to charge the energy storage control submodule (22); The energy storage control submodule (22) is respectively connected to each of the first capacitors, and the energy storage control submodule (22) is used to control the charging and discharging of each of the first capacitors; The first capacitor is connected to a first selection module (30) corresponding to the first capacitor.

9. The driving circuit according to claim 8, wherein: The charging submodule (21) includes a third switch device (K3), a fifth resistor (R5), a sixth resistor (R6) and a third operational amplifier (P3); The first end of the third switch device (K3) is used to be connected to a power supply, the second end of the third switch device (K3) is respectively connected to the first end of the fifth resistor (R5) and the first end of the energy storage control submodule (22), and the control end of the third switch device (K3) is connected to the output end of the third operational amplifier (P3); The first end of the fifth resistor (R5) is connected to the first end of the energy storage control submodule (22), and the second end of the fifth resistor (R5) is connected to the first end of the sixth resistor (R6) and the inverting input end of the third operational amplifier (P3) respectively; A first end of the sixth resistor (R6) is connected to the inverting input end of the third operational amplifier (P3), and a second end of the sixth resistor (R6) is grounded; The non-inverting input terminal of the third operational amplifier (P3) is used for receiving a reference signal.

10. The driving circuit according to claim 8, wherein: The energy storage control submodule (22) comprises a second capacitor, a plurality of fourth switch devices (K4), a plurality of fifth switch devices (K5), a sixth switch device (K6), and a seventh switch device (K7); the jth first capacitor has a corresponding fourth switch device (K4) and a fifth switch device (K5), where j is a positive integer less than m; The first end of the second capacitor is respectively connected to the first end of each of the fourth switching devices (K4) and the first end of the seventh switching device (K7), and the second end of the second capacitor is respectively connected to the first end of each of the fifth switching devices (K5) and the first end of the sixth switching device (K6); The first end of the jth first capacitor is respectively connected to the second input end of the first selection module (30) corresponding to the jth first capacitor, the second end of the fourth switch device (K4), and the second end of the fifth switch device (K5); the first end of the mth first capacitor is respectively connected to the second end of the sixth switch device (K6) and the second input end of the first selection module (30) corresponding to the mth first capacitor; and the second end of each first capacitor is grounded; The second end of the fifth switch device (K5) is connected to the second end of the fourth switch device (K4) corresponding to the fifth switch device (K5); the second end of the fifth switch device (K5) corresponding to the first first capacitor is connected to the output end of the charging submodule (21); and the second end of the seventh switch device (K7) is grounded.

11. A driving method, characterized in that: Applied to the driving circuit according to any one of claims 1 to 10, the method comprises: A plurality of first signals are obtained by using the resistance voltage division method, and a plurality of second signals are obtained by using the capacitor charge-discharge method; the first signals correspond to the second signals; The one with the larger voltage value between the first signal and a second signal corresponding to the first signal is determined as the driving signal for the display screen.

12. A driver, characterized in that: The method comprises the driving circuit according to any one of claims 1 to 10, or implements the driving method according to claim 11.

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