Wavelength division multiplexer chip post-processing management system, device and medium

By collecting scenario data, configuring test schemes, and fusing results through a multi-level testing mechanism, the shortcomings in performance anomaly identification during the post-processing of wavelength division multiplexer chips are resolved, improving the accuracy and efficiency of anomaly detection.

CN120750418BActive Publication Date: 2025-12-05WUHAN YILUT TECH CO LTD
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Patent Information

Application Number
CN202510894936.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-06-30
Publication Date
2025-12-05
Estimated Expiration
2045-06-30

AI Technical Summary

Technical Problem

Existing technologies cannot accurately identify performance anomalies during the post-processing of wavelength division multiplexer chips. Insufficient test coverage and lack of a unified analysis mechanism result in inadequate quality control capabilities.

Method used

By establishing a multi-layered testing mechanism, including a scenario construction module, a test plan establishment module, an independent response module, and a global response module, application scenarios are collected, performance test plans are configured, test data is recorded, independent and global feature extraction is performed, and test results are integrated to identify anomalies.

Benefits of technology

This improves the accuracy and efficiency of anomaly detection in the post-processing stage of chips, enabling precise identification and quality control of performance anomalies.

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Abstract

The application discloses a wavelength division multiplexer chip post-processing management system and device and a medium, relates to the technical field of processing management, and comprises the following steps: collecting application scenarios of the wavelength division multiplexer chip to establish an application scenario set; configuring a performance test scheme by using the application scenario set, establishing a performance test scheme set, executing the wavelength division multiplexer chip test to record test data; activating a mapping weak identifier to execute independent key index anomaly identification of the test data after configuring a performance key index, and establishing a first test result; performing feature extraction on the test data, establishing a global feature vector, inputting the global feature vector as input data into a global evaluation channel to establish a second test result; and after fusing the first test result and the second test result, generating post-processing quality anomalies. The application solves the technical problem that the performance anomalies in the chip post-processing process cannot be accurately identified in the prior art, and achieves the technical effect of improving the accuracy and efficiency of anomaly discovery in the chip post-processing stage.
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Description

Technical Field

[0001] This invention relates to the field of processing management technology, specifically to a post-processing management system, device, and medium for wavelength division multiplexer chips. Background Technology

[0002] After the wavelength division multiplexer (WDM) chip completes its front-end manufacturing, it needs to undergo post-processing to verify its performance stability under real-world application conditions. However, in traditional testing processes, test plans often cannot be dynamically adjusted to suit the specific application scenarios of the chip, resulting in insufficient test coverage and difficulty in timely identifying potential anomalies in key performance indicators. Furthermore, existing test results are mostly scattered data, lacking a unified analysis and identification mechanism, making it difficult to effectively judge and provide feedback on anomalies, thus restricting the quality control capabilities of the chip's post-processing stage. Summary of the Invention

[0003] This application provides a wavelength division multiplexer chip post-processing management system, apparatus, and medium to address the technical problem that existing technologies cannot accurately identify performance anomalies during chip post-processing.

[0004] In view of the above problems, this application provides a wavelength division multiplexer chip post-processing management system, apparatus and medium.

[0005] A first aspect of this application provides a wavelength division multiplexer chip post-processing management system, the system comprising:

[0006] The system comprises the following modules: a scenario construction module for collecting application scenarios for the wavelength division multiplexer (WDM) chip and establishing an application scenario set, which includes scenario trust identifiers; a test scheme establishment module for configuring performance test schemes using the application scenario set and establishing a performance test scheme set; a test module for executing WDM chip tests using the performance test scheme set and recording test data, including performance data and environmental data; an independent response module for activating a mapping weak identifier based on configured performance key indicators to perform independent key indicator anomaly identification on the test data and establish a first test result; a global response module for extracting features from the test data, establishing a global feature vector, and inputting the global feature vector as input data into a global evaluation channel to establish a second test result; and a reporting module for fusing the first and second test results to generate a post-processing quality anomaly.

[0007] A second aspect of this application provides an electronic device, comprising: a memory for storing executable instructions; and a processor for implementing the wavelength division multiplexer chip post-processing management system provided in this application when executing the executable instructions stored in the memory.

[0008] A third aspect of the embodiments of this application provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the wavelength division multiplexer chip post-processing management system provided in this application.

[0009] One or more technical solutions provided in this application have at least the following technical effects or advantages:

[0010] This application collects application scenarios for wavelength division multiplexer (WDM) chips, establishes an application scenario set, and sets scenario trust identifiers for the application scenario set; it configures performance testing schemes using the application scenario set, establishes a performance testing scheme set; it executes WDM chip testing using the performance testing scheme set and records test data, including performance data and environmental data; after configuring key performance indicators, it activates a mapping weak identifier based on the key performance indicators to perform independent key indicator anomaly identification of the test data, establishing a first test result; it extracts features from the test data to establish a global feature vector, and inputs the global feature vector as input data to a global evaluation channel to establish a second test result; it fuses the first test result and the second test result to generate a post-processing quality anomaly. This invention solves the technical problem of inaccurate identification of performance anomalies in the post-processing of chips in existing technologies. By establishing a multi-level testing mechanism and fusing test results for anomaly identification, it achieves the technical effect of improving the accuracy and efficiency of anomaly detection in the post-processing stage of chips. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of the post-processing management system for wavelength division multiplexer chips provided in an embodiment of this application;

[0013] Figure 2 This is a schematic diagram of the structure of an exemplary electronic device of this application.

[0014] Explanation of reference numerals in the attached diagram: Scenario construction module 11, Test scheme establishment module 12, Test module 13, Independent response module 14, Global response module 15, Reporting module 16, Bus 300, Receiver 301, Processor 302, Transmitter 303, Memory 304, Bus interface 305. Detailed Implementation

[0015] This application provides a wavelength division multiplexer chip post-processing management system, device, and medium to address the technical problem of inaccurate identification of performance anomalies during chip post-processing in existing technologies. By establishing a multi-level testing mechanism and fusing test results for anomaly identification, it achieves the technical effect of improving the accuracy and efficiency of anomaly detection in the chip post-processing stage.

[0016] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0017] It should be noted that any variation of the terms "comprising" and "having" is intended to cover non-exclusive inclusion, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or modules that are not explicitly listed or that are inherent to such processes, methods, products, or devices.

[0018] Example 1, as Figure 1 As shown, this application provides a wavelength division multiplexer chip post-processing management system, the system comprising:

[0019] The scenario construction module 11 is used to collect application scenarios for the wavelength division multiplexer chip and establish an application scenario set, wherein the application scenario set is equipped with a scenario trust identifier.

[0020] In this embodiment, the scenario construction module 11 collects operational data of the wavelength division multiplexer chip under different usage conditions, constructs an application dataset containing multi-dimensional parameters, and performs similarity clustering analysis on the dataset to divide it into a representative set of application scenarios. Based on this, and combining the frequency of data occurrence and its importance in performance evaluation, scenario trust identifiers are identified, ultimately generating scenario trust labels for subsequent testing reference.

[0021] Furthermore, in the system provided in the application embodiment, the scene construction module 11 further includes:

[0022] The data acquisition module is used to read the application scenarios of the wavelength division multiplexer chip and establish an application dataset; the clustering module is used to perform scene similarity clustering on the application dataset, perform scene segmentation based on the scene similarity clustering results, and establish an application scenario set; the dual-channel trust identification module is used to perform dual-channel identification of frequency trust and importance trust on the application dataset within the application scenario set and generate a scene trust identification.

[0023] In this embodiment, an embedded sensing method is used in the data acquisition module to acquire environmental parameters and performance indicators of the wavelength division multiplexer chip in real time under different operating states. The acquired data includes key information such as temperature, voltage, optical power, bit error rate, and communication load, and is aggregated to the data processing end via a transmission interface. The acquired data is standardized and formatted to establish a structured application dataset containing complete operational status records. Through this step, an application dataset covering multi-dimensional status information is obtained.

[0024] Next, the clustering module uses the K-means clustering method to classify the feature vectors extracted from the application dataset. These feature vectors include chip performance parameters and environmental condition indicators, and their similarity is measured by calculating the Euclidean distance between the data points. During multiple rounds of clustering iterations, data points are assigned to the nearest cluster centers, ultimately forming multiple data clusters representing typical operating states. Based on the clustering results, scene semantics are segmented to clarify the actual application environment corresponding to each data cluster, and an application scenario set is established accordingly.

[0025] Finally, the dual-channel trust identification module identifies frequency trust and importance trust using two methods. First, it statistically analyzes the frequency of each application scenario in historical data, calculating the frequency of the scenario within a time interval to reflect its representativeness in real-world applications. Second, it employs an Apriori-based association analysis method to analyze the rule relationships between the scenario and known anomaly detection results, extracting scenario-anomaly correspondence rules with high confidence levels to assess the scenario's impact on performance testing and generate its importance. Ultimately, the frequency and importance results are combined to form the scenario trust identifier.

[0026] The test scheme establishment module 12 is used to configure performance test schemes using the application scenario set and establish a performance test scheme set.

[0027] In this embodiment, the test scheme establishment module 12 is used to configure corresponding performance test schemes for the wavelength division multiplexer chip based on the constructed application scenario set, forming a more targeted performance test scheme set. The test scheme establishment module 12 first extracts the environmental parameters (such as temperature, voltage, and transmission rate) and performance requirements (such as insertion loss, return loss, and channel isolation) included in each application scenario, and constructs a scenario feature vector. Using a rule-based matching configuration method, it calls a preset test scheme template library, and automatically selects or combines test tasks that conform to the scenario by comparing scenario features with template conditions. These tasks include test content, test conditions, test steps, and evaluation criteria. This process ensures that each application scenario can obtain a test strategy highly matched to its characteristics, achieving adaptive generation of test schemes driven by the scenario. Finally, through this step, a performance test scheme set covering various practical application situations is obtained.

[0028] Test module 13 is used to perform wavelength division multiplexer chip testing using the performance test scheme set and record test data, including performance data and environmental data.

[0029] In this embodiment, the test module 13 is used to perform actual tests on the wavelength division multiplexer chip according to the performance test scheme set and collect key data generated during the test. First, according to the preset test conditions (such as operating wavelength, input optical power, temperature control range, etc.) in each performance test scheme, the corresponding test equipment is called, including tunable lasers, optical power meters, spectrometers, and environmental control devices, etc., and the equipment parameters are configured through an automatic control interface. Then, the test module 13 executes various functions and performance measurement operations in sequence according to the process set in the test scheme, covering the detection of multiple key performance indicators such as insertion loss, channel isolation, center wavelength drift, and return loss. At the same time, it monitors and records test environment parameters in real time, such as temperature changes, voltage levels, and humidity conditions during the test. During the test, all collected data is stored in a standard format and classified and labeled according to two dimensions: performance data and environmental data. Through this step, structured test data is obtained, which includes complete performance data and environmental data.

[0030] The independent response module 14 is used to activate the mapping weak identifier based on the configured performance key indicators to perform independent key indicator anomaly identification of the test data and establish a first test result.

[0031] In this embodiment, after configuring key performance indicators, the independent response module 14 activates the corresponding mapped weak identifiers based on each indicator to perform anomaly identification on the test data of the wavelength division multiplexer chip. First, by constructing an adaptation evaluation function that includes evaluation features such as identification accuracy, complexity, adaptability, stability, and fault tolerance, the weak identifier undergoes fitness analysis to establish its evaluation results in the current application scenario. Then, reinforcement attention is generated based on the evaluation results to guide the weak identifier to perform reinforcement learning, thereby improving its ability to identify specific key performance indicators. Finally, the enhanced weak identifier independently identifies each key indicator, obtaining a first test result reflecting local performance anomalies in the chip. This first test result identifies the set of performance indicators with anomalies.

[0032] Furthermore, in the system provided in the application embodiment, the independent response module 14 further includes:

[0033] The evaluation submodule is used to establish an adaptation evaluation function for the weak identifier. The evaluation features of the adaptation evaluation function include recognition accuracy features, identifier complexity features, adaptability features, stability features, and fault tolerance features. The evaluation submodule is used to evaluate the fitness of the weak identifier using the adaptation evaluation function and establish fitness evaluation results. The reinforcement submodule is used to generate reinforcement attention using the fitness evaluation results, and after the weak identifier is reinforced with the reinforcement attention, anomaly recognition of independent key indicators is performed.

[0034] In this embodiment, the evaluation submodule is used to establish an adaptation evaluation function for weak identifiers, which is used to assess the comprehensive adaptability of different weak identifiers under multi-dimensional performance indicators. A weak identifier is a lightweight discriminant model used to identify anomalies in specific key performance indicators. Its characteristics include simple structure, fast training, and suitability for handling single or local recognition tasks. Multiple weak identifiers are pre-configured. Each weak identifier can be constructed using methods such as threshold judgment, logical rule matching, and simple conditional classification, derived from training on historical test data or empirical rules set by domain experts. To comprehensively evaluate the performance of these weak identifiers, an adaptation evaluation function is constructed. This function is a linear weighted function composed of five evaluation features: recognition accuracy, identifier complexity, adaptability, stability, and fault tolerance. The recognition accuracy feature is obtained by calculating the accuracy rate of the recognizer on labeled samples; the recognizer complexity feature is determined by evaluating the number of layers or steps in its internal decision logic; the adaptability feature uses cross-validation to observe the consistency of the recognizer's output in different application scenarios; the stability feature is achieved by adding small perturbations to the input data, performing multiple recognitions, and comparing the output changes; the fault tolerance feature is tested by constructing samples with missing input fields to assess its recognition ability under incomplete information conditions. These features are normalized and then input into a weighted function to form an adaptation scoring function for subsequent evaluation. The weight of each feature is pre-set by technical experts.

[0035] The evaluation submodule then uses an adaptation evaluation function to assess multiple candidate weak recognizers, generating a unified fitness evaluation result. Specifically, the test dataset is input into each weak recognizer, and its performance across five dimensions—recognition accuracy, recognizer complexity, adaptability, stability, and fault tolerance—is extracted step by step. The score for each feature is calculated and input into the adaptation evaluation function to complete the scoring process. The fitness score of each weak recognizer represents its overall recognition capability evaluation in a specific scenario. The scoring results of all weak recognizers are then summarized to establish a structured fitness evaluation result.

[0036] Finally, the enhancement submodule selects weak recognizers with low fitness scores based on the aforementioned fitness evaluation results and performs enhancement processing to improve their recognition ability on the target performance indicators. The enhancement process first extracts samples that were misjudged by the weak recognizer during the recognition process and samples near the recognition boundary, constructing a reinforcement focus sample set. This sample set has highly representative and challenging features, better highlighting the recognizer's shortcomings in boundary judgment. Then, using sample retraining, this reinforcement focus sample set is used as input to locally train and update the weak recognizer, such as adjusting judgment rules and correcting threshold settings in the recognition logic, thereby enhancing its ability to recognize key anomaly features. The enhanced weak recognizer is redeployed into the recognition process, sequentially performing anomaly recognition tasks for the configured key performance indicators. Each recognizer independently outputs a recognition result, indicating whether an anomaly exists in the corresponding indicator. All recognition results are summarized to finally establish the first test result.

[0037] The global response module 15 is used to extract features from the test data, establish a global feature vector, and input the global feature vector as input data into the global evaluation channel to establish a second test result.

[0038] In this embodiment, the global response module 15 is used to perform overall analysis of the test data and identify global performance anomalies of the wavelength division multiplexer chip in the post-processing stage. First, feature extraction is performed on the test data to extract key statistics such as mean, fluctuation amplitude, and anomaly frequency from performance and environmental data, constructing a unified global feature vector to comprehensively describe the chip's state characteristics across various test dimensions. This global feature vector is then input into the global evaluation channel for comprehensive evaluation. The global evaluation channel is initially established by summarizing historical test samples and corresponding results, using a simple sample comparison and deviation threshold setting method to construct initial evaluation rules to determine the degree of deviation between the current feature and normal samples. To further improve the accuracy and adaptability of the global evaluation channel, a self-evaluation module backtracks its training data to identify identification biases in historical judgments, forming training data backtracking defects. The optimization module generates new data requirements based on these defects and encrypts them with the current global evaluation channel before sending them to a trusted third party, completing federated encryption learning while ensuring data privacy. The trusted third party returns an updated global evaluation channel with stronger generalization ability and discrimination accuracy. Finally, the current global feature vector is evaluated based on the returned global evaluation channel, and a second test result is established. The second test result clearly identifies the set of performance indicators that are abnormal, namely, abnormal indicators.

[0039] Furthermore, in the system provided in the application embodiment, the global response module 15 further includes:

[0040] The self-evaluation module is used to backtrack the training data of the global evaluation channel and establish training data backtracking defects; the optimization module is used to generate data requirements based on the training data backtracking defects, and send the data requirements and the global evaluation channel to a trusted third party after encryption, and receive the returned global evaluation channel from the trusted third party. The returned global evaluation channel is a channel after federated encryption learning, and the returned global evaluation channel is used for global evaluation.

[0041] In this embodiment, the self-evaluation module is used to perform training data backtracking on the global evaluation channel to identify its recognition defects in historical tests. Specifically, it first calls up historical test data and corresponding real annotation results, and compares them one by one with the recognition results output by the global evaluation channel in the past. The self-evaluation module uses the error matrix statistical method to identify misjudgments, omissions, and uncertain judgments by constructing a confusion matrix with the real value and the channel output results as dimensions. After the statistics are completed, the recognition error types that occur most frequently are marked and associated with their corresponding input features, finally obtaining a set of representative recognition weakness areas, forming training data backtracking defects, which are used to describe the insufficient judgment ability of the current global evaluation channel under specific conditions.

[0042] After identifying training data backtracking deficiencies, the optimization module generates new data requirements based on these deficiencies to compensate for the channel's insufficient coverage in the training data. To achieve this, the optimization module employs a feature distribution difference analysis method, extracting key feature values ​​(such as temperature range, peak bit error rate, and frequency change rate) from the backtracking defect samples and comparing them with the statistical distribution of corresponding features in the original global evaluation channel's training dataset. The analysis primarily focuses on the overlap and deviation of feature distributions. When a feature interval is found to be significantly insufficient or missing in the original training set, that feature and its value range are marked as data types requiring supplementation, ultimately forming a data requirement. This data requirement guides the direction of sample supplementation in subsequent model training.

[0043] After generating the data requirements, the optimization module processes the data requirements and the current global evaluation channel, then sends both to a trusted third party to update the model. During this process, a symmetric encryption method, such as using the AES algorithm, is employed to uniformly encrypt the data requirements and the global evaluation channel. This method uses a single key to encrypt and decrypt information, ensuring that data is not leaked during network transmission. After encryption, the encrypted data is sent to the trusted third-party platform through a secure channel to trigger subsequent privacy-preserving model optimization processes.

[0044] After receiving the encrypted data, the three trusted parties use a federated learning method to optimize and update the global evaluation channel. This method allows multiple data participants to train their models using their local data without sharing the original data, and only upload the local model update results to the central server for aggregation. In this scenario, based on the existing global evaluation channel structure and supplementary data requirements, the three trusted parties perform a distributed model training process, appropriately adjusting the channel's judgment rules or parameters to form a new, more generalizable global evaluation channel.

[0045] The reporting module 16 is used to generate a post-processing quality anomaly after fusing the first test result and the second test result.

[0046] In this embodiment, the reporting module 16 employs a result fusion method to jointly analyze the first test result and the second test result in terms of anomaly indicators, judgment intervals, and result consistency, extracting common or complementary anomaly features to form a unified anomaly judgment basis. After fusion, the degree of anomaly is graded according to preset multi-level early warning indicators, and early warning trigger analysis is performed to determine whether the anomaly reporting conditions are met. If the triggering requirements are met, a post-processing quality anomaly is generated to identify the overall quality anomaly status of the wavelength division multiplexer chip in the post-processing stage.

[0047] Furthermore, in the system provided in the application embodiment, the reporting module 16 further includes:

[0048] A joint test anomaly is established based on the first test result and the second test result; after configuring multi-level early warning indicators, early warning trigger analysis is performed using the joint test anomaly and the multi-level early warning indicators, and anomaly reporting is performed using the early warning trigger analysis results.

[0049] In this embodiment, a joint test anomaly is first established based on the first and second test results using an anomaly label cross-comparison method. Specifically, the set of anomaly indicators identified in the first and second test results is extracted, and the anomaly results are standardized and aligned according to test indicators, timestamps, and test channels. Then, by comparing the anomaly states of the same indicators in the two results, if both are marked as anomalies, they are marked as "high-confidence anomalies"; if only one is marked as anomaly, it is marked as "anomalies to be confirmed." This method ultimately outputs a joint test anomaly covering key performance indicators and global feature indicators. This result comprehensively reflects the chip's abnormal performance at a multi-dimensional detection level.

[0050] Next, multi-level early warning indicators are configured, and joint test anomalies are triggered and analyzed against these indicators. The multi-level early warning indicators use an interval-based grading method to set numerical threshold ranges for different anomaly levels. For example, a mild anomaly corresponds to one key indicator slightly deviating from the normal range (e.g., deviation not exceeding 10%); a moderate anomaly corresponds to two or more indicators deviating from the normal value but not exceeding the limit; and a severe anomaly corresponds to three or more indicators exceeding the limit simultaneously. Using a rule-matching method, the actual feature value of each anomaly in the joint test anomaly is compared one by one with the threshold of the corresponding level of the multi-level early warning indicator, and the number of anomalies meeting the trigger conditions in each level is counted.

[0051] Finally, based on the comparison results, an early warning trigger analysis is performed to determine whether the conditions for anomaly reporting are met. If any anomaly in the joint test meets the early warning conditions for a certain level (e.g., the number of items exceeding the severity threshold reaches the standard), the anomaly level is determined to be established, and an anomaly is reported. The final reported information is the post-processing quality anomaly, which includes the anomaly level, the anomaly indicator, and its corresponding detection value.

[0052] Furthermore, the system provided in the application embodiments also includes:

[0053] The storage management module is used to establish a cloud storage space and set an identification code on the wavelength division multiplexer chip. The identification code corresponds one-to-one with the cloud storage space. The first test result, the second test result, and the quality anomaly identifier are stored in the mapped cloud space. Storage management is performed according to the identification code and the cloud storage space.

[0054] In this embodiment, the storage management module is used to implement structured storage and one-to-one identification management of the test results of the wavelength division multiplexer (WDM) chips. Specifically, firstly, by calling the cloud service interface, an independent cloud storage space is established for each WDM chip. This space has object-oriented storage capabilities, supports writing and managing multiple data formats, and ensures data isolation and scalability. Subsequently, an identification code is set on the chip. This identification code can be generated by combining parameters such as chip number, production batch, and test time, ensuring that each chip has a unique identifier.

[0055] The identification code is mapped and bound one-to-one with the corresponding cloud storage space, forming a unique association between the chip and its test data. After the first test result (reflecting the independent anomalies of each key performance indicator), the second test result (the comprehensive performance anomaly derived from global feature analysis), and the final quality anomaly identifier (used to mark whether the chip has quality anomalies) are generated, the storage management module stores the above data uniformly in the cloud storage space that matches the identification code.

[0056] Furthermore, the system provided in the application embodiments also includes:

[0057] The verification management module is used to activate the permission authentication unit after the cloud storage space is triggered to start, use the permission authentication unit to perform editing permission authentication, establish a first authentication result, obtain the user's editing information, and perform joint authentication based on the editing information and the trust code of the wavelength division multiplexer chip. If the joint authentication is successful, the data in the cloud storage space is updated based on the editing information.

[0058] In this embodiment, when the cloud storage space receives an external access request (such as a user attempting to modify test results or quality anomaly flags), the verification management module immediately activates the permission authentication unit. This permission authentication unit performs permission verification based on the Role-Based Access Control (RBAC) method. The RBAC method verifies whether the currently accessing user's role has editing permissions by pre-setting a mapping relationship between user roles (such as administrator, quality inspector, and auditor) and operation permissions. If the permission authentication passes, a first authentication result is established, indicating that the user possesses basic editing qualifications.

[0059] Subsequently, the verification management module retrieves the user's editing information from the front-end interaction interface. This information includes the fields the user wishes to modify (such as updating abnormal indicator descriptions, replacing test result entries, etc.). To further confirm the trustworthiness of this editing operation, the unique trust code written by the wavelength division multiplexer chip during the data entry process is retrieved. This trust code is generated using a hardware-binding encryption method based on the TPM module, ensuring uniqueness and tamper-proof properties.

[0060] Next, the verification management module performs federated authentication, which verifies the consistency between the user's edited information and the chip trust code. This uses a hash comparison method, calculating the hash of the chip number field declared in the edited information and comparing it with the hash value of the corresponding trust code to verify their consistency. If the hash values ​​match, it means that the edit operation was indeed performed on the current chip and within a trusted execution environment.

[0061] Once the joint authentication is successful, the verification management module invokes the data update method to modify the data in the cloud storage space. The update method employs a key-value overwrite strategy, meaning that after identifying a valid edit field, it directly replaces the original value with the new data provided by the user, and simultaneously appends an edit log record containing the operator's identifier, edit time, and a backup of the original value to ensure data version traceability.

[0062] Furthermore, the system provided in the application embodiments also includes:

[0063] The self-updating management module is used to record post-processing quality anomalies and record real-time feedback, establish a feedback mapping, and perform self-updating optimization management of the system based on the feedback mapping.

[0064] In this embodiment, the self-updating management module is used to perform closed-loop feedback management of quality anomalies occurring in the post-processing stage of the wavelength division multiplexer chip, and to achieve dynamic optimization and adjustment of the system identification logic by constructing a feedback mapping mechanism. First, by calling the quality anomaly acquisition interface, the anomaly tag extraction method is used to extract anomaly information from the quality anomaly identifier generated by the reporting module, including key fields such as chip identification code, anomaly performance indicators, and anomaly occurrence time, to generate standardized anomaly record entries, which are then stored in the quality anomaly log database to form a structured anomaly dataset.

[0065] Subsequently, authentic identification feedback information is received from on-site maintenance terminals or quality inspection systems. The feedback content is then standardized using a static field matching method, and redundant or ambiguous data is removed before being stored in the feedback cache. The feedback content typically includes elements such as chip serial number, confirmed abnormal status, the identity of the person confirming the information, and the time, ensuring traceability and comparability.

[0066] Next, the self-updating management module uses the primary key index matching method, with the chip identification code and the abnormal time as the matching key, to match each quality abnormality record with the feedback record, establishing a feedback mapping relationship. Each feedback mapping relationship clearly records whether the abnormality is a valid abnormality, whether there is a false alarm, the corresponding performance indicators, and the processing results, thus forming a feedback mapping table.

[0067] Based on the feedback mapping table, a strategy weight adjustment method is used to locally optimize key identification parameters in the anomaly identification process. Optimization operations include adjusting the anomaly threshold, response sensitivity, and priority ranking in the identifier to improve the accuracy of identifying genuine anomalies and reduce the false positive rate. For example, for indicators confirmed as false alarms, their judgment thresholds are appropriately increased; for indicators that consistently identify genuine anomalies, their identification response weights are enhanced. Finally, after updating the identification parameters and deploying them to the anomaly identification process, a closed-loop evolution of the system's identification strategy is achieved, completing the self-updating optimization management of the system.

[0068] In summary, the embodiments of this application have at least the following technical effects:

[0069] This application collects application scenarios for wavelength division multiplexer (WDM) chips, establishes an application scenario set, and sets scenario trust identifiers for the application scenario set; it configures performance testing schemes using the application scenario set, establishes a performance testing scheme set; it executes WDM chip testing using the performance testing scheme set and records test data, including performance data and environmental data; after configuring key performance indicators, it activates a mapping weak identifier based on the key performance indicators to perform independent key indicator anomaly identification of the test data, establishing a first test result; it extracts features from the test data to establish a global feature vector, and inputs the global feature vector as input data to a global evaluation channel to establish a second test result; it fuses the first test result and the second test result to generate a post-processing quality anomaly. This invention solves the technical problem of inaccurate identification of performance anomalies in the post-processing of chips in existing technologies. By establishing a multi-level testing mechanism and fusing test results for anomaly identification, it achieves the technical effect of improving the accuracy and efficiency of anomaly detection in the post-processing stage of chips.

[0070] Example 2: Based on the inventive concept of the wavelength division multiplexer chip post-processing management system in the foregoing examples, this application also provides an electronic device, including: at least one processor; a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the steps of any of the systems described in Example 1 above.

[0071] Figure 2 This is a schematic diagram of the structure of an exemplary electronic device of this application. Figure 2 In this document, the bus architecture is represented by bus 300. Bus 300 may include any number of interconnected buses and bridges, and bus 300 connects various circuits including one or more processors represented by processor 302 and memory represented by memory 304. Bus 300 may also connect various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. Bus interface 305 provides an interface between bus 300 and receiver 301 and transmitter 303. Receiver 301 and transmitter 303 may be the same element, i.e., a transceiver, providing a unit for communicating with various other devices over a transmission medium. Processor 302 is responsible for managing bus 300 and general processing, while memory 304 can be used to store data used by processor 302 during operation.

[0072] In Embodiment 3, based on the same inventive concept as the wavelength division multiplexer chip post-processing management system in the foregoing embodiments, this application also provides a computer-readable storage medium storing a computer program, which, when executed, implements the steps of any of the systems described in Embodiment 1 above.

[0073] It should be noted that the order of the embodiments described above is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. Furthermore, the above description focuses on specific embodiments of this specification. The processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired results. In some implementations, multitasking and parallel processing are possible or may be advantageous.

[0074] The above description is only a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

[0075] This specification and accompanying drawings are merely illustrative examples of this application and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from its scope. Therefore, if such modifications and modifications fall within the scope of this application and its equivalents, this application intends to include such modifications and modifications.

Claims

1. A WDM chip post-processing management system, characterized by, The system comprises: A scene construction module for collecting application scenarios of a wavelength division multiplexer chip, establishing an application scenario set, and setting a scene trust identifier in the application scenario set; A test scheme establishment module for configuring a performance test scheme using the application scenario set, and establishing a performance test scheme set; A test module for executing a wavelength division multiplexer chip test using the performance test scheme set, and recording test data, wherein the test data comprises performance data and environmental data; An independent response module for activating a mapping weak identifier based on a performance key indicator to perform independent key indicator anomaly identification of the test data after the performance key indicator is configured, and establishing a first test result; A global response module for performing feature extraction on the test data, establishing a global feature vector, inputting the global feature vector as input data into a global evaluation channel, and establishing a second test result; A reporting module for generating a post-processing quality anomaly after fusing the first test result and the second test result.

2. The WDM chip post-processing management system according to claim 1, wherein, The scene construction module comprises: A data acquisition module for reading application scenarios of the wavelength division multiplexer chip, and establishing an application data set; A clustering module for performing scene similarity clustering on the application data set, performing scene segmentation based on the scene similarity clustering result, and establishing an application scenario set; A dual-channel trust identifier module for performing dual-channel identification of frequency trust and importance trust on the application data set in the application scenario set, and generating a scene trust identifier.

3. The WDM chip post-processing management system according to claim 1, wherein, The independent response module comprises: An evaluation submodule for establishing an adaptive evaluation function of a weak identifier, wherein the evaluation features of the adaptive evaluation function comprise identification accuracy features, identifier complexity features, adaptability features, stability features, and fault tolerance features; An evaluation submodule for performing fitness evaluation of the weak identifier using the adaptive evaluation function, and establishing a fitness evaluation result; An enhancement submodule for generating reinforcement attention using the fitness evaluation result, and performing independent key indicator anomaly identification after reinforcement learning of the weak identifier based on the reinforcement attention.

4. The WDM chip post-processing management system according to claim 1, wherein, The reporting module is configured to: Establish a joint test anomaly based on the first test result and the second test result; Configure a multi-level early warning indicator, perform early warning trigger analysis based on the joint test anomaly and the multi-level early warning indicator, and perform anomaly reporting based on the early warning trigger analysis result.

5. The WDM chip post-processing management system according to claim 1, wherein, The system comprises: A storage management module for establishing a cloud storage space, setting an identification code on a wavelength division multiplexer chip, one-to-one correspondence between the identification code and the cloud storage space, storing the first test result, the second test result, and a quality anomaly identifier in a mapping cloud space, and performing storage management based on the identification code and the cloud storage space.

6. The WDM chip post-processing management system according to claim 5, wherein, The system further comprises: A verification management module for activating a permission authentication unit when the cloud storage space is triggered to start, performing editing permission authentication using the permission authentication unit, establishing a first authentication result, obtaining editing information of a user, performing joint authentication based on the editing information and a trust code of the wavelength division multiplexer chip, and updating data in the cloud storage space based on the editing information if the joint authentication is passed.

7. The WDM chip post-processing management system according to claim 1, wherein, The global response module comprises: A self-evaluation module is configured to perform training data backtracking on the global evaluation channel, establish training data backtracking defects, and generate data requirements according to the training data backtracking defects. An optimization module is configured to encrypt the data requirements and the global evaluation channel, send them to a trusted third party, receive a returned global evaluation channel from the trusted third party, and perform global evaluation with the returned global evaluation channel.

8. The WDM chip post-processing management system according to claim 1, wherein, The system further comprises: A self-update management module is configured to record post-processing quality abnormalities, record real identity feedback, establish feedback mapping, and perform self-update optimization management of the system according to the feedback mapping.

9. An electronic device, comprising: The electronic device comprises: A memory is configured to store executable instructions. A processor is configured to execute the executable instructions stored in the memory to implement the WDM chip post-processing management system of any one of claims 1-8.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor to implement the WDM chip post-processing management system of any one of claims 1-8.

Citation Information

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