OOK modulator with adjustable signal amplitude and slope and method of using the same

Abstract

This invention provides an OOK modulator with adjustable signal amplitude and slope, and its usage method, relating to the field of integrated circuit technology. It includes: a control logic circuit, a modulator circuit, an input signal port, and an output signal port. The control logic circuit processes the input signal to generate a signal for controlling the modulator circuit. The modulator circuit generates a specific trapezoidal wave by generating a reference current, clamping the charging / discharging point voltage, and controlling the charging / discharging of a capacitor, and then performs envelope shaping to generate an OOK modulated output signal with adjustable amplitude and slope. Compared to traditional OOK modulated signals, the output signal of this invention has adjustable amplitude and slope, which can reduce dynamic power consumption and external radiation.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and more specifically, to an OOK modulator with adjustable signal amplitude and slope, and a method of using it. Background Technology

[0002] The principle of OOK (on / off key) is to control the carrier amplitude through binary signals, switching between "on" (non-zero amplitude) and "off" (zero amplitude) states to achieve information transmission. OOK modulation modulates a low-frequency digital signal onto a high-frequency carrier through a logical relationship. When the low-frequency digital signal is logic high, a low level is output; conversely, when it is logic low, the envelope signal of the high-frequency carrier is output. However, the amplitude of the output signal in ordinary OOK modulation is uncontrollable; typically, the high level is the power supply voltage, which is unfavorable for low-power applications. Furthermore, the rise and fall slopes are uncontrollable, with edges often as steep as a square wave, generating significant radiation during transmission and adversely affecting other circuits or modules in the system.

[0003] like Figure 1 The diagram shown is a signal diagram of a traditional OOK modulator. The inputs are a low-frequency signal IN and a high-frequency carrier signal OSC, and the output is a modulated signal OUT. It can be observed that the amplitude of the output modulated signal ranges from GND to VDD, and the signal edge slope remains quite steep. When this signal is transmitted, it not only has high dynamic power consumption but also significant external radiation.

[0004] Therefore, an OOK modulator with adjustable amplitude and slope is needed to optimize power consumption and radiation for different applications by adjusting the amplitude and slope. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an OOK modulator with adjustable signal amplitude and slope, and a method for using it.

[0006] According to the present invention, an OOK modulator with adjustable signal amplitude and slope and its usage method are provided as follows:

[0007] In one aspect, an OOK modulator with adjustable signal amplitude and slope is provided, comprising: control logic circuit, modulator circuit, input signal port and output signal port;

[0008] The control logic circuit is used to process the input signal and generate a signal for controlling the modulator circuit.

[0009] The modulator circuit generates a specific trapezoidal wave by generating a reference current, clamping the charging and discharging point voltage, and controlling the charging and discharging of the capacitor. Then, it generates an OOK modulated output signal with adjustable amplitude and slope through envelope shaping.

[0010] Preferably, the OOK modulator specifically includes: three input signal ports and one output signal port;

[0011] The three input signal ports are the low-frequency input signal IN, the high-frequency carrier signal OSC, and the reference voltage signal VREF, respectively, and the output signal port is the modulation output signal OUT.

[0012] The control logic circuit is used to process the low-frequency input signal IN and the high-frequency carrier signal OSC to generate signals for controlling the modulator circuit, including the IN_D signal, OUT_A signal, OUT_B signal and IN_B signal;

[0013] Specifically, the high-frequency carrier signal OSC is used to time the low-frequency input signal IN through the DFF chain. The timed signal is then ANDed with the low-frequency input signal IN to obtain the IN_D signal. The IN_D signal is then ANDed with the high-frequency carrier signal OSC to generate the OUT_B signal. The OUT_B signal is then inverted to obtain the OUT_A signal. Finally, the low-frequency input signal IN is directly inverted to obtain the IN_B signal.

[0014] Preferably, the modulator circuit includes a reference current generation circuit, a current comparator with feedback, an amplitude modulation and slope modulation section, and an envelope shaping section.

[0015] The reference current generation circuit is used to generate a reference current based on the reference voltage signal VREF and to mirror the reference current.

[0016] The current comparator with feedback is used to compare the reference voltage signal VREF with the voltage at the charge / discharge point VC, thereby clamping the voltage at the charge / discharge point VC.

[0017] The amplitude modulation and slope modulation section is used to charge and discharge the capacitor of the charging and discharging point VC with the mirrored current under the control of the IN signal and the IN_B signal, forming a trapezoidal wave with a specific amplitude and slope.

[0018] The envelope shaping section is used to perform envelope shaping on the OUT_A and OUT_B signals, modulating their amplitude and slope onto the trapezoidal wave of the charging / discharging point VC, and generating the final modulated output signal OUT.

[0019] Preferably, the reference current generating circuit includes an operational amplifier OPA, an NMOS transistor NM8, a resistor R1, and multiple MOS transistors for current mirroring;

[0020] The reference voltage signal VREF generates a reference current VREF / R1 on the corresponding PMOS transistor through the operational amplifier OPA, NMOS transistor NM8 and resistor R1. Then, through the mirroring effect of multiple MOS transistors, the reference current is mirrored to other corresponding MOS transistors.

[0021] Preferably, the current comparator with feedback is composed of multiple PMOS and NMOS transistors, including PM1, PM2, PM7, NM1, NM2, and NM7; wherein, the gate of PM1 is connected to the reference voltage signal VREF, and the gate of PM2 is connected to the charge / discharge point VC.

[0022] When the voltage at the charge / discharge point VC approaches the reference voltage signal VREF, most of the current in PM7 flows through PM1, the current in PM2 decreases, the gate voltage of NM1 increases, and the voltage at the charge / discharge point VC is pulled down through NM7 until the voltage at the charge / discharge point VC is equal to the reference voltage signal VREF.

[0023] When the voltage at the charge / discharge point VC discharges to 0V, most of the current in PM7 flows through PM2, the current in PM1 decreases, the gate voltage of NM1 drops, NM7 is turned off, and it has no effect on the charge / discharge point VC.

[0024] Preferably, the amplitude modulation and slope modulation section includes switching transistors PM5, PM6, NM5, NM6 and capacitor C1;

[0025] The IN signal and IN_B signal control the switching transistors. When IN is low and IN_B is high, PM5 and NM6 are turned on and PM6 and NM5 are turned off, and the charging current charges capacitor C1.

[0026] When IN is high and IN_B is low, PM5 and NM6 are turned off, and PM6 and NM5 are turned on, and the discharge current discharges capacitor C1; the charging current is equal to the discharging current, and the charging and discharging time is equal.

[0027] Preferably, the number of beats N of the DFF chain is approximately equal to the resistor R1 multiplied by the capacitor C1 and then divided by the period Tosc of the high-frequency carrier signal OSC, i.e., N≈(R1×C1) / Tosc.

[0028] Preferably, the maximum amplitude of the trapezoidal wave formed by the amplitude modulation and slope modulation part is the reference voltage signal VREF, and the slope is approximately equal to the reference voltage signal VREF divided by the product of resistor R1 and capacitor C1, that is, slope ≈ VREF / (R1×C1).

[0029] Secondly, a method for using an OOK modulator with adjustable signal amplitude and slope is provided, including:

[0030] Signal input steps: Connect the low-frequency input signal IN to the low-frequency signal input terminal of the modulator, connect the high-frequency carrier signal OSC to the carrier signal input terminal of the modulator, and connect the reference voltage signal VREF to the reference voltage input terminal of the modulator.

[0031] Steps for setting amplitude parameters: According to the amplitude requirements of the target output signal, adjust the magnitude of the reference voltage signal VREF so that the amplitude of the modulator output signal OUT changes with the change of VREF, wherein the maximum amplitude of the output signal OUT is equal to VREF.

[0032] Steps for setting slope parameters: According to the required edge slope of the target output signal, adjust the parameters of resistor R1 or capacitor C1 in the amplitude modulation and slope modulation section of the modulator so that the slope of the output signal OUT changes with the change of R1 or C1.

[0033] Initiating the modulation process: The input signal is processed by the control logic circuit and the modulator circuit to generate and output an OOK modulated signal OUT that conforms to the set amplitude and slope.

[0034] Preferably, the modulation initiation step includes:

[0035] The control logic circuit performs time-delay and logic operations on the OSC and IN signals through the DFF chain to generate OUT_A, OUT_B, and IN_B control signals.

[0036] The modulator circuit, based on the control signal, uses a reference current generation circuit and a current comparator with feedback to control the charging and discharging of the charging and discharging point VC, forming a trapezoidal wave. The amplitude and slope of the trapezoidal wave are then assigned to the OOK modulation signal through envelope shaping.

[0037] Compared with the prior art, the present invention has the following beneficial effects:

[0038] This invention generates a voltage envelope of an OOK modulated signal using a current comparator with feedback. The amplitude and slope of this envelope can be adjusted by the VREF voltage, resistor, and capacitor. This envelope signal is then shaped onto the OOK modulated signal to generate the final output signal. Compared to the traditional OOK modulated signal, the output signal has adjustable amplitude and slope, which can reduce dynamic power consumption and external radiation.

[0039] Other beneficial effects of the present invention will be explained in detail through the introduction of specific technical features and technical solutions in specific embodiments. Those skilled in the art should be able to understand the beneficial technical effects brought about by these technical features and technical solutions through the introduction of these technical features and technical solutions. Attached Figure Description

[0040] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0041] Figure 1 This is a diagram of the input and output signals for traditional OOK modulation.

[0042] Figure 2 This is the control logic circuit for the OOK modulator of the present invention;

[0043] Figure 3 This is the OOK modulator circuit of the present invention;

[0044] Figure 4 This is a diagram of the input and output signals of the OOK modulator of the present invention. Detailed Implementation

[0045] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0046] This invention provides an OOK modulator with adjustable signal amplitude and slope, referring to... Figure 2 and Figure 3 As shown, the OOK modulator of the present invention includes three input signal ports, one output signal port, control logic circuit, and modulator circuit; wherein, the three input signal ports are a low-frequency input signal IN, a high-frequency carrier signal OSC, and a reference voltage signal VREF, and the output signal port is a modulated output signal OUT.

[0047] Reference Figure 2 As shown, this is the control logic circuit of the OOK modulator of the present invention. The control logic circuit is used to process the low-frequency input signal IN and the high-frequency carrier signal OSC to generate a signal for controlling the modulator circuit.

[0048] Specifically, the high-frequency carrier signal OSC is used to time the low-frequency input signal IN through the DFF chain. The timed signal is then ANDed with the low-frequency input signal IN to obtain the IN_D signal. The IN_D signal is then ANDed with the high-frequency carrier signal OSC to generate the OUT_B signal. The OUT_B signal is then inverted to obtain the OUT_A signal. Finally, the low-frequency input signal IN is directly inverted to obtain the IN_B signal.

[0049] Specifically, refer to Figure 3 and Figure 4As shown, the OSC signal is first timed to a delay of the IN signal using a DFF chain. Each time the signal is timed, the delay is one OSC cycle. The number of times N is approximately equal to R1 multiplied by C1 and then divided by the OSC cycle Tosc, i.e., N≈(R1×C1) / Tosc. The timed and delayed signal is then ANDed with the IN signal to obtain the IN_D signal, as shown. Figure 4 As shown in the signal diagram, the low-level pulse width of the IN_D signal is increased by N*Tosc compared to the IN signal, while the high-level pulse width is correspondingly decreased. The IN_D signal is then used in conjunction with the OSC signal to generate OUT_B, which is then inverted to generate OUT_A. The IN signal is directly inverted to generate IN_B. OUT_A, OUT_B, and IN_B are used for control... Figure 3 The switching of amplitude and slope in the OOK modulator circuit.

[0050] The modulator circuit generates a specific trapezoidal wave by creating a reference current, clamping the charge / discharge point voltage, and controlling the charging / discharging of the capacitor. This wave is then envelope-shaped to generate an OOK modulated output signal with adjustable amplitude and slope. (Refer to...) Figure 3 As shown, the OOK modulator circuit of the present invention can be divided into four parts: the first part is the reference current generation circuit 1, the second part is the current comparator 2 with feedback, the third part is the amplitude modulation and slope modulation part 3, and the fourth part is the envelope shaping part 4.

[0051] The reference current generation circuit is used to generate a reference current based on the reference voltage signal VREF and to mirror the reference current. The reference current generation circuit includes an operational amplifier OPA, an NMOS transistor NM8, a resistor R1, and multiple MOS transistors for current mirroring. The reference voltage signal VREF generates a reference current VREF / R1 on the corresponding PMOS transistor through the operational amplifier OPA, the NMOS transistor NM8, and the resistor R1. This current is then mirrored to PM4 / 7 / 8 respectively. The current of PM4 is then mirrored to NM4 through NM3. Therefore, the charging current of PM8 is equal to the discharging current of NM4.

[0052] A current comparator with feedback is used to compare the reference voltage signal VREF with the voltage at the charge / discharge point VC, thereby clamping the voltage at the charge / discharge point VC. Figure 3 As shown, the current comparator with feedback consists of multiple PMOS and NMOS transistors, including PM1, PM2, PM7, NM1, NM2, and NM7; wherein, the gate of PM1 is connected to the reference voltage signal VREF, and the gate of PM2 is connected to the charge / discharge point VC.

[0053] When the voltage at the charge / discharge point VC approaches the reference voltage signal VREF, most of the current in PM7 flows through PM1, the current in PM2 decreases, and the gate voltage of NM1 increases. This pulls down the voltage at the charge / discharge point VC through NM7 until the voltage at the charge / discharge point VC equals the reference voltage signal VREF. When the voltage at the charge / discharge point VC discharges to 0V, most of the current in PM7 flows through PM2, the current in PM1 decreases, the gate voltage of NM1 drops, and NM7 turns off, having no effect on the charge / discharge point VC.

[0054] Reference Figure 3 As shown, the amplitude modulation and slope modulation section is used to charge and discharge the capacitor of the charging and discharging point VC with the mirrored current under the control of the IN signal and the IN_B signal, forming a trapezoidal wave with a specific amplitude and slope.

[0055] The amplitude modulation and slope adjustment section includes switching transistors PM5, PM6, NM5, NM6 and capacitor C1. The IN and IN_B signals generated by the logic control circuit control the switching transistors. When IN is low and IN_B is high, PM5 and NM6 are turned on and PM6 and NM5 are turned off, and the charging current charges capacitor C1 at point VC. When IN is high and IN_B is low, PM5 and NM6 are turned off and PM6 and NM5 are turned on, and the discharging current discharges capacitor C1 at point VC. The charging current and discharging current are equal, and the charging and discharging times are equal.

[0056] During the charging process of point VC, when the voltage of point VC reaches VREF, the current comparator with feedback clamps the highest level of VC at VREF. Specifically, when the voltage of point VC is about to exceed VREF, most of the current in PM7 begins to flow through PM1, the current in PM2 decreases, the current in PM1 flows through NM1, and the gate voltage of NM1 increases. This increases the gate voltage of NM1, pulling the voltage of point VC down through NM7 until a balance is reached where VC equals VREF. At this point, the current in PM8 flows entirely through NM7 and stops charging point VC. During the discharging process of VC, the voltage of point VC can be reduced to 0 because when it discharges to 0, most of the current in PM7 flows through PM2, the current in PM1 decreases, the gate voltage of NM1 drops, NM7 turns off and has no effect on point VC. The current in NM4 can continue to pull down point VC for discharge, thus allowing it to discharge to the minimum voltage of 0V.

[0057] After charging and discharging, the following is formed: Figure 4 The VC waveform in the figure is a trapezoidal wave with a certain slope and a certain amplitude. The highest amplitude of the trapezoidal wave formed by the amplitude modulation and slope modulation part is the reference voltage signal VREF. The slope is approximately equal to the reference voltage signal VREF divided by the product of the resistor R1 and the capacitor C1, that is, slope ≈ VREF / (R1×C1).

[0058] Reference Figure 3 As shown, the envelope shaping section is used to perform envelope shaping on the OUT_A and OUT_B signals, modulating their amplitude and slope onto the trapezoidal wave of the charging / discharging point VC to generate the final modulated output signal OUT.

[0059] like Figure 4 As seen, OUT is a trapezoidal OOK modulation signal with a certain slope and amplitude. The amplitude of the OOK modulation signal can be adjusted by adjusting the VREF voltage, and the slope of the OOK modulation signal can be adjusted by adjusting the resistor R1 or the capacitor C1. This can adapt to different application scenarios and reduce dynamic power consumption and external radiation.

[0060] This invention also provides a method for using an OOK modulator with adjustable signal amplitude and slope, the method specifically including:

[0061] Signal input steps: Connect the low-frequency input signal IN to the low-frequency signal input terminal of the modulator, connect the high-frequency carrier signal OSC to the carrier signal input terminal of the modulator, and connect the reference voltage signal VREF to the reference voltage input terminal of the modulator.

[0062] Steps for setting amplitude parameters: Adjust the magnitude of the reference voltage signal VREF according to the amplitude requirement of the target output signal, so that the amplitude of the modulator output signal OUT changes with the change of VREF, wherein the maximum amplitude of the output signal OUT is equal to VREF.

[0063] Steps for setting slope parameters: According to the required edge slope of the target output signal, adjust the parameters of resistor R1 or capacitor C1 in the amplitude modulation and slope modulation section of the modulator so that the slope of the output signal OUT changes with the change of R1 or C1, where the slope is approximately VREF / (R1×C1).

[0064] Initiation of modulation steps: The input signal is processed by the modulator's control logic circuit and modulator circuit to generate and output an OOK modulated signal OUT that conforms to the set amplitude and slope, wherein:

[0065] The control logic circuit performs time-delay and logic operations on the OSC and IN signals through the DFF chain to generate OUT_A, OUT_B, and IN_B control signals.

[0066] The modulator circuit, based on the control signal, uses a reference current generation circuit and a current comparator with feedback to control the charging and discharging of the charging and discharging point VC, forming a trapezoidal wave. The amplitude and slope of the trapezoidal wave are then assigned to the OOK modulation signal through envelope shaping.

[0067] This invention provides an OOK modulator with adjustable signal amplitude and slope and its usage method. The voltage envelope of the OOK modulated signal is generated by a current comparator with feedback. The amplitude and slope of this envelope can be adjusted by the VREF voltage, resistor and capacitor. This envelope signal is then shaped onto the OOK modulated signal to generate the final output signal. Compared with the traditional OOK modulated signal, this output signal has the function of adjustable amplitude and slope, which can reduce dynamic power consumption and external radiation.

[0068] Those skilled in the art will understand that, besides implementing the system and its various devices, modules, and units provided by this invention in the form of purely computer-readable program code, the same functions can be achieved entirely through logical programming of the method steps, making the system and its various devices, modules, and units of this invention function in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, the system and its various devices, modules, and units provided by this invention can be considered as a hardware component, and the devices, modules, and units included therein for implementing various functions can also be considered as structures within the hardware component; alternatively, the devices, modules, and units for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0069] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. An OOK modulator with adjustable signal amplitude and slope, characterized in that, include: Control logic circuit, modulator circuit, input signal port, and output signal port; The control logic circuit is used to process the input signal and generate signals for controlling the modulator circuit, including IN_D signal, OUT_A signal, OUT_B signal and IN_B signal; The modulator circuit generates a specific trapezoidal wave by generating a reference current, clamping the charging and discharging point voltage, and controlling the charging and discharging of the capacitor. Then, it generates an OOK modulated output signal with adjustable amplitude and slope through envelope shaping. The input signal port includes a low-frequency input signal IN and a reference voltage signal VREF; Specifically, the modulator circuit includes a reference current generation circuit, a current comparator with feedback, an amplitude modulation and slope modulation section, and an envelope shaping section. The reference current generation circuit is used to generate a reference current based on the reference voltage signal VREF and to mirror the reference current. The current comparator with feedback is used to compare the reference voltage signal VREF with the voltage at the charge / discharge point VC, thereby clamping the voltage at the charge / discharge point VC. The amplitude modulation and slope modulation section is used to charge and discharge the capacitor of the charging and discharging point VC with the mirrored current under the control of the IN signal and the IN_B signal, forming a trapezoidal wave with a specific amplitude and slope. The envelope shaping section is used to perform envelope shaping on the OUT_A and OUT_B signals, modulating their amplitude and slope onto the trapezoidal wave of the charging / discharging point VC, and generating the final modulated output signal OUT.

2. The OOK modulator with adjustable signal amplitude and slope according to claim 1, characterized in that, The OOK modulator specifically includes: three input signal ports and one output signal port; The three input signal ports are the low-frequency input signal IN, the high-frequency carrier signal OSC, and the reference voltage signal VREF, respectively, and the output signal port is the modulation output signal OUT. The control logic circuit is used to process the low-frequency input signal IN and the high-frequency carrier signal OSC. It uses a DFF chain to time the low-frequency input signal IN with the high-frequency carrier signal OSC, then performs an AND operation between the timed signal and the low-frequency input signal IN to obtain the IN_D signal. The IN_D signal is then performed an AND operation between the high-frequency carrier signal OSC to generate the OUT_B signal. The OUT_B signal is then inverted to obtain the OUT_A signal. Finally, the low-frequency input signal IN is directly inverted to obtain the IN_B signal.

3. The OOK modulator with adjustable signal amplitude and slope according to claim 1, characterized in that, The reference current generation circuit includes an operational amplifier OPA, an NMOS transistor NM8, a resistor R1, and multiple MOS transistors for current mirroring. The reference voltage signal VREF generates a reference current VREF / R1 on the corresponding PMOS transistor through the operational amplifier OPA, NMOS transistor NM8 and resistor R1. Then, through the mirroring effect of multiple MOS transistors, the reference current is mirrored to other corresponding MOS transistors.

4. The OOK modulator with adjustable signal amplitude and slope according to claim 1, characterized in that, The current comparator with feedback consists of multiple PMOS and NMOS transistors, including PM1, PM2, PM7, NM1, NM2, and NM7; wherein, the gate of PM1 is connected to the reference voltage signal VREF, and the gate of PM2 is connected to the charge / discharge point VC. When the voltage at the charge / discharge point VC approaches the reference voltage signal VREF, most of the current in PM7 flows through PM1, the current in PM2 decreases, the gate voltage of NM1 increases, and the voltage at the charge / discharge point VC is pulled down through NM7 until the voltage at the charge / discharge point VC is equal to the reference voltage signal VREF. When the voltage at the charge / discharge point VC discharges to 0V, most of the current in PM7 flows through PM2, the current in PM1 decreases, the gate voltage of NM1 drops, NM7 is turned off, and it has no effect on the charge / discharge point VC.

5. The OOK modulator with adjustable signal amplitude and slope according to claim 1, characterized in that, The amplitude modulation and slope adjustment section includes switching transistors PM5, PM6, NM5, NM6, and capacitor C1; The IN signal and IN_B signal control the switching transistors. When IN is low and IN_B is high, PM5 and NM6 are turned on and PM6 and NM5 are turned off, and the charging current charges capacitor C1. When IN is high and IN_B is low, PM5 and NM6 are turned off, and PM6 and NM5 are turned on, and the discharge current discharges capacitor C1; the charging current is equal to the discharging current, and the charging and discharging time is equal.

6. The OOK modulator with adjustable signal amplitude and slope according to claim 2, characterized in that, The number of beats N of the DFF chain is approximately equal to the resistor R1 multiplied by the capacitor C1 and then divided by the period Tosc of the high-frequency carrier signal OSC, i.e., N≈(R1×C1) / Tosc.

7. The OOK modulator with adjustable signal amplitude and slope according to claim 1, characterized in that, The maximum amplitude of the trapezoidal wave formed by the amplitude modulation and slope modulation part is the reference voltage signal VREF. The slope is approximately equal to the reference voltage signal VREF divided by the product of resistor R1 and capacitor C1, that is, slope ≈ VREF / (R1×C1).

8. A method of using an OOK modulator with adjustable signal amplitude and slope, based on the OOK modulator with adjustable signal amplitude and slope according to any one of claims 1-7, characterized in that, include: Signal input steps: Connect the low-frequency input signal IN to the low-frequency signal input terminal of the modulator, connect the high-frequency carrier signal OSC to the carrier signal input terminal of the modulator, and connect the reference voltage signal VREF to the reference voltage input terminal of the modulator. Steps for setting amplitude parameters: According to the amplitude requirements of the target output signal, adjust the magnitude of the reference voltage signal VREF so that the amplitude of the modulator output signal OUT changes with the change of VREF, wherein the maximum amplitude of the output signal OUT is equal to VREF. Steps for setting slope parameters: According to the required edge slope of the target output signal, adjust the parameters of resistor R1 or capacitor C1 in the amplitude modulation and slope modulation section of the modulator so that the slope of the output signal OUT changes with the change of R1 or C1. Initiating the modulation process: The input signal is processed by the control logic circuit and the modulator circuit to generate and output an OOK modulated signal OUT that conforms to the set amplitude and slope.

9. The method of using the OOK modulator with adjustable signal amplitude and slope according to claim 8, characterized in that, The modulation initiation step includes: The control logic circuit performs time-delay and logic operations on the OSC and IN signals through the DFF chain to generate OUT_A, OUT_B, and IN_B control signals. The modulator circuit, based on the control signal, uses a reference current generation circuit and a current comparator with feedback to control the charging and discharging of the charging and discharging point VC, forming a trapezoidal wave. The amplitude and slope of the trapezoidal wave are then assigned to the OOK modulation signal through envelope shaping.

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