Cable fault positioning device and method

Abstract

The invention discloses a cable fault positioning device and method, and the device comprises a power frequency current collection module which is connected to the two ends of a cable and a middle distributed access point, and is used for collecting a power frequency current and outputting a differential signal after the power frequency current is conditioned; the traveling wave detection unit is used for receiving the differential signal, extracting a wave head arrival time of a fault traveling wave through multi-scale wavelet packet transformation and an adaptive threshold criterion, and transmitting the wave head arrival time to the signal processing module; the time synchronization module is used for receiving an external synchronization signal and providing a nanosecond synchronous clock for the power frequency current acquisition module, the traveling wave detection unit and the signal processing module; the signal processing module is used for receiving a wave head arrival time and a timestamp of a calibration time reference, and determining a fault point distance based on a double-end traveling wave positioning algorithm and a wave velocity compensation model; and the communication module is used for outputting the fault point distance.

Description

Technical Field

[0001] The present invention belongs to the technical field of cable fault monitoring, and in particular relates to a cable fault locating device and method. Background Art

[0002] With the acceleration of undergrounding of urban transmission and distribution networks, power cables are increasingly used in urban networks and industrial parks. However, long-term cable operation is prone to short circuits, ground faults, and high-resistance faults (ground resistance > 1kΩ) due to insulation aging, construction damage, or moisture penetration. Existing fault location technologies have significant limitations:

[0003] Insufficient accuracy: The pulse reflection method relies on wave velocity estimation, and the positioning error is often greater than 50m (especially for long-distance cables);

[0004] The AC bridge method is only applicable to low-resistance faults (<100Ω) and requires known cable length parameters.

[0005] Weak anti-interference ability: The audio method is easily interfered by the city network power frequency harmonics and communication carrier, and the signal-to-noise ratio is less than 20dB;

[0006] The traditional traveling wave method results in a deviation of >100ns in wave head extraction due to asynchronous sampling.

[0007] High missed detection rate for high resistance and intermittent faults: The amplitude of the reflected wave head of high resistance fault is less than 50mV, and the recognition rate of existing equipment is less than 55%;

[0008] The duration of intermittent flashover fault is less than 1ms, and the missed detection rate of conventional threshold algorithm is greater than 30%.

[0009] The industry urgently needs a positioning device that integrates high-precision synchronous sampling, weak signal enhancement and adaptive diagnosis to solve the problems of low efficiency in repairing underground cable faults (average repair time > 24 hours) and high operation and maintenance costs. Summary of the Invention

[0010] In view of this, the main object of the present invention is to provide a cable fault locating device and method.

[0011] To achieve the above object, the technical solution of the present invention is achieved as follows:

[0012] A cable fault locating device, comprising: a power frequency current acquisition module, a traveling wave detection unit, a time synchronization module, a signal processing module, and a communication module;

[0013] The power frequency current acquisition module is connected to both ends of the cable and the middle distributed access point, and is used to collect the power frequency current and output a differential signal after conditioning the power frequency current;

[0014] The traveling wave detection unit is connected to the power frequency current acquisition module, and is used to receive the differential signal and extract the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold judgment, and transmit the arrival time of the head to the signal processing module;

[0015] The time synchronization module is connected to the power frequency current acquisition module, the traveling wave detection unit, and the signal processing module, and is used to receive an external synchronization signal and provide a nanosecond-level synchronization clock to the power frequency current acquisition module, the traveling wave detection unit, and the signal processing module;

[0016] The signal processing module is connected to the traveling wave detection unit and the time synchronization module, and is used to receive the timestamp of the wave head arrival time and the calibration time reference, and determine the distance to the fault point based on the two-end traveling wave positioning algorithm and the wave speed compensation model;

[0017] The communication module is connected to the signal processing module and is used to output the distance to the fault point.

[0018] Preferably, the power frequency current acquisition module includes: an overvoltage protection circuit, an external integration circuit, a passive high-pass circuit, an amplifier circuit, a first and second order high-pass circuit, and a second second order high-pass circuit;

[0019] The power frequency current signals from cable phases A and B are processed in sequence by the corresponding overvoltage protection circuit, external integration circuit, passive high-pass circuit, amplifier circuit, first- and second-order high-pass circuit, and second-order high-pass circuit to filter out power frequency interference and extract high-frequency features, ultimately outputting differential signals HOUTA1± and HOUTA2±.

[0020] Preferably, a plurality of collection points are respectively provided on phase A and phase B of the cable, and each collection point is connected to the overvoltage protection circuit of the power frequency current collection module through a signal conditioning circuit;

[0021] Each of the signal conditioning circuits includes a first operational amplifier U1 and a second operational amplifier U2;

[0022] The seventh pin of the second operational amplifier U2 outputs the acquisition point signal via the first resistor R1, one end of the first capacitor C1 is connected to the first resistor R1 and the other end is grounded;

[0023] One path of the sixth pin is connected to the ground via the second resistor R2, and the other path is connected to the seventh pin via the third resistor R3;

[0024] The fifth pin is connected to the first pin of the first operational amplifier U1 via the fourth resistor R4 and the second capacitor C2;

[0025] One end of the third capacitor C3 is connected between the fifth pin of the second operational amplifier U2 and the fourth resistor R4, and the other end is grounded;

[0026] One end of the fifth resistor R5 is connected between the fourth resistor R4 and the second capacitor C2, and the other end is grounded;

[0027] The second pin of the first operational amplifier U1 is connected to the ground through the sixth resistor R6;

[0028] One path of the eighth pin is connected to +5V, and the other path is grounded via the fourth capacitor C4; the third pin of the first operational amplifier U1 is connected to the port of one of the acquisition points;

[0029] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the fifth capacitor C5;

[0030] A sixth capacitor C6, a seventh resistor R7, and a first diode D1 are connected in parallel in sequence between the third pin and the other path of the fourth pin of the first operational amplifier U1;

[0031] An eighth resistor R8 is connected in parallel between the first pin and the second pin of the first operational amplifier U1 , and a seventh capacitor C7 is connected in parallel to the eighth resistor R8 .

[0032] Preferably, the overvoltage protection circuit includes a sixty-fifth resistor R65, a sixty-sixth resistor R66, a ninth diode D9, and a fifty-seventh capacitor C57;

[0033] One end of the sixty-fifth resistor R65 is connected to the signal input port RCH1A, and the other end is connected to the anode of the ninth diode D9;

[0034] The anode of the ninth diode D9 is connected to the sixty-fifth resistor R65, and the cathode is grounded;

[0035] One end of the sixty-sixth resistor R66 is connected to the connection point of the sixty-fifth resistor R65 and the ninth diode D9, and the other end is connected to the fifty-seventh capacitor C57;

[0036] One end of the fifty-seventh capacitor C57 is connected to the sixty-sixth resistor R66, and the other end is grounded.

[0037] Preferably, the external integration circuit includes a seventeenth operational amplifier U17, a fifty-ninth capacitor C59, a sixtieth capacitor C60, a sixty-first capacitor C61, a sixty-ninth resistor R69, and a seventieth resistor R70;

[0038] The output signal of the overvoltage protection circuit is connected to the third pin of the seventeenth operational amplifier U17, and the first pin of the seventeenth operational amplifier U17 is connected to the passive high-pass circuit;

[0039] The second pin of the seventeenth operational amplifier U17 is connected to the first pin via the sixtieth capacitor C60;

[0040] A sixty-ninth resistor R69 is connected in parallel between the first pin and the second pin of the seventeenth operational amplifier U17, and one side of the sixty-ninth resistor R69 is grounded via a seventieth resistor R70;

[0041] One path of the fourth pin of the seventeenth operational amplifier U17 is connected to ground via a sixty-first capacitor C61, and the other path is connected to -3.3VCC;

[0042] One path of the eighth pin of the seventeenth operational amplifier U17 is connected to the ground via the fifty-ninth capacitor C59, and the other path is connected to +3.3VCC.

[0043] Preferably, the passive high-pass circuit includes a sixty-fifth capacitor C65 and a seventy-third resistor R73, one side of the sixty-fifth capacitor C65 is connected to the external integration circuit, the other side is connected to the amplifier circuit, and the sixty-fifth capacitor C65 is grounded to the amplifier circuit via the seventy-third resistor R73;

[0044] The amplifying circuit includes a nineteenth operational amplifier U19, a seventy-fourth resistor R74, a seventy-fifth resistor R75, and a seventy-sixth resistor R76;

[0045] The fifth pin of the nineteenth operational amplifier U19 is connected to a passive high-pass circuit;

[0046] The seventh pin is connected to the first second-order high-pass circuit;

[0047] The sixth pin is connected to the seventh pin via a seventy-fifth resistor R75 and a seventy-fourth resistor R74;

[0048] One end of the seventy-sixth resistor R76 is grounded, and the other end is connected to the seventy-fifth resistor R75.

[0049] Preferably, the first second-order high-pass circuit includes a twenty-first operational amplifier U21, a sixty-seventh capacitor C67, a sixty-eighth capacitor C68, a sixty-ninth capacitor C69, a seventy-second capacitor C70, an eightieth resistor R80, and an eighty-first resistor R81;

[0050] The third pin of the twenty-first operational amplifier U21 is connected to the amplifier circuit via the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67;

[0051] The first pin is connected to the second second-order high-pass circuit processing;

[0052] The fourth pin is connected to ground through the 69th capacitor C69 and the other is connected to -3.3VCC;

[0053] The second pin is connected between the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67 via the eighty-first resistor R81;

[0054] The eighth pin is connected to ground through the seventieth capacitor C70 and connected to +3.3VCC in another way;

[0055] One end of the eighty-eighth resistor R88 is grounded, and the other end is connected between the fifth pin of the twenty-third operational amplifier U23 and the seventy-sixth capacitor C76.

[0056] Preferably, the second second-order high-pass circuit comprises a twenty-third operational amplifier U23, a seventy-fifth capacitor C75, a seventy-sixth capacitor C76, a sixty-ninth capacitor C69, a seventieth capacitor C70, an eighty-fourth resistor R84, and an eighty-fifth resistor R85.

[0057] The fifth pin of the twenty-third operational amplifier U23 is connected to the first second-order high-pass circuit through the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75.

[0058] The first pin is connected to the second second-order high-pass circuit.

[0059] The seventh pin outputs the differential signals HOUTA1 and HOUTA2 of phases A and B.

[0060] The sixth pin is connected between the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75 through the eighty-fifth resistor R85.

[0061] One end of the eighty-fourth resistor R84 is grounded, and the other end is connected between the fifth pin of the twenty-third operational amplifier U23 and the seventy-sixth capacitor C76.

[0062] Preferably, the output end of the power frequency current acquisition module is connected to a single-ended to differential signal conditioning circuit.

[0063] The single-ended to differential signal conditioning circuit comprises a twenty-fifth operational amplifier U25.

[0064] The first pin of the twenty-fifth operational amplifier U25 is grounded through the eighty-eighth resistor R88.

[0065] The second pin is connected to the differential voltage common-mode reference point AD_VCAM1 through the eighty-ninth resistor R89.

[0066] The third pin is connected to +3.3V power supply in the first way, connected to ground through the seventy-ninth capacitor C79 in the second way, and connected to the seventh pin through the one hundredth resistor R102 in the third way.

[0067] The fourth pin is divided into two ways through the ninetieth resistor R90: one way is connected to ground through the eightieth capacitor C80, and the other way is as a differential output end HA1+, HA2+.

[0068] The fifth pin is divided into two paths via the ninety-first resistor R91: one path is grounded via the eighty-first capacitor C81, and the other path serves as the differential output terminals HA1- and HA2-;

[0069] The sixth pin is grounded via the eighty-second capacitor C82 and connected to a -3.3V power supply;

[0070] The eighth pin is connected to the power frequency current acquisition module via the ninety-second resistor R92 and receives the differential signals HOUTA1 and HOUTA2;

[0071] The two sides of the twenty-fifth operational amplifier U25 are connected in parallel with a ninety-third resistor R93 and an eighty-third capacitor C83, and a ninety-fourth resistor R94 and an eighty-fourth capacitor C84.

[0072] A cable fault location method using the above-mentioned cable fault device, the method comprising:

[0073] Collecting power frequency current at both ends of the cable and at a distributed access point in the middle, performing signal conditioning on the power frequency current, and outputting a differential signal;

[0074] receiving the differential signal and extracting the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold criterion;

[0075] Based on the wave head arrival time and synchronization timestamp, a double-ended traveling wave location algorithm combined with a wave velocity compensation model is used to calculate the distance to the fault point.

[0076] Compared with the prior art, the present invention has the following beneficial effects:

[0077] The present invention achieves ≤10m precision positioning of high-resistance grounding and intermittent faults through nanosecond synchronous sampling and adaptive threshold traveling wave detection, significantly improving the cable fault recognition rate and repair efficiency in complex environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0078] The accompanying drawings described herein are used to further understand the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0079] Figure 1 A principle block diagram of a cable fault location device is provided for an embodiment of the present invention;

[0080] Figure 2 A circuit diagram of a power frequency current acquisition module in a cable fault locating device is provided in an embodiment of the present invention;

[0081] Figure 3 A circuit diagram of a signal conditioning circuit in a cable fault locating device is provided for an embodiment of the present invention;

[0082] Figure 4 A circuit diagram of a single-ended to differential signal conditioning circuit in a cable fault locating device is provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0083] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0084] The same or similar numbers in the drawings of this embodiment correspond to the same or similar parts; in the description of the present invention, it should be understood that the terms "upper", "lower", "left", "right", "inner", "outer", etc. indicating the orientation or position relationship are based on the orientation or position relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, the terms describing the position relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting this patent. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0085] It should be noted that, in this document, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, article, or device comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, article, or device comprising the element.

[0086] The embodiment of the present invention provides a cable fault location device, such as Figure 1-4 As shown, the device includes: a power frequency current acquisition module 1, a traveling wave detection unit 2, a time synchronization module 3, a signal processing module 4, and a communication module 5;

[0087] The power frequency current acquisition module 1 is connected to both ends of the cable and the middle distributed access point, and is used to collect the power frequency current and output a differential signal after conditioning the power frequency current;

[0088] The traveling wave detection unit 2 is connected to the power frequency current acquisition module 1, and is used to receive the differential signal and extract the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold judgment, and transmit the arrival time of the head to the signal processing module 4;

[0089] The time synchronization module 3 is connected to the power frequency current acquisition module 1, the traveling wave detection unit 2, and the signal processing module 4, and is used to receive an external synchronization signal and provide a nanosecond-level synchronization clock to the power frequency current acquisition module 1, the traveling wave detection unit 2, and the signal processing module 4;

[0090] The signal processing module 4 is connected to the traveling wave detection unit 2 and the time synchronization module 3, and is used to receive the timestamp of the wave head arrival time and the calibration time reference, and determine the distance to the fault point based on the two-end traveling wave positioning algorithm and the wave speed compensation model;

[0091] The communication module 5 is connected to the signal processing module 4 and is used to output the distance to the fault point.

[0092] like Figure 2 As shown, the power frequency current acquisition module 1 includes: an overvoltage protection circuit, an external integration circuit, a passive high-pass circuit, an amplifier circuit, a first and second order high-pass circuit, and a second second order high-pass circuit;

[0093] The power frequency current signals from cable phases A and B are processed in sequence by the corresponding overvoltage protection circuit, external integration circuit, passive high-pass circuit, amplifier circuit, first- and second-order high-pass circuit, and second-order high-pass circuit to filter out power frequency interference and extract high-frequency features, ultimately outputting differential signals HOUTA1± and HOUTA2±.

[0094] For example, the industrial frequency current signal from phase A of the cable is processed in sequence by the corresponding overvoltage protection circuit, external integration circuit, passive high-pass circuit, amplifier circuit, first and second-order high-pass circuit, and second second-order high-pass circuit to filter out industrial frequency interference and extract high-frequency features, and finally output the differential signal HOUTA1±.

[0095] The power frequency current signal from cable phase B is processed in sequence by the corresponding overvoltage protection circuit, external integration circuit, passive high-pass circuit, amplifier circuit, first- and second-order high-pass circuit, and second-order high-pass circuit to filter out power frequency interference and extract high-frequency features, ultimately outputting the differential signal HOUTA2±.

[0096] Several collection points are respectively set on the A phase and the B phase of the cable, and each collection point is connected to the overvoltage protection circuit of the power frequency current collection module 1 through a signal conditioning circuit;

[0097] Each of the signal conditioning circuits includes a first operational amplifier U1 and a second operational amplifier U2;

[0098] The seventh pin of the second operational amplifier U2 outputs the acquisition point signal via the first resistor R1, one end of the first capacitor C1 is connected to the first resistor R1 and the other end is grounded;

[0099] One path of the sixth pin is connected to the ground via the second resistor R2, and the other path is connected to the seventh pin via the third resistor R3;

[0100] The fifth pin is connected to the first pin of the first operational amplifier U1 via the fourth resistor R4 and the second capacitor C2;

[0101] One end of the third capacitor C3 is connected between the fifth pin of the second operational amplifier U2 and the fourth resistor R4, and the other end is grounded;

[0102] One end of the fifth resistor R5 is connected between the fourth resistor R4 and the second capacitor C2, and the other end is grounded;

[0103] The second pin of the first operational amplifier U1 is connected to the ground through the sixth resistor R6;

[0104] One path of the eighth pin is connected to +5V, and the other path is grounded via the fourth capacitor C4; the third pin of the first operational amplifier U1 is connected to the port of one of the acquisition points;

[0105] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the fifth capacitor C5;

[0106] A sixth capacitor C6, a seventh resistor R7, and a first diode D1 are connected in parallel in sequence between the third pin and the other path of the fourth pin of the first operational amplifier U1;

[0107] An eighth resistor R8 is connected in parallel between the first pin and the second pin of the first operational amplifier U1 , and a seventh capacitor C7 is connected in parallel to the eighth resistor R8 .

[0108] For example, four collection points are set on phase A and phase B of the cable respectively;

[0109] like Figure 3 (a) For the first acquisition point of phase A, the first signal conditioning circuit includes a first operational amplifier U1 and a second operational amplifier U2;

[0110] The seventh pin of the second operational amplifier U2 outputs the acquisition point signal AV1 through the first resistor R1, one end of the first capacitor C1 is connected to the first resistor R1, and the other end is grounded AV1 GND;

[0111] One path of the sixth pin is connected to the ground via the second resistor R2, and the other path is connected to the seventh pin via the third resistor R3;

[0112] The fifth pin is connected to the first pin of the first operational amplifier U1 via the fourth resistor R4 and the second capacitor C2;

[0113] One end of the third capacitor C3 is connected between the fifth pin of the second operational amplifier U2 and the fourth resistor R4, and the other end is grounded;

[0114] One end of the fifth resistor R5 is connected between the fourth resistor R4 and the second capacitor C2, and the other end is grounded;

[0115] The second pin of the first operational amplifier U1 is connected to the ground through the sixth resistor R6;

[0116] One path of the eighth pin is connected to +5V, and the other path is grounded via the fourth capacitor C4; the third pin of the first operational amplifier U1 is connected to the port AC11 P;

[0117] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the fifth capacitor C5;

[0118] A sixth capacitor C6, a seventh resistor R7, and a first diode D1 are connected in parallel in sequence between the third pin and the other path of the fourth pin of the first operational amplifier U1;

[0119] An eighth resistor R8 is connected in parallel between the first pin and the second pin of the first operational amplifier U1 , and a seventh capacitor C7 is connected in parallel to the eighth resistor R8 .

[0120] like Figure 3 (b) For the second acquisition point of phase A, the second signal conditioning circuit includes a third operational amplifier U3 and a fourth operational amplifier U4;

[0121] The seventh pin of the fourth operational amplifier U4 outputs the acquisition point signal AV2 via the ninth resistor R9, one end of the eighth capacitor C8 is connected to the ninth resistor R9, and the other end is grounded AV2GND;

[0122] One path of the sixth pin is connected to the ground via the tenth resistor R10, and the other path is connected to the seventh pin via the eleventh resistor R11;

[0123] The fifth pin is connected to the first pin of the third operational amplifier U3 via the twelfth resistor R12 and the ninth capacitor C9;

[0124] One end of the tenth capacitor C10 is connected between the fifth pin of the fourth operational amplifier U4 and the twelfth resistor R12, and the other end is grounded;

[0125] One end of the thirteenth resistor R13 is connected between the twelfth resistor R12 and the ninth capacitor C9, and the other end is grounded;

[0126] The second pin of the third operational amplifier U3 is connected to the ground through the fourteenth resistor R14;

[0127] One path of the eighth pin is connected to +5V, and the other path is connected to ground via the eleventh capacitor C11; the third pin of the third operational amplifier U3 is connected to the port AC12P;

[0128] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the twelfth capacitor C12;

[0129] A thirteenth capacitor C13, a fifteenth resistor R15, and a second diode D2 are connected in parallel between the third pin and the other path of the fourth pin;

[0130] A sixteenth resistor R16 is connected in parallel between the first pin and the second pin of the third operational amplifier U3 , and a fourteenth capacitor C14 is connected in parallel to the sixteenth resistor R16 .

[0131] like Figure 3 (c) For the third acquisition point of phase A, the third signal conditioning circuit includes a fifth operational amplifier U5 and a sixth operational amplifier U6;

[0132] The seventh pin of the sixth operational amplifier U6 outputs the acquisition point signal AV3 via the seventeenth resistor R17; one end of the fifteenth capacitor C15 is connected to the seventeenth resistor R17, and the other end is grounded AV3GND;

[0133] One path of the sixth pin is connected to the ground via the eighteenth resistor R18, and the other path is connected to the seventh pin via the nineteenth resistor R19;

[0134] The fifth pin is connected to the first pin of the fifth operational amplifier U5 via the twentieth resistor R20 and the sixteenth capacitor C16;

[0135] One end of the seventeenth capacitor C17 is connected between the fifth pin of the sixth operational amplifier U6 and the 20th resistor R20, and the other end is grounded;

[0136] One end of the twenty-first resistor R21 is connected between the twentieth resistor R20 and the sixteenth capacitor C16, and the other end is grounded;

[0137] The second pin of the fifth operational amplifier U5 is connected to the ground through the twenty-second resistor R22;

[0138] One path of the eighth pin is connected to +5V, and the other path is grounded through the eighteenth capacitor C18; the third pin of the fifth operational amplifier U5 is connected to the port AC13P;

[0139] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the nineteenth capacitor C19;

[0140] A twentieth capacitor C20, a twenty-third resistor R23, and a third diode D3 are connected in parallel between the third pin and the other path of the fourth pin;

[0141] A twenty-fourth resistor R24 ​​is connected in parallel between the first pin and the second pin of the fifth operational amplifier U5 , and a twenty-first capacitor C21 is connected in parallel to the twenty-fourth resistor R24 ​​.

[0142] like Figure 3 (d) For the fourth acquisition point of phase A, the fourth signal conditioning circuit includes a seventh operational amplifier U7 and an eighth operational amplifier U8;

[0143] The seventh pin of the eighth operational amplifier U8 outputs the acquisition point signal AV4 via the twenty-fifth resistor R25; one end of the twenty-second capacitor C22 is connected to the twenty-fifth resistor R25, and the other end is grounded to AV4GND;

[0144] One path of the sixth pin is connected to the ground via a twenty-sixth resistor R26, and the other path is connected to the seventh pin via a twenty-seventh resistor R27;

[0145] The fifth pin is connected to the first pin of the seventh operational amplifier U7 via the twenty-eighth resistor R28 and the twenty-third capacitor C23;

[0146] One end of the twenty-fourth capacitor C24 is connected between the fifth pin of the eighth operational amplifier U8 and the twenty-eighth resistor R28, and the other end is grounded;

[0147] One end of the twenty-ninth resistor R29 is connected between the twenty-eighth resistor R28 and the twenty-third capacitor C23, and the other end is grounded;

[0148] The second pin of the seventh operational amplifier U7 is connected to the ground through the 30th resistor R30;

[0149] One path of the eighth pin is connected to +5V, and the other path is grounded via the twenty-fifth capacitor C25; the third pin of the seventh operational amplifier U7 is connected to the port AC14P;

[0150] One path of the fourth pin is connected to -5V, and the other path passes through the twenty-sixth capacitor C26 and then grounded;

[0151] A twenty-seventh capacitor C27, a thirty-first resistor R31, and a fourth diode D4 are connected in parallel between the third pin and the other path of the fourth pin;

[0152] A thirty-second resistor R32 is connected in parallel between the first pin and the second pin of the seventh operational amplifier U7 , and a twenty-eighth capacitor C28 is connected in parallel to the thirty-second resistor R32 .

[0153] like Figure 3 (e) For the first acquisition point of phase B, the fifth signal conditioning circuit includes a ninth operational amplifier U9 and a tenth operational amplifier U10;

[0154] The seventh pin of the tenth operational amplifier U10 outputs the acquisition point signal BV1 via the thirty-third resistor R33; one end of the twenty-ninth capacitor C29 is connected to the twenty-fifth resistor R25, and the other end is grounded BV1 GND;

[0155] One path of the sixth pin is connected to the ground via a thirty-fourth resistor R34, and the other path is connected to the seventh pin via a thirty-fifth resistor R35;

[0156] The fifth pin is connected to the first pin of the ninth operational amplifier U9 via a thirty-sixth resistor R36 and a thirtieth capacitor C30;

[0157] One end of the thirty-first capacitor C31 is connected between the fifth pin of the tenth operational amplifier U10 and the thirty-sixth resistor R36, and the other end is grounded;

[0158] One end of the thirty-seventh resistor R37 is connected between the thirty-sixth resistor R36 and the rear end of the thirtieth capacitor C30, and the other end is grounded;

[0159] The second pin of the ninth operational amplifier U9 is connected to the ground via the thirty-eighth resistor R38;

[0160] One path of the eighth pin is connected to +5V, and the other path is connected to ground via the thirty-second capacitor C32; the third pin of the ninth operational amplifier U9 is connected to the port BC11 P;

[0161] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the thirty-third capacitor C33;

[0162] A thirty-fourth capacitor C34, a thirty-ninth resistor R39, and a fifth diode D5 are connected in parallel between the third pin and the other path of the fourth pin;

[0163] A fortieth resistor R40 is connected in parallel between the first pin and the second pin of the ninth operational amplifier U9 , and a thirty-fifth capacitor C35 is connected in parallel to the fortieth resistor R40 .

[0164] like Figure 3 (f) For the first acquisition point of phase B, the sixth signal conditioning circuit includes an eleventh operational amplifier U11 and a twelfth operational amplifier U12;

[0165] The seventh pin of the twelfth operational amplifier U12 outputs the acquisition point signal BV2 via the forty-first to eighty-fifth resistor R85; one end of the thirty-sixth capacitor C36 is connected to the forty-first to eighty-fifth resistor R85, and the other end is grounded BV2GND;

[0166] One path of the sixth pin is connected to the ground via the forty-second to the forty-fifth resistor R65, and the other path is connected to the seventh pin via the forty-third to the forty-third resistor R73;

[0167] The fifth pin is connected to the first pin of the eleventh operational amplifier U11 via the forty-fourth resistor R74 and the thirty-seventh capacitor C37;

[0168] One end of the thirty-eighth capacitor C38 is connected between the fifth pin of the twelfth operational amplifier U12 and the forty-fourth resistor R74, and the other end is connected to ground;

[0169] One end of the forty-fifth resistor R66 is connected between the forty-fourth resistor R74 and the thirty-seventh capacitor C37, and the other end is connected to ground;

[0170] The second pin of the eleventh operational amplifier U11 is connected to ground through the forty-sixth resistor R46;

[0171] One end of the eighth pin is connected to +5V, and the other end is connected to ground through the thirty-ninth capacitor C39; the third pin of the eleventh operational amplifier U11 is connected to the input port BC11P;

[0172] One end of the fourth pin is connected to -5V, and the other end is connected to ground through the fortieth capacitor C40;

[0173] The third pin and the other end of the fourth pin are connected in parallel to the forty-first capacitor C41, the forty-seventh resistor R47, and the sixth diode D6 in sequence;

[0174] The first pin and the second pin of the eleventh operational amplifier U11 are also connected in parallel to the forty-eighth resistor R48, and the forty-eighth resistor R48 is connected in parallel to the forty-second capacitor C42.

[0175] As Figure 3 (g), for the first acquisition point of phase B, the seventh signal conditioning circuit includes the thirteenth operational amplifier U13 and the fourteenth operational amplifier U14;

[0176] The seventh pin of the fourteenth operational amplifier U14 outputs the acquisition point signal BV3 through the forty-ninth resistor R49, and the forty-third capacitor C43 is connected to the forty-ninth resistor R49 at one end and to ground BV3GND at the other end;

[0177] One end of the sixth pin is connected to ground through the fiftieth resistor R69, and the other end is connected to the seventh pin through the fifty-first resistor R76;

[0178] The fifth pin is connected to one end of the first pin of the thirteenth operational amplifier U13 through the fifty-second resistor R52 and the forty-fourth capacitor C44;

[0179] One end of the forty-fifth capacitor C45 is connected between the fifth pin of the fourteenth operational amplifier U14 and the fifty-second resistor R52, and the other end is connected to ground;

[0180] One end of the fifty-third resistor R53 is connected between the fifty-second resistor R52 and the forty-fourth capacitor C44, and the other end is connected to ground;

[0181] The second pin of the thirteenth operational amplifier U13 is connected to the ground through the fifty-fourth resistor R54;

[0182] One path of the eighth pin is connected to +5V, and the other path is grounded via the forty-sixth capacitor C46; the third pin of the thirteenth operational amplifier U13 is connected to the port BC13P;

[0183] One path of the fourth pin is connected to -5V, and the other path passes through the forty-seventh capacitor C47 and then is grounded;

[0184] A forty-eighth capacitor C48, a fifty-fifth resistor R55, and a seventh diode D7 are connected in parallel between the third pin and the other path of the fourth pin;

[0185] A fifty-sixth resistor R56 is connected in parallel between the first pin and the second pin of the thirteenth operational amplifier U13, and a forty-ninth capacitor C49 is connected in parallel to the fifty-sixth resistor R56.

[0186] like Figure 3 (h), for the first acquisition point of phase B, the eighth signal conditioning circuit includes a fifteenth operational amplifier U15 and a sixteenth operational amplifier U16;

[0187] The seventh pin of the sixteenth operational amplifier U16 outputs the acquisition point signal BV4 via the fifty-seventh resistor R57. One end of the fiftieth capacitor C50 is connected to the fifty-seventh resistor R57, and the other end is grounded to BV4GND.

[0188] One path of the sixth pin is connected to the ground via a fifty-eighth resistor R58, and the other path is connected to the seventh pin via a fifty-ninth resistor R59;

[0189] The fifth pin is connected to the first pin of the fifteenth operational amplifier U15 via the sixtieth resistor R60 and the fifty-first capacitor C51;

[0190] One end of the fifty-second capacitor C52 is connected between the fifth pin of the sixteenth operational amplifier U16 and the sixtieth resistor R60, and the other end is grounded;

[0191] One end of the sixtieth resistor R61 is connected between the sixtieth resistor R60 and the fifty-first capacitor C51, and the other end is grounded;

[0192] The second pin of the fifteenth operational amplifier U15 is connected to the ground through the sixty-second resistor R62;

[0193] One path of the eighth pin is connected to +5V, and the other path is connected to ground via the fifty-third capacitor C53; the third pin of the fifteenth operational amplifier U15 is connected to the port BC14P;

[0194] One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the fifty-fourth capacitor C54;

[0195] A fifty-fifth capacitor C55, a sixty-third resistor R63, and an eighth diode D8 are connected in parallel between the third pin and the other path of the fourth pin;

[0196] A sixty-fourth resistor R64 is connected in parallel between the first pin and the second pin of the fifteenth operational amplifier U15, and a fifty-sixth capacitor C56 is connected in parallel to the sixty-fourth resistor R64.

[0197] In some embodiments, the overvoltage protection circuit for cable phase A includes a sixty-fifth resistor R65, a sixty-sixth resistor R66, a ninth diode D9, and a fifty-seventh capacitor C57;

[0198] One end of the sixty-fifth resistor R65 is connected to the signal input port RCH1A, and the other end is connected to the anode of the ninth diode D9;

[0199] The anode of the ninth diode D9 is connected to the sixty-fifth resistor R65, and the cathode is grounded;

[0200] One end of the sixty-sixth resistor R66 is connected to the connection point of the sixty-fifth resistor R65 and the ninth diode D9, and the other end is connected to the fifty-seventh capacitor C57;

[0201] One end of the fifty-seventh capacitor C57 is connected to the sixty-sixth resistor R66, and the other end is grounded.

[0202] The overvoltage protection circuit for cable phase B includes a sixty-seventh resistor R67, a sixty-eighth resistor R68, a tenth diode D10, and a fifty-eighth and sixty-fifth capacitor C65;

[0203] One end of the sixty-seventh resistor R67 is connected to the signal input port RCH1 B, and the other end is connected to the anode of the tenth diode D10;

[0204] The anode of the tenth diode D10 is connected to the sixty-seventh resistor R67, and the cathode is grounded;

[0205] One end of the sixty-eighth resistor R68 is connected to the connection point of the sixty-seventh resistor R67 and the tenth diode D10, and the other end is connected to the fifty-eighth to sixty-fifth capacitors C65.

[0206] One end of the fifty-eighth to sixty-fifth capacitor C65 is connected to the sixty-eighth resistor R68, and the other end is grounded.

[0207] In some embodiments, the external integration circuit for cable phase A includes a seventeenth operational amplifier U17, a fifty-ninth capacitor C59, a sixtieth capacitor C60, a sixty-first capacitor C61, a sixty-ninth resistor R69, and a seventieth resistor R70;

[0208] The output signal of the overvoltage protection circuit is connected to the third pin of the seventeenth operational amplifier U17, and the first pin of the seventeenth operational amplifier U17 is connected to the passive high-pass circuit;

[0209] The second pin of the seventeenth operational amplifier U17 is connected to the first pin via the sixtieth capacitor C60;

[0210] A sixty-ninth resistor R69 is connected in parallel between the first pin and the second pin of the seventeenth operational amplifier U17, and one side of the sixty-ninth resistor R69 is grounded via a seventieth resistor R70;

[0211] One path of the fourth pin of the seventeenth operational amplifier U17 is connected to ground via a sixty-first capacitor C61, and the other path is connected to -3.3VCC;

[0212] One path of the eighth pin of the seventeenth operational amplifier U17 is connected to the ground via the fifty-ninth capacitor C59, and the other path is connected to +3.3VCC.

[0213] The external integration circuit for cable phase B includes an eighteenth operational amplifier U18, a sixty-second capacitor C62, a sixty-third capacitor C63, a sixty-fourth capacitor C64, a seventy-first resistor R71, and a seventy-second resistor R72;

[0214] The output signal of the overvoltage protection circuit is connected to the third pin of the eighteenth operational amplifier U18, and the first pin of the eighteenth operational amplifier U18 is connected to the passive high-pass circuit;

[0215] The second pin of the eighteenth operational amplifier U18 is connected to the first pin via a sixty-third capacitor C63;

[0216] A seventy-first resistor R71 is connected in parallel between the first pin and the second pin of the eighteenth operational amplifier U18, and one side of the seventy-first resistor R71 is grounded via a seventy-second resistor R72;

[0217] One path of the fourth pin of the eighteenth operational amplifier U18 is connected to the ground via the sixty-fourth capacitor C64, and the other path is connected to -3.3VCC;

[0218] One path of the eighth pin of the eighteenth operational amplifier U18 is connected to the ground via the sixty-second capacitor C62, and the other path is connected to +3.3VCC.

[0219] In some embodiments, the passive high-pass circuit for cable phase A includes a sixty-fifth capacitor C65 and a seventy-third resistor R73. One side of the sixty-fifth capacitor C65 is connected to the external integration circuit, the other side is connected to the amplifier circuit, and the sixty-fifth capacitor C65 is grounded to the amplifier circuit via the seventy-third resistor R73.

[0220] The passive high-pass circuit for cable phase B includes a sixty-sixth capacitor C66 and a seventy-fourth resistor R74. One side of the sixty-sixth capacitor C66 is connected to the external integration circuit, the other side is connected to the amplifier circuit, and the sixty-sixth capacitor C66 is grounded via the seventy-fourth resistor R74.

[0221] In some embodiments, the amplifier circuit for cable phase A includes a nineteenth operational amplifier U19, a seventy-fourth resistor R74, a seventy-fifth resistor R75, and a seventy-sixth resistor R76;

[0222] The fifth pin of the nineteenth operational amplifier U19 is connected to a passive high-pass circuit;

[0223] The seventh pin is connected to the first second-order high-pass circuit;

[0224] The sixth pin is connected to the seventh pin via a seventy-fifth resistor R75 and a seventy-fourth resistor R74;

[0225] One end of the seventy-sixth resistor R76 is grounded, and the other end is connected to the seventy-fifth resistor R75.

[0226] The amplifying circuit for cable phase B includes a twentieth operational amplifier U20, a seventy-seventh resistor R77, a seventy-eighth resistor R78, and a seventy-ninth resistor R79;

[0227] The fifth pin of the 20th operational amplifier U20 is connected to a passive high-pass circuit;

[0228] The seventh pin is connected to the first second-order high-pass circuit;

[0229] The sixth pin is connected to the seventh pin via a seventy-eighth resistor R78 and a seventy-seventh resistor R77;

[0230] One end of the seventy-ninth resistor R79 is grounded, and the other end is connected to the seventy-eighth resistor R78.

[0231] In some embodiments, the first second-order high-pass circuit for cable phase A includes a twenty-first operational amplifier U21, a sixty-seventh capacitor C67, a sixty-eighth capacitor C68, a sixty-ninth capacitor C69, a seventy-first capacitor C70, an eightieth resistor R80, and an eighty-first resistor R81;

[0232] The third pin of the twenty-first operational amplifier U21 is connected to the amplifier circuit via the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67;

[0233] The first pin is connected to the second second-order high-pass circuit processing;

[0234] The fourth pin is connected to ground through the 69th capacitor C69 and the other is connected to -3.3VCC;

[0235] The second pin is connected between the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67 via the eighty-first resistor R81;

[0236] The eighth pin is connected to ground through the 70th capacitor C70, and the other is connected to +3.3VCC;

[0237] One end of the eightieth resistor R80 is grounded, and the other end is connected between the third pin of the twenty-first operational amplifier U21 and the sixty-eighth capacitor C68.

[0238] The first and second order high-pass circuits for cable phase B include a twenty-second operational amplifier U22, a seventy-first capacitor C71, a seventy-second capacitor C72, a seventy-third capacitor C73, a seventy-fourth capacitor C74, an eighty-second resistor R82, and an eighty-third resistor R83;

[0239] The third pin of the twenty-second operational amplifier U22 is connected to the amplifier circuit via the seventy-second capacitor C72 and the seventy-first capacitor C71;

[0240] The first pin is connected to the second second-order high-pass circuit processing;

[0241] The fourth pin is connected to ground through the 73rd capacitor C73, and the other is connected to -3.3VCC;

[0242] The second pin is connected between the seventy-second capacitor C72 and the seventy-first capacitor C71 via the eighty-third resistor R83;

[0243] One path of the eighth pin is connected to ground via the 74th capacitor C74, and the other path is connected to +3.3VCC;

[0244] One end of the eighty-second resistor R82 is grounded, and the other end is connected between the third pin of the twenty-second operational amplifier U22 and the seventy-second capacitor C72.

[0245] In some embodiments, the second second-order high-pass circuit for cable phase A includes a twenty-third operational amplifier U23, a seventy-fifth capacitor C75, a seventy-sixth capacitor C76, an eighty-fourth resistor R84, and an eighty-fifth resistor R85;

[0246] The fifth pin of the twenty-third operational amplifier U23 is connected to the first second-order high-pass circuit via the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75;

[0247] The seventh pin outputs the differential signal HOUTA1 of phase A;

[0248] The sixth pin is connected between the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75 via the eighty-fifth resistor R85;

[0249] One end of the eighty-fourth resistor R84 is grounded, and the other end is connected between the fifth pin of the twenty-third operational amplifier U23 and the seventy-sixth capacitor C76.

[0250] The second second-order high-pass circuit for cable phase B includes a twenty-fourth operational amplifier U24, a seventy-seventh capacitor C77, a seventy-eighth capacitor C78, ​​an eighty-sixth resistor R86, and an eighty-seventh resistor R87;

[0251] The fifth pin of the twenty-fourth operational amplifier U24 is connected to the first second-order high-pass circuit via the seventy-seventh capacitor C77 and the seventy-eighth capacitor C78;

[0252] The seventh pin outputs the B-phase differential signal HOUTA2;

[0253] The sixth pin is connected between the seventy-seventh capacitor C77 and the seventy-eighth capacitor C78 via the eighty-seventh resistor R87;

[0254] One end of the eighty-sixth resistor R86 is grounded, and the other end is connected between the fifth pin of the twenty-third operational amplifier U23 and the seventy-seventh capacitor C77.

[0255] Furthermore, the output end of the power frequency current acquisition module is correspondingly connected to a single-ended to differential signal conditioning circuit;

[0256] The single-ended to differential signal conditioning circuit includes a twenty-fifth operational amplifier U25;

[0257] A first pin of the twenty-fifth operational amplifier U25 is grounded via an eighty-eighth resistor R88;

[0258] The second pin is connected to the differential voltage common mode reference point AD_VCAM1 via the eighty-ninth resistor R89;

[0259] The first path of the third pin is connected to the +3.3V power supply, the second path is connected to the ground through the 79th capacitor C79, and the third path is connected to the 7th pin through the 102nd resistor R102;

[0260] The fourth pin is divided into two paths through the 90th resistor R90: one path is grounded through the 80th capacitor C80, and the other path serves as the differential output terminals HA1+ and HA2+;

[0261] The fifth pin is divided into two paths via the ninety-first resistor R91: one path is grounded via the eighty-first capacitor C81, and the other path serves as the differential output terminals HA1- and HA2-;

[0262] The sixth pin is grounded via the eighty-second capacitor C82 and connected to a -3.3V power supply;

[0263] The eighth pin is connected to the power frequency current acquisition module via the ninety-second resistor R92 and receives the differential signals HOUTA1 and HOUTA2;

[0264] The two sides of the twenty-fifth operational amplifier U25 are connected in parallel with a ninety-third resistor R93 and an eighty-third capacitor C83, and a ninety-fourth resistor R94 and an eighty-fourth capacitor C84.

[0265] Exemplarily, the single-ended to differential signal conditioning circuit is provided with two paths, the first path is connected to the second second-order high-pass circuit of phase A of cable, and the second path is connected to the second second-order high-pass circuit of phase B of cable.

[0266] The single-ended to differential signal conditioning circuit of the second second-order high-pass circuit connected to phase A of the cable includes a twenty-fifth operational amplifier U25;

[0267] A first pin of the twenty-fifth operational amplifier U25 is grounded via an eighty-eighth resistor R88;

[0268] The second pin is connected to the differential voltage common mode reference point AD_VCAM1 via the eighty-ninth resistor R89;

[0269] The first path of the third pin is connected to the +3.3V power supply, the second path is connected to the ground through the 79th capacitor C79, and the third path is connected to the 7th pin through the 102nd resistor R102;

[0270] The fourth pin is divided into two paths through the 90th resistor R90: one path is grounded through the 80th capacitor C80, and the other path serves as the differential output terminals HA1+, HA1+;

[0271] The fifth pin is divided into two paths via the ninety-first resistor R91: one path is grounded via the eighty-first capacitor C81, and the other path serves as the differential output terminals HA1-, HA1-;

[0272] The sixth pin is grounded via the eighty-second capacitor C82 and connected to a -3.3V power supply;

[0273] The eighth pin is connected to the power frequency current acquisition module via the ninety-second resistor R92 and receives the differential signal HOUTA1;

[0274] The two sides of the twenty-fifth operational amplifier U25 are connected in parallel with a ninety-third resistor R93 and an eighty-third capacitor C83, and a ninety-fourth resistor R94 and an eighty-fourth capacitor C84.

[0275] The single-ended to differential signal conditioning circuit of the second second-order high-pass circuit connected to cable phase B includes a twenty-sixth operational amplifier U26;

[0276] A first pin of the twenty-sixth operational amplifier U26 is grounded via a ninety-fifth resistor R95;

[0277] The second pin is connected to the differential voltage common mode reference point AD_VCAM1 via the ninety-sixth resistor R96;

[0278] The first path of the third pin is connected to the +3.3V power supply, the second path is connected to the ground through the 85th capacitor C85, and the third path is connected to the 7th pin through the 103rd resistor R103;

[0279] The fourth pin is divided into two paths via the ninety-seventh resistor R97: one path is grounded via the eighty-sixth capacitor C86, and the other path serves as the differential output terminal HA2+;

[0280] The fifth pin is divided into two paths via the ninety-eighth resistor R98: one path is grounded via the eighty-seventh capacitor C87, and the other path serves as the differential output terminal HA2-;

[0281] The sixth pin is grounded via the eighty-eighth capacitor C88 and connected to a -3.3V power supply;

[0282] The eighth pin is connected to the power frequency current acquisition module via the ninety-ninth resistor R99 and receives the differential signal HOUTA2;

[0283] The two sides of the 26th operational amplifier U26 are connected in parallel with the 100th resistor R100 and the 89th capacitor C89, and the 101st resistor R101 and the 90th capacitor C90.

[0284] The working process of the present invention:

[0285] After the electrical signal is input from the A / B phase acquisition point of the cable, it flows through the following components in sequence to complete the conditioning:

[0286] Signal conditioning circuit: After the acquisition point signal (such as AC11 P) is buffered by the first operational amplifier U1, it is coupled to the second operational amplifier U2 through R510 and C500 for amplification, and finally the conditioned acquisition point signal (such as AV1) is output by R505.

[0287] Overvoltage protection circuit: After the signal is limited by the sixty-fifth resistor R65, it is clamped to a safe voltage by D9, and then filtered by the sixty-sixth resistor R66 and the fifty-seventh capacitor C57 and sent to the subsequent circuit.

[0288] External integration circuit: The signal is input from the third pin, integrated through the feedback network composed of the 60th capacitor C60 and the 69th resistor R69, and output from the first pin. The 70th resistor R70 provides a ground reference.

[0289] Passive high-pass circuit: the sixty-fifth capacitor C65 couples high-frequency components, and the seventy-third resistor R73 discharges low-frequency interference.

[0290] Amplifier circuit: The fifth pin receives the signal, which is amplified by the feedback network composed of the seventy-fifth resistor R75 and the seventy-fourth resistor R74, and output from the seventh pin.

[0291] First and second order high-pass circuit: The signal is coupled into the third pin through the sixty-seventh capacitor C67 and the sixty-eighth capacitor C68, and is output from the first pin after internal amplification. The sixty-eighth capacitor C68 and the eighty-first resistor R81 participate in frequency response adjustment.

[0292] Second second-order high-pass circuit: The signal is input to the fifth pin through the seventy-fifth capacitor C75 and the seventy-sixth capacitor C76, and finally outputs the single-ended signal HOUTA1± from the seventh pin.

[0293] Single-ended to differential circuit: HOUTA1± is input from the eighth pin, passes through internal conversion and the R90 / R91 resistor network, and finally outputs the differential signal HA1+ / HA1- for use by the traveling wave detection unit 2.

[0294] An embodiment of the present invention further provides a cable fault locating method, the method comprising:

[0295] Step 101: collecting power frequency current at both ends of the cable and at a distributed access point in the middle, performing signal conditioning on the power frequency current, and outputting a differential signal;

[0296] Specifically, power frequency current is synchronously collected at both ends of the cable and at the distributed access point in the middle; signal conditioning is performed on the power frequency current to output a differential signal;

[0297] The first device selects a waveform with a larger amplitude at the moment of power frequency current mutation from channels HA11 and HA12 as wave1, and the second device selects a waveform with a larger amplitude at the moment of power frequency current mutation from channels HA21 and HA22 as wave2.

[0298] Step 102: Receive the differential signal and extract the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold judgment;

[0299] Specifically, the differential signal is processed by multi-scale wavelet packet transform: the multi-scale wavelet packet transform decomposes the waveform into sub-signals of different frequency bands, extracts the high-frequency components containing the fault characteristics, and the points where the waveform amplitude changes the most.

[0300] Taking the decomposition scale j = 4 and the node index k = 10 as an example, the signal is decomposed according to the following formula:

[0301] d j+1,2k [n]=∑ m h[m-2n]·d j,k [m]

[0302] d j+1,2k+1 [n]=∑ m g[m-2n]·d j,k [m].

[0303] Among them, h[m] and g[m] are preset filter coefficients.

[0304] Step 103: Based on the wave head arrival time and the synchronization timestamp, a double-ended traveling wave location algorithm combined with a wave velocity compensation model is used to calculate the distance to the fault point.

[0305] Specifically, the modulus maximum moment of wave1 is taken as the fault traveling wave arrival time t1, and the modulus maximum moment of wave2 is taken as the fault traveling wave arrival time t2.

[0306]

[0307]

[0308] Based on t1 and t2 at the synchronized timestamps, combined with the traveling wave velocity v and the equipment spacing L, the two-terminal traveling wave location algorithm is used to calculate the distance to the fault point:

[0309] Distance between the fault point and the first device

[0310] Distance from the second device

[0311] v is corrected by the wave velocity compensation model to improve accuracy.

[0312] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention.

Claims

1. A cable fault locating device, characterized in that: The device includes: a power frequency current acquisition module, a traveling wave detection unit, a time synchronization module, a signal processing module, and a communication module; The power frequency current acquisition module is connected to both ends of the cable and the middle distributed access point, and is used to collect the power frequency current and output a differential signal after conditioning the power frequency current; The traveling wave detection unit is connected to the power frequency current acquisition module, and is used to receive the differential signal and extract the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold judgment, and transmit the arrival time of the head to the signal processing module; The time synchronization module is connected to the power frequency current acquisition module, the traveling wave detection unit, and the signal processing module, and is used to receive an external synchronization signal and provide a nanosecond-level synchronization clock to the power frequency current acquisition module, the traveling wave detection unit, and the signal processing module; The signal processing module is connected to the traveling wave detection unit and the time synchronization module, and is used to receive the timestamp of the wave head arrival time and the calibration time reference, and determine the distance to the fault point based on the two-end traveling wave positioning algorithm and the wave speed compensation model; The communication module is connected to the signal processing module and is used to output the distance to the fault point.

2. The cable fault locating device according to claim 1, characterized in that: The power frequency current acquisition module includes: an overvoltage protection circuit, an external integration circuit, a passive high-pass circuit, an amplifier circuit, a first and second order high-pass circuit, and a second second order high-pass circuit; The power frequency current signals from cable phases A and B are processed in sequence by the corresponding overvoltage protection circuit, external integration circuit, passive high-pass circuit, amplifier circuit, first- and second-order high-pass circuit, and second-order high-pass circuit to filter out power frequency interference and extract high-frequency features, ultimately outputting differential signals HOUTA1± and HOUTA2±.

3. The cable fault locating device according to claim 2, characterized in that: Several collection points are respectively set on phase A and phase B of the cable, and each collection point is connected to the overvoltage protection circuit of the power frequency current collection module through a signal conditioning circuit; Each of the signal conditioning circuits includes a first operational amplifier U1 and a second operational amplifier U2; The seventh pin of the second operational amplifier U2 outputs the acquisition point signal via the first resistor R1, one end of the first capacitor C1 is connected to the first resistor R1, and the other end is grounded; One path of the sixth pin is connected to the ground via the second resistor R2, and the other path is connected to the seventh pin via the third resistor R3; The fifth pin is connected to the first pin of the first operational amplifier U1 via the fourth resistor R4 and the second capacitor C2; One end of the third capacitor C3 is connected between the fifth pin of the second operational amplifier U2 and the fourth resistor R4, and the other end is grounded; One end of the fifth resistor R5 is connected between the fourth resistor R4 and the second capacitor C2, and the other end is grounded; The second pin of the first operational amplifier U1 is connected to the ground through the sixth resistor R6; One path of the eighth pin is connected to +5V, and the other path is grounded via the fourth capacitor C4; the third pin of the first operational amplifier U1 is connected to the port of one of the acquisition points; One path of the fourth pin is connected to -5V, and the other path is connected to ground after passing through the fifth capacitor C5; A sixth capacitor C6, a seventh resistor R7, and a first diode D1 are connected in parallel in sequence between the third pin and the other path of the fourth pin of the first operational amplifier U1; An eighth resistor R8 is connected in parallel between the first pin and the second pin of the first operational amplifier U1 , and a seventh capacitor C7 is connected in parallel to the eighth resistor R8 .

4. The cable fault locating device according to claim 3, characterized in that: The overvoltage protection circuit includes a sixty-fifth resistor R65, a sixty-sixth resistor R66, a ninth diode D9, and a fifty-seventh capacitor C57; One end of the sixty-fifth resistor R65 is connected to the signal input port RCH1A, and the other end is connected to the anode of the ninth diode D9; The anode of the ninth diode D9 is connected to the sixty-fifth resistor R65, and the cathode is grounded; One end of the sixty-sixth resistor R66 is connected to the connection point of the sixty-fifth resistor R65 and the ninth diode D9, and the other end is connected to the fifty-seventh capacitor C57; One end of the fifty-seventh capacitor C57 is connected to the sixty-sixth resistor R66, and the other end is grounded.

5. The cable fault locating device according to claim 4, characterized in that: The external integration circuit includes a seventeenth operational amplifier U17, a fifty-ninth capacitor C59, a sixtieth capacitor C60, a sixty-first capacitor C61, a sixty-ninth resistor R69, and a seventieth resistor R70; The output signal of the overvoltage protection circuit is connected to the third pin of the seventeenth operational amplifier U17, and the first pin of the seventeenth operational amplifier U17 is connected to the passive high-pass circuit; The second pin of the seventeenth operational amplifier U17 is connected to the first pin via the sixtieth capacitor C60; A sixty-ninth resistor R69 is connected in parallel between the first pin and the second pin of the seventeenth operational amplifier U17, and one side of the sixty-ninth resistor R69 is grounded via a seventieth resistor R70; One path of the fourth pin of the seventeenth operational amplifier U17 is connected to ground via a sixty-first capacitor C61, and the other path is connected to -3.3VCC; One path of the eighth pin of the seventeenth operational amplifier U17 is connected to the ground via the fifty-ninth capacitor C59, and the other path is connected to +3.3VCC.

6. The cable fault locating device according to claim 5, characterized in that: The passive high-pass circuit includes a sixty-fifth capacitor C65 and a seventy-third resistor R73. One side of the sixty-fifth capacitor C65 is connected to the external integration circuit, and the other side is connected to the amplifier circuit. The sixty-fifth capacitor C65 is grounded via the seventy-third resistor R73. The amplifying circuit includes a nineteenth operational amplifier U19, a seventy-fourth resistor R74, a seventy-fifth resistor R75, and a seventy-sixth resistor R76; The fifth pin of the nineteenth operational amplifier U19 is connected to a passive high-pass circuit; The seventh pin is connected to the first second-order high-pass circuit; The sixth pin is connected to the seventh pin via a seventy-fifth resistor R75 and a seventy-fourth resistor R74; One end of the seventy-sixth resistor R76 is grounded, and the other end is connected to the seventy-fifth resistor R75.

7. The cable fault locating device according to claim 6, characterized in that: The first second-order high-pass circuit includes a twenty-first operational amplifier U21, a sixty-seventh capacitor C67, a sixty-eighth capacitor C68, a sixty-ninth capacitor C69, a seventy-first capacitor C70, an eightieth resistor R80, and an eighty-first resistor R81; The third pin of the twenty-first operational amplifier U21 is connected to the amplifier circuit via the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67; The first pin is connected to the second second-order high-pass circuit processing; The fourth pin is connected to ground through the 69th capacitor C69 and the other is connected to -3.3VCC; The second pin is connected between the sixty-eighth capacitor C68 and the sixty-seventh capacitor C67 via the eighty-first resistor R81; The eighth pin is connected to ground through the 70th capacitor C70, and the other is connected to +3.3VCC; One end of the eightieth resistor R80 is grounded, and the other end is connected between the third pin of the twenty-first operational amplifier U21 and the sixty-eighth capacitor C68.

8. The cable fault locating device according to claim 7, characterized in that: The second second-order high-pass circuit includes a twenty-third operational amplifier U23, a seventy-fifth capacitor C75, a seventy-sixth capacitor C76, a sixty-ninth capacitor C69, a seventy-second capacitor C70, an eighty-fourth resistor R84, and an eighty-fifth resistor R85; The fifth pin of the twenty-third operational amplifier U23 is connected to the first second-order high-pass circuit via the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75; The first pin is connected to the second second-order high-pass circuit processing; The seventh pin outputs the differential signals HOUTA1 and HOUTA2 of the A and B phases; The sixth pin is connected between the seventy-sixth capacitor C76 and the seventy-fifth capacitor C75 via the eighty-fifth resistor R85; One end of the eighty-fourth resistor R84 is grounded, and the other end is connected between the fifth pin of the twenty-third operational amplifier U23 and the seventy-sixth capacitor C76.

9. The cable fault locating device according to claim 3, characterized in that: The output end of the power frequency current acquisition module is correspondingly connected to a single-ended to differential signal conditioning circuit; The single-ended to differential signal conditioning circuit includes a twenty-fifth operational amplifier U25; A first pin of the twenty-fifth operational amplifier U25 is grounded via an eighty-eighth resistor R88; The second pin is connected to the differential voltage common mode reference point AD_VCAM1 via the eighty-ninth resistor R89; The first path of the third pin is connected to the +3.3V power supply, the second path is connected to the ground through the 79th capacitor C79, and the third path is connected to the 7th pin through the 102nd resistor R102; The fourth pin is divided into two paths through the 90th resistor R90: one path is grounded through the 80th capacitor C80, and the other path serves as the differential output terminals HA1+ and HA2+; The fifth pin is divided into two paths via the ninety-first resistor R91: one path is grounded via the eighty-first capacitor C81, and the other path serves as the differential output terminals HA1- and HA2-; The sixth pin is grounded via the eighty-second capacitor C82 and connected to a -3.3V power supply; The eighth pin is connected to the power frequency current acquisition module via the ninety-second resistor R92 and receives the differential signals HOUTA1 and HOUTA2; The two sides of the twenty-fifth operational amplifier U25 are connected in parallel with a ninety-third resistor R93 and an eighty-third capacitor C83, and a ninety-fourth resistor R94 and an eighty-fourth capacitor C84.

10. A cable fault location method applied to the cable fault device according to any one of claims 1 to 9, characterized in that: The method is: Collecting power frequency current at both ends of the cable and at a distributed access point in the middle, performing signal conditioning on the power frequency current, and outputting a differential signal; receiving the differential signal and extracting the arrival time of the fault traveling wave head through multi-scale wavelet packet transform and adaptive threshold criterion; Based on the wave head arrival time and synchronization timestamp, a double-ended traveling wave location algorithm combined with a wave velocity compensation model is used to calculate the distance to the fault point.

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