Method and device for using chip memory, equipment and medium
By copying the target function of the boot loader to the tightly coupled memory, the problem of RAM space waste in the vehicle domain controller is solved, and efficient use of memory space and improvement of the real-time performance of the application are achieved.
Patent Information
- Application Number
- CN202510875799.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-26
- Publication Date
- 2025-10-10
AI Technical Summary
In the vehicle domain controller, the random access memory space of the microcontroller unit is wasted due to the running of the boot loader and application programs, which cannot meet the real-time requirements of software operation.
The target function in the boot loader is copied to the tightly coupled memory, and the original RAM space is overwritten by the application copy function and jump function in the tightly coupled memory to ensure that the application can run normally.
It improves the utilization of memory space, reduces memory waste, increases the running speed of application programs, and meets the real-time requirements of microcontroller units.
Smart Images

Figure CN120762894A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of electronic communication, in particular to a method, device and equipment for using chip memory and a medium. BACKGROUND
[0002] The real-time requirement of a microcontroller unit (MCU) in a vehicle domain controller for its internal software operation is relatively high. For some MCU with an external flash memory, the speed of software running in the flash memory is relatively slow in some cases, which cannot meet the real-time requirement of the MCU for software operation. In this case, the software can run in the random access memory (RAM) space of the MCU. The software of the MCU generally consists of a boot loader and an application (APP). The boot loader is the first program running after the chip (MCU) is powered on, and mainly plays the role of hardware initialization, verification of APP integrity, and boot jump to APP execution. The APP is mainly responsible for storing application program code and realizing the main function of the MCU.
[0003] In the RAM space of the MCU, the RAM space for running the boot loader and the RAM space for running the APP need to be provided. When the boot loader is run first, the RAM space required for running the boot loader needs to be allocated. When the APP is run subsequently, the RAM space required for running the APP also needs to be allocated. When the APP is running, the RAM space used by the boot loader when running cannot be released even if the boot loader has completed running, which results in that the APP cannot use the RAM space used by the boot loader when running, the internal RAM space of the MCU is not reasonably used, and the memory space is wasted. SUMMARY
[0004] Therefore, the present application aims to provide a method, device and equipment for using chip memory and a medium, so as to improve the utilization rate of the memory space of the chip and reduce the waste of the memory space.
[0005] In a first aspect, the present application provides a method for using chip memory, the chip comprising a first memory and a second memory, the method comprising:
[0006] copying a target function in the boot loader to the second memory in response to an operation of running a boot loader in a first memory space of the first memory, the target function comprising an application copy function and a jump function;
[0007] running an application copy function in the second memory to copy an application to a second memory space of the first memory, the second memory space covering part or all of the first memory space;
[0008] running a jump function in the second memory to jump to an entry of the application and execute the application in the second memory space.
[0009] In a possible implementation, the first memory space corresponds to a start address and a first address of the first memory; and the second memory space corresponds to the start address and a second address of the first memory.
[0010] In a possible implementation, the chip further comprises a third memory, and the third memory stores the bootloader;
[0011] Before copying the target function to the second memory in response to running the bootloader in the first memory space, the method further comprises:
[0012] copying the bootloader of the third memory to the first memory space.
[0013] In a possible implementation, the target function further comprises an initialization function.
[0014] Before running the application copy function in the second memory, the method further comprises:
[0015] running the initialization function to initialize the chip.
[0016] In a possible implementation, the target function further comprises a destructor function.
[0017] Before running the jump function in the second memory, the method further comprises:
[0018] running the destructor function to deinitialize the chip.
[0019] In a possible implementation, the third memory further stores the application.
[0020] The running the application copy function in the second memory to copy an application to a second memory space of the first memory comprises:
[0021] running the application copy function in the second memory to copy the application in the third memory to the second memory space.
[0022] In a possible implementation, the chip comprises a micro control unit (MCU);
[0023] The first memory comprises a random access memory (RAM);
[0024] The second memory comprises a tightly coupled memory (TCM);
[0025] The third memory comprises a flash memory.
[0026] In a second aspect, the present application provides an apparatus for using chip memory, the chip comprising a first memory and a second memory, the apparatus comprising:
[0027] A first copying unit, configured to copy a target function in a boot loader to the second memory in response to an operation of running the boot loader in a first memory space of the first memory, the target function comprising an application copying function and a jump function;
[0028] A second copying unit, configured to run the application copying function in the second memory to copy an application to a second memory space of the first memory, the second memory space covering part or all of the first memory space;
[0029] A jump unit, configured to run the jump function in the second memory to jump to an entry of the application and execute the application in the second memory space.
[0030] In a third aspect, the present application provides an electronic device, the device comprising a memory and a processor;
[0031] The memory is configured to store relevant program codes;
[0032] The processor is configured to invoke the program codes to execute the method for using chip memory according to any one of the implementation manners of the first aspect.
[0033] In a fourth aspect, the present application provides a computer readable storage medium, the computer readable storage medium being configured to store a computer program, the computer program being configured to execute the method for using chip memory according to any one of the implementation manners of the first aspect.
[0034] In a fifth aspect, the present application provides a computer program product, the computer program product comprising computer programs / instructions, the computer programs / instructions being configured to be executed by a processor to implement the method for using chip memory according to any one of the implementation manners of the first aspect.
[0035] In the above implementation of the present application, the chip includes the first memory and the second memory, and the software of the chip generally includes the boot loader and the application program. In order to ensure the real-time performance of the software, the boot loader and the application program can be allocated with the required memory space in the first memory of the chip. After the chip is powered on, the boot loader is first run. In response to the operation of running the boot loader in the first memory space, the target function in the boot loader is copied to the second memory, wherein the target function includes the application program copy function and the jump function. This is to prevent the boot loader from being unable to run after being overwritten, and to copy the target function to the second memory in advance to ensure that the target function in the second memory can be normally run when the boot loader needs to be run. The application program copy function in the second memory is run to copy the application program to the second memory space of the first memory. The second memory space can cover part or all of the first memory space. That is, even if the first memory space allocated for the boot loader is covered by the second memory space allocated for the application program, the target function in the second memory can be normally run since the target function of the boot loader has been copied to the second memory. Therefore, the application program can be overlaid on the boot loader, so that the memory space of the first memory is not wasted, and the utilization rate of the memory space of the first memory is improved. Moreover, a larger memory space can be allocated for the application program to run, so that the running speed of the application program is improved. Then, the jump function in the second memory is run to jump to the entry of the application program, and the execution of the application program is started in the second memory space. By the method provided in the present application, after the target function in the boot loader is copied to the second memory, the second memory space of the first memory can be allocated for the application program, and the second memory space can cover the first memory space allocated when the boot loader is run, so that the utilization rate of the memory space is improved, and the waste of the memory space is reduced. BRIEF DESCRIPTION OF DRAWINGS
[0036] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments provided in the present application, and other drawings can also be obtained by those skilled in the art based on these drawings.
[0037] Figure 1 A flowchart of a method for using the memory of a chip is provided for the embodiments of the present application.
[0038] Figure 2a A schematic diagram of using the memory of a chip in the prior art.
[0039] Figure 2b A schematic diagram of using the memory of a chip is provided for the embodiments of the present application.
[0040] Figure 3 A device schematic diagram using chip memory is provided for the embodiment of the present application.
[0041] Figure 4 A schematic diagram of an electronic device is provided for the embodiment of the present application. DETAILED DESCRIPTION
[0042] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. The described embodiments are only exemplary implementations of the present application, and are not all implementations. Those skilled in the art can obtain other embodiments without creative efforts by combining the embodiments of the present application, and these embodiments are also within the protection scope of the present application.
[0043] The MCU in the vehicle-mounted domain controller has a relatively high real-time requirement for the internal software running. For some MCUs with externally hung flash memory, the speed of the software running in the flash memory is slower in some cases, which cannot meet the real-time requirement of the MCU for the software running. At this time, the software can be made to run in the RAM space of the MCU. The RAM is an internal memory that can exchange data directly with the central processor, has a fast access speed, and is usually used as a temporary data storage medium for the operating system or other programs running.
[0044] The software of the MCU is generally composed of a Bootloader and an application program (APP). The Bootloader is a program that is first run after the chip (MCU) is powered on, mainly plays a role of hardware initialization, checking the integrity of the APP, and guiding the jump to the execution of the APP. The APP is mainly responsible for storing application program code and realizing the main functions of the MCU.
[0045] In the RAM space of the MCU, a RAM interval for the Bootloader to run and a RAM space for the APP to run need to be provided. When the Bootloader is first run, the RAM space required for the Bootloader to run needs to be allocated first. When the APP is subsequently run, the RAM space required for the APP to run also needs to be allocated. When the APP is running, the RAM space used by the Bootloader before cannot be released, that is, the RAM space used by the Bootloader before cannot be used by the APP when the APP is running, which leads to unreasonable use of the internal RAM space of the MCU and causes waste of the memory space.
[0046] Based on this, the embodiment of the present application provides a method for using the memory of a chip, so as to improve the utilization rate of the memory space of the chip and reduce the waste of the memory space. The chip can include a first memory and a second memory, and the software of the chip generally includes a boot loader and an application program. After the chip is powered on, in response to the operation of running the boot loader in the first memory space, the target function in the boot loader is copied to the second memory, wherein the target function includes an application program copying function and a jump function. This is to prevent the boot loader from being unable to run after being covered, and to copy the target function into the second memory in advance to ensure that the target function in the second memory can be normally run when the boot loader needs to be run. The application program copying function in the second memory is run to copy the application program to the second memory space of the first memory. The second memory space can cover part or all of the memory space of the first memory. That is, even if the first memory space allocated to the boot loader is covered by the second memory space allocated to the application program, the target function of the boot loader can be normally run since the target function of the boot loader has been copied to the second memory. Therefore, the application program can cover the boot loader, so that the memory space of the first memory is not wasted and the utilization rate of the memory space of the first memory is improved. Moreover, a larger memory space is allocated for the running of the application program, so that the running speed of the application program can be improved to meet the real-time requirement of the MCU for software running. Then, the jump function in the second memory is run to jump to the entry of the application program and start executing the application program in the second memory space. Through the method provided by the embodiment of the present application, after the target function in the boot loader is copied to the second memory, the second memory space of the first memory can be allocated for the application program, and the second memory space can cover the first memory space allocated when the boot loader is running before, so that the utilization rate of the memory space can be improved and the waste of the memory space can be reduced.
[0047] In order to facilitate understanding of the technical solutions provided by the embodiments of the present application, the following will be specifically introduced in conjunction with the drawings in the embodiments.
[0048] Referring to Figure 1 Fig. 1 is a flowchart of a method for using the memory of a chip provided by the embodiment of the present application.
[0049] The method is applied to a chip, and the chip includes a first memory and a second memory. For example, the chip can be an MCU. The first memory includes memory space required for running a bootloader and an application. For example, the first memory can be a RAM. The second memory is independent memory space from the first memory. For example, the second memory can be a TCM (Tightly Coupled Memory), which is a high-performance and low-latency on-chip memory and is used to accelerate access to critical code or data.
[0050] The method can include the following steps:
[0051] S101: In response to an operation of running the bootloader in the first memory space of the first memory, copying a target function in the bootloader to the second memory.
[0052] The software of the chip generally includes a bootloader and an application, and the first memory space required for running the bootloader can be pre-divided in the first memory of the chip. The first memory space can be any unused memory space in the first memory.
[0053] After the chip is powered on, the bootloader can be run in the first memory space of the first memory, and a target function in the bootloader is copied to the second memory. The target function includes an application copy function and a jump function, the application copy function is used to copy the application, and the jump function is used to jump to the application. The second memory is a memory independent of the first memory in the chip, and after the target function is copied to the second memory, the target function in the second memory can also be normally run. For example, the second memory can be a TCM, which can accelerate access to critical code or data. When the target function is copied, a parameter variable required for running the target function is also copied to the second memory.
[0054] In a possible implementation, the chip further includes a third memory for pre-storing the bootloader. When the chip is powered on, the bootloader can be copied from the third memory to the first memory space of the first memory, and then the bootloader is run in the first memory space.
[0055] Optionally, the third memory can be a flash memory. The flash memory is a non-volatile memory, that is, when the flash memory is powered off, the data will not be lost, and the boot loader stored in the flash memory can be guaranteed not to be lost when powered off, facilitating subsequent repeated use. Generally, the chip has a flash memory inside, which can store boot loaders and user-written program codes, etc. When the storage space in the chip is insufficient, the chip can also be expanded with additional flash memory to increase the storage space. Therefore, when the third memory is a flash memory, it can be the original flash memory inside the chip or the additional flash memory.
[0056] When the first memory is a RAM, since the instructions or data can be directly read from the RAM without pre-fetching or caching, the RAM can better meet the real-time requirements than the flash memory. The boot loader in the flash memory can be copied to the RAM for running, thereby improving the running speed of the program.
[0057] In a possible manner, after the chip is powered on, a boot read-only memory (BROM) fixed inside the chip can be used to copy the boot loader from the third memory to the first memory. The BROM can execute the initial boot code when the chip is powered on or reset, initialize the necessary hardware resources, and read the boot loader from the specified boot device (such as a flash memory) and copy the boot loader to the RAM inside the chip.
[0058] S102: Run the application program copying function in the second memory to copy the application program to the second memory space of the first memory.
[0059] After the target functions such as the application program copying function and the jump function are copied to the second memory, the application program copying function can be normally run, which can copy the application program to the first memory and needs to allocate the second memory space required for running the application program. In the embodiment of the present application, in order to improve the utilization rate of the memory space of the first memory, when the second memory space is allocated to the application program, the second memory space can cover part or all of the first memory space, and sufficient memory space is reserved for the application program.
[0060] The memory space is determined by a start address and an end address. For example, the first memory space allocated for the bootloader corresponds to a first start address and a first end address in the first memory, and the second memory space corresponds to a second start address and a second end address in the first memory. When the second start address is between the first start address and the first end address, or the second end address is between the first start address and the first end address, it indicates that the second memory space covers part of the first memory space. When the second start address is at or before the first start address, and the second end address is at or after the first end address, it indicates that the second memory space covers the entire first memory space. By covering the first memory space in this way, the problem that the memory space cannot be released after the bootloader runs is solved.
[0061] In a possible implementation, when the bootloader runs, a first memory space can be allocated for the bootloader from the start address of the first memory, and the first memory space corresponds to the start address and a first address of the first memory. The first address is the end address of the first memory space. Then, when a second memory space is allocated for the application program, the length of the second memory space can also be determined from the start address of the first memory. The end address corresponding to the second memory space can be represented as a second address, which can be before the end address of the first memory, so as to allocate as large a memory space as possible for the application program, improve the speed of the application program when running, and meet the real-time requirement.
[0062] For details, refer to Figure 2a and Figure 2b As shown in Figure 2a is a schematic diagram of using the chip memory in the prior art, Figure 2b is a schematic diagram of using the chip memory provided by the embodiment of the present application.
[0063] According to Figure 2a It can be known that the memory space of the first memory corresponds to a start address and an end address, and the memory space of the first memory can be divided into two parts in advance, the upper half part is used to store the bootloader, and the lower half part is used to store the application program, so as to allocate a larger memory space for the application program. The application program usually runs after the bootloader runs, and the memory space used by the bootloader when running cannot be released, so the memory space in the upper half part cannot be effectively utilized.
[0064] According to Figure 2bIt can be known that the embodiment of the application can first copy the boot loader to the first memory space of the first memory, corresponding to the start address and the first address of the first memory. After copying the target function of the boot loader to the second memory, the application copying function in the target function is run, the application can be copied to the start address of the first memory, and the start address and the end address (i.e. the second address) of the first memory are determined as the second memory space of the application. Therefore, the memory space available for the application is the entire first memory, which not only reduces the waste of the chip memory space, improves the utilization rate of the memory space, but also increases the memory space available for the application, and improves the real-time performance of the application running.
[0065] In a possible implementation, the application program can be pre-stored in the third memory of the chip. After the application copying function in the second memory is run, the application program in the third memory can be copied to the start address of the first memory.
[0066] Optionally, the target function can further include an initialization function. After starting to run the boot loader, the initialization function can be run before the application copying function in the second memory is run, for initializing the chip, including initializing the clock, peripherals, interrupts, and the like. After the chip is initialized, the application copying function can be run to copy the application program to the start address of the first memory.
[0067] S103: The jump function in the second memory is run to jump to the entry of the application program, and the application program is executed in the second memory space.
[0068] After the application program is copied to the first memory, the jump function in the second memory can be continuously run to jump to the entry of the application program, and the application program is started to be executed.
[0069] In a possible implementation, the target function can further include a destructor function. Before the jump function in the second memory is run, the destructor function can be run to de-initialize the chip. The destructor function and the initialization function belong to corresponding functions, the initialization function is used for initializing the clock, interrupts, peripherals, and the like, and the destructor function is used for closing the interrupts, disabling the clock and the peripherals, releasing resources, and the like. Then, the jump function is run to jump to the entry of the application program, and the application program is started to be executed.
[0070] Optionally, when the application program is executed, the second memory can be initialized, which is equivalent to releasing the memory space and other resources of the second memory. Therefore, the second memory can be reused by the application program subsequently.
[0071] After the target function in the boot loader is copied to the second memory by the method provided in the above embodiment, the application program can be stored in the second memory space of the first memory, and the second memory space can cover the first memory space allocated when the boot loader is running before, and the target function in the second memory can be normally run even if the boot loader is covered, thereby not affecting the normal copying and running of the application program, and the application program covers the boot loader in the first memory, so that the utilization rate of the memory space is improved, and the waste of the memory space is reduced. The application program can also be allocated a larger memory space, the speed of running the application program is improved, and the real-time requirement is met.
[0072] Based on the above method embodiment, an embodiment of the present application further provides a device using chip memory. Referring to Figure 3 Fig. 1 shows a schematic diagram of a device using chip memory provided by an embodiment of the present application.
[0073] The device 300 is applied to a chip, the chip includes a first memory and a second memory, and the device 300 includes:
[0074] A first copying unit 301 is configured to copy a target function in a boot loader to the second memory in response to an operation of running the boot loader in a first memory space of the first memory, the target function including an application program copying function and a jump function;
[0075] A second copying unit 302 is configured to run the application program copying function in the second memory to copy an application program to a second memory space of the first memory, the second memory space covering part or all of the first memory space;
[0076] A jump unit 303 is configured to run the jump function in the second memory to jump to an entrance of the application program and execute the application program in the second memory space.
[0077] In a possible implementation, the first memory space corresponds to a start address and a first address of the first memory; and the second memory space corresponds to the start address and a second address of the first memory.
[0078] In a possible implementation, the chip further includes a third memory, and the third memory stores the boot loader; and the device further includes a third copying unit, which is configured to copy the boot loader of the third memory to the first memory space before the target function is copied to the second memory in response to the operation of running the boot loader in the first memory space of the first memory.
[0079] In a possible implementation, the target function further includes an initialization function; the apparatus further includes an initialization unit; before running the application copy function in the second memory, the initialization unit is configured to run the initialization function to initialize the chip.
[0080] In a possible implementation, the target function further includes a destructor function; the apparatus further includes a deinitialization unit; before running the jump function in the second memory, the deinitialization unit is configured to run the destructor function to deinitialize the chip.
[0081] In a possible implementation, the third memory further stores the application; the second copy unit is specifically configured to run an application copy function in the second memory to copy the application in the third memory to the second memory space.
[0082] In a possible implementation, the chip includes a micro control unit (MCU); the first memory includes a random access memory (RAM); the second memory includes a tightly coupled memory (TCM); and the third memory includes a flash memory.
[0083] Based on the method embodiments and the apparatus embodiments described above, an electronic device is further provided in the embodiments of the present application. The embodiments of the present application will be described below with reference to the accompanying drawings.
[0084] Referring to Figure 4 , Figure 4 FIG. 1 is a schematic diagram of an electronic device provided by the embodiments of the present application.
[0085] The device 400 includes a memory 401 and a processor 402.
[0086] The memory 401 is configured to store related program codes.
[0087] The processor 402 is configured to invoke the program codes and perform the method of using the chip memory described in the above method embodiments.
[0088] In addition, the embodiments of the present application further provide a computer readable storage medium, which is configured to store a computer program, and the computer program is configured to perform the method of using the chip memory described in the above method embodiments.
[0089] The embodiments of the present application further provide a computer program product, which includes computer programs / instructions, and the computer programs / instructions are executed by a processor to implement the method of using the chip memory described in the above method embodiments.
[0090] It should be noted that the computer readable medium in the present application can be a computer readable signal medium or a computer readable storage medium or any combination thereof. The computer readable storage medium may, for example, be, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination thereof. More specific examples of the computer readable storage medium can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination thereof.
[0091] The computer program product can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C++, etc., and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device or entirely on the remote computing device or server.
[0092] It should be noted that the embodiments in the present specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be mutually referred to. Especially, the system or device embodiments are described more simply, and the relevant parts can be referred to the part of the method embodiment. The device embodiment described above is only schematic, and the units or modules shown as separate components can or can not be physically separated, and the components shown as units or modules can or can not be physical modules, i.e. can be located in one place, or can be distributed on multiple network units, and part or all of the units or modules can be selected according to actual needs to achieve the purpose of the present embodiment. Those skilled in the art can understand and implement it without creative labor.
[0093] The flow diagrams and block diagrams in the drawings are illustrations of architectures, functions, and operations that can be implemented in methods, apparatus, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a segment, or a portion of code that comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or the blocks can sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and / or flow diagrams, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.
[0094] It should be understood that, in this application, "at least one", "one or more", "multiple", "two or more" means one or more than one. "And / or" is used to describe the association between the associated objects, which means that there can be three relationships, for example, "A and / or B" can mean that there are three cases: only A, only B, and A and B at the same time, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can mean a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.
[0095] It should also be noted that in this application, relationship terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of other identical elements in the process, method, article or device including the element.
[0096] The steps of the methods or algorithms described in conjunction with the embodiments disclosed in this application can be implemented directly using hardware, software modules executed by a processor, or a combination of the two. The software modules can be placed in random access memory (RAM), internal memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0097] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application is not limited to the embodiments shown herein, but is intended to encompass the broadest scope consistent with the principles and novel features disclosed herein.
Claims
1. A method for using chip memory, characterized in that: The chip includes a first memory and a second memory, and the method includes: In response to an operation of running a boot loader in the first memory space of the first memory, copying a target function in the boot loader to the second memory, the target function including an application copy function and a jump function; Running the application copy function in the second memory to copy the application to the second memory space of the first memory, where the second memory space covers part or all of the memory space of the first memory space; Run the jump function in the second memory, jump to the entry of the application, and execute the application in the second memory space.
2. The method according to claim 1, characterized in that The first memory space corresponds to the starting address and the first address of the first memory; the second memory space corresponds to the starting address and the second address of the first memory.
3. The method according to claim 1, characterized in that The chip further includes a third memory, wherein the boot loader is stored in the third memory; In response to the operation of running the boot loader in the first memory space of the first memory, before copying the target function to the second memory, the method further includes: The boot loader in the third memory is copied to the first memory space.
4. The method according to claim 1, wherein The objective function also includes an initialization function; Before executing the application copy function in the second memory, the method further includes: Run the initialization function to initialize the chip.
5. The method according to claim 4, characterized in that The target function also includes a destructor; Before executing the jump function in the second memory, the method further includes: The destructor is run to deinitialize the chip.
6. The method according to claim 3, characterized in that The third memory also stores the application program; The running of the application copy function in the second memory to copy the application to the second memory space of the first memory includes: Run the application copy function in the second memory to copy the application in the third memory to the second memory space.
7. The method according to any one of claims 1 to 6, characterized in that The chip includes a microcontroller unit MCU; The first memory includes a random access memory RAM; The second memory includes a tightly coupled memory TCM; The third memory includes a flash memory.
8. A device using chip memory, characterized in that: The chip includes a first memory and a second memory, and the device includes: a first copy unit, configured to copy a target function in the boot loader to the second memory in response to an operation of running the boot loader in the first memory space of the first memory, the target function including an application copy function and a jump function; a second copy unit, configured to run an application copy function in the second memory to copy the application to a second memory space of the first memory, where the second memory space covers part or all of the memory space of the first memory space; A jump unit is used to run a jump function in the second memory, jump to the entry of the application, and execute the application in the second memory space.
9. An electronic device, characterized in that: The device includes: a memory and a processor; The memory is used to store relevant program codes; The processor is used to call the program code to execute the method for using chip memory according to any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that The computer-readable storage medium is used to store a computer program, and the computer program is used to execute the method of using a chip memory according to any one of claims 1 to 7.