Method for transmitting DSD audio data based on IS of domestic general SoC

Abstract

The invention discloses a method for transmitting DSD audio data based on an IS of a domestic general SoC. The method comprises the following steps: confirming that a hardware interface of the domestic general SoC supports an IS standard format and an IS controller supports an IS32bit format and multichannel SDO data transmission; confirming that the rear-end DAC device supports Native DSD format data receiving; the method comprises the following steps: adding support for a DSDNative format in an IS controller and a sound card driving kernel source code of the SoC, and modifying the maximum sound channel number of the sound card to be more than 4 channels; through collaborative design of software and hardware, direct transmission of DSD audio data by the IS interface of the domestic general SoC is realized, the problem that the prior art depends on a special chip is solved, and the system has remarkable technical progress and practical value.

Description

Technical Field

[0001] The present invention relates to the technical field of electric energy meters, and in particular to a method for transmitting DSD audio data via I²S based on a domestically produced general-purpose SoC. Background Art

[0002] In existing technology, domestic general-purpose SoCs lack DSD audio format support at the driver and system levels, making the on-chip I²S interface unable to directly transmit DSD data. Traditional solutions require connecting a dedicated audio interface chip (such as a UAC2.0 protocol chip) via USB, which then transmits the DSD data to the DAC for playback. This approach has the following drawbacks:

[0003] High hardware cost: additional dedicated chips are required, which leads to increased PCBA costs;

[0004] Large size and power consumption: Dedicated chips increase hardware size and also bring additional power consumption;

[0005] High resource usage: It occupies the SoC's USB interface and on-chip resources, affecting other system functions.

[0006] With the popularity of the DSD audio format, there is an urgent need for a solution to directly transmit DSD data via the I²S interface based on a domestic general-purpose SoC to address the shortcomings of existing technologies. Summary of the Invention

[0007] In order to make up for the deficiencies of the prior art, the embodiments of the present application propose a method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC to solve the problems existing in the prior art.

[0008] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0009] A method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC, comprising the following steps:

[0010] Confirm that the hardware interface of domestic general-purpose SoC supports the I²S standard format, and the I²S controller supports the I²S 32-bit format and multi-channel SDO data transmission;

[0011] Confirm that the back-end DAC device supports NativeDSD format data reception;

[0012] Added support for the DSDNative format in the SoC's I²S controller and sound card driver kernel source code, and increased the maximum number of sound card channels to 4 or more.

[0013] Add support for at least 768K sampling rate in the I²S controller driver and sound card driver, and set the I²S controller bit depth to 32 bits;

[0014] Set the SCLK frequency of the I²S controller according to the DSD data sampling rate;

[0015] The application layer opens the sound card with 4 channels and PCM_FORMAT_DSD_U32 mode, determines the DSD file type, and rearranges the data for transmission via I²S.

[0016] As a further technical solution of the present invention, confirming that the I²S controller supports multi-channel SDO data transmission specifically includes: selecting an I²S controller with at least two data output channels, SDO0 and SDO1, to support dual-channel DSD data transmission.

[0017] As a further technical solution of the present invention: When transmitting in NativeDSD format, the hardware connection is: connect the DCLK of the DAC to the I²SSCLK of the SoC, connect the DSD1 and DSD2 data lines of the DAC to the I²SSDO0 and I²SSDO1 of the SoC respectively, and the I²SMCLK and LRCK of the SoC are not connected to the DAC.

[0018] As a further technical solution of the present invention: DSD file types include DSF format and DFF format: for DFF files, data is read in an interleaved manner, and the left channel data and the right channel data are arranged alternately and stored in the output buffer; for DSF files, data is read in a planar arrangement manner, the left channel data is read first and then the right channel data is read, and the data are rearranged in byte order and stored in the output buffer.

[0019] As a further technical solution of the present invention: DFF file data processing is specifically as follows: read 16 bytes at a time, store D6D4D2D0D14D12D10D8 as the left channel data in the first 8 bytes of the output buffer, and store D7D5D3D1D15D13D11D9 as the right channel data in the last 8 bytes.

[0020] As a further technical solution of the present invention: DSF file data processing is specifically as follows: read the left and right channel data respectively with 4096 as the offset, and store each channel data in the corresponding position of the output buffer in the order of D3D2D1D0D7D6D5D4.

[0021] As a further technical solution of the present invention: the SCLK frequency setting rule is: DSD64 corresponds to 2.8224 MHz, DSD128 corresponds to 5.6448 MHz, DSD256 corresponds to 11.2896 MHz, and DSD512 corresponds to 22.5792 MHz.

[0022] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0023] Cost reduction: no dedicated audio interface chip is required, and SoC on-chip resources are utilized;

[0024] Reduced size: Reduce the number of hardware components and reduce the size of PCBA;

[0025] Reduced power consumption: Avoiding the extra power consumption of dedicated chips;

[0026] Resource optimization: does not occupy the USB interface, freeing up SoC resources;

[0027] Good compatibility: supports compatible transmission of PCM and DSD audio formats. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 Schematic diagram of signal interaction for a communication link.

[0029] Figure 2 This is a diagram showing the Native DSD Format transmission method.

[0030] Figure 3 Schematic diagram of the hardware of the present invention. DETAILED DESCRIPTION

[0031] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0032] like Figure 1-Figure 3 As shown, a method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC includes the following steps:

[0033] Confirm that the hardware interface of domestic general-purpose SoC supports the I²S standard format, and the I²S controller supports the I²S 32-bit format and multi-channel SDO data transmission;

[0034] Confirm that the back-end DAC device supports NativeDSD format data reception;

[0035] Added support for the DSDNative format in the SoC's I²S controller and sound card driver kernel source code, and increased the maximum number of sound card channels to 4 or more.

[0036] Add support for at least 768K sampling rate in the I²S controller driver and sound card driver, and set the I²S controller bit depth to 32 bits;

[0037] Set the SCLK frequency of the I²S controller according to the DSD data sampling rate;

[0038] The application layer opens the sound card with 4 channels and PCM_FORMAT_DSD_U32 mode, determines the DSD file type, and rearranges the data for transmission via I²S.

[0039] Here’s how it works:

[0040] The SOC host needs to confirm that the hardware interface supports the I2S standard format, that an I2S controller is available, and that the supported format of the I2S controller is set to I2S 32bit.

[0041] When selecting an I2S controller for the SoC master, be aware that it must support multi-channel SDO data transmission. Avoid using an I2S controller with only one SDO channel, as this will result in DSD data transmission limited to a single channel. Furthermore, the SCLK clock frequency division should be limited. Excessive frequency division restrictions can prevent the SCLK from generating the clock needed for DSD data transmission, leading to sampling errors in the back-end DAC and resulting in abnormal sound.

[0042] You need to confirm that the back-end DAC device supports Native DSD format data reception, such as ESS9038.

[0043] The figure shows the Native DSD Format transmission method. Hardware connections require connecting DCLK to the master's SCLK. The two data lines, DSD1 and DSD2, need to be connected to the master's I2S SOD0 and I2S SDO1. The master's I2SMCLK and I2S LRCK can be brought out but do not need to be connected. The transmission mode refers to DSD Normal Mode, where data is sampled on the rising edge of each clock pulse.

[0044] The host controller needs to add support for the DSD Native format to the corresponding I2S controller and sound card driver kernel source code so that the application layer can normally open the sound card in DSD format. At the same time, the host controller needs to modify the maximum number of channels supported by the sound card to more than 4 channels.

[0045] The host I2S controller driver and sound card driver need to add support for more sampling rates, at least up to 768K. The I2S controller bit depth also needs to be set to 32 bits.

[0046] The master I2S controller driver needs to set the SCLK frequency of the I2S controller to the corresponding value according to the information provided in the above table and the sampling rate corresponding to the current DSD data, so that the DAC end can correctly sample the data.

[0047] When the host application implements I2S data transmission, it needs to open the corresponding sound card in the following mode: 4 channels, PCM_FORMAT_DSD_U32, and it needs to determine the type of the opened DSD file (DSF format or DFF format). The data storage methods of the two files are different, so it is necessary to make a judgment, rearrange the data in different ways, and hand it over to I2S for transmission.

[0048] DFF files store DSD data in an interleaved manner. Left channel data and right channel data are interleaved, that is, one byte of left channel data is arranged with one byte of right channel data.

[0049] DSF files store DSD data in a planar arrangement inside the file, first storing 4096 left channel data, and then storing 4096 right channel data.

[0050] I2S transmission method of DFF file:

[0051] Assuming that 16 bytes are read and written continuously at a time, the eight bytes D6 D4 D2 D0 D14 D12 D10 D8 are used as the I2S left channel data and placed in the first 8 bytes of the output buffer. The eight bytes D7 D5 D3 D1 D15 D13 D11 D9 are used as the I2S right channel data and placed in the last 8 bytes of the output buffer. The output buffer is then handed over to I2S for transmission.

[0052] I2S transmission method of DSF file:

[0053] DSF needs to read 8 left channel data, and then read 8 right channel data with an offset of 4096. The 8 left channel data are placed into the first 8 bytes of the output buffer in the order of D3 D2 D1 D0 D7 D6 D5 D4, and the right channel data are placed into the last 8 bytes of the output buffer in the order of D3 D2 D1 D0 D7 D6 D5 D4. The output buffer is then handed over to I2S for transmission.

[0054] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above and that the invention can be embodied in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered in all respects as illustrative and non-restrictive, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations that come within the meaning and range of equivalents of the claims be embraced therein.

[0055] In addition, it should be understood that although this specification is described in terms of implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment have also been appropriately combined to form other implementation methods that are easy for those skilled in the art to understand.

Claims

1. A method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC, characterized in that: The following steps are involved: Confirm that the hardware interface of domestic general-purpose SoC supports the I²S standard format, and the I²S controller supports the I²S 32-bit format and multi-channel SDO data transmission; Confirm that the back-end DAC device supports NativeDSD format data reception; Added support for the DSDNative format in the SoC's I²S controller and sound card driver kernel source code, and increased the maximum number of sound card channels to 4 or more. Add support for at least 768K sampling rate in the I²S controller driver and sound card driver, and set the I²S controller bit depth to 32 bits; Set the SCLK frequency of the I²S controller according to the DSD data sampling rate; The application layer opens the sound card with 4 channels and PCM_FORMAT_DSD_U32 mode, determines the DSD file type, and rearranges the data for transmission via I²S.

2. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 1, characterized in that: Verify that the I²S controller supports multi-channel SDO data transmission. Specifically, select an I²S controller with at least two data output channels, SDO0 and SDO1, to support two-channel DSD data transmission.

3. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 1, characterized in that: When transmitting in NativeDSD format, the hardware connection is as follows: connect the DAC's DCLK to the SoC's I²SSCLK, connect the DAC's DSD1 and DSD2 data lines to the SoC's I²SSDO0 and I²SSDO1 respectively, and do not connect the SoC's I²SMCLK and LRCK to the DAC.

4. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 1, characterized in that: DSD file types include DSF format and DFF format: For DFF files, data is read in an interleaved manner, and the left channel data and right channel data are arranged alternately and stored in the output buffer; for DSF files, data is read in a planar arrangement manner, and the left channel data is read first and then the right channel data is read, and the data is rearranged in byte order and stored in the output buffer.

5. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 4, characterized in that: The specific processing of DFF file data is as follows: read 16 bytes at a time, store D6D4D2D0D14D12D10D8 as the left channel data in the first 8 bytes of the output buffer, and store D7D5D3D1D15D13D11D9 as the right channel data in the last 8 bytes.

6. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 4, characterized in that: The specific processing of DSF file data is as follows: read the left and right channel data respectively with 4096 as the offset, and store each channel data in the corresponding position of the output buffer in the order of D3D2D1D0D7D6D5D4.

7. The method for transmitting DSD audio data via I²S based on a domestic general-purpose SoC according to claim 1, characterized in that: The SCLK frequency setting rules are: DSD64 corresponds to 2.8224MHz, DSD128 corresponds to 5.6448MHz, DSD256 corresponds to 11.2896MHz, and DSD512 corresponds to 22.5792MHz.

Images