A MAC address configuration method and electronic device

Abstract

The application discloses a MAC address configuration method applied to a Feiteng processor platform, wherein the Feiteng processor platform comprises a Feiteng processor, an EEPROM and a UEFI firmware; the method comprises the following steps: writing a target MAC address into a specific storage position of the EEPROM; reading the MAC address from the specific storage position of the EEPROM by the UEFI firmware in a DXE stage, and writing the MAC address into a MAC address register of a network controller of the Feiteng processor. The application can realize persistent configuration of the MAC address.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of computers, and particularly relates to a MAC address configuration method and electronic equipment. BACKGROUND

[0002] In the process of substituting the localization of Feiteng processors, the unique network identifier (MAC address) of physical equipment often needs to be customized and configured according to business scenarios; and the prior art scheme can only modify the MAC address at the operating system layer through temporary instructions (such as ifconfig), and has the following technical defects:

[0003] (1) The MAC address modified through temporary instructions (such as ifconfig) is invalid after reboot due to the built-in eFuse hardware protection mechanism of Feiteng processors;

[0004] (2) The operation is complex, and requires direct operation of hardware registers, and requires that the operation and maintenance personnel are proficient in the operation of underlying hardware registers, and the implementation process of a single device takes more than 30 minutes;

[0005] (3) Batch deployment is difficult: and such modification needs to be operated on a single device in the batch deployment scenario, and the configuration is lost after system reinstallation, resulting in exponential growth of operation and maintenance costs, which restricts the efficiency of the large-scale landing of localized equipment. SUMMARY

[0006] The purpose of the present application is to provide a MAC address configuration method and electronic equipment, which can realize persistent configuration of the MAC address.

[0007] In a first aspect, the present application provides a MAC address configuration method applied to a Feiteng processor platform, wherein the Feiteng processor platform comprises a Feiteng processor, an EEPROM (Electrically Erasable Programmable read only memory, electrically erasable programmable read-only memory) and a UEFI firmware; the Feiteng processor is connected with the EEPROM; and the method comprises the following steps:

[0008] writing a target MAC address into a specific storage position of the EEPROM;

[0009] reading the MAC address from the specific storage position of the EEPROM by the UEFI firmware at a DXE stage, and writing the MAC address into a MAC address (MAC_ADDR) hardware register of a network controller of the Feiteng processor.

[0010] In a possible implementation manner, the Feiteng processor is connected with the EEPROM through an I2C0 bus.

[0011] In a possible implementation, the method further includes generating a CRC check code of the target MAC address.

[0012] The writing of the target MAC address into the specific storage location of the EEPROM includes writing the target MAC address and a corresponding CRC check code into the EEPROM, where the CRC check code is used for verification when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM.

[0013] In a possible implementation, the UEFI firmware first performs verification when reading the MAC address from the specific storage location of the EEPROM in the DXE stage, and only writes the MAC address into the MAC address register of the FeiTeng processor network controller after the verification is passed.

[0014] The verification includes MAC address format legality checking and CRC check code matching.

[0015] The double verification mechanism of the MAC address format legality checking (MAC address U / L bit checking) and the CRC check code matching can ensure the legality of the MAC address stored in the external EEPROM, and avoid the security risk caused by bypassing the eFuse.

[0016] In a possible implementation, the method further includes entering a MAC address recovery mode and using an original MAC address if the reading of the EEPROM fails or the verification fails.

[0017] In a possible implementation, if the reading of the EEPROM fails or the verification fails, an error can be reported, and a verification failure event can be written into a TCM trusted log.

[0018] In a possible implementation, the writing of the target MAC address and the corresponding CRC check code into the EEPROM includes, in a single-machine configuration case, receiving a user-input customized target MAC address, and writing the target MAC address and the corresponding CRC check code into the EEPROM.

[0019] In a possible implementation, the writing of the target MAC address and the corresponding CRC check code into the EEPROM includes, in a batch configuration case, using an EEPROM programmer to batch-program the target MAC address and the CRC check code into the EEPROM.

[0020] In a second aspect, the present application provides an electronic device, including a memory and a processor.

[0021] The memory is configured to store a computer program.

[0022] The processor is configured to invoke the computer program to execute the method described above.

[0023] In a third aspect, the present application provides a computer readable storage medium, having stored therein a computer program, which, when executed on an electronic device, causes the electronic device to implement the method as described above.

[0024] In a fourth aspect, the present application provides a computer program product, comprising a computer program, which, when executed on an electronic device, causes the electronic device to implement the method as described above.

[0025] The specific implementation manners of the above-mentioned second to fourth aspects of the present application can refer to the implementation manners of the above-mentioned first aspect, which will not be described here.

[0026] Advantages:

[0027] The present application can avoid the restriction of the processor internal eFuse protection mechanism on the direct writing of the hardware register by operating system (Kylin)-firmware (UEFI)-hardware (EEPROM) linkage, and realizes the MAC address persistent storage, which is not affected by system restart. For batch deployment, EEPROM can be pre-burned to improve the efficiency of batch deployment. The double-checking mechanism is adopted, the broadcast address can be filtered through checking the legality of the MAC address format, and the data tampering can be prevented through CRC checking to ensure the security. The present application solves the problems of invalidation of the traditional scheme after restart and low deployment efficiency, and is suitable for the large-scale application of the domestic equipment. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 The figure is a schematic diagram of the operating system layer configuration stage in the embodiment of the present application;

[0029] Figure 2 The figure is the hardware layer EEPROM configuration in the embodiment of the present application;

[0030] Figure 3 The figure is the firmware layer UEFI automatic loading MAC address flow in the embodiment of the present application. DETAILED DESCRIPTION

[0031] In order to make the personnel in the technical field better understand the present application scheme, the technical scheme of the present application will be further described in detail below in combination with the embodiments of the present application and the drawings.

[0032] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and in the above drawings are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a series of steps or units does not have to be limited to those steps or units clearly listed, but can include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0033] In addition, the terms "mount", "set", "provided with", "connected", "connected", "socketed" should be broadly understood. For example, "connected" can be fixed connection, detachable connection, or integral structure; can be mechanical connection, or electrical connection; can be directly connected, or indirectly connected through an intermediate medium, or internal communication between two devices, elements or components. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0034] The present application discloses a MAC address configuration method, which automatically loads and writes the MAC address into the MAC address register (hardware register) of the network controller of the Feiteng processor by externally hanging the EEPROM storage address and check code of the Feiteng processor, solves the problems of invalidation after restart and low deployment efficiency of the traditional scheme, and is suitable for large-scale application of domestic equipment.

[0035] In order to more clearly understand the technical solutions of the present application, first, the related art is introduced and explained.

[0036] The Feiteng processor series (including FT-1500A / 16, FT-2000 / 4, etc.) adopts a highly integrated SOC design, and integrates two independent gigabit Ethernet controllers (GMAC0 and GMAC1) in the chip. Each controller has a dedicated MAC layer processing unit and PHY interface, forming a unique dual-MAC architecture. Two independent MAC addresses (i.e., "dual-MAC addresses") are required, which are interconnected with the CPU system bus through different high-speed AMBA buses (AHB / AXI) and support 10 / 100 / 1000 Mbps adaptive rates. The original MAC addresses are stored in the non-volatile memory (NVM / eFuse) dedicated area in the Feiteng processor, and support hardware-level network filtering and security policies based on MAC addresses, providing basic security protection for the system. Exemplarily, the Feiteng processor dual-MAC address loading method from the non-volatile memory (NVM / eFuse) includes: a) reading two sets of MAC addresses signed by SM2 from the non-volatile memory (NVM / eFuse) area in the processor, corresponding to GMAC0 and GMAC1 controllers respectively; b) writing the first MAC address to the MAC address register group of GMAC0 and the second MAC address to the MAC address register group of GMAC1 through the AMBA AHB bus; c) starting the SecurityEn bit (security enable bit) of the control register of GMAC0 and the control register of GMAC1 to realize hardware-level address filtering.

[0037] The MAC address (Media Access Control Address) is the core identifier of the data link layer of the OSI model. In binary, the MAC address is 48 bits (6 bytes, each byte is 8 bits, a total of 48 bits), the first 24 bits are OUI (Organizationally Unique Identifier), which is uniformly allocated by IEEE; the last 24 bits are device number, which is allocated by the device manufacturer to ensure global uniqueness. In hexadecimal, the MAC address is usually represented as 12 hexadecimal characters (such as 00:1A:2B:3C:4D:5E), of which the first 6 hexadecimal characters (00:1A:2B) are the OUI allocated by IEEE, and the last 6 hexadecimal characters (3C:4D:5E) are the device identifier defined by the manufacturer.

[0038] The eFuse (Fusion Memory) inside the Feiteng processor implements hardware-level write protection on the MAC address register (such as the MAC_ADDR register), and its characteristics include: the eFuse is locked after burning the original MAC address at the factory, and is prohibited to be directly modified by the operating system or software, which belongs to one-time writing. The protection of the MAC address by the eFuse of the Feiteng processor is essentially a time sequence control type protection. In the hardware initialization stage (power-on moment), the hardware will automatically load the original MAC address stored by the eFuse into the MAC address register of the network controller; in the operating system running stage, the eFuse will lock the MAC address register to prohibit subsequent software (such as the operating system) from directly modifying it. Any MAC address temporarily modified by software (such as ifconfig of Linux) is only temporarily effective within the software stack of the operating system and does not penetrate the hardware protection layer, and is overwritten by the original MAC address stored by the eFuse after system restart.

[0039] Kirin system is a domestic operating system developed based on Arch Linux kernel, which can stably run on Feiteng processor after special optimization and adaptation. The system is deeply customized for the network architecture characteristics of Feiteng processor, and can effectively manage the original MAC address storage mechanism specific to Feiteng processor, and provide complete network protocol stack support for upper-layer applications. The close combination of Kirin system and Feiteng hardware makes the modification and management of the original MAC address maintain the flexibility of Linux system, and also meet the safety and reliability requirements of domestic platform.

[0040] The specific embodiments according to the present application will be described below with reference to the accompanying drawings. Figure 1 The specific embodiments according to the present application will be described below with reference to the accompanying drawings.

[0041] Embodiment I:

[0042] The present application provides a MAC address configuration method applied to a Feiteng processor platform, wherein the Feiteng processor platform comprises a Feiteng processor, an EEPROM (Electrically Erasable Programmable read only memory, which refers to an electrically erasable programmable read-only memory) and a UEFI firmware; the Feiteng processor is externally connected with the EEPROM; and the method comprises the following steps:

[0043] writing a target MAC address into a specific storage position of the EEPROM;

[0044] reading the target MAC address stored by the EEPROM by the UEFI firmware in the DXE (Driver Execution Environment, driver execution environment) stage, and writing the MAC address into the MAC address register of the network controller of the Feiteng processor.

[0045] In some embodiments, the EEPROM is of model 24AA025E48.

[0046] In some embodiments, the Feiteng processor is connected with the EEPROM through the I2C0 bus (400 kHz clock frequency).

[0047] The Feiteng processor only opens the I2C0 / SPI0 bus for secure storage, while the EEPROM supports the I2C / SPI interface standard. Therefore, the external EEPROM through the I2C0 bus can adapt the hardware native interface, facilitate the use of encryption algorithm to encrypt data and hardware encryption channel to transmit data, and meet the localization security standard.

[0048] Exemplarily, the EEPROM is assigned as a slave device address 0x50 in the I2C bus.

[0049] In some embodiments, the method further comprises generating a CRC check code of the target MAC address; and the writing of the target MAC address into the specific storage location of the EEPROM comprises writing the target MAC address and the corresponding CRC check code into the EEPROM, wherein the CRC check code is used for verification when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM.

[0050] In some embodiments, the MAC address is stored at the offset address 0x100-0x105 of the EEPROM.

[0051] In some embodiments, the CRC check code is CRC16-CCITT, which can be stored at the offset address 0x106-0x107 of the EEPROM.

[0052] In some embodiments, the CRC16-CCITT check code can be automatically generated.

[0053] In some embodiments, when the UEFI firmware reads the MAC address from the specific storage location of the EEPROM in the DXE stage, the MAC address is first verified, and only after the verification is passed, the MAC address is written into the MAC address register of the Feiteng processor network controller.

[0054] In some embodiments, the verification comprises MAC address format legality check (MAC address U / L bit check) and CRC check code matching.

[0055] The double verification mechanism of the MAC address format legality check (MAC address U / L bit check) and the CRC check code matching can ensure the legality of the MAC address stored in the external EEPROM, and avoid the security risk caused by bypassing the eFuse.

[0056] In some embodiments, in the Kirin operating system, a special configuration tool directly accesses the I2C controller through the kernel driver, writes the IEEE standard-compliant MAC address to the EEPROM specific storage area (offset address 0x100-0x105), and automatically generates a CRC16 check code stored at address 0x106. During the system startup process, the UEFI firmware reads the data of this EEPROM storage area through the I2C protocol in the DXE stage, and after double verification of the MAC address format legality check (MAC address U / L bit check) and the check code, the valid MAC address value is directly written to the MAC address register of the Feiteng processor network controller, thereby bypassing the internal eFuse protection mechanism of the processor and completing the permanent modification of the MAC address at the firmware level.

[0057] MAC address U / L bit (second byte low bit) check description:

[0058] In the structure of a 48-bit MAC address (6 bytes), the IEEE standard specifies that the second byte low bit (i.e., the 8th bit, counting from right to left) is called the U / L bit (Universal / Local bit), which is used to identify whether the MAC address is globally unique (Universal) or locally defined (Local).

[0059] U / L = 0 (Universal): indicates that the MAC address is assigned by the IEEE official (such as the manufacturer OUI), and is globally unique.

[0060] U / L = 1 (Local): indicates that the MAC address is defined by the user or system administrator, and may not guarantee global uniqueness.

[0061] If the U / L bit is incorrectly set to 1 (Local), it may cause the MAC address to conflict with the standard OUI, affecting network communication. The U / L bit of some special MAC addresses (such as the broadcast address FF:FF:FF:FF:FF:FF or the multicast address 01:00:5E:xx:xx:xx) may not comply with the standard and need to be filtered. Feiteng processors usually require MAC addresses to be in Universal (U / L = 0) mode to ensure the uniqueness and compatibility of network devices. If the user inputs an incorrect MAC address (such as 02:xx:xx:xx:xx:xx, U / L = 1), it may cause network abnormalities. Malicious modification of the MAC address may cause network spoofing attacks (such as ARP spoofing). In the verification process, the application can prevent broadcast / multicast MAC address conflicts, ensure that the MAC address complies with the IEEE standard, enhance security, and prevent illegal MAC address injection by detecting the U / L bit.

[0062] In the MAC address loading stage of the UEFI firmware, the verification process is as follows:

[0063] Read the MAC address in the EEPROM (such as 00:1A:2B:3C:4D:5E).

[0064] Check the second byte of the MAC address;

[0065] For example, if the second byte of the MAC address is: 1A (binary 0001 1010) -> the lowest bit is 0 (U / L=0, legal).

[0066] If the second byte of the MAC address is: 1B (binary 0001 1011) -> the lowest bit is 1 (U / L=1, possibly illegal).

[0067] If U / L=1, it is considered an illegal MAC, and the UEFI refuses to load, avoiding network anomalies.

[0068] The implementation of the embodiments of the application includes three levels of operation:

[0069] 1. Operating system layer configuration:

[0070] Referring to Figure 1 , the user runs the MAC configuration tool (such as a graphical configuration tool) in the operating system, selects the "MAC address modification" function item. The operating system (Kylin system) receives the target MAC address input by the user (which needs to comply with the IEEE standard format) through the graphical configuration tool, the kernel driver is activated, the Feiteng special I2C driver module is loaded, and the physical address space of the hardware register of the I2C controller of the Feiteng processor (taking the I2C0 of the D2000 platform as an example, the mapping area is 0x28006000-0x28006FFF) is mapped to the virtual address space of the operating system kernel, at the same time, the EEPROM is connected with the Feiteng processor through the I2C0 bus (slave address 0x50). Therefore, by operating the hardware registers of the Feiteng processor I2C controller and I2C bus, the target MAC address and CRC check code can be written into the specific storage position of the external EEPROM by using the I2C protocol.

[0071] 2. Hardware layer EEPROM configuration:

[0072] Referring to Figure 2 , the EEPROM (model 24AA025E48) is connected with the Feiteng processor through the I2C bus, and the built-in non-volatile storage unit thereof still retains the MAC address data completely after power failure, realizing persistent storage.

[0073] Exemplarily, the external EEPROM offset address 0x100-0x105 stores a 6-byte MAC address (such as 00:1A:2B:3C:4D:5E); and the external EEPROM offset address 0x106-0x107 stores an automatically generated CRC check code (such as a CRC16-CCITT check code).

[0074] 3. Firmware layer UEFI automatically loads the MAC address:

[0075] Referring to Figure 3 In the system cold start process, in the POST (Power-On Self-Test) stage, the processor automatically verifies the hardware-level security checks such as the hash value of the MAC address stored in the eFuse, the double MAC controller state detection, and the TCM security metric value initialization; and the UEFI firmware reads the data in the 0x100-0x107 region of the EEPROM through the I2C protocol in the DXE stage to perform double verification:

[0076] Format verification: detecting the MAC address U / L bit (the second byte lowest bit) to ensure that it is not a broadcast address (0x01);

[0077] Integrity verification: recalculating the CRC16 check value of the MAC field and matching the EEPROM stored value;

[0078] After the verification is passed, the MAC address is written into the network controller register of the Feiteng processor through memory mapping I / O.

[0079] If the EEPROM reading fails or the verification fails, the MAC address recovery mode is entered, the original MAC address is used to ensure the normal start and networking of the device, error reporting can be performed to prompt the operation and maintenance personnel to intervene, and the verification failure event is written into the TCM (Trusted Cryptography Module) trusted log for security tracing.

[0080] In the single-machine configuration case, a graphical configuration tool can be run in the Kirin system to set a user-customized target MAC address, and the target MAC address and the CRC check code are written into the EEPROM through memory mapping; after restarting, the UEFI reads and verifies the target MAC address and the CRC check code, and finally writes them into the network controller register of the Feiteng processor after the verification is passed.

[0081] In the batch configuration case, an EEPROM programmer can be used to batch burn the target MAC address and the CRC check code into the EEPROM.

[0082] The three-layer cooperative linkage mechanism of the operating system (Kylin) - firmware (UEFI) - hardware (EEPROM) is used in the embodiment of the application, which not only guarantees the compatibility and security of the domestic platform, but also provides the core advantages of restart taking effect and persistent saving.

[0083] The embodiment of the application realizes bypassing the eFuse protection mechanism of the Feiteng processor through the cooperative design of the hardware storage path and the firmware loading strategy, and the specific technical logic is as follows:

[0084] Physical isolation at the hardware level: independent storage media is used, and the external EEPROM (such as 24AA025E48) and the internal eFuse of the Feiteng processor belong to different physical storage units, and the processor cannot apply the eFuse write protection rule to the EEPROM. The EEPROM is connected through the I2C bus (instead of the internal AHB / AXI bus of the processor), avoiding the control of the eFuse on the system bus access. The non-volatility of the EEPROM ensures the address persistence.

[0085] Loading priority at the firmware level: in the DXE stage (between hardware initialization and operating system startup, the eFuse has completed the original MAC address loading, but has not activated the runtime protection) of system startup, the UEFI firmware directly obtains the MAC address from the external EEPROM through the I2C protocol (instead of reading the default value of the eFuse); the MAC address that passes the verification is directly written into the MAC address register of the network controller, so that the original MAC address loaded by the eFuse can be overwritten, and the MAC address rewriting is completed before the Feiteng processor initializes the network controller, ensuring that the writing time of the MAC address register is earlier than the original MAC address loaded by the eFuse.

[0086] Embodiment two:

[0087] The embodiment provides an electronic device, comprising a memory and a processor.

[0088] The memory is configured to store a computer program.

[0089] The processor is configured to call the computer program to execute the method in embodiment one.

[0090] Embodiment three:

[0091] The embodiment provides a computer readable storage medium, and the computer readable storage medium stores a computer program. When the computer program runs on an electronic device, the electronic device implements the method in embodiment one.

[0092] Embodiment four:

[0093] The embodiment provides a computer program product comprising a computer program which, when running on an electronic device, causes the electronic device to implement the method according to the first embodiment.

[0094] The specific implementation of the system, the electronic device, the computer readable storage medium and the computer program product provided by the embodiment of the present application can refer to the specific embodiments of the above method, which will not be described here.

[0095] Obviously, those skilled in the art should understand that each unit or each step of the above-mentioned present application can be realized by using a general computing device, which can be concentrated on a single computing device or distributed on a network composed of multiple computing devices, and optionally, each unit or each step can be realized by using program code executable by a computing device, so that each unit or each step can be stored in a storage device and executed by a computing device, or each unit or each step can be made into an individual integrated circuit module, or multiple modules or steps can be made into a single integrated circuit module to realize. Thus, the present application is not limited to any specific combination of hardware and software.

[0096] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A MAC address configuration method, characterized by, The application is applied to a Feiteng processor platform, which comprises a Feiteng processor, an EEPROM and a UEFI firmware. The Feiteng processor is connected with the EEPROM. The target MAC address is written into a specific storage position of the EEPROM. The UEFI firmware reads the MAC address from the specific storage position of the EEPROM in the DXE stage and writes the MAC address into a MAC address hardware register of the network controller of the Feiteng processor.

2. The method of claim 1, wherein, The Feiteng processor is connected with the EEPROM through an I2C0 bus.

3. The method of claim 2, wherein, The method further comprises generating a CRC check code of the target MAC address. The target MAC address and the corresponding CRC check code are written into the EEPROM, and the CRC check code is used for verifying when the UEFI firmware reads the MAC address from the specific storage position of the EEPROM.

4. The method of claim 3, wherein, The UEFI firmware verifies when reading the MAC address from the specific storage position of the EEPROM in the DXE stage, and writes the MAC address into the MAC address register of the network controller of the Feiteng processor only after the verification is passed. The verification comprises a MAC address format legality check and a CRC check code matching.

5. The method of claim 4, wherein, The method further comprises entering a MAC address recovery mode and using an original MAC address if the EEPROM fails to be read or the verification fails.

6. The method of claim 3, wherein, The target MAC address and the corresponding CRC check code are written into the EEPROM, and the target MAC address is received by a user in a single-machine configuration case.

7. The method of claim 3, wherein, The target MAC address and the corresponding CRC check code are written into the EEPROM, and the target MAC address and the CRC check code are batch-programmed into the EEPROM by using an EEPROM programmer in a batch configuration case.

8. An electronic device, comprising: The application further relates to a computer readable storage medium having stored the computer program. The application further relates to an electronic device. The application further relates to a computer readable storage medium having stored the computer program. The application further relates to a computer program.

9. A computer-readable storage medium, characterized in that, The application further relates to a computer program.

10. A computer program product comprising a computer program, characterized in that, ​

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