Extended display identifier reading method, electronic device and storage medium

Abstract

This application discloses a method, electronic device, and storage medium for reading extended display identifiers (EDIDs), relating to the field of extended display identifier technology. It is applied to a shared driver board, where the MCU's memory area stores multiple sets of EDIDs. The MCU is equipped with a digital DIP switch module. The method for reading extended display identifiers includes: acquiring the digital DIP switch output by the digital DIP switch module when the MCU is powered on; determining the EDID storage address based on the digital DIP switch; reading the EDID corresponding to the digital DIP switch in the memory area based on the EDID storage address; and feeding the EDID back to the host computer. By storing multiple sets of EDIDs in the shared driver board and setting up a digital DIP switch module, determining the EDID storage address to be read based on the digital DIP switch information, and reading the EDID based on that address, different EDIDs can be output simply by adjusting the output DIP switch value when changing display devices, reducing programming costs.

Description

Technical Field

[0001] This application relates to the field of extended display identification technology, and more particularly to a method for reading extended display identification, an electronic device, and a storage medium. Background Technology

[0002] EDID (Extended Display Identification Data) contains parameters about the display and its performance. Its purpose is to tell the PC (personal computer) the screen parameters supported by the display so that the PC can output the correct video signal according to the screen parameters.

[0003] In related technologies, an E2PROM (a type of non-volatile memory) is typically placed on the driver board to store EDID information. An E2PROM can only store one type of EDID information. In scenarios where multiple display devices share a driver board, when the display device is changed, such as from a 540P display to a 720P display, the 720P EDID information needs to be re-programmed into the E2PROM. Therefore, when frequent switching of display devices is required, frequent EDID programming operations are necessary, leading to increased costs.

[0004] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention

[0005] The main objective of this application is to provide a method, electronic device, and storage medium for reading extended display identifiers, aiming to solve the technical problem of increased costs caused by frequent EDID burning operations when multiple display devices share a driver board and need to frequently switch display devices.

[0006] To achieve the above objectives, this application proposes a method for reading extended display identifiers (EDIDs), applied to a shared driver board. The shared driver board's microcontroller unit (MCU) stores multiple sets of extended display identifiers (EDIDs) in its memory area. The MCU is equipped with a digital DIP switch module. The method for reading the extended display identifiers includes:

[0007] Obtain the digital DIP switch output by the digital DIP switch module when the MCU is powered on;

[0008] The EDID storage address is determined based on the fill value of the digital DIP switch;

[0009] The EDID corresponding to the digital DIP switch in the memory area is read according to the EDID storage address, and the EDID is fed back to the host computer.

[0010] In one embodiment, the step of reading the EDID corresponding to the digital DIP switch in the memory area according to the EDID storage address and feeding the EDID back to the host computer includes:

[0011] In response to the read command from the host computer, the position to be read in the EDID storage address is determined according to the offset written by the host computer;

[0012] Based on the position to be read, a byte of data of a preset size is sent to the host computer, wherein the offset increments automatically based on the preset size.

[0013] In response to the target response signal from the host computer, if there are unsent bytes at the EDID storage address, the step of determining the position to be read in the EDID storage address based on the offset written by the host computer is executed.

[0014] In one embodiment, the MCU is connected to the host computer via the display data channel, using the serial clock line SCL and the serial data line SDA. When the SCL falls and is interrupted, the counter starts counting.

[0015] Before the step of responding to the read command from the host computer and determining the position to be read in the EDID storage address based on the offset written by the host computer, the method for reading the extended display identifier further includes:

[0016] When the MCU responds to the write command from the host computer, the SCL falls on an interrupt and the count value overflows, the count value is reset;

[0017] In response to the offset write command sent by the host computer, remove the most significant bit of the offset data, store the SDA status value corresponding to the offset write command into the least significant bit of the offset, and exit the current interrupt;

[0018] When the count value is the termination value, a first response signal indicating that the offset configuration is complete is sent back to the host computer. After receiving the first response signal, the host computer sends the read command.

[0019] In one embodiment, the MCU includes data for storing SDA status values; prior to the step of resetting the count value when the MCU responds to a write instruction from the host computer, the SCL falls on an interrupt, and the count value overflows, the method for reading the extended display identifier further includes:

[0020] In response to the target instruction sent by the host computer, obtain the SDA status value corresponding to the target instruction;

[0021] When the SCL rising edge interrupt occurs, the most significant bit of the data is removed, and the SDA status value is stored in the least significant bit of the data, and the current interrupt is exited;

[0022] When the SCL falling edge interrupts, the count value is the termination value, and the value of data is the value corresponding to the write instruction, a second response signal is sent back to the host computer to respond to the write instruction.

[0023] In one embodiment, the step of determining the EDID storage address based on the digital dial switch includes:

[0024] Obtain the preset correspondence between the digital DIP switch and the EDID storage address;

[0025] Based on the preset correspondence, the EDID storage address corresponding to the digital DIP switch is determined.

[0026] In one embodiment, before the step of obtaining the digital DIP switch output by the digital DIP switch module when the MCU is powered on, the method for reading the extended display identifier further includes:

[0027] Set the number of DIP switches in the digital DIP module to the total number corresponding to multiple EDID groups;

[0028] Obtain the EDID storage address storing the multiple sets of EDIDs, and establish the preset correspondence between the digital DIP switch and the EDID storage address based on the starting bit of the EDID storage address, wherein the starting bit of the EDID storage address is equal to the padding value of the digital DIP switch.

[0029] In one embodiment, the step of reading the EDID corresponding to the digital DIP switch in the memory area according to the EDID storage address and feeding the EDID back to the host computer further includes:

[0030] Read the EDID corresponding to the digital DIP switch in the memory area according to the EDID storage address;

[0031] The EDID is written to the E2PROM, and an offset write command is sent back to the host computer so that the host computer can read the EDID from the E2PROM.

[0032] In one embodiment, the step of obtaining the digital DIP switch output by the digital DIP switch module when the MCU is powered on includes:

[0033] Obtain the switching values ​​of the digital DIP switch module's switching devices when the MCU is powered on, and thus obtain the digital DIP switch; or

[0034] The system acquires the DIP switch information received when the MCU is powered on and controls the digital DIP switch module to output the DIP switch information.

[0035] In addition, to achieve the above objectives, this application also proposes an electronic device comprising: a shared driver board, a memory, a processor, and a computer program stored on the memory and executable on the processor, the computer program being configured to implement the steps of the extended display identifier reading method as described above.

[0036] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the extended display identifier reading method as described above.

[0037] One or more technical solutions proposed in this application have at least the following technical effects:

[0038] By storing multiple sets of Extended Display Identifiers (EDIDs) in the memory area of ​​the microcontroller unit (MCU) on the shared driver board, the need for repeated programming is avoided. Simultaneously, based on the digital DIP switch module configured in the MCU, the system acquires the digital DIP switch output when the MCU powers on, determines the EDID storage address based on the fill value of the digital DIP switch, and then reads the corresponding EDID from the memory area and feeds it back to the host computer. This allows the shared driver board to flexibly adapt to the EDID requirements of different display devices without needing to reprogram the EDID when the display device is changed, effectively improving the compatibility and ease of use of the shared driver board and overcoming the limitations of traditional EDID storage methods that are difficult to adapt to multiple display devices. Attached Figure Description

[0039] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 A diagram showing the optional connection relationships between the shared driver board, the host computer, and the display device for the extended display identifier reading method of this application;

[0042] Figure 2 A connection architecture diagram of the shared driver board, host computer, and display device provided in this application;

[0043] Figure 3 A flowchart illustrating the first embodiment of the method for reading the extended display identifier in this application;

[0044] Figure 4 A flowchart illustrating the second embodiment of the method for reading the extended display identifier in this application;

[0045] Figure 5 A flowchart illustrating the third embodiment of the method for reading the extended display identifier in this application;

[0046] Figure 6 This is a flowchart illustrating the signaling interaction between the host computer and the slave device (MCU) in this application, where offsets are written and read confirmation commands are acknowledged via the DDC protocol.

[0047] Figure 7 A schematic diagram of clock state transitions when the MCU provided in this application is used as a slave device;

[0048] Figure 8 A timing diagram illustrating the MCU provided in this application when it is used as a slave device;

[0049] Figure 9 This is a schematic diagram of the device structure of the hardware operating environment involved in the extended display identifier reading method in the embodiments of this application.

[0050] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0051] It should be understood that the specific embodiments described herein are merely illustrative of the technical solutions of this application and are not intended to limit this application.

[0052] To better understand the technical solution of this application, a detailed description will be provided below in conjunction with the accompanying drawings and specific implementation methods.

[0053] In related technologies, an E2PROM (a type of non-volatile memory) is typically placed on the driver board to store EDID information. An E2PROM can only store one type of EDID information. In scenarios where multiple display devices share a driver board, when the display device is changed, such as from a 540P display to a 720P display, the 720P EDID information needs to be re-programmed into the E2PROM. Therefore, when frequent switching of display devices is required, frequent EDID programming operations are necessary, leading to increased costs.

[0054] The main solution of this application embodiment is: to obtain the digital DIP switch output by the digital DIP switch module when the MCU is powered on;

[0055] The EDID storage address is determined based on the fill value of the digital DIP switch;

[0056] The EDID corresponding to the digital DIP switch in the memory area is read according to the EDID storage address, and the EDID is fed back to the host computer.

[0057] Specifically, by storing multiple sets of Extended Display Identifiers (EDIDs) in the memory area of ​​the microcontroller unit (MCU) on the shared driver board, repeated programming is avoided. Simultaneously, based on the digital DIP switch module configured in the MCU, the system acquires the digital DIP switch output when the MCU powers on, determines the EDID storage address based on the fill value of the digital DIP switch, and then reads the corresponding EDID from the memory area and feeds it back to the host computer. This allows the shared driver board to flexibly adapt to the EDID requirements of different display devices, eliminating the need to reprogram EDIDs when changing display devices. This effectively improves the compatibility and ease of use of the shared driver board, overcoming the limitations of traditional EDID storage methods that are difficult to adapt to multiple display devices.

[0058] It should be noted that the execution subject of this embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, personal computer, mobile phone, etc., or an electronic device that can realize the above functions.

[0059] In this embodiment, the electronic device is a shared driver board, wherein the connection relationship between the shared driver board, the host computer, and the display device is as follows: Figure 1 As shown, this shared driver board is capable of simultaneously managing multiple input sources, such as host 1 and host 2, and multiple outputs, such as display 1, display 2, and projectors. The shared driver board includes a bridge chip, an MCU, and a digital DIP switch module. The bridge chip receives and transmits video signal sources, the MCU processes interactive signals from the host computer, and the digital DIP switch module determines the current digital DIP switch.

[0060] Furthermore, the MCU's memory area stores multiple sets of Extended Display Identifiers (EDIDs). That is, a storage space is allocated within the MCU to store multiple sets of EDID information. The MCU establishes a correspondence between the DIP switch values, the starting storage address of the EDID, and the parameters of the display device, ensuring that different DIP switch values ​​uniquely correspond to the display device parameters and the EDID storage address. For example, when the padding value is 2, the EDID storage address is determined to be addr2, and the display device parameter corresponding to this EDID information is 720P.

[0061] It is understood that allocating storage space to store multiple sets of EDID information is existing technology, and this application does not limit it here.

[0062] As an optional implementation, the connection mechanism between the shared driver board, the host computer, and the display device is as follows: Figure 2 As shown, the PC is connected to the bridge chip. The PC outputs an HDMI (High Definition Multimedia Interface) video signal to the bridge chip, while the bridge chip sends an HDMI HPD (Hot Plug Detect) signal back to the PC. When the PC is connected to the MCU, it can output an HDMI +5V power signal to the MCU. Simultaneously, the MCU's GIPO0 is connected to DDC_SCL, labeled as the SCL channel; GPIO1 is connected to DDC_SDA, labeled as the SDA channel. This means the MCU connects to the host PC based on the DDC (Display Data Channel) communication protocol. SCL is a unidirectional clock signal used for data synchronization, output by the PC; SDA is a bidirectional data signal used for data transmission.

[0063] The digital DIP switch module is preferably a digital DIP switch. The MCU can determine the current digital DIP fill value by acquiring the largest value of the digital DIP switch. For example, if the fill value of the DIP switch is 1, the acquired value will be 1. The bridge chip outputs a MIPI / LVDS (Mobile Industry Processor Interface, a high-speed, serial, packet-based display interface standard / / Low Voltage Differential Signaling) target video signal to the display device, so that the display device can display based on the target video signal.

[0064] based on Figure 1 and Figure 2 The present application provides a method for reading an extended display identifier, as shown in the following embodiment. Figure 3 , Figure 3 This is a flowchart illustrating the first embodiment of the method for reading the extended display identifier in this application.

[0065] In this embodiment, the method for reading the extended display identifier includes steps S10 to S30:

[0066] Step S10: Obtain the digital DIP switches output by the digital DIP switch module when the MCU is powered on.

[0067] The digital DIP module is preferably a DIP switch device, which switches the on / off state of the circuit by moving a small slider or lever on its surface. In this embodiment, the EDID is switched by moving the switch. The digital DIP code is a specific numerical value, such as 1, 2, 3...N.

[0068] Optionally, the digital DIP switch module can also be used as a storage module. The PC and MCU communicate via a USB interface to transmit DIP switch value information, and store the DIP switch value when the device is powered on into the digital DIP switch module.

[0069] As an optional implementation, the switching values ​​of the digital module's switching devices when the MCU is powered on can be directly obtained to obtain the digital DIP switch. For example, in the DIP switch device, if the third switch is on, the DIP switch value output by the digital DIP module is 3. It is understood that the on state of the DIP switch device can be represented in binary form, and the specific representation is not limited in this application.

[0070] Optionally, the DIP switch information received when the MCU is powered on can also be obtained. This DIP switch information is sent by the host computer and then controlled to output the DIP switch information by the digital DIP switch module.

[0071] By acquiring the digital DIP switch to determine the EDID object to be read, the host computer outputs the video stream with the corresponding display parameters.

[0072] Step S20: Determine the EDID storage address according to the digital DIP switch.

[0073] In this embodiment, the decimal value corresponding to the digital DIP switch is associated with the storage location of the EDID in memory. The EDID storage address refers to the starting storage address of each group of EDID data in the shared driver board MCU memory area, through which the corresponding EDID data can be located and accessed.

[0074] Specifically, a correspondence between digital DIP switches and EDID storage addresses can be pre-established. This correspondence can include calculation relationships, mapping relationships, etc., and the EDID storage address corresponding to the digital DIP switch can be determined based on this correspondence. For example, the output digital DIP switch can be substituted into a preset formula to calculate the EDID storage address; or the output digital DIP switch can be used to query a pre-set mapping table to obtain the EDID storage address.

[0075] Step S30: Read the EDID corresponding to the digital DIP switch in the memory area according to the EDID storage address, and send the EDID back to the host computer.

[0076] It should be noted that you should continue to refer to... Figure 2 Without using E2PROM, for the host computer to obtain EDID information from the MCU, the process of obtaining EDID, i.e., the EDID data transmission protocol, must conform to the DDC communication protocol. Specifically, the host computer obtains EDID only through the DDC protocol. Therefore, when the MCU reads the EDID and feeds it back to the host computer, it must simulate the behavior of a DDC slave device so that the host computer recognizes it as a legitimate device.

[0077] Therefore, the MCU on the shared driver board acts as a slave, and the data transmission process is the same as the actual signal transmission process. During data transmission, it needs to detect the DDC read command sent by the host computer, and then, based on this command, sequentially read single-byte information of the EDID from the memory area (e.g., one byte of data). This single-byte information is then fed back to the host computer, and so on, until the last byte of data is transmitted to the host computer, completing the EDID transmission. It can be understood that if the EDID information is 128 bytes, and one byte is transmitted each time, then it needs to be transmitted to the host computer 128 times.

[0078] It is understandable that the DDC protocol is an industry-specific protocol based on I2C. However, the I2C (Inter-Integrated Circuit, chip-level low-speed synchronous serial bus) protocol has a data packet length limit for a single read / write operation, while the EDID standard length is 128 bytes or 256 bytes. Therefore, EDID needs to be transmitted in multiple steps. On the I2C bus, data is transmitted in bytes (8 bits), so in this embodiment, one byte is transmitted at a time.

[0079] Optionally, in specific scenarios, the host computer can selectively obtain the EDID segment of a specific display device. Therefore, the host computer typically sends an offset to the slave device. The MCU determines the starting position for transmitting the EDID information to the host computer based on this offset. For example, if the offset is 5, then reading starts from the 5th byte, and the number of transmissions is 123.

[0080] It should be noted that the parameters appearing in this embodiment are for illustrative purposes only and are not intended to limit this application.

[0081] Optionally, if the E2PROM is retained, when the MCU is powered on, the corresponding EDID information can be written to the E2PROM by the MCU according to the acquired digital DIP switch. Then the host computer can obtain the EDID information from the E2PROM. In this way, the MCU can store multiple sets of EDID information without burning the EDID information to the E2PROM.

[0082] Therefore, in another optional implementation, the EDID corresponding to the digital DIP switch in the memory area can be read according to the EDID storage address, and then the EDID can be written to the E2PROM. The offset write instruction can be fed back to the host computer so that the host computer can read the EDID information from the E2PROM.

[0083] This embodiment provides a method for reading extended display identifiers. After the device is powered on, the MCU first obtains the DIP switch value, and then sets the corresponding EDID starting storage address as the address to be read according to the DIP switch value. When the host computer initiates a read command, the EDID information of the current address to be read is sent to the host computer in sequence, thereby completing the acquisition of EDID information. Based on this, when it is necessary to switch between different display devices, only the DIP switch value needs to be reset to obtain the EDID information of the new device. This allows the shared driver board to adapt to multiple sets of EDIDs without re-programming, which not only improves the compatibility of the driver board with different display devices, but also simplifies the operation process when changing devices, avoids the need for frequent EDID information programming, improves processing efficiency, and reduces costs.

[0084] Based on the first embodiment of this application, in the second embodiment of this application, the same or similar content as the first embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, it is necessary to read EDID information based on the offset; therefore, please refer to... Figure 4 Step S30 also includes steps S31 to S33:

[0085] Step S31: In response to the read command from the host computer, determine the position to be read in the EDID storage address according to the offset written by the host computer.

[0086] When the host computer reads EDID data through the DDC protocol, it informs the MCU by using a combination of write offset and read data instructions, so that the MCU can read the data based on the offset.

[0087] Therefore, after the MCU responds to the read command from the host computer, it can determine the position to be read in the EDID storage address based on the offset written by the host computer. For example, if the offset is 50, then the 50th byte in the EDID storage address will be used as the byte to be sent.

[0088] Step S32: Send byte data of a preset byte size to the host computer based on the position to be read.

[0089] In this embodiment, the offset increments based on a preset byte size. For example, if the preset byte size is 1 byte, the offset increments by 1 after the 50th byte is read and sent, so that the MCU continues to receive unsent byte information.

[0090] Step S33: In response to the target response signal from the host computer, if there are unsent bytes in the EDID storage address, execute the step of determining the position to be read in the EDID storage address based on the offset written by the host computer.

[0091] In this embodiment, the host computer sends an acknowledgment signal each time the MCU sends data, informing the MCU that the current byte information has been received. Upon receiving this acknowledgment signal, the MCU checks if there are any unsent bytes at the current storage address. If so, it repeats step S31 based on an incrementing offset until all bytes in the EDID storage address have been transmitted to the host computer. It is understood that the offset increments each time the MCU transmits a byte of data; therefore, each time step S31 is executed, the MCU locates the new byte data to be transmitted and transmits it to the host computer.

[0092] This embodiment provides a method for reading extended display identifiers (EDIDs). During the process of acquiring the EDID and sending it back to the host computer, the communication flow adapts to the DDC communication protocol. After responding to the host computer's read command, data is transmitted. A block transmission method based on a preset byte size and auto-incrementing offset avoids signal interference or transmission interruptions caused by transmitting large amounts of data at once, adapting to communication environments with different bandwidths. After receiving the target response signal, unsent bytes are cyclically retransmitted to ensure that every byte of EDID data is accurately received by the host computer. This guarantees that the host computer can obtain complete and accurate EDID information, thereby precisely adapting to the characteristic parameters of the display device.

[0093] Based on the second embodiment of this application, in the third embodiment of this application, the same or similar content as the second embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, before sending a read command, the host computer will also send a write command to the MCU so that the MCU can confirm the offset of the EDID storage address to be read. The MCU is connected to the display data channel and the host computer's serial clock line SCL, as well as the serial data line SDA. When an interrupt occurs on the falling edge of SCL, the counter starts counting. Therefore, please refer to... Figure 5 Before step S31, steps A01 to A03 are also included:

[0094] Step A01: When the MCU responds to the write instruction from the host computer, the SCL is interrupted on the falling edge, and the count value is an overflow value, the count value is reset.

[0095] A counter typically includes an initial value, a count value, a stop value, and an overflow value. For example, in counters 0-8, 0 is the initial value, 1-6 are the count values, 7 is the stop value, and 8 is the overflow value. On the I2C bus, data is transmitted in bytes (8 bits), so counters are set to 0-7 as valid count values ​​and 8 as the overflow value.

[0096] When the host computer reads the EDID, it needs to write the offset before executing the read command. In normal interaction logic, the host computer first sends a command, then the MCU, upon parsing the command as a write command, sends a response message to the host computer. Finally, the host computer writes the offset information based on the response message, and the MCU writes the offset normally at this time.

[0097] Therefore, in this embodiment, when the MCU responds to an instruction, it temporarily stores a acquired SDA status value. It captures 1 bit of information each SCL cycle, meaning data is acquired during each SCL rising edge interrupt, and the complete byte is stored after 8 clock cycles. Then, after the SCL falling edge interrupt, the counter value changes from 0 to 8. At this point, the byte consisting of the 8 temporarily stored SDA status values ​​is the byte corresponding to the write instruction. The MCU sends an acknowledgment message to the host computer to respond to the instruction, and then resets the counter value.

[0098] Step A02: In response to the offset write command sent by the host computer, remove the highest bit of the offset data, store the SDA status value corresponding to the offset write command into the lowest bit of the offset, and exit the current interrupt.

[0099] In this embodiment, after resetting the counter value, it indicates that the MCU can be written with complete byte information. At this point, the host computer can write the offset into the MCU. For the MCU, the receiving process also requires 8 clock cycles to complete, and the offset is an 8-bit binary number. Therefore, when receiving the offset in each SCL clock cycle, the most significant bit of the offset needs to be removed, and then the SDA status value corresponding to the offset writing instruction is stored in the least significant bit of the offset. Then, the current interrupt is exited to respond to the next interrupt and avoid interrupt nesting.

[0100] Step A03: When the count value is the termination value, a response signal indicating that the offset configuration is complete is sent back to the host computer. After receiving the response signal, the host computer sends the read command.

[0101] In this embodiment, when the counter changes from 0 to 7 in the reset bit, the MCU completes the writing of 8 bits of SDA status value. At this time, it sends an acknowledgment signal to the host computer indicating that the offset configuration is complete, so that the host computer sends a read command and reads the EDID starting from the offset.

[0102] For example, please refer to Figure 6 , Figure 6This describes the process of writing offsets and confirming read commands between the host computer and the slave device (MCU) via the DDC protocol. First, in stage 1, the offset is set (write operation). In step 1, START + offset 0x36, the host computer pulls the SDA line low, making SCL high, and then generates a START signal, sending a bit stream of offset 0x36 (00110110). During this time, the MCU samples the SDA state on each rising edge of SCL, incrementing the counter from 0 to 7, collecting 1 bit of data each time. After receiving 8 bits, the offset is written, and the MCU internally buffers the offset. Then, in step 2, the MCU returns an ACK signal by pulling SDA low during the SCL high period to generate the ACK signal. The host computer detects that SDA has been pulled low and confirms successful byte transmission. If the MCU does not pull SDA low, the host computer terminates the transmission and determines a device malfunction. Understandably, since the MCU has already determined the EDID storage address through digital DIP switches, the host computer only needs to send the offset when it needs to read the EDID, without having to send the storage address separately.

[0103] In phase 2, after sending the memory offset, the host computer switches to read operation, regenerates the RepeatedSTART signal, and sends the address 0xA1 of the read instruction to the MCU for parsing. After the MCU parses the address, it pulls SDA low during the SCL high level to return an ACK signal.

[0104] It should be noted that in this embodiment, the feedback response signal is generated by the MCU setting the SDA pin to output a low level. In the low level state, the MCU returns an ACK signal. When the host computer receives this signal, it will interpret it as "byte received" so that the host computer can confirm that the MCU is working properly.

[0105] This embodiment provides a method for reading extended display identifiers. Before sending the EDID to the host computer, the EDID bytes are sent directly from the offset position by writing the offset, thereby skipping useless data and avoiding the need to read byte by byte starting from 0x00, thus improving the transmission efficiency of the EDID.

[0106] Based on the third embodiment of this application, in the fourth embodiment of this application, the same or similar content as the third embodiment can be referred to the above description, and will not be repeated hereafter. On this basis, the MCU includes data for storing the SDA status value. When the host computer sends an instruction, it receives the SDA status value based on the data, and then determines whether the instruction is a write instruction based on the finally received 8-bit data. Therefore, before step A01, steps A04~A05 are also included:

[0107] Step A04: Respond to the target instruction sent by the host computer and obtain the SDA status value corresponding to the target instruction.

[0108] Step A05: When the SCL rising edge interrupts, remove the most significant bit of the data, store the SDA status value in the least significant bit of the data, and exit the current interrupt.

[0109] Step A06: When the SCL is interrupted on the falling edge, the count value is the termination value, and the value of data is the value corresponding to the write instruction, a second response signal is sent to the host computer to respond to the write instruction.

[0110] In this embodiment, after responding to the target instruction sent by the host computer, the SDA status value corresponding to the target instruction is directly obtained. During each clock cycle's rising SCL interrupt, the most significant bit of the `data` parameter is removed, the read SDA status value is stored in the least significant bit of `data`, and the current interrupt is exited to respond to subsequent interrupts, avoiding interrupt nesting. In clock cycles 0-7, a total of 8 data removal operations are performed, at which point the value stored in `data` corresponds to the target instruction. Therefore, during the falling SCL interrupt, the counter value is the termination value, and the value of `data` corresponds to the write instruction, indicating that the target instruction is a write instruction. At this time, the MCU sends a second response signal to the host computer to respond to the write instruction, enabling the host computer to perform the offset write operation. The second response signal also refers to the MCU setting the SDA pin to a low output level.

[0111] Furthermore, based on the same processing method, when the target instruction sent by the host computer is a read instruction, the MCU also receives the SDA status value corresponding to the instruction based on data. After 8 clock cycles, when the value of data is the value corresponding to the read instruction, the MCU sends a third acknowledgment signal back to the host computer to respond to the read instruction. After responding to the read instruction, the data in the EDID storage address is sequentially output to the host computer according to the position of the received offset. Sending one byte of data also requires 8 clock cycles. At the same time, the host computer sends an acknowledgment signal after sending each byte of data to inform the MCU that the current data has been received. In this way, the remaining data is sent continuously based on the auto-incrementing offset until the data is sent completely. After the data is sent completely, SDA changes from low to high. When the SCL rising edge interrupts and SDA is high, the data reading ends.

[0112] For example, to help understand the implementation flow of the extended display identifier reading method obtained by combining the second and third embodiments described above, please refer to the figure. Figure 7A clock state transition diagram is provided for a method of reading extended display identifiers. Specifically: In the preconditions, the MCU's SCL pin is set to input and edge detection is enabled, i.e., rising and falling edge interrupts. SDA status information (high or low level) is acquired during the SCL rising edge interrupt. A counter counts during the SCL falling edge interrupt, and the MCU's SDA pin is initially set to input. A counter is set, which increments by 1 on the falling edge of SCL, with a counting range of 0 to 8. After counting to 8, it restarts from 0. Simultaneously, a 1-byte variable `data` and an `offset` are set. `data` stores the 8 SDA status values ​​acquired by the MCU (1 byte = 8 bits); `offset` is the offset of the EDID information, i.e., which byte in the 128 bytes of EDID to start reading from. The write instruction value is A0, and the read instruction value is A1. Based on this, the slave implementation steps for the host computer to read EDID information from the MCU are as follows:

[0113] 1. S_IDLE state: Set up a state machine. After the system is powered on, the state machine is in the S_IDLE state.

[0114] 2. S_ADDR State: When an interrupt occurs on the falling edge of SCL (i.e., when the host computer sends a command), the counter value is set to 0, and the system jumps to the S_ADDR state. In the ADDR state, when an interrupt occurs on the rising edge of SCL, the data is first shifted left by 1 bit, discarding the overflowing highest bit, and then the acquired SDA status value is placed in the lowest bit of the data. After completion, the system immediately exits this interrupt to respond to the next interrupt and avoids interrupt nesting. In the ADDR state, when an interrupt occurs on the falling edge of SCL, the counter is incremented by 1. After completion, the system immediately exits this interrupt to respond to the next interrupt and avoids interrupt nesting.

[0115] 3. S_ACK1 state: When the SCL falling edge interrupts and the count value is 7 and the data value is equal to A0, it indicates that the received data value has been confirmed as the write instruction value within 8 clock cycles. At this time, it jumps to the S_ACK1 state. In the S_ACK1 state, the SDA pin is set to output low level as an acknowledgment of receiving 1 byte of host data, and the counter continues to increment by 1. If the count value is 7 but the data value is not equal to A0, it indicates that there may be an abnormality in the MCU or an error in the host computer instruction. At this time, it jumps back to the S_IDLE state.

[0116] 4. S_REG State: After the processing action in S_ACK1 state, when the host computer sends an offset write command causing an interrupt on the falling edge of SCL and the count value is 8, the count value is set to 0 and the computer jumps to the S_REG state. After entering the S_REG state, the SDA pin is set to the input state, and the shift amount is written at the same time. The offset writing process is the same as the data writing process in the S_ADDR state. Finally, the received value is marked as offset.

[0117] 5. S_ACK2 state: When SCL is interrupted on the falling edge and the count value is 7, the reception of 8 bits of offset data is completed, and then it jumps to the S_ACK2 state; in the S_ACK2 state, the SDA pin is set to output low level as an acknowledgment after receiving 1 byte of host computer data, and the counter is still incremented by 1.

[0118] 6. S_RS state: After processing an action in the S_ACK2 state, if SCL is a falling edge interrupt and the calculated value is 8, the count value is set to 0, and the system jumps to the S_RS state. In this state, no action is performed, and the system waits for instructions from the host computer.

[0119] 7. S_READ state: When the SCL falling edge interrupts and the count value is 0, it jumps to the S_READ state. In this state, the count value starts counting again from 0, and the operation in the S_ADDR state is repeated to reacquire 1 byte of complete data, thereby confirming the instruction sent by the host computer.

[0120] 8. S_ACK3 state: When SCL is interrupted on the falling edge and the count value is 7, that is, after the data reception is completed in the S_READ state, it jumps to the S_ACK3 state when it is confirmed that data equals A1; in the S_ACK3 state, the SDA pin is set to output low level as an acknowledgment of receiving 1 byte of host data, and the counter is still incremented by 1;

[0121] 9. S_DATA State: When SCL is interrupted on the falling edge and the count value is 8, the count value is set to 0 and the system jumps to the S_DATA state. After entering the S_DATA state, the SDA pin is set to output, and when SCL is interrupted on the falling edge, the byte data stored in the EDID storage address is output in the order of high byte first and low byte last, based on the position corresponding to the offset.

[0122] 10. S_ACK4 State: When SCL is interrupted on the falling edge and the count value is 7, after one byte is sent, it jumps to the S_ACK4 state. In this state, the counter increments by 1, and the SDA pin is set as an input to receive the acknowledgment signal sent by the host. When SCL is interrupted on the rising edge and SDA is found to be low, it jumps back to the S_DATA state, and the offset increments by itself to read the next data in the EDID storage address. Repeat steps 9 and 10 until a set of EDID information is transmitted.

[0123] 11. S_STOP state: In S_ACK4 state, when the SCL rising edge interrupt detects that SDA is high, it indicates that the host computer has finished reading a data once, and then jumps to S_STOP state, and then jumps to S_IDLE state to wait for subsequent instructions.

[0124] Furthermore, regarding the timing logic, please refer to... Figure 8 In the S_IDLE state, the slave device waits for a command to be triggered. Then, in the S_ADDR state, it responds to the master's command A0 (write address A0) written via the DDC protocol. The slave then generates an acknowledgment signal in the S_ACK1 state, enters the S_REG state, receives the byte to be written at offset, and outputs a second acknowledgment signal in the S_ACK2 state. It then jumps to the S_RS state to wait for subsequent read commands. When the master reads command A1 (read address A1) via the DDC protocol, the slave responds to the command in the S_READ state, completes the read command identification, and outputs a third acknowledgment signal in the S_ACK3 state. Subsequently, in the S_DATA state, data is read and sent. After sending one byte of data, in the S_ACK4 state, the master outputs an acknowledgment signal to the slave to confirm that the data has been read. This process in the S_DATA state is repeated until all data is read. Finally, based on the non-acknowledgment signal generated by the master in the S_ACK4 state, the slave enters the S_STOP state, thus completing the EDID information reading.

[0125] Based on this, the MCU acts as a slave device and the host computer for data interaction. Without using E2PROM to store EDID information, the MCU, as a slave device, responds to the instructions sent by the host computer through the DDC channel and sends the EDID information to the host computer based on the relevant instructions. This enables EDID reading when the MCU stores multiple EDID information, so that in scenarios where display devices are frequently replaced, there is no need to repeatedly burn EDID, reducing costs and improving processing efficiency.

[0126] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the reading method of the extended display identifier of this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0127] Based on the first embodiment of this application, in the fifth embodiment of this application, the content that is the same as or similar to the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, step S20 includes steps S21-S22:

[0128] Step S21: Obtain the preset correspondence between the digital dial switch and the EDID storage address.

[0129] In this embodiment, the preset correspondence can be specifically set in the MCU program.

[0130] The preset correspondence can be a fixed relationship that is set in advance, such as setting ten EDID information, and the storage address of each EDID information is bound to a digital dial switch.

[0131] Therefore, the preset correspondence between the digital DIP switch and the EDID storage address can be directly found from the stored information.

[0132] Step S22: Determine the EDID storage address corresponding to the digital dial switch according to the preset correspondence.

[0133] In this embodiment, when the preset correspondence is a mapping table, the mapping table can be queried to output the EDID storage address that matches the digital DIP switch. When the preset correspondence is a relational expression, the digital DIP switch can be substituted into the relational expression to obtain the corresponding EDID storage address.

[0134] In this embodiment, by pre-setting a correspondence between digital DIP switches and EDID storage addresses, the address of the EDID information to be read can be accurately determined when a digital DIP switch is received or a switching device executes a digital DIP switch, thereby improving the accuracy and effectiveness of EDID reading.

[0135] Furthermore, the preset correspondence is a mapping table stored in the MCU that is preset by the user. Therefore, before step S10, it is necessary to set the number of DIP switches in the digital DIP module to the total number corresponding to multiple EDIDs. For example, if there are ten EDID storage addresses, there are ten corresponding DIP switches. The digital DIP switches can be set to 1-10, or other numbers can be set. This application does not limit this. Subsequently, the EDID storage addresses storing multiple EDIDs are obtained, and a preset correspondence between the digital DIP switches and the EDID storage addresses is established based on the starting bit of the EDID storage address. In this correspondence, the starting bit of the EDID storage address and the padding value of the digital DIP switch are equal. For example, the mapping relationship is as follows:

[0136]

[0137] As can be seen, the starting bit of the EDID storage address is the same as that of the digital DIP switch, which makes it easy to query the storage address corresponding to the digital DIP switch.

[0138] This application provides an electronic device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the extended display identifier reading method in the first embodiment described above.

[0139] The following is for reference. Figure 9 It shows a schematic diagram of the structure of an electronic device suitable for implementing the embodiments of this application. Figure 9 The electronic device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0140] like Figure 9As shown, the electronic device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the electronic device. The processing unit 1001, the ROM 1002, and the RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the input / output interface 1006: input devices 1007 including, for example, a touchscreen, touchpad, keyboard, mouse, image sensor, microphone, accelerometer, gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), speaker, vibrator, etc.; storage devices 1003 including, for example, magnetic tape, hard disk, etc.; and communication devices 1009. Communication device 1009 allows electronic devices to communicate wirelessly or wiredly with other devices to exchange data. While electronic devices with various systems are shown in the figures, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.

[0141] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from read-only memory 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0142] The electronic device provided in this application, employing the extended display identifier reading method in the above embodiments, can solve the technical problem of increased costs caused by frequent EDID burning operations when multiple display devices share a driver board and frequent switching of display devices is required. Compared with the prior art, the beneficial effects of the electronic device provided in this application are the same as those of the extended display identifier reading method provided in the above embodiments, and other technical features of this electronic device are the same as those disclosed in the method of the previous embodiment, and will not be repeated here.

[0143] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.

[0144] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0145] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute the extended display identifier reading method in the above embodiments.

[0146] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory, read-only memory, erasable programmable read-only memory (EPROM, or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, radio frequency (RF), etc., or any suitable combination thereof.

[0147] The aforementioned computer-readable storage medium may be included in an electronic device or may exist independently without being assembled into an electronic device.

[0148] The aforementioned computer-readable storage medium carries one or more programs, which, when executed by an electronic device, cause the electronic device to: acquire the digital DIP switch output by the digital DIP switch module when the MCU is powered on;

[0149] The EDID storage address is determined based on the fill value of the digital DIP switch;

[0150] The EDID corresponding to the digital DIP switch in the memory area is read according to the EDID storage address, and the EDID is fed back to the host computer.

[0151] Computer program code for performing the operations of this application can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0152] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0153] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.

[0154] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described method for reading the extended display identifier. This solves the technical problem of increased costs due to frequent EDID burning operations when multiple display devices share a driver board and frequent switching between display devices is required. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as those of the extended display identifier reading method provided in the above embodiments, and will not be repeated here.

[0155] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.

Claims

1. A method for reading an extended display identifier, characterized in that, This is applied to a shared driver board, where the microcontroller unit (MCU) of the shared driver board stores multiple sets of extended display identifiers (EDIDs) in its memory area. The MCU is equipped with a digital DIP switch module, and the method for reading the extended display identifiers includes: The digital DIP switch output by the digital DIP switch module is obtained when the MCU is powered on. The MCU is connected to the host computer via the serial clock line SCL and the serial data line SDA based on the display data channel. When the SCL falls and is interrupted, the counter counts. The EDID storage address is determined based on the digital dial switch; When the MCU responds to the write command from the host computer, the SCL falls on an interrupt and the count value overflows, the count value is reset; In response to the offset write command sent by the host computer, remove the highest bit of the offset data, store the SDA status value corresponding to the offset write command into the lowest bit of the offset, and exit the current interrupt; When the count value is the termination value, a first response signal indicating that the offset configuration is complete is sent back to the host computer. After receiving the first response signal, the host computer sends a read command. In response to the read command from the host computer, the position to be read in the EDID storage address is determined according to the offset written by the host computer; Based on the position to be read, a byte of data of a preset size is sent to the host computer, wherein the offset increments automatically based on the preset size. In response to the target response signal from the host computer, if there are unsent bytes at the EDID storage address, the step of determining the position to be read in the EDID storage address based on the offset written by the host computer is executed.

2. The method for reading the extended display identifier as described in claim 1, characterized in that, The MCU includes data for storing SDA status values; prior to the step of resetting the count value when the MCU responds to the write instruction from the host computer, the SCL falls on an interrupt, and the count value overflows, the method for reading the extended display identifier further includes: In response to the target instruction sent by the host computer, obtain the SDA status value corresponding to the target instruction; When an interrupt occurs on the rising edge of SCL, the most significant bit of the data is removed, and the SDA status value is stored in the least significant bit of the data, and the current interrupt is exited. When the SCL falling edge interrupts, the count value is the termination value, and the value of data is the value corresponding to the write instruction, a second response signal is sent back to the host computer to respond to the write instruction.

3. The method for reading the extended display identifier as described in claim 1, characterized in that, The step of determining the EDID storage address based on the digital dial switch includes: Obtain the preset correspondence between the digital DIP switch and the EDID storage address; Based on the preset correspondence, the EDID storage address corresponding to the digital DIP switch is determined.

4. The method for reading the extended display identifier as described in claim 3, characterized in that, Before the step of obtaining the digital DIP switch output by the digital DIP switch module when the MCU is powered on, the method for reading the extended display identifier further includes: Set the number of DIP switches in the digital DIP module to the total number corresponding to multiple EDID groups; Obtain the EDID storage address storing the multiple sets of EDIDs, and establish the preset correspondence between the digital DIP switch and the EDID storage address based on the starting bit of the EDID storage address, wherein the starting bit of the EDID storage address is equal to the padding value of the digital DIP switch.

5. The method for reading the extended display identifier as described in claim 1, characterized in that, After the step of determining the EDID storage address based on the digital dial switch, the method for reading the extended display identifier further includes: Read the EDID corresponding to the digital DIP switch in the memory area according to the EDID storage address; The EDID is written to the E2PROM, and an offset write command is sent back to the host computer so that the host computer can read the EDID from the E2PROM.

6. The method for reading the extended display identifier as described in claim 1, characterized in that, The step of obtaining the digital DIP switch output by the digital DIP switch module when the MCU is powered on includes: Obtain the switching values ​​of the digital DIP switch module's switching devices when the MCU is powered on, and thus obtain the digital DIP switch; or The system acquires the DIP switch information received when the MCU is powered on and controls the digital DIP switch module to output the DIP switch information.

7. An electronic device, characterized in that, The electronic device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the method for reading the extended display identifier as claimed in any one of claims 1 to 6.

8. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the method for reading the extended display identifier as described in any one of claims 1 to 6.

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