Voltage equalizing device, driving chip and power supply equipment
The voltage of the DC bus capacitor of the cascaded power module is adjusted through the voltage balancing device and the control module. The iron core energy exchange and bidirectional charge and discharge circuit are utilized to solve the problems of complex algorithms and high costs in the existing technology, and achieve efficient and reliable voltage balancing effect.
Patent Information
- Application Number
- CN202410412815.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-07
- Publication Date
- 2025-10-14
AI Technical Summary
The existing active voltage balancing solutions for cascaded multi-level modules are complex and costly, while traditional passive voltage balancing methods increase heat dissipation difficulty and efficiency loss. Existing technologies have limited voltage balancing capabilities and poor reliability under light or no-load conditions.
A voltage balancing device is used to adjust the voltage of each DC bus capacitor, and voltage balancing is achieved through the voltage balancing module and control module. The iron core is used for energy exchange to avoid power circulation and complex algorithms, and a bidirectional charge and discharge circuit is used for voltage balancing.
It achieves low-cost, high-efficiency voltage balancing between cascaded power modules, improves system reliability and voltage balancing capability, and reduces system complexity and heat dissipation requirements.
Smart Images
Figure CN120785148A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of power supply technology, and in particular to a voltage balancing device, a driver chip, and a power supply device. Background Art
[0002] As the green energy wave sweeps the globe, power electronics are increasingly demanding higher power levels and voltages. A traditional approach is to implement high-power, high-voltage power electronics using cascaded multilevel modules. However, active voltage balancing is required between cascaded multilevel modules. The active power control algorithms used in these technologies are complex, resource-intensive, and costly to implement. Summary of the Invention
[0003] According to one aspect of the present disclosure, a voltage balancing device is provided. The voltage balancing device is used to balance the voltage of multiple cascaded power modules. The output end of each power module has a DC bus capacitor. Each power module is configured to input and output voltages through the DC bus capacitor. The voltage balancing device includes:
[0004] The voltage balancing module is connected to each DC bus capacitor and is used to adjust the voltage of each DC bus capacitor so that the voltage of each DC bus capacitor reaches the target voltage.
[0005] In a possible implementation, the voltage balancing module includes a plurality of voltage balancing units and an iron core, each voltage balancing unit includes a first voltage regulating component and a second voltage regulating component.
[0006] The first voltage regulating component is used to adjust the voltage of the DC bus capacitor of each power module and establish a first intermediate voltage inside the first voltage regulating component;
[0007] The second voltage regulating component of each voltage balancing unit is arranged on one side of the iron core and connected to the first voltage regulating component, and is used to exchange energy through the iron core and adjust the voltage of the first intermediate voltage to ensure the voltage balance of the DC bus capacitors of each connected power module.
[0008] In a possible implementation, the pressure balancing module further includes a control module, and the control module is configured to:
[0009] Determine the average voltage of the DC bus capacitors of each power module;
[0010] Determining the duty cycle of each first voltage regulating component using the average voltage, and determining a corresponding control signal;
[0011] The voltages of the power modules connected thereto are controlled by various control signals to be close to the average voltage.
[0012] In a possible implementation, the first voltage regulating component includes a first inductor, a first transistor, a second transistor, and an intermediate voltage regulating capacitor, wherein:
[0013] The first end of the first inductor is used to receive the voltage on the connected DC bus capacitor, and the second end of the first inductor is connected to the source of the first transistor and the drain of the second transistor.
[0014] The drain of the first transistor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0015] The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component; or
[0016] The drain of the first transistor is used to receive the voltage on the connected DC bus capacitor, the source of the first transistor and the drain of the second transistor are connected to the first end of the first inductor, and the second end of the first inductor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0017] The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component.
[0018] The gates of the first transistor and the second transistor are used to receive a control signal, and the sum of the duty cycle of the control signal of the first transistor and the duty cycle of the control signal of the second transistor is 1 or slightly less than 1.
[0019] In a possible implementation, the pressure balancing module includes a control module, and the control module is configured to:
[0020] Determining a difference voltage between the voltage of each DC bus capacitor and the target voltage;
[0021] A control signal is obtained according to the difference voltage, and the control signal is used to control the second voltage regulating component to perform voltage equalization adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor is the target voltage.
[0022] In a possible implementation, the second voltage regulating component includes a first voltage balancing transistor, a second voltage balancing transistor, a third voltage balancing transistor, a fourth voltage balancing transistor, a second inductor, a first DC blocking capacitor, and a primary winding, wherein:
[0023] The drain of the first voltage balancing transistor and the drain of the second voltage balancing transistor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor.
[0024] The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor.
[0025] The source of the second balancing transistor is connected to the drain of the fourth balancing transistor and the first end of the first DC blocking capacitor.
[0026] The source of the third voltage balancing transistor and the source of the fourth voltage balancing transistor are connected as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor.
[0027] The second end of the second inductor is connected to the first end of the primary winding, and the second end of the primary winding is connected to the second end of the first DC blocking capacitor.
[0028] The primary winding is wound around the iron core,
[0029] Among them, the first balancing transistor and the third balancing transistor form a first bridge arm, the second balancing transistor and the fourth balancing transistor form a second bridge arm, and the control frequencies or control phases of the control signals of the first bridge arm and the second bridge arm are different.
[0030] In a possible implementation, the second voltage regulating component includes a first voltage balancing transistor, a third voltage balancing transistor, a second inductor, a primary winding, a first DC blocking capacitor, and a second DC blocking capacitor, wherein:
[0031] The drain of the first voltage balancing transistor and the first end of the first DC blocking capacitor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor.
[0032] The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor.
[0033] The second end of the first blocking capacitor is connected to the first end of the second blocking capacitor and the second end of the primary winding.
[0034] The source of the third voltage balancing transistor and the second end of the second DC blocking capacitor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor.
[0035] The second end of the second inductor is connected to the first end of the primary winding
[0036] The primary winding is wound around the iron core,
[0037] The control signals of the first balancing transistor and the third balancing transistor have different control frequencies or different control phases.
[0038] In a possible implementation, the pressure balancing module includes:
[0039] A voltage comparison circuit is used to compare the voltages of the DC bus capacitors;
[0040] The bidirectional charge and discharge circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor corresponding to the smaller voltage by using the voltage of the DC bus capacitor corresponding to the larger voltage.
[0041] According to one aspect of the present disclosure, a driver chip is provided, comprising the voltage balancing device.
[0042] According to one aspect of the present disclosure, a power supply device is provided, comprising the driver chip.
[0043] According to one aspect of the present disclosure, an electronic device is provided, comprising the power supply device.
[0044] The voltage balancing device of the embodiment of the present disclosure is used to balance the voltage of multiple cascaded power modules. The output end of each power module has a DC bus capacitor. Each power module is configured to input and output voltage through the DC bus capacitor. The voltage of each DC bus capacitor is adjusted for voltage balancing through the voltage balancing module so that the voltage of each DC bus capacitor is the target voltage, which can achieve active voltage balancing between cascaded power modules at low cost and high efficiency.
[0045] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, rather than limiting the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] The accompanying drawings herein are incorporated into and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and, together with the specification, are used to explain the technical solutions of the present disclosure.
[0047] Figure 1 A schematic diagram of a pressure equalizing device according to an embodiment of the present disclosure is shown.
[0048] Figure 2 A schematic diagram of a pressure balancing module according to an embodiment of the present disclosure is shown.
[0049] Figure 3 A schematic diagram of a pressure balancing module according to an embodiment of the present disclosure is shown.
[0050] Figure 4 A schematic diagram of a pressure balancing module according to an embodiment of the present disclosure is shown.
[0051] Figure 5 A schematic diagram of a pressure balancing module according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0052] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.
[0053] In the description of the present disclosure, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.
[0054] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the present disclosure, "plurality" means two or more, unless otherwise specifically defined.
[0055] In this disclosure, unless otherwise expressly specified or limited, terms such as "mounted," "connected," "connect," and "fixed" should be understood broadly. For example, they may refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components or interactions between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure based on specific circumstances.
[0056] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.
[0057] The term "and / or" herein simply describes an association relationship between associated objects, indicating that three relationships can exist. For example, "A and / or B" can represent the existence of three situations: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" herein refers to any combination of at least two of any one or more of a plurality of items. For example, "at least one of A, B, and C" can represent any one or more elements selected from the set consisting of A, B, and C.
[0058] In addition, numerous specific details are provided in the following detailed description to better illustrate the present disclosure. Those skilled in the art will appreciate that the present disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art are not described in detail in order to highlight the main points of the present disclosure.
[0059] The existing cascaded multi-level system voltage balancing mostly utilizes its own power circulation, selectively choosing to charge certain modules and discharge certain modules to achieve voltage balancing between modules. This method has several disadvantages: First, this equalization method relies heavily on power circulation, and its voltage balancing capability under light load and no load is very limited, or even non-existent; second, the voltage balancing algorithm in the existing scheme is relatively complex, and when superimposed on the power control, the algorithm of the entire system is extremely complex; third, the traditional voltage balancing method is all qualitative analysis, and the switching of each module is determined according to the system status, which has poor reliability and brings hidden dangers to the system design. In addition, there are also methods of passive voltage balancing in the existing technology, such as using heating elements to dissipate excess energy to achieve voltage balancing, but this method will first increase the difficulty of heat dissipation. In order to ensure a good voltage balancing effect, hundreds of watts of voltage balancing loss may be required, and heat dissipation is difficult to achieve at low cost, and it will reduce the efficiency of the entire machine.
[0060] like Figure 1 As shown, the voltage balancing device is used to balance the voltage of multiple cascaded power modules 10. The output end of each power module 10 has a DC bus capacitor C11. Each power module 10 is configured to input and output voltages through the DC bus capacitor C11. The voltage balancing device includes:
[0061] The voltage balancing module 20 is connected to each DC bus capacitor C11 and is used to balance the voltage of each DC bus capacitor C11 so that the voltage of each DC bus capacitor C11 reaches the target voltage.
[0062] The multiple cascaded power modules 10 of the embodiment of the present disclosure are all configured to input and output voltages through the DC bus capacitor C11. The embodiment of the present disclosure uses the voltage balancing module 20 to adjust the voltages of each DC bus capacitor C11 so that the voltages of each DC bus capacitor C11 are the target voltage, which can achieve active voltage balancing between the cascaded power modules 10 at low cost and high efficiency.
[0063] The embodiment of the present disclosure does not rely on power circulation, does not require a complex voltage balancing algorithm, and does not require the use of heating elements to achieve voltage balancing. It has high reliability and overcomes the problems existing in the voltage balancing solutions of the prior art.
[0064] The embodiments of the present disclosure do not limit the specific implementation methods of the power module 10 and the voltage balancing module 20. Those skilled in the art can set them according to actual conditions and needs. The power module 10 and the voltage balancing module 20 can both be implemented through hardware circuits. For example, the power module 10 can adopt a full-bridge power module 10 or a half-bridge power module 10, and the voltage balancing module 20 can be implemented through a multi-port resonant bidirectional DC / DC converter or a multi-port dual-active bridge converter.
[0065] The embodiment of the present disclosure does not limit the specific implementation method of the voltage balancing module 20 to balance the voltages of each DC bus capacitor C11 so that the voltages of each DC bus capacitor C11 are the target voltage. Those skilled in the art can adopt appropriate technical means to achieve it according to actual conditions and needs.
[0066] The preferred implementation manner is exemplarily introduced below.
[0067] The cascade mentioned in the embodiment of the present disclosure may be parallel connection, series connection or a combination of series and parallel connection, which is not limited in the embodiment of the present disclosure. For example, Figure 1 As shown, the multiple cascaded power modules 10 may be in the form of multiple power modules 10 connected in parallel.
[0068] In one possible implementation, Figure 2 、 Figure 3 、 Figure 4 、 Figure 5 As shown, the voltage balancing module 20 may include a plurality of voltage balancing units 200 and an iron core M. Each voltage balancing unit 200 may include a first voltage regulating component 210 and a second voltage regulating component 220.
[0069] The first voltage regulating component 210 is used to adjust the voltage of the DC bus capacitor C11 of each power module 10 and establish a first intermediate voltage inside the first voltage regulating component 210;
[0070] The second voltage regulating component 220 of each voltage balancing unit is arranged on one side of the iron core M and connected to the first voltage regulating component 210, and is used to exchange energy through the iron core M and adjust the first intermediate voltage to ensure the voltage balance of the DC bus capacitor C11 of each connected power module.
[0071] In a possible implementation, the pressure equalizing device may include a control module, and the control module may be configured to:
[0072] Determine the average voltage of the DC bus capacitor C11 of each power module 10;
[0073] Determine the duty cycle of each first voltage regulating component 210 using the average voltage, and determine the corresponding control signal;
[0074] The voltages of the power modules connected thereto are controlled by various control signals to be close to the average voltage.
[0075] For example, being near the average voltage indicates that the DC bus voltage of the power module has a small fluctuation, that is, voltage balance is achieved. For example, the first intermediate voltage can be adjusted by various control signals to achieve voltage balance. Of course, the embodiment of the present disclosure does not limit the specific size of the voltage fluctuation, and those skilled in the art can set it according to actual conditions and needs.
[0076] The embodiments of the present disclosure do not limit the specific implementation of the control module. Exemplarily, the control module may include a processing component. Exemplarily, the processing component includes but is not limited to a separate processor, or a discrete component, or a combination of a processor and a discrete component. The processor may include a controller having an execution instruction function in an electronic device. The processor may be implemented in any appropriate manner, for example, by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components. Inside the processor, the executable instructions may be executed by hardware circuits such as logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers and embedded microcontrollers.
[0077] The voltage of the DC bus capacitor C11 of each power module 10 can be regarded as the DC bus voltage of each power module 10. In the embodiment of the present disclosure, an average voltage of the DC bus voltage of each power module 10 is obtained through an averaging operation, and this average voltage is used as the set voltage of each first voltage regulating component 210. The control module obtains the duty cycle of the control signal of each first voltage regulating component 210 based on the set voltage through a certain control algorithm, and uses the duty cycle to achieve voltage regulation. The embodiment of the present disclosure does not limit the specific type of the control algorithm. Exemplarily, the control algorithm can be a proportional integral control algorithm, namely a PI algorithm.
[0078] In one possible implementation, Figure 2 and Figure 3 As shown, each first voltage regulating component 210 may include a first inductor L1, a first transistor Q11, a second transistor Q12 and an intermediate voltage regulating capacitor C21, wherein:
[0079] The first end of the first inductor L1 is used to receive the voltage on the connected DC bus capacitor C11, and the second end of the first inductor L1 is connected to the source of the first transistor Q11 and the drain of the second transistor Q12.
[0080] The drain of the first transistor Q11 is connected to the first end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220.
[0081] The source of the second transistor Q12 is connected to the second end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220.
[0082] The gates of the first transistor Q11 and the second transistor Q12 are configured to receive control signals, and the sum of the duty cycles of the control signal of the first transistor Q11 and the control signal of the second transistor Q12 is 1 or slightly less than 1. "Slightly less than" indicates that the difference between the sum of the duty cycles and 1 is small, and this difference may be the dead time of the transistors.
[0083] For example, assuming that the duty cycle of the control signal of the first transistor Q11 is D1, the duty cycle of the control signal of the second transistor Q12 is 1-D1.
[0084] In other embodiments, the first voltage regulating component 210 may also be implemented in other ways.
[0085] Exemplarily, the first intermediate voltage is, for example, the voltage at the first end of the intermediate voltage regulating capacitor C21.
[0086] The first voltage regulating component 210 may also be implemented in other ways, for example, Figure 4 and Figure 5As shown, each first voltage regulating component 210 may include a first inductor L1, a first transistor Q11, a second transistor Q12, and an intermediate voltage regulating capacitor C21, wherein the drain of the first transistor Q11 is used to receive the voltage on the connected DC bus capacitor C11, the source of the first transistor Q11 and the drain of the second transistor Q12 are connected to the first end of the first inductor L1, and the second end of the first inductor L1 is connected to the first end of the intermediate voltage regulating capacitor C21 and the second voltage regulating component 220.
[0087] The source of the second transistor Q12 is connected to the second end of the intermediate voltage regulating capacitor C21 and the second voltage regulating element 220 .
[0088] Accordingly, the gates of the first transistor Q11 and the second transistor Q12 are configured to receive control signals, and the sum of the duty cycles of the control signal of the first transistor Q11 and the control signal of the second transistor Q12 is 1 or slightly less than 1. For example, assuming that the duty cycle of the control signal of the first transistor Q11 is D1, the duty cycle of the control signal of the second transistor Q12 is 1-D1. "Slightly less than" indicates that the difference between the sum of the duty cycles and 1 is small, and this difference may be the dead time of the transistor.
[0089] It should be noted that the embodiment of the present disclosure is exemplified by implementing the first voltage regulating component 210 in a half-bridge form. However, the embodiment of the present disclosure is not limited thereto. Those skilled in the art may also implement the first voltage regulating component 210 in a full-bridge form.
[0090] In a possible implementation, the control module may also be used to:
[0091] Determine the difference between the voltage of each DC bus capacitor C11 and the target voltage;
[0092] A control signal is obtained according to the difference voltage, and the control signal is used to control the second voltage regulating component 220 to perform voltage equalization adjustment on each first intermediate voltage, so that the voltage of each DC bus capacitor C11 is the target voltage.
[0093] It should be understood that the “all target voltages” described in the embodiments of the present disclosure may have certain fluctuations, for example, they may fluctuate above and below the target voltage, and the fluctuation range is not limited in the embodiments of the present disclosure.
[0094] The embodiment of the present disclosure does not limit the specific implementation method of obtaining a control signal based on the difference voltage and using the control signal to control the second voltage regulating component 220 to perform voltage balancing adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor C11 is the target voltage. Those skilled in the art can use appropriate technical means to implement it according to actual conditions and needs. For example, the difference voltage can be used to obtain a control voltage through a proportional-integral operation, and the control voltage can be passed through a voltage-controlled oscillator to obtain a control frequency to obtain a control signal, and then the control signal is used to control the second voltage regulating component 220 to perform voltage balancing adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor C11 is the target voltage. Of course, the phase difference of each bridge arm in the second voltage regulating component 220 can also be obtained through a proportional-integral operation, and the corresponding control signal is determined based on the phase difference, and the control signal is used to control the second voltage regulating component 220 to perform voltage balancing adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor C11 is the target voltage. The embodiment of the present disclosure does not limit this.
[0095] In one possible implementation, Figure 2 、 Figure 4 As shown, each second voltage regulating component 220 may include a first voltage balancing transistor Q21, a second voltage balancing transistor Q22, a third voltage balancing transistor Q23, a fourth voltage balancing transistor Q24, a second inductor L2, a first DC blocking capacitor C21, and a primary winding P1, wherein:
[0096] The drain of the first voltage balancing transistor Q21 and the drain of the second voltage balancing transistor Q22 are connected as the first end of the second voltage regulating component 220. The first end of the second voltage regulating component 220 is connected to the first end of the intermediate voltage regulating capacitor C21.
[0097] The source of the first balancing transistor Q21 is connected to the drain of the third balancing transistor Q23 and the first end of the second inductor L2.
[0098] The source of the second balancing transistor Q22 is connected to the drain of the fourth balancing transistor Q24 and the first end of the first DC blocking capacitor C21.
[0099] The source of the third balancing transistor Q23 and the source of the fourth balancing transistor Q24 are connected to serve as the second end of the second voltage regulating component 220. The second end of the second voltage regulating component 220 is connected to the second end of the intermediate voltage regulating capacitor C21.
[0100] The second end of the second inductor L2 is connected to the first end of the primary winding P1, and the second end of the primary winding P1 is connected to the second end of the first DC blocking capacitor C21.
[0101] The primary winding P1 is wound around the iron core M, and the primary winding P1 of each voltage balancing unit 210 is wound around the iron core M.
[0102] Among them, the first balancing transistor Q21 and the third balancing transistor Q23 form a first bridge arm, the second balancing transistor Q22 and the fourth balancing transistor Q24 form a second bridge arm, and the control frequencies or control phases of the control signals of the first bridge arm and the second bridge arm are different.
[0103] The embodiments of the present disclosure do not limit the specific size of the duty cycle of the control signals of each transistor in the first bridge arm and the second bridge arm. For example, the sum of the duty cycles of the control signals of the two transistors in the first bridge arm is 1 or slightly less than 1, and the sum of the duty cycles of the control signals of the two transistors in the second bridge arm is 1 or slightly less than 1.
[0104] Figure 2 、 Figure 4 Two voltage balancing units 200 are shown, but the embodiments of the present disclosure are not limited thereto. Those skilled in the art may set the number of corresponding voltage balancing units 200 according to the number of power modules 10 .
[0105] In the embodiment of the present disclosure, each equalizing unit 200 is set to share an iron core M, thereby realizing energy exchange of the primary winding P1 of the second voltage regulating component 220 in each equalizing unit 200, and determining the difference voltage between the voltage of each DC bus capacitor C11 and the target voltage; obtaining a control signal based on the difference voltage, and the first equalizing transistor Q21 and the third equalizing transistor Q23 form a first bridge arm, and the second equalizing transistor Q22 and the fourth equalizing transistor Q24 form a second bridge arm. The control frequencies or control phases of the control signals of the first bridge arm and the second bridge arm are different, and the control signal can be used to efficiently and quickly control the second voltage regulating component 220 to perform equalizing adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor C11 is the target voltage.
[0106] In one possible implementation, Figure 3 and Figure 5 As shown, the second voltage regulating component 220 may include a first voltage balancing transistor Q21, a third voltage balancing transistor Q23, a second inductor L2, a primary winding P1, a first DC blocking capacitor C21, and a second DC blocking capacitor C22, wherein:
[0107] The drain of the first voltage balancing transistor Q21 and the first end of the first DC blocking capacitor C21 are connected as the first end of the second voltage regulating component 220. The first end of the second voltage regulating component 220 is connected to the first end of the intermediate voltage regulating capacitor C21.
[0108] The source of the first balancing transistor Q21 is connected to the drain of the third balancing transistor Q23 and the first end of the second inductor L2.
[0109] The second end of the first blocking capacitor C21 is connected to the first end of the second blocking capacitor C22 and the second end of the primary winding P1.
[0110] The source of the third voltage-balancing transistor Q23 and the second end of the second DC-blocking capacitor C22 are connected to serve as the second end of the second voltage-regulating component 220. The second end of the second voltage-regulating component 220 is connected to the second end of the intermediate voltage-regulating capacitor C21.
[0111] The second end of the second inductor L2 is connected to the first end of the primary winding P1
[0112] The primary winding P1 is wound around the iron core M.
[0113] The control signals of the first balancing transistor Q21 and the third balancing transistor have different control frequencies or different control phases.
[0114] The embodiment of the present disclosure does not limit the specific size of the duty cycle of the control signals of the first balancing transistor Q21 and the third balancing transistor Q23. Exemplarily, the sum of the duty cycles of the control signals of the first balancing transistor Q21 and the third balancing transistor Q23 is 1 or slightly less than 1.
[0115] The power module 10 and the voltage balancing module 20 are introduced as examples above. However, the embodiments of the present disclosure are not limited thereto. In other implementations, the power module 10 and the voltage balancing module 20 may also be implemented in other ways.
[0116] For example, in a possible implementation, the pressure balancing module 20 may include:
[0117] The voltage comparison circuit is used to compare the voltages of the DC bus capacitors C11;
[0118] The bidirectional charge and discharge circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor C11 corresponding to the smaller voltage by using the voltage of the DC bus capacitor C11 corresponding to the larger voltage.
[0119] The embodiments of the present disclosure do not limit the specific implementation methods of the voltage comparison circuit and the bidirectional charge and discharge circuit. Those skilled in the art can set them according to actual conditions and needs. For example, the voltage comparison circuit may include a voltage comparator, and the bidirectional charge and discharge circuit may be implemented by a bidirectional resonant bidirectional DC / DC converter CLLC, a bidirectional dual active bridge converter DAB, etc.
[0120] For example, assuming that U1 is the voltage on the DC bus capacitor C11 of the first power module 10, and U2 is the voltage on the DC bus capacitor C11 of the second power module 10, if the voltage comparison circuit determines that U1>U2, then the bidirectional charge and discharge circuit is started and uses U1 as input to charge U2 until the voltage difference is less than a certain threshold (the specific size of the threshold is not limited in the embodiment of this disclosure, and those skilled in the art can set it according to actual conditions and needs). If the voltage comparison circuit determines that U2>U1, then the bidirectional charge and discharge circuit is started and uses U2 as input to charge U1 until the voltage difference is less than a certain threshold.
[0121] Of course, the disclosed embodiment can also adopt a constant voltage control solution to automatically achieve charging and discharging without repeatedly switching the charging and discharging algorithm. If it is an N-unit cascade multi-level module, then the voltage balancing module 20 is N ports, and there is bidirectional power flow between each port, which can be charged or discharged. Using this module, module voltage balancing can be achieved very reliably, and the additional cost is very limited.
[0122] According to one aspect of the present disclosure, a driver chip is provided, comprising the voltage balancing device.
[0123] According to one aspect of the present disclosure, a power supply device is provided, comprising the driver chip.
[0124] According to one aspect of the present disclosure, an electronic device is provided, comprising the power supply device.
[0125] While various embodiments of the present disclosure have been described above, the above descriptions are illustrative, non-exhaustive, and not intended to be limiting of the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.
Claims
1. A pressure equalizing device, characterized in that: The voltage balancing device is used to balance the voltage of multiple cascaded power modules. The output end of each power module has a DC bus capacitor. Each power module is configured to input and output voltages through the DC bus capacitor. The voltage balancing device includes: The voltage balancing module is connected to each DC bus capacitor and is used to adjust the voltage of each DC bus capacitor so that the voltage of each DC bus capacitor reaches the target voltage.
2. The pressure equalizing device according to claim 1, characterized in that: The voltage balancing module includes a plurality of voltage balancing units and an iron core, and each voltage balancing unit includes a first voltage regulating component and a second voltage regulating component. The first voltage regulating component is used to adjust the voltage of the DC bus capacitor of each power module, and establish a first intermediate voltage inside the first voltage regulating component to obtain the first intermediate voltage; The second voltage regulating component of each voltage balancing unit is arranged on one side of the iron core and connected to the first voltage regulating component, and is used to exchange energy through the iron core and adjust the voltage of the first intermediate voltage to ensure the voltage balance of the DC bus capacitors of each connected power module.
3. The pressure equalizing device according to claim 2, characterized in that: The pressure balancing module further includes a control module, which is configured to: Determine the average voltage of the DC bus capacitors of each power module; Determining the duty cycle of each first voltage regulating component using the average voltage, and determining a corresponding control signal; The voltages of the power modules connected thereto are controlled by various control signals to be close to the average voltage.
4. The pressure equalizing device according to claim 3, characterized in that: The first voltage regulating component includes a first inductor, a first transistor, a second transistor and an intermediate voltage regulating capacitor, wherein: The first end of the first inductor is used to receive the voltage on the connected DC bus capacitor, and the second end of the first inductor is connected to the source of the first transistor and the drain of the second transistor. The drain of the first transistor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component. The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component; or The drain of the first transistor is used to receive the voltage on the connected DC bus capacitor, the source of the first transistor and the drain of the second transistor are connected to the first end of the first inductor, and the second end of the first inductor is connected to the first end of the intermediate voltage regulating capacitor and the second voltage regulating component. The source of the second transistor is connected to the second end of the intermediate voltage regulating capacitor and the second voltage regulating component. The gates of the first transistor and the second transistor are used to receive a control signal, and the sum of the duty cycle of the control signal of the first transistor and the duty cycle of the control signal of the second transistor is 1 or slightly less than 1.
5. The pressure equalizing device according to claim 2 or 3, characterized in that: The pressure balancing module includes a control module, which is used to: Determining a difference voltage between the voltage of each DC bus capacitor and the target voltage; A control signal is obtained according to the difference voltage, and the control signal is used to control the second voltage regulating component to perform voltage equalization adjustment on each first intermediate voltage so that the voltage of each DC bus capacitor is the target voltage.
6. The pressure equalizing device according to claim 5, characterized in that: The second voltage regulating component includes a first voltage balancing transistor, a second voltage balancing transistor, a third voltage balancing transistor, a fourth voltage balancing transistor, a second inductor, a first DC blocking capacitor, and a primary winding, wherein: The drain of the first voltage balancing transistor and the drain of the second voltage balancing transistor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor. The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor. The source of the second balancing transistor is connected to the drain of the fourth balancing transistor and the first end of the first DC blocking capacitor. The source of the third voltage balancing transistor and the source of the fourth voltage balancing transistor are connected as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor. The second end of the second inductor is connected to the first end of the primary winding, and the second end of the primary winding is connected to the second end of the first DC blocking capacitor. The primary winding is wound around the iron core, Among them, the first balancing transistor and the third balancing transistor form a first bridge arm, the second balancing transistor and the fourth balancing transistor form a second bridge arm, and the control frequencies or control phases of the control signals of the first bridge arm and the second bridge arm are different.
7. The pressure equalizing device according to claim 5, characterized in that: The second voltage regulating component includes a first voltage balancing transistor, a third voltage balancing transistor, a second inductor, a primary winding, a first DC blocking capacitor, and a second DC blocking capacitor, wherein: The drain of the first voltage balancing transistor and the first end of the first DC blocking capacitor are connected as the first end of the second voltage regulating component, and the first end of the second voltage regulating component is connected to the first end of the intermediate voltage regulating capacitor. The source of the first voltage balancing transistor is connected to the drain of the third voltage balancing transistor and the first end of the second inductor. The second end of the first blocking capacitor is connected to the first end of the second blocking capacitor and the second end of the primary winding. The source of the third voltage balancing transistor and the second end of the second DC blocking capacitor are connected to serve as the second end of the second voltage regulating component, and the second end of the second voltage regulating component is connected to the second end of the intermediate voltage regulating capacitor. The second end of the second inductor is connected to the first end of the primary winding The primary winding is wound around the iron core, The control signals of the first balancing transistor and the third balancing transistor have different control frequencies or different control phases.
8. The pressure equalizing device according to claim 1, characterized in that: The pressure balancing module includes: A voltage comparison circuit is used to compare the voltages of the DC bus capacitors; The bidirectional charge and discharge circuit is connected to the voltage comparison circuit and is used to charge the DC bus capacitor corresponding to the smaller voltage by using the voltage of the DC bus capacitor corresponding to the larger voltage.
9. A driver chip, characterized in that: The driving chip includes the voltage balancing device according to any one of claims 1 to 8.
10. A power supply device, characterized in that: Comprising the driver chip as claimed in claim 9.