A method for reducing stress of synchronous rectification dynamic load for LLC resonant converter
By dynamically adjusting the conduction dead time of the synchronous rectifier in the LLC resonant converter, the problem of mis-conduction under dynamic load changes is solved, the device stress is reduced, and the rectification efficiency and system response performance are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-12
- Publication Date
- 2026-04-07
AI Technical Summary
Traditional LLC resonant converters suffer from mis-conduction issues in synchronous rectification control when the load changes dynamically, leading to increased device stress and decreased efficiency. In particular, the phase change of the resonant current at the zero-crossing point is not adjusted in time when recovering from burst mode to continuous operation mode.
By accurately identifying the operating state of the LLC resonant converter based on the feedback loop signal, the on-time dead time of the synchronous rectifier is dynamically adjusted to match the phase of the resonant current in continuous mode, thereby avoiding false turn-on and reducing device voltage stress.
It effectively avoids synchronous rectification mis-conduction during load changes, reduces device voltage stress, and improves rectification efficiency and system dynamic response performance.
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Figure CN120785191B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of digital power supply technology, and more specifically to a method for reducing stress on synchronous rectified dynamic loads in LLC resonant converters. Background Technology
[0002] With the rapid development of society, power electronics technology has been widely applied in various fields. In certain specific applications, such as large server rooms and laser cutting technology, the performance requirements of digital power supplies are very high. In addition to high efficiency, high dynamic response speed is also required to ensure the stability of the power supply and the overall system under different operating environments. As power electronics technology rapidly develops towards high power density and high efficiency, LLC resonant converters, with their soft-switching characteristics, low electromagnetic interference (EMI), and wide voltage adaptability, have become the core topology in fast charging power supplies, data center server power supplies, and electric vehicle on-board chargers (OBCs). However, traditional LLC designs often use diode rectification on the secondary side, which has a large on-state voltage drop (0.3~1V) and significant losses in low-voltage, high-current scenarios, severely limiting efficiency improvement. To further reduce power losses, many LLC converters use synchronous rectification (SR) technology on the secondary side, replacing diodes with MOSFETs for rectification. However, the driving timing of the synchronous rectification switch has a significant impact on system efficiency, requiring precise control of the turn-on and turn-off times to avoid unnecessary losses.
[0003] To reduce losses under light load, a burst mode control is introduced while employing synchronous rectification (SR) technology to reduce LLC gain through intermittent oscillation interruption. However, during the dynamic process of recovering from burst mode to continuous operation, the LLC synchronous rectification control presents some challenges that urgently need to be addressed. When the load on the LLC resonant converter abruptly changes from no-load to full-load, the input bus voltage drops to some extent. To maintain output voltage stability, the feedback controller lowers the drive frequency to increase gain. As the drive frequency decreases, the resonant current waveform changes, particularly the zero-crossing phase of the resonant current lags behind the original operating state. The control logic of the synchronous rectification switch relies on the zero-crossing point of the resonant current to determine its turn-on time. In this situation, if the original dead-time setting is still used, it may cause the SR switch to turn on prematurely or the turn-on time to shift. The device will then experience significant voltage stress.
[0004] Existing synchronous rectification control methods have several shortcomings, primarily in the following aspects: Fixed dead-time control lacks adaptability, potentially leading to decreased efficiency and increased device stress; under light or no-load conditions, LLC resonant converters typically enter burst mode. In this mode, the converter periodically pauses switching to prevent excessive output voltage rise. During this process, the resonant current waveform exhibits intermittent characteristics. Especially when the operating frequency changes significantly, such as switching from high to low frequency, the zero-crossing phase of the resonant current will shift noticeably. This phase shift directly affects the synchronous rectifier's turn-on timing. If the control strategy is not adjusted in time, the devices may turn on prematurely, resulting in turn-on stress and decreased efficiency. Summary of the Invention
[0005] In view of this, a method for reducing stress under dynamic load during synchronous rectification of LLC resonant converters is provided, which can effectively reduce device losses. This method is based on the accurate identification of the operating state of LLC resonant converters and the dynamic adjustment of the conduction dead time, thereby effectively avoiding synchronous rectification mis-conduction during load changes, reducing device voltage stress, improving safety margin, and improving rectification efficiency and system dynamic response performance.
[0006] A method for reducing stress under dynamic load in synchronous rectification of an LLC resonant converter, used for dynamic optimization of the on-time dead time of the synchronous rectifier during the switch from burst mode to continuous operation mode of the LLC resonant converter, wherein the on-time dead time of the synchronous rectifier during continuous operation mode is a default on-time dead time, characterized by comprising the following steps:
[0007] Determine the operating status of the LLC resonant converter and whether the operating status has switched, including determining whether the LLC resonant converter is currently in burst mode and whether the LLC resonant converter has switched from burst mode to continuous operation mode and maintained for a predetermined period.
[0008] If it is determined that the resonant converter is currently in burst mode, a burst conduction dead time greater than the default conduction dead time is applied to the synchronous rectifier, so that the burst conduction dead time covers the zero-crossing time of the LLC resonant converter.
[0009] If it is determined that the resonant converter has entered a continuous operating state and maintains a predetermined period in the continuous operating state, the on-time dead time of the synchronous rectifier is reduced, so that the reduced on-time dead time matches the phase of the resonant current in continuous mode.
[0010] Preferably, in the step of determining the operating state of the LLC resonant converter and whether the operating state has switched, the moment of switching from burst mode to continuous operating mode is identified in advance based on the feedback loop signal.
[0011] Preferably, after accurately identifying the moment of switching from burst mode to continuous operation mode based on feedback loop signals, it is further determined whether the continuous operation mode is operating stably.
[0012] Preferably, the reduction of the turn-on dead time of the trigger synchronous rectifier is reduced to a predetermined dead time value, which is less than 600ns. The process of reducing the turn-on dead time is to reduce it by 10ns-50ns each time after exiting the burst mode for a predetermined time, and then enter the loop calculation timer interrupt each time until it equals the predetermined dead time value.
[0013] Preferably, the total duration of the predetermined period is 500ms to 1000ms.
[0014] Furthermore, the step of determining the operating state of the LLC resonant converter and whether the operating state has switched includes using the sampled output voltage to calculate the LLC frequency based on the loop, and then determining whether the LLC resonant converter has entered or exited the burst mode based on whether the frequency and output voltage are greater than the target voltage to a predetermined threshold.
[0015] Preferably, the specific conditions for the LLC resonant converter to enter the burst mode are as follows: the LLC frequency is greater than 80% of the maximum operating frequency of the LLC resonant converter and close to the maximum operating frequency of the LLC resonant converter, and the ADC value of the output voltage sample is greater than the ADC value of the target voltage by 100.
[0016] Preferably, after receiving the output voltage sampling data, the MCU unit calculates the operating frequency of the LLC resonant converter through the 2P2Z loop. Based on the calculated operating frequency of the LLC resonant converter, it further determines whether it is operating in burst mode. If so, the synchronous rectifier is turned off; if not, the on-time dead time of the synchronous rectifier is increased by a predetermined increment. The predetermined increment ranges from 1500ns to 2000ns. The input bus voltage is continuously monitored for stability. If stable, the on-time dead time of the synchronous rectifier is gradually reduced to a predetermined dead time value, which ranges from 300ns to 600ns. Simultaneously, the output voltage is sampled, and the above steps are repeated.
[0017] Furthermore, the determination of whether the LLC resonant converter is currently in burst mode is based on the calculation of the LLC frequency through the loop using the output voltage sampling data; when the calculated LLC frequency is greater than the predetermined frequency value and the ADC value of the output voltage sampling is greater than the ADC value of the target voltage by 100, it is determined that the burst mode has been entered; the step of making the reduced conduction dead time match the phase of the resonant current in continuous mode includes making the synchronous rectifier turn on after the resonant point crosses zero.
[0018] Furthermore, a system for reducing stress on a dynamic load using a synchronous rectifier of an LLC resonant converter is provided for use in the conversion output circuit of a digital power supply. The conversion output circuit includes an LLC switch, an LLC resonant converter, a synchronous rectifier, a transformer, and an output terminal. The synchronous rectifier has a default on-time dead time during continuous operation. The system is characterized by including an output voltage sampling unit, an MCU unit, a calculation unit, and a dead-time adjustment unit.
[0019] The output voltage sampling unit is used to sample the voltage at the output terminal and feed the sampled data back to the MCU unit;
[0020] The computing unit is connected to or built into the MCU unit. It is used to calculate the LLC frequency based on the sampled data, and then determine the operating state of the LLC resonant converter or whether it has switched based on whether the frequency and output voltage are greater than the target voltage to a predetermined threshold. Determining the operating state of the LLC resonant converter or whether it has switched includes determining whether the LLC resonant converter is currently in burst mode and whether the LLC resonant converter has switched from burst mode to continuous operation mode and maintained for a predetermined period.
[0021] The dead-time adjustment unit is connected to or built into the MCU unit and is used to dynamically adjust the conduction dead time. This includes applying a burst conduction dead time greater than the default conduction dead time to the synchronous rectifier when it is determined that the resonant converter is currently in burst mode, so that the burst conduction dead time covers the zero-crossing time of the LLC resonant converter; and triggering a reduction in the conduction dead time of the synchronous rectifier when it is determined that the resonant converter has entered a continuous operation state and maintains a predetermined period in the continuous operation state, so that the reduced conduction dead time matches the phase of the resonant current in continuous mode.
[0022] In the aforementioned method and system for reducing stress on synchronous rectification loads in LLC resonant converters, an MCU unit (such as a microcontroller) determines the operating status of the LLC resonant converter and accurately identifies the moment of transition from burst mode to continuous operation mode based on feedback loop signals, while simultaneously determining whether this transition process has been stably completed. Once it is determined that the system has successfully transitioned from burst mode to continuous operation mode and is operating stably, the MCU unit dynamically reduces the on-time dead time of the synchronous rectifier diodes, adjusting it from the longer dead time set in burst mode to the shorter dead time required by continuous mode. Through such dynamic adjustment, it is ensured that the on-time of the synchronous rectifier diodes closely follows the phase change at the zero-crossing point of the resonant current, avoiding excessive on-time stress on the synchronous rectifier devices caused by the phase shift of the resonant current, thereby reducing device losses. Therefore, the above method and system have at least the following advantages:
[0023] 1. Effectively avoids synchronous rectification mis-circuiting during sudden load changes;
[0024] 2. Reduce device voltage stress and increase safety margin;
[0025] 3. Improve rectification efficiency and system dynamic response performance. Attached Figure Description
[0026] Figure 1 This is a main flowchart of the method for reducing stress in a synchronous rectified dynamic load of an LLC resonant converter according to an embodiment of the present invention.
[0027] Figure 2 This is a schematic diagram illustrating the specific operation process of the method for reducing stress in a synchronous rectified dynamic load of an LLC resonant converter according to an embodiment of the present invention.
[0028] Figure 3 This is a system framework diagram of an embodiment of the present invention for reducing stress on synchronous rectification dynamic loads in LLC resonant converters. Detailed Implementation
[0029] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0030] Please see Figures 1 to 3 This illustration shows the main process and system framework of a method for reducing dynamic load stress in an LLC resonant converter with synchronous rectification, provided by an embodiment of the present invention. It is mainly applied to the dynamic optimization of the synchronous rectifier's on-time dead time during the transition from burst mode to continuous operation mode in an LLC resonant converter. The on-time dead time of the synchronous rectifier during continuous operation mode is the default on-time dead time. The method includes the following steps:
[0031] S10, determine the operating state of the LLC resonant converter or whether it has switched, including determining whether the LLC resonant converter is currently in burst mode and whether the LLC resonant converter has switched from burst mode to continuous operation mode and maintained for a predetermined period.
[0032] S20, if it is determined that the resonant converter is currently in burst mode, apply a burst conduction dead time to the synchronous rectifier that is greater than the default conduction dead time, so that the burst conduction dead time covers the zero-crossing time of the LLC resonant converter.
[0033] S30, if it is determined that the resonant converter has entered a continuous operating state and maintains a predetermined period in the continuous operating state, the conduction dead time of the synchronous rectifier is reduced, so that the reduced conduction dead time matches the phase of the resonant current in the continuous mode.
[0034] Specifically, in step S10, in the step of determining the operating state of the LLC resonant converter or whether it has switched, the moment of switching from burst mode to continuous operation mode is identified in advance based on the feedback loop signal. More preferably, after accurately identifying the moment of switching from burst mode to continuous operation mode in advance based on the feedback loop signal, it is further determined whether the continuous operation mode is operating stably. In practical applications, after receiving the output voltage sampling data, the MCU unit calculates the operating frequency of the LLC resonant converter through a 2P2Z (2Pole 2 Zero, second-order compensation network) loop. Based on the calculated operating frequency of the LLC resonant converter, it further determines whether it is operating in burst mode. If so, the synchronous rectifier is turned off; otherwise, the on-time dead time of the synchronous rectifier is increased by a predetermined increment. The predetermined increment ranges from 1500ns to 2000ns, and in this embodiment, 1900ns is preferred. The input bus voltage is then monitored for stability. If stable, the on-time dead time of the synchronous rectifier is gradually reduced to a predetermined dead time value, which ranges from 300ns to 600ns, preferably from 300ns to 500ns; in this embodiment, 500ns is preferred. The output voltage is then sampled again, and the above steps are repeated.
[0035] In step S20, after determining that the resonant converter is currently in burst mode, the conduction dead time of the synchronous rectifier is increased. For example, the range of the burst conduction dead time is the range of the predetermined increment, that is, the increased burst conduction dead time is 1500ns~2000ns, preferably 1900ns±100ns.
[0036] Furthermore, the determination of whether the LLC resonant converter is currently in burst mode is based on calculating the LLC frequency through a loop using output voltage sampling data. When the calculated LLC frequency is greater than a predetermined frequency value and the ADC value of the output voltage sampling is greater than the ADC value of the target voltage by 100, it is determined that the converter has entered burst mode. Making the reduced conduction dead time match the phase of the resonant current in continuous mode includes ensuring that the synchronous rectifier turns on only after the resonant point crosses zero. For example, during the switching process from burst mode to continuous operation mode, the dead time is increased. After the synchronous rectifier has operated for a predetermined period in continuous operation mode, the conduction dead time is reduced at a predetermined rate, ensuring that the synchronous rectifier turns on only after the resonant point crosses zero; otherwise, stress problems may occur. Further, the specific conditions for the LLC resonant converter to enter burst mode are: the LLC frequency is greater than 80% of the maximum operating frequency of the LLC resonant converter and close to the maximum operating frequency of the LLC resonant converter, and the ADC value of the output voltage sampling is greater than the ADC value of the target voltage by 100.
[0037] Taking a certain digital power supply product as an example, the maximum operating frequency of the LLC resonant converter is 180kHz. The condition for entering discontinuous mode (i.e., burst mode) is that the LLC frequency is greater than 160kHz and the ADC value of the output voltage sample is greater than the ADC value of the target voltage by 100. Furthermore, when exiting burst mode, the synchronous rectifier's turn-on dead time changes from a first value to a second value, i.e., it decreases to a predetermined value, which is 300ns-600ns, more preferably 300ns-500ns.
[0038] In step S30, preferably, the reduction of the on-time dead time of the trigger synchronous rectifier is reduced to a predetermined dead time value, which is less than 600 ns. The process of reducing the on-time dead time involves, after exiting the burst mode for a predetermined time, reducing it by 10 ns to 50 ns each time the loop calculation is entered via a timer interrupt until it equals the predetermined dead time value. The timer interrupt is usually preset for a specific time, during which the loop calculation is performed. For example, the loop is calculated every 25 µs, and the dead time is reduced by 10 ns each time the loop is calculated. In a specific example, i.e., in the specific product tested in this embodiment, the on-time dead time is reduced from 1900 ns to 500 ns. The reduction process involves, after exiting the burst mode for 500 ms, reducing it by 20 ns each time the loop calculation is entered via a timer interrupt until it equals 500 ns. Preferably, the total duration of the predetermined period is 500 ms to 1000 ms.
[0039] Furthermore, the steps for determining the operating state or switching of the LLC resonant converter also include calculating the LLC frequency based on the loop using the sampled output voltage, and then determining whether the LLC resonant converter has entered or exited the burst mode based on whether the frequency and output voltage are greater than the target voltage to a predetermined threshold.
[0040] The specific operating procedure is as follows: Figure 2 As shown, the output voltage is first sampled by the MCU unit, and the sampled data is fed back to the MCU unit. After receiving the output voltage sampling data, the MCU unit calculates the operating frequency of the LLC resonant converter through the 2P2Z loop. Based on the calculated operating frequency of the LLC resonant converter, it further determines whether it is operating in burst mode. If so, the synchronous rectifier is turned off; if not, the on-time dead time of the synchronous rectifier is increased to a larger value A, i.e., the aforementioned predetermined increment; the range of the predetermined increment is 1500ns~2000ns, and a preferred example in this embodiment is 1900ns. The input bus voltage is continuously monitored for stability. If the bus voltage is stable, the on-time dead time of the synchronous rectifier is gradually reduced from the aforementioned larger value A to a smaller value B, i.e., the predetermined dead time value, the range of the predetermined dead time value is 300ns~600ns, preferably 300ns~500ns; in this embodiment, 500ns is preferred. The output voltage is then sampled again, and the above steps are repeated.
[0041] Another aspect of this invention provides a system for reducing stress on a dynamic load using synchronous rectification of an LLC resonant converter, used in the output circuit of a digital power supply. The output circuit includes an LLC switch, an LLC resonant converter, a synchronous rectifier, a transformer, and an output terminal. The synchronous rectifier has a default on-time dead time. The system includes an output voltage sampling unit, an MCU unit, a calculation unit, and a dead-time adjustment unit. The output voltage sampling unit samples the voltage at the output terminal and feeds the sampled data back to the MCU unit. The calculation unit is connected to or integrated into the MCU unit and calculates the LLC frequency based on the sampled data. It then determines the operating state or switching status of the LLC resonant converter based on whether the frequency and output voltage exceed a target voltage to a predetermined threshold. Determining the operating state or switching status includes determining whether the LLC resonant converter is currently in burst mode and whether it has switched from burst mode to continuous operation mode and maintained for a predetermined period. The dead-time adjustment unit is connected to or built into the MCU unit and is used to dynamically adjust the conduction dead time. This includes applying a burst conduction dead time greater than the default conduction dead time to the synchronous rectifier when it is determined that the resonant converter is currently in burst mode, so that the burst conduction dead time covers the zero-crossing time of the LLC resonant converter; and triggering a reduction in the conduction dead time of the synchronous rectifier when it is determined that the resonant converter has entered a continuous operation state and maintains a predetermined period in the continuous operation state, so that the reduced conduction dead time matches the phase of the resonant current in continuous mode.
[0042] like Figure 3 As shown, the LLC resonant converter includes a first inductor, a second inductor, and a capacitor connected in series, with the capacitor connected in series between the two inductors. The second inductor is connected in parallel with the primary winding of the transformer. The LLC switching transistors include a first switching transistor and a second switching transistor. The gates of the first and second switching transistors are respectively connected to the MCU unit. Specifically, calculations are performed by the computing unit built into the MCU unit, and the corresponding pins of the MCU unit control the switching based on the calculation results and adjustment instructions. The drain of the first switching transistor is connected to the positive terminal of the digital power supply, and the drain of the second switching transistor is connected to the negative terminal of the digital power supply. The other end of the transformer and the rear end of the second inductor are synchronously connected to the negative terminal of the digital power supply. The sources of the first and second switching transistors are connected together to the input terminal of the first inductor. The synchronous rectifier includes a first rectifier MOSFET and a second rectifier MOSFET. The gates of the two rectifier MOSFETs are respectively connected to the MCU unit. Specifically, calculations are performed by the computing unit in the MCU unit, and the corresponding pins of the MCU unit output the on / off control of the corresponding rectifier MOSFETs based on the calculation results and adjustment instructions.
[0043] Therefore, in the above method and system, when the load suddenly increases, the output power demand rises sharply, the input bus voltage drops, and the controller feedback adjusts to reduce the LLC operating frequency from a high frequency to a lower frequency range, i.e., switching from burst mode to continuous mode. After the MCU unit detects that the LLC resonant converter has entered continuous mode and has been running stably for a period of time, it gradually reduces the synchronous rectification dead zone to precisely match the zero-crossing point of the resonant current, improving rectification efficiency and reducing device stress. This method is based on the identification trigger of system state (discontinuous to continuous), requiring no frequency change trend judgment or external mode judgment signal, and is particularly suitable for high-performance LLC power supply systems with drastic load dynamic changes. Therefore, through such dynamic adjustment, it is ensured that the synchronous rectifier tube's conduction time closely follows the phase change of the resonant current's zero-crossing point, avoiding excessive conduction stress on the synchronous rectifier device due to the phase shift of the resonant current, thereby reducing device losses.
[0044] It should be noted that the present invention is not limited to the above-described embodiments. Based on the inventive spirit of the present invention, those skilled in the art can make other changes, and these changes made in accordance with the inventive spirit of the present invention should be included within the scope of protection claimed by the present invention.
Claims
1. A method for reducing stress under dynamic load of synchronous rectification in an LLC resonant converter, used for dynamic optimization of the on-time dead time of the synchronous rectifier during the switch from burst mode to continuous operation mode of the LLC resonant converter, wherein the on-time dead time of the synchronous rectifier during continuous operation mode is a default on-time dead time, characterized in that, Includes the following steps: Determine the operating status of the LLC resonant converter and whether the operating status has switched, including determining whether the LLC resonant converter is currently in burst mode and whether the LLC resonant converter has switched from burst mode to continuous operation mode and maintained for a predetermined period. If it is determined that the resonant converter is currently in burst mode, a burst conduction dead time greater than the default conduction dead time is applied to the synchronous rectifier, so that the burst conduction dead time covers the zero-crossing time of the LLC resonant converter. If it is determined that the resonant converter has entered a continuous operating state and maintains a predetermined period in the continuous operating state, the on-time dead time of the synchronous rectifier is reduced, so that the reduced on-time dead time matches the phase of the resonant current in the continuous mode. The reduction of the on-time dead time of the trigger synchronous rectifier is to reduce it to a predetermined dead time value, which is less than 600ns. The process of reducing the on-time dead time is to interrupt the timer calculated each time the loop is entered after exiting the burst mode for a predetermined time and reduce it by 10ns-50ns each time until the on-time dead time is equal to the predetermined dead time value.
2. The method for reducing stress in synchronous rectified dynamic loads of LLC resonant converters as described in claim 1, characterized in that, In the step of determining the operating state of the LLC resonant converter and whether the operating state has switched, the moment of switching from burst mode to continuous operation mode is identified in advance based on the feedback loop signal.
3. The method for reducing stress in synchronous rectified dynamic loads of LLC resonant converters as described in claim 2, characterized in that, After accurately identifying the moment of switching from burst mode to continuous operation mode based on feedback loop signals, it is further determined whether the continuous operation mode is operating stably.
4. The method for reducing stress in synchronous rectified dynamic loads of LLC resonant converters as described in claim 1, characterized in that, The total duration of the predetermined period is 500ms to 1000ms.
5. The method for reducing stress in synchronous rectified dynamic loads of LLC resonant converters as described in claim 1, characterized in that, The steps for determining the operating state of the LLC resonant converter and whether the operating state has switched include using the sampled output voltage to calculate the LLC frequency based on the loop, and then determining whether the LLC resonant converter has entered or exited the burst mode based on whether the frequency and output voltage are greater than the target voltage to a predetermined threshold.
6. The method for reducing stress in a synchronous rectified dynamic load of an LLC resonant converter as described in claim 1, characterized in that, The specific conditions for the LLC resonant converter to enter burst mode are as follows: the LLC frequency is greater than 80% of the maximum operating frequency of the LLC resonant converter and close to the maximum operating frequency of the LLC resonant converter, and the ADC value of the output voltage sample is greater than the ADC value of the target voltage by 100.
7. The method for reducing stress in a synchronous rectified dynamic load of an LLC resonant converter as described in claim 6, characterized in that, After receiving the output voltage sampling data, the MCU unit calculates the operating frequency of the LLC resonant converter through the 2P2Z loop. Based on the calculated operating frequency of the LLC resonant converter, it further determines whether it is operating in burst mode. If so, the synchronous rectifier is turned off; if not, the on-time dead time of the synchronous rectifier is increased by a predetermined increment, the range of which is 1500ns~2000ns. The input bus voltage is continuously monitored for stability. If stable, the on-time dead time of the synchronous rectifier is gradually reduced to a predetermined dead time value, the range of which is 300ns~600ns. Simultaneously, the output voltage is sampled, and the above steps are repeated.
8. The method for reducing stress in a synchronous rectified dynamic load of an LLC resonant converter as described in claim 1, characterized in that, The determination of whether the LLC resonant converter is currently in burst mode is based on the calculation of the LLC frequency through the loop using the output voltage sampling data; when the calculated LLC frequency is greater than the predetermined frequency value and the ADC value of the output voltage sampling is greater than the ADC value of the target voltage by 100, it is determined that the burst mode has been entered; the step of making the reduced conduction dead time match the phase of the resonant current in continuous mode includes making the synchronous rectifier turn on after the resonant point crosses zero.
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