Grid-connected test data automatic processing method for built-in energy storage system of photovoltaic inverter

Abstract

The invention relates to a grid-connected test data automatic processing method for a built-in energy storage system of a photovoltaic inverter, and belongs to the field of photovoltaic inverter testing. Aiming at the problem that multi-test standard parallel computing and original data dynamic association verification cannot be realized, the method comprises the following steps: receiving an original test data file and a test standard chapter identifier and a test parameter input by a webpage interface through a Web server; calling a distributed computing framework, matching a corresponding data processing algorithm template according to the identifier, and performing parallel analysis on the original data based on the parameters; inputting the analysis data into a plurality of independent calculation threads by adopting multiple threads to execute each standard chapter process; extracting key performance index fields to generate a structured result data table, and generating coordinates of data points supporting cursor hovering display and an interactive chart; and when an instruction is responded, automatically filling the instruction into a Word template to generate a test report. The method is used for remarkably improving the multi-standard parallel test efficiency and the result verification accuracy.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photovoltaic inverter testing. More specifically, the present application relates to a grid-connected test data automatic processing method for a photovoltaic inverter built-in energy storage system. BACKGROUND

[0002] The grid-connected test of a photovoltaic inverter built-in energy storage system is a key link to ensure that the equipment meets international standards (such as IEC 62116, UL1741, etc.). The traditional test process relies on manual processing mode, which has significant limitations. The main problems are concentrated in two aspects: First, the efficiency bottleneck of serial execution of multiple test standards 1. Cannot process multiple standards in parallel: Test personnel need to import raw data files (including time series of DC bus voltage, AC output current, etc.) for different standards (such as the ripple coefficient requirement of IEC 62116 and the grid response requirement of UL 1741) respectively, and execute independent data analysis processes one by one. For example, after completing the IEC standard analysis, the data needs to be re-imported to process the UL standard, resulting in a linear increase in task processing time with the number of standards.

[0003] 2. Data disconnection leads to verification difficulties: The generated result chart (such as the static efficiency curve) has no dynamic correlation with the original sampling value. When an abnormality (such as an excessive ripple coefficient) is found, the original data corresponding to the time stamp needs to be repositioned across platforms (such as MATLAB), and manual tracing takes too long and is prone to errors.

[0004] The root cause is that the data processing logic of different standards is independent of each other, and there is a lack of unified framework to realize dynamic matching of algorithm templates and task parallel injection.

[0005] Second, the timing mismatch problem of multi-thread parallel processing To improve efficiency, some solutions attempt to use multi-thread parallel computing (such as assigning independent threads for DC voltage fluctuation rate and AC current response). However, this solution introduces new technical defects: 1. Transmission and scheduling differences cause timing misalignment: There are hardware transmission delay differences (up to ±20ms) between DC voltage data (usually transmitted via CAN bus) and AC current data (transmitted via Ethernet); the randomness of thread scheduling of the operating system causes time stamp deviation (such as ±15ms) of data collected at the same time. In a 50Hz grid environment, the above deviation is equivalent to a phase error of 27°, causing misalignment of DC voltage and AC current data when calculating key indicators (such as charge-discharge cycle efficiency η=P out / P in ) and distortion of the calculation result (measured error >5%).

[0006] 2. Accumulation error of fixed time window: the traditional scheme triggers calculation at fixed time intervals (such as 1 second), without considering the integrity of the grid cycle. When the data window is not aligned with the integer multiple of the cycle, the phase accumulation error further amplifies the deviation of the index. The difficulty lies in the need to align the multi-source heterogeneous data stream at the millisecond level of precision, and the need to be compatible with the real-time requirements in the high-frequency sampling (such as 10kHz) scenario.

[0007] The above problems further trigger a chain of challenges, including resource allocation and the derived problem of high-frequency data processing: 1. High-frequency data retrieval delay: when the original data sampling rate reaches 10kHz, a single anomaly point verification needs to traverse millions of data points, and the disk I / O bottleneck causes an interactive delay of >15ms, which cannot meet the real-time waveform verification requirements; 2. Imbalance between storage and computing resources: under the fixed thread allocation strategy, the thread idle rate of lightweight tasks (such as grid response detection) is >65%, while the computing-intensive tasks (such as ripple analysis) are backed up due to insufficient resources, and the overall delay increases by 210%.

[0008] Therefore, due to the three defects of multi-standard serial processing mechanism, multi-thread timing mismatch, and high-frequency data retrieval delay, the existing technology cannot balance test efficiency and result accuracy. Especially in the scenario where high sampling rate (>10kHz) and multi-standard compliance requirements are parallel, the cost of manual intervention and the risk of calculation distortion increase significantly. SUMMARY

[0009] An object of the present application is to solve at least the above problems and provide at least the advantages to be explained later.

[0010] In order to achieve these objects and other advantages according to the present application, a photovoltaic inverter built-in energy storage system grid-connected test data automatic processing method is provided, comprising: receiving an original test data file through a web server, which includes time series data of DC bus voltage, AC output current, and battery charging and discharging power; receiving a test standard chapter identifier selected through a web interface and input test parameters; calling a distributed computing framework, matching a corresponding data processing algorithm template according to the test standard chapter identifier, and performing parallel analysis on the original test data file based on the test parameters, the data processing algorithm template including ripple coefficient calculation logic and grid frequency response threshold determination logic, the ripple coefficient calculation logic being used to separate the ripple signal in the 0-100Hz frequency band, and the grid frequency response threshold determination logic being based on the target grid standard; using multiple threads to simultaneously input the parsed data to multiple independent computing threads, each computing thread corresponding to a data processing process of a test standard chapter, and performing the following operations in each computing thread: Extract the key performance indicator fields in the parsed data, perform numerical calculation logic according to the data processing algorithm template, and generate a structured result data table. The key performance indicator fields include DC voltage fluctuation rate and charge-discharge cycle efficiency. Based on the structured result data table, an interactive chart is generated by combining the Canvas application programming interface with the Web graphics library rendering engine. The interactive chart supports real-time display of data point coordinate information and corresponding timestamp original data sampling values triggered by cursor hovering. The structured result data table and the interactive chart are stored in the time series database according to the test standard chapter identifier. In response to the report generation instruction, the structured result data table and the interactive chart of the specified test standard chapter are extracted from the time series database and automatically filled into the preset Word report template to generate a test report file.

[0011] Preferably, multi-threaded parallel computing is used, which specifically includes: A number of thread groups equal to the number of test standard chapters are created, and each thread group is bound to an independent ring buffer. The ring buffer has a capacity of 1024 records, and each record contains a millisecond-level timestamp, a DC bus voltage, and an AC output current field. Through the time alignment engine, the parsed data is sorted in ascending order according to the timestamp field, and a timestamp-DC voltage value-AC current value mapping relationship is established in the hash table using the millisecond timestamp as the key. When the ring buffer accumulates 10 complete power grid cycle data, the charge-discharge cycle efficiency calculation of the corresponding thread group is triggered. If the DC voltage value or AC current value data of the same timestamp is missing, an interrupt signal is sent to the exception handling coroutine and the data completion interface is called.

[0012] Preferably, the step of displaying the original data sampling value corresponding to the timestamp in real time includes: When the original test data file is uploaded, a full file memory mapping is established through the mmap memory mapping system call to generate a read-only binary memory view. A Bloom filter index table is constructed to map the timestamp to the file storage offset address, and the index table is loaded into the browser IndexedDB cache. When the cursor hovering event is triggered, the timestamp value is parsed from the data point coordinates, the offset address is located within 1ms through the Bloom filter, and the original DC bus voltage instantaneous value of the previous and next 64 sampling points is extracted around the offset address. The Catmull-Rom cubic spline interpolation algorithm is executed through the Web Worker thread to reconstruct the waveform, which is superimposed and rendered to the Canvas layer. The peak value of the interpolation waveform and the real-time calculation result of the ripple coefficient are dynamically displayed at the cursor position.

[0013] Preferably, the storing step of the time series database comprises: The structured result data table is encoded in columnar storage format, the timestamp field is encoded by differential-differential compression, and the DC voltage fluctuation rate field is converted into a 32-bit floating-point number and then subjected to ZSTD lossless compression; An independent graph storage partition is created for the interactive chart, and the graph storage partition is named according to the standard chapter number; Data is written through a dynamic time slicing strategy, and when the sampling rate of the DC voltage fluctuation rate data is greater than 10 kHz, the data is automatically switched to be written in batches of 5 seconds each, and each batch of data is packaged into a protocol buffer format message body and is attached with a CRC32 check code; A hierarchical cache structure is constructed in the memory, including a first-level cache for storing the fluctuation rate raw data of the last 2 minutes and a second-level cache for loading data blocks of the adjacent 1 hour according to the access frequency; When a bidirectional B+ tree index is established, the DC voltage fluctuation rate data with a frequency greater than 100 Hz in the leaf node is marked as a high-frequency segment, and a solid-state disk storage block is independently allocated.

[0014] Preferably, the execution of the ripple coefficient calculation logic comprises: The instantaneous value sequence of the DC bus voltage is extracted from the key performance indicator field; Noise and real ripple signals are separated through a two-stage filtering unit, including a first-stage high-pass filtering unit for filtering out high-frequency noise components generated by switching devices and a second-stage low-pass filtering unit for retaining real ripple signals in the 0-100 Hz frequency band; The sliding window peak-to-peak value detection is performed on the filtered instantaneous value sequence of the DC bus voltage, wherein the window width is synchronized with the grid period; The basic threshold value is set based on the rated voltage of the DC bus, and the actual determination threshold value is dynamically adjusted according to the battery state of charge: when the battery state of charge deviates from the intermediate value, the basic threshold value is corrected in proportion to generate the actual determination threshold value; When the detected peak-to-peak value exceeds the actual determination threshold value, the anomaly is marked in the structured result data table, and the interactive chart is triggered to highlight the abnormal frequency band in the spectrum waterfall chart.

[0015] Preferably, the Word report template generation step comprises: The dynamic domain code of the IEC standard chapter number is pre-embedded in the DOCX template file; The DC voltage fluctuation rate data is written into the specified table through the XWPF table interface of the Apache document processing toolkit; The setting resolution method is executed to set the output resolution when invoking the enhanced metafile conversion interface; Automatically add standard chapter numbering text labels below the chart when inserting the chart.

[0016] Preferably, after generating the interactive chart, an abnormal data tracing process is executed: Receiving a data anomaly positioning instruction triggered by a user through a visualization interface, the instruction including pixel coordinates of a cursor on the chart; According to the associated record row in the structured result data table, the pixel coordinates are reversely mapped, including: extracting the data point logical coordinates by the pixel reading method of the Web graphics library, querying the reverse index table of the time series database with the data point logical coordinates as the key to obtain the record row primary key; Taking the associated record row as a reference, a three-level timestamp alignment search is performed in the original test data file, including: main search, binary search based on the record row timestamp field; secondary search, if the main search fails, a ±10ms time window is scanned for adjacent records; fault tolerance search, a Bloom filter is called to verify the existence of the timestamp; The retrieved original data records and the context data of each of the 32 sampling points before and after them are synchronously marked through a heat map layer in the interactive chart, and the heat color scale reflects the standard deviation multiple of the data deviation.

[0017] Preferably, the distributed computing framework performs resource dynamic allocation, including: A computing complexity weight is predefined for each data processing algorithm template, the weight value is determined based on the benchmark test duration, and the weight value is stored in a metadata database; When creating a thread group, initial thread resources are allocated in proportion to the weight, and thread groups with high complexity weights are allocated more threads; The load is dynamically balanced in real time through a work stealing mechanism, specifically including: when the idle rate of the ring buffer of the thread group reaches a first preset threshold, data blocks carrying original timestamp sequences are stolen from thread groups with buffer loads exceeding a second preset threshold, and are migrated to idle thread groups through atomic operations; The computing delay of each thread group is monitored in real time, and if the delay of a high-weight thread group exceeds a third preset threshold, a standby thread is dynamically allocated from a public resource pool for elastic expansion.

[0018] Preferably, the first preset threshold, the second preset threshold, and the third preset threshold are 40%, 80%, and 200ms, respectively.

[0019] Preferably, the target grid standard includes IEC 62116 and / or UL 1741.

[0020] The present application at least includes the following beneficial effects: First, the application realizes the parallel analysis and calculation of multiple international standards (such as IEC / UL) in photovoltaic inverter testing by dynamically matching multi-standard algorithm templates through a distributed framework. Each standard chapter is processed independently using multi-threading, completely eliminating the time superposition loss of traditional serial processing. The key innovation is that when generating interactive charts, through the deep integration of Canvas and WebGL engines, the real-time display of raw sample values is realized by hovering the cursor, solving the dynamic correlation verification problem of test results and raw data. Finally, through the classification storage of time series databases and the automatic filling of Word templates, a full-closed-loop automated process from data processing to report generation is formed, significantly improving the efficiency of multi-standard compliance testing.

[0021] Second, to solve the problem of AC-DC data time sequence mismatch caused by multi-threading parallelism, the application innovatively designs a time sequence alignment engine and a ring buffer trigger mechanism. Through a hash table, a millisecond-level timestamp-physical quantity accurate mapping is established to eliminate transmission delay differences; and an integer multiple of the grid period is used as the calculation trigger condition (instead of fixed intervals) to ensure phase synchronization within the window, thus solving the efficiency calculation distortion caused by thread scheduling deviation from the root. Combined with a three-level fault-tolerant process (main / secondary search + Lagrange interpolation completion), the spatiotemporal consistency of physical quantities is still guaranteed when data is missing, greatly improving the accuracy of key indicators such as charge-discharge cycle efficiency.

[0022] Third, to solve the interaction lag caused by high-frequency raw data retrieval delay, the application constructs a three-level acceleration architecture: memory mapping technology avoids disk I / O bottlenecks, making raw data direct reading efficiency improve by orders of magnitude; Bloom filter index realizes microsecond-level timestamp positioning, breaking through the performance limit of traditional linear scanning; Catmull-Rom spline interpolation algorithm calculates in parallel through Web Worker to reconstruct local waveforms in real time when the cursor is hovering. The three work together to make the raw sample value verification reach the human eye's unperceived delay, completely changing the status quo of high-frequency test data being unable to be dynamically interacted.

[0023] Fourth, to solve the imbalance of heterogeneous task resources, the application innovatively designs a weight-driven dynamic resource allocation model. The initial threads are allocated according to the algorithm complexity weight ratio to lay the foundation for load balancing; the work-stealing mechanism (steals data blocks from threads with load > 80% when the idle rate > 40%) breaks through the resource barrier; the elastic expansion model (expands according to the weight / delay ratio when the delay > 200ms) realizes millisecond-level adjustment of computing resources. This three-level adjustment system makes the delay of high-load tasks drop by more than 75%, and the resource utilization rate approaches the theoretical limit.

[0024] Other advantages, objects, and features of the application will be apparent from the following description, and will be appreciated by those skilled in the art. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 The whole flowchart of one of the technical solutions of the present application is shown. DETAILED DESCRIPTION

[0026] The present application will be further described in detail below with reference to the accompanying drawings, so that those skilled in the art can implement the present application according to the description and the drawings.

[0027] As Figure 1 shown, the present application provides a grid-connected test data automatic processing method for a photovoltaic inverter built-in energy storage system. The traditional photovoltaic inverter test adopts a single-thread processing mode, for example, a LabVIEW processing flow: 1. Manually importing CSV format original test data (containing time series of DC bus voltage, AC current, etc.) one by one; 2. Writing a special analysis script for a single IEC standard chapter (such as clause 7.2.3 of IEC 62116); 3. Generating static charts and reports for 45 minutes; 4. Switching to MATLAB to re-import the original data to verify abnormal points.

[0028] This scheme has two defects: it cannot process multiple standards in parallel, and when multiple standards such as IEC 62116 and UL 1741 need to be met at the same time, multiple data processing flows need to be executed in series; the original data is disconnected, and the result charts and original sampling values have no dynamic association, and manual tracing needs to cross-platform search for timestamps.

[0029] Embodiment of the present application: Step 1: Parallel injection of multi-standard tasks Through a Web server, receive an original test data file (binary format, sampling rate 10 kHz), the file structure includes: timestamp (millisecond precision), DC bus voltage (unit: V), AC output current (unit: A), battery charge and discharge power (unit: kW), The user checks the test standard chapter identifiers that need to be processed in parallel (for example, selects clause 7.3.1 of IEC 62116 and clause 15.2 of UL 1741 at the same time) on the web interface, and inputs the test parameters: grid rated frequency 50 Hz, DC bus rated voltage 800 V.

[0030] Step 2: Distributed framework algorithm template matching Call the Apache Spark distributed computing framework, and load the pre-stored data processing algorithm template according to the standard identifier: IEC 62116 template: built-in ripple coefficient calculation logic, the core algorithm is based on the discretization implementation of Parseval theorem, the original formula: The formula is: P = (1 / N) * sum(x[n]^2) for n=0 to N-1, where P represents the average power of the signal, reflecting the average strength of the signal energy over time; N represents the total number of sampling points of the signal, and the formula calculates the signal from n=0 to n=N-1, a total of N discrete sampling points; n represents the discrete time index. x[n] represents the sampling value of the discrete time signal at time n; wherein the square brackets [] and the index n are the standard representation of the discrete signal, which is used to distinguish from the round brackets () and the continuous time variable t in the continuous time signal x(t). The invention improves: only extracts the 0-100Hz frequency band (k=0 to k=100 corresponds to the DFT (Discrete Fourier Transform) coefficient, where k represents the discrete frequency index), calculates the power sum (average of square sum) in the selected frequency range, wherein the power of each frequency component (square of amplitude) is calculated, the sum of all powers is divided by the number N to obtain the average power, and the ripple power is compared after square root to obtain the dimensionless ripple coefficient. The purpose is to calculate the ripple coefficient (Ripple Coefficient) of the signal in the frequency range of 0-100Hz.

[0031] UL 1741 template: grid frequency response determination logic, using a sliding window peak-to-peak detection algorithm.

[0032] Step 3: Multi-thread real-time processing and dynamic association Create an independent thread group (number = selected standard chapter number), and each thread group executes: 1. Key indicator calculation: DC voltage fluctuation rate = (V max -V min ) / V 额定 (result is dimensionless percentage), V max refers to the maximum value of the DC bus voltage in a complete grid cycle (or a specified observation window), V min refers to the minimum value of the DC bus voltage in the same complete grid cycle (or specified observation window), V 额定 refers to the rated value or nominal value of the DC bus voltage, which is a fixed parameter determined by system design and test standards; Charge-discharge cycle efficiency = (discharge energy / charge energy) * 100% (energy units are kWh); 2. Dynamic association of raw data: Render an interactive line chart through HTML5 Canvas; When the cursor hovers, the following logic chain is triggered: A, cursor pixel coordinates Input: user's cursor position on the screen (x, y pixel value); function as the starting point of the process, get the coordinate origin of user interaction, real-time data query when clicking / hovering in the line chart.

[0033] B. WebGL coordinate transformation Process: Convert pixel coordinates to normalized coordinates in WebGL coordinate system; the purpose is to establish the mapping relationship between screen coordinates and data timeline (e.g., x-axis corresponds to time, y-axis corresponds to voltage).

[0034] C. Timestamp t Generation: Calculate the corresponding timestamp t according to the WebGL coordinates; for example, if the x-axis represents 1 second per screen width, then pixel x=100 corresponds to t=0.25 seconds, which serves as the time reference point for data retrieval.

[0035] D. Bloom filter retrieval Use Bloom Filter (Bloom Filter) to quickly determine whether the data at time t exists; its advantages are high space efficiency and fast query support (false positive rate can be controlled), and it requires pre-setting the number of hash functions k and the size of the bit array m.

[0036] E. Position file offset address Mapping: Convert timestamp t to byte offset in binary file; the calculation method is to convert time to the index of the corresponding sample point, then multiply the number of bytes of each sample to get the position of the target time point in the original byte stream, and the sampling rate (e.g., 10kHz) and data format (e.g., 16-bit integer) are required.

[0037] F. Read t-32ms to t+32ms original voltage value Range: Read data 32ms before and after t (64ms window) centered on t; if the sampling rate is 10kHz, read 640 sample points, the purpose is to obtain enough historical data to ensure waveform smoothness.

[0038] G. Catmull-Rom spline interpolation Algorithm: Use the quartic spline interpolation formula P(t) =0.5×((2-P)Q+(R-P)t+(2Q-R-S)t 2 + (R-Q)t 3 ), P, Q, R, S are the four control points of the curve, t is the parameter, the value range is usually 0≤t≤1, when t=0, P(0)=Q, when t=1, P(1)=R, its advantage is to ensure the continuity of the curve (C1 continuous), avoid ladder-like distortion, and convert discrete sample points to smooth curves.

[0039] H. Superimposed rendering dynamic waveform Superimpose new waveforms through WebGL fragment shaders, use off-screen rendering (FrameBufferObject) to reduce redraw overhead, the effect is to highlight the waveforms near the cursor, forming a dynamic interactive effect.

[0040] The above logical chain is a complete data processing flow from the user's cursor position to the dynamic waveform rendering. The flow realizes the dynamic interaction of the cursor position and the waveform data through five core links: coordinate mapping, timestamp association, data retrieval, interpolation calculation, and graphic rendering. The performance optimization point is to set the false positive rate of the Bloom filter to 0.01% to balance the space and accuracy. The block loading strategy is adopted (such as 1 second of data per block), the interpolation calculation can use the GPU parallel computing of WebGL to speed up, and the waveform rendering uses the LOD (Level of Detail) technology to reduce the sampling rate in the far cursor area. This logical chain flow realizes efficient processing from user interaction to data visualization through the combination of multiple technologies, and the core lies in the accurate mapping of time-space coordinates and the fast retrieval of massive data.

[0041] To achieve a 0.01% false positive rate control of the Bloom filter, the following technical measures are adopted: Bit array size calculation: Set the upper limit of the total amount of timestamps n = 10 6 (million level), and the acceptable false positive rate p = 0.0001. According to the formula m = -n x ln p / (ln 2) 2 , the bit array size m ≈ 19.17 MB, and the actual allocated memory is rounded to 20 MB to be compatible with the hardware page size.

[0042] Optimal number of hash functions: According to k = m / n x ln 2, k ≈ 7, and 7 independent MurmurHash3 functions (seed values are 0-6) are selected to ensure uniformity of the hash.

[0043] Block loading strategy: The original test file is divided into blocks of 1 second (10000 sampling points per block), and a Bloom filter index is independently constructed for each block to avoid bit array overload caused by full file indexing.

[0044] Runtime false positive compensation: When the Bloom filter returns "exists", a secondary verification is performed through the timestamp difference (|t query -t actual | ≤ 1 μs), and if the difference is out of tolerance, a secondary retrieval process is started. query t actual is the query timestamp, which is the target time point that the user wants to query through the cursor hover interaction. This value comes from the calculation result of the coordinate transformation in the previous step, and t actual is the actual timestamp, which is the timestamp corresponding to the actual stored data point finally located through the Bloom filter index and file offset address in the original binary data file. The secondary verification estimates t actual through linear interpolation of adjacent timestamps.

[0045] Step 4: Report automatic synthesis Extract structured results (such as ripple factor table of IEC 62116) and associated charts from time series database, inject into preset Word template: Dynamic domain code is automatically replaced with standard section number "IEC 62116 Clause 7.3.1"; Write fluctuation rate data matrix through XWPFTable interface of Apache POI.

[0046] Example: Test data of photovoltaic inverter under 50Hz power grid (10000 sampling points).

[0047] Traditional scheme operation: 1. Manually segment data, perform IEC and UL standard analysis respectively, time-consuming 92 minutes; 2. When an abnormal ripple is found, the original file needs to be imported again to locate the problem timestamp, which takes an additional 15 minutes.

[0048] This scheme operation: 1. Check the IEC 62116 and UL 1741 standard identifiers, and submit the task; 2. Spark starts 2 independent threads to calculate in parallel (calculation time 11.3 seconds); 3. The user hovers over the abnormal ripple point, and the real-time display of the original voltage instantaneous value at t=1532ms is displayed; 4. Automatically generate a report containing double-standard results (total time-consuming 23 seconds).

[0049] This scheme realizes multi-standard parallel computing and real-time operation of original data through a distributed framework and a dynamic indexing mechanism, eliminating the bottleneck of manual serial processing.

[0050] In another embodiment of the present application, the traditional multi-thread parallel scheme has a serious time sequence mismatch, including: thread scheduling delay, the direct current voltage thread (thread A) and the alternating current thread (thread B) due to the difference in operating system scheduling, resulting in a time stamp deviation of up to ±15ms (equivalent to 27° phase difference under 50Hz power grid) for data collected at the same time; transmission is not synchronized, the CAN bus and Ethernet transmission delay difference makes the direct current bus voltage data arrive 20ms later than the alternating current. When calculating the charge and discharge cycle efficiency, the direct current voltage and alternating current are misaligned, causing distortion of the efficiency value (actual measurement error >5%).

[0051] This embodiment includes: Step 1: Time sequence alignment engine design Hash table is used to establish an accurate timestamp-physical quantity mapping relationship: take millisecond timestamp t as the key, store direct current voltage V and alternating current, timestamp unit millisecond (ms), voltage unit volt (V), current unit ampere (A), all independent without conflict.

[0052] Step 2: Ring Buffer Trigger Mechanism The core innovation is to trigger calculation based on grid cycle instead of fixed time interval: 1. Define the complete grid cycle T = 1 / f grid , f grid is the grid frequency, unit Hz; 2. When the ring buffer accumulates data for ≥10T, trigger thread group calculation. The physical meaning is to ensure that the calculation window contains an integer number of cycles, eliminating phase accumulation error.

[0053] Step 3: Data Loss Fault Tolerance Three-level fault tolerance process, including: main search, query hash table with timestamp t0 as key; secondary search, if t0 is missing, scan [t0-Δt, t0+Δt] window (Δt=10ms); data completion, call Lagrange interpolation algorithm to reconstruct missing values based on t （k-1） , t k , t （k+1） , Where L i (t0) is the Lagrange basis function: 、 、 Time item t i unit is millisecond (ms), voltage V unit is volt (V), both left and right quantities in the formula are volt (V).

[0054] Example Experimental setup: photovoltaic inverter model SMA Sunny Boy Storage 3.7; test conditions, grid frequency 50Hz (T=20ms), sampling rate 10kHz; artificially injected data delay, DC voltage lags AC current by 15ms.

[0055] Traditional scheme (OpenMP parallel): 1. DC voltage thread and AC current thread run independently; 2. Calculate the charge and discharge efficiency at t=1000ms: η=P out / P in =V dc (1000)×I ac (1000) / P bat , P out is the output power, in the discharge process, the active power output by the inverter to the grid, P in is the input power, in the charging process, the active power input to the energy storage battery from the grid or photovoltaic end, V dc is the DC bus voltage, I ac is the AC output current.

[0056] Actual error: V dc (1000) corresponds to the real time 985ms, Iac(1000) corresponds to the real time 1000ms, and the efficiency distortion is 8.7%.

[0057] The embodiment of the present application is as follows: 1. The timing alignment engine aligns V dc with I ac (1000) to the real time 1000ms. dc (1015) by forced matching (finding V 2. The data completion interface reconstructs V dc (1000) by forced matching (finding V 3. The known points are V dc (990)=799.2V, V dc (1015)=800.1V, V dc (1040)=799.8V, and V dc (1000)=799.5V is calculated by substituting the Lagrange interpolation formula, and the calculation efficiency is η=799.5V×I ac (1000) / P bat , and the error is reduced to 0.3%.

[0058] The embodiment of the present application is as follows:

[0059] In another embodiment of the present application, in order to solve the problem of high-frequency original data retrieval delay in dynamic verification, the traditional test system uses a full-file linear scanning mechanism to process high-frequency original data. When the sampling rate is increased to the order of 200kHz, a single retrieval needs to traverse millions of data points, and the superposition of disk I / O and memory search leads to a delay of more than 15 milliseconds. This delay makes the cursor hover interaction function useless, and users cannot observe waveform details in real time. When analyzing anomalies, manual export of original files is still required for offline positioning, which greatly hinders test efficiency.

[0060] The scheme reconstructs the data retrieval process through a three-level acceleration architecture. First, a full file memory mapping is established during the data upload phase, and the binary test data is directly mapped to the memory address space to form a read-only continuous memory view, completely avoiding the disk access bottleneck. Then, a Bloom filter index structure is constructed, which converts the millisecond timestamp into a bit array mark and loads it into the browser IndexedDB cache to achieve microsecond-level existence prediction. When the user triggers the cursor hover event, the target timestamp is resolved according to the screen coordinates, the data validity is confirmed within 1 millisecond through the Bloom filter, and the file offset address is located, and the original voltage instantaneous value of 64 sampling points before and after the target time point is directly jumped to the memory mapping area for extraction.

[0061] Finally, the Catmull-Rom spline interpolation algorithm is used to reconstruct the local waveform, and the WebWorker thread is used for parallel calculation to eliminate interface lag. The smooth curve generated by interpolation is real-time superimposed and rendered to the Canvas interactive layer, and the ripple coefficient peak value is dynamically labeled at the cursor. The whole process cooperates through memory direct reading, probability indexing and parallel interpolation, converts high-frequency data retrieval from file scanning to memory addressing, and makes the original waveform dynamic verification reach the delay level that cannot be perceived by the human eye.

[0062] In another embodiment of the present application, for the problem of disk throughput bottleneck caused by high-frequency fluctuation rate data storage, the traditional time series database solution faces serious challenges when dealing with 10kHz sampling rate direct current voltage fluctuation rate data. The existing technology such as InfluxDB adopts row storage structure, and each timestamp record needs to be written to the disk independently. When the sampling interval is shortened to 0.1 milliseconds, the system generates 10000 disk write requests per second. The test shows that the peak demand of disk IOPS under this architecture exceeds 50000, far exceeding the carrying capacity of mechanical hard disk. Even if solid state disk is used, it will also cause write amplification effect due to frequent small file writing, which eventually leads to saturation of data throughput channel. More seriously, continuous high-load writing will block query operations, causing data extraction delay in the report generation stage.

[0063] The scheme reconstructs the data writing process through a three-level storage optimization architecture. First, a data encoding compression strategy is implemented to convert the structured result data table into a columnar storage format: the timestamp field uses a difference-difference compression algorithm, only storing the second difference value of adjacent timestamps instead of the original value; the direct current voltage fluctuation rate field is uniformly converted into a 32-bit floating point number, and then a ZSTD lossless compression engine is applied for streaming compression. This design reduces the storage space of a single record by about 70%, significantly reducing the basic writing amount. Second, a dynamic time slicing mechanism is introduced. When the fluctuation rate sampling rate breaks through the 10kHz threshold, the system automatically switches to a batch aggregation writing mode: the original data is accumulated in memory for 5 seconds and then packaged as a protocol buffer format message body, and after adding a CRC32 check code, the whole batch is submitted for storage. This mechanism reduces the number of writes per second from 10,000 to 0.2, completely resolving the high-frequency writing pressure.

[0064] Finally, a hierarchical cache system is constructed to intercept disk access. The first-level cache is directly resident in memory and retains the last 2 minutes of original fluctuation rate data for real-time analysis calls; the second-level cache dynamically loads the adjacent 1 hour of hot data blocks based on the LRU strategy. For high-frequency fluctuation rate data with a frequency exceeding 100Hz, when establishing a bidirectional B+ tree index, it is marked as a special type and independently allocated to a high-speed solid state disk storage block. When a query request arrives, the system first retrieves the memory cache layer, and only when it is not hit does it trigger disk access. This design enables more than 95% of data requests to be completed in the memory layer, and the disk only undertakes low-frequency batch writing tasks, with the actual disk IOPS load reduced to less than 1 / 20 of the traditional scheme.

[0065] In another embodiment of the present application, to solve the problem of ripple coefficient misjudgment caused by switching device noise, the traditional detection scheme directly performs sliding window peak-to-peak value detection on the original sequence of the direct current bus voltage. This scheme does not effectively isolate high-frequency switching noise (such as 20kHz noise generated by IGBT devices), resulting in the real ripple signal being submerged. Actual measurement data shows that when the switching noise amplitude is 3 times that of the ripple signal, the misjudgment rate of the traditional method is as high as 18%, seriously interfering with the accuracy of the grid-connected test conclusion.

[0066] The present scheme adopts a two-stage adaptive filtering and dynamic threshold correction mechanism to reconstruct the ripple coefficient calculation process, which is implemented as follows: 1. Basic algorithm Step 1: Frequency band separation filtering First-order high-pass filtering: a Butterworth second-order high-pass filter is used, with a cutoff frequency of 10kHz. Its transfer function is derived from the bilinear transformation of the analog filter prototype: where H hp(s) represents the transfer function of the filter, describing the response characteristics of the filter in the complex frequency domain, subscript hp represents high-pass, ω c = 2π x 10 4 rad / s, represents the cutoff angular frequency. After discretization, real-time filtering is performed, which physically filters out high-frequency noise components (> 10 kHz) generated by the switching device, s is a complex frequency variable, which is a variable in Laplace transform, defined as s = σ + jω, where σ is the attenuation coefficient, j is the imaginary unit, and ω is the angular frequency.

[0067] Second-order low-pass filtering: Chebyshev I low-pass filter is used, with a cutoff frequency of 100 Hz. The transfer function is: where T n is the Chebyshev polynomial, n is the order of the filter, and ε is the ripple coefficient. After discretization, the 0-100 Hz baseband ripple signal is retained, and ω is the angular frequency variable, which is related to the frequency f as ω = 2πf.

[0068] Step 2: Ripples feature extraction Perform sliding window peak-to-peak detection of the filtered sequence with synchronous grid period: Window width W = 1 / f grid (grid period), ensuring that the window contains an integer number of ripple periods, f grid is the fundamental frequency of the grid; Peak-to-peak calculation: V pp = max(V filtered [k:k+W]) - min(V filtered [k:k+W]), which is a standard peak-to-peak algorithm in the field of signal processing, with a dimension of volts (V), V pp is the peak-to-peak value of the ripple voltage, which is the final measurement result, representing the maximum amplitude of the voltage fluctuation within a window of width W, V filtered is the filtered DC bus voltage sequence, which is the output signal of the original DC voltage signal after processing by the two-stage filter (high-pass + low-pass), containing only the target ripple component of 0-100 Hz, and the high-frequency noise has been filtered out, k represents the starting index of the data sequence, which is an integer value pointing to a certain position in the data array, and k+W represents the end index of the data sequence.

[0069] Step 3: Dynamic threshold correction Basic threshold setting: (1% of rated voltage), dimension of volts (V); State of charge (SOC) dynamic correction: Derivation: When SOC=50%, the correction factor is 1, and the threshold value remains the basic value; when SOC deviates from 50%, the threshold value is linearly increased according to the deviation (e.g. SOC=30%, factor=1.2); the factor 0.5 is calibrated by experiment to ensure dimensional consistency: It is a dimensionless ratio, multiplied by the constant 0.5, it is still dimensionless, and V th_base (V) multiplied by the dimension of volts (V), V th_Actual represents the actual use of the determination threshold, which is the final dynamic threshold value used to determine whether the ripple peak value is abnormal after the battery state of charge (SOC) correction, V th_base represents the basic determination threshold, which is a fixed reference value preset according to the system rated voltage and test standard requirements.

[0070] 2. Algorithm implementation effect verification Experimental setup: inverter model: SMA Sunny Boy Storage 3.7; noise source: IGBT switch noise (20kHz, amplitude 3V); real ripple: 100Hz power frequency ripple (amplitude 1V); comparison group: traditional single-stage low-pass filtering scheme (cutoff frequency 1kHz); The ripple detection result amplitude of the traditional scheme is 3.2V, and the noise misjudgment rate is 18%. The ripple detection result amplitude of the two-stage filtering scheme is 1.05V, and the noise misjudgment rate is 0%, indicating that the peak-peak value detection result is lifted by noise due to the absence of high-frequency noise filtering in the traditional scheme; the scheme accurately separates the 100Hz ripple signal. By designing a two-stage filter to separate the target frequency band, combined with the SOC dynamic threshold correction, the misjudgment rate is reduced from 18% to close to 0. The abnormal frequency band is highlighted in the interactive interface through the spectrum waterfall chart (signal processing standard visualization method), which proves the effectiveness of the scheme.

[0071] In another embodiment of the present application, in view of the mandatory requirements of the certification agency for the accuracy of the report chart and the standard clause marking, the traditional report generation process has serious defects of manual intervention. Engineers need to manually paste the chart screenshots generated by MATLAB into the Word report, and then modify the standard clause number page by page. This method leads to two key problems: the chart resolution is severely degraded due to multiple storage, and the original data accuracy loss is more than 30%; the manual marking error rate is as high as 12% (such as mislabeling UL 1741 clause as IEC 62116), which causes the certification agency to reject the test report.

[0072] The scheme reconstructs the report generation process through full automation labeling and precision control mechanism. Firstly, the dynamic domain code is pre-embedded in the DOCX template, and the standard chapter identifier is automatically replaced when the system injects the test results. For example, the IEC standard chapter number domain code "IEC_Clause" is replaced by "IEC 62116 Clause 7.3.1" during execution, eliminating manual labeling bias. Secondly, the XWPFTable interface of Apache POI is directly used to write the volatility data matrix, skipping the intermediate storage link in Excel, and ensuring that the 32-bit floating point precision is losslessly transmitted to the final report.

[0073] In view of the accuracy requirements of the chart printing, the resolution setting method is forcibly executed when the enhanced graphic element file conversion interface is called. The system automatically locks the output resolution to 600 dpi, meeting the mandatory requirements of the IEC certification guide on printing accuracy. When inserting an interactive chart, a standard chapter number text label is dynamically generated below the chart, and the font size strictly follows the certification template specification. The label is stored in association with the chart, avoiding the misalignment risk caused by the separation of text and graphics in traditional schemes.

[0074] The final test report is checked by three automatic checks: clause number consistency check with the standard identifier checked when the task is submitted, chart actual resolution value check, and data table floating point rounding error check. The whole process eliminates manual operation nodes and ensures zero format rejection when the certification agency reviews.

[0075] In another embodiment of the present application, in view of the problem of data link breakage caused by traditional parallel computing schemes, the prior art has serious traceability obstacles. When the user finds an abnormal point in the interactive chart, the user needs to manually record the timestamp, and then query the original data file, the structured result database and the computing log system respectively. This process involves cross-platform operation: locating the original sampling value in MATLAB, retrieving the calculation result record in MySQL, and finally checking the Spark execution log. The test shows that single abnormality traceability requires switching between three software interfaces, and the time consumption is more than 45 minutes. Moreover, due to the time sequence confusion of thread group parallel execution, the error rate of manual checking is as high as 32%.

[0076] The scheme reconstructs the traceability process by establishing a "full-automatic mapping link from pixel coordinates to original data". When the user triggers the abnormal positioning instruction on the chart panel, the system automatically extracts the cursor pixel coordinates, converts them into data point logical coordinates (such as time axis t=1532ms) through the built-in coordinate transformer of WebGL, and directly obtains the associated record row primary key of the structured result data table by querying the reverse index table of the time series database with the logical coordinates as the key. This step establishes the accurate association between "screen position" and "calculation result".

[0077] Based on the obtained record primary key, the system performs three-level timestamp alignment retrieval in the original binary file: first, the bisection method is used to accurately match the target timestamp; if the matching fails due to clock drift, a ±10ms time window scanning adjacent records is started; finally, the existence of the timestamp is verified through the Bloom filter. This mechanism ensures that even if there is a timestamp shift caused by parallel computing (<1ms), the real original data can still be located.

[0078] The traceability result is dynamically visualized through a heat map layer. The system extracts the context data of 32 sampling points before and after the target time point, calculates the number of standard deviations of each point, and maps it to a red-blue gradient color scale. When the cursor moves, the heat map is refreshed in real time, and the abnormal interval is presented in a highlighted color block. The entire process is completed within 0.2 seconds, completely eliminating the need for manual checking, and the traceability accuracy reaches 100%.

[0079] In another embodiment of the present application, the existing OpenMP thread pool uses a fixed thread allocation strategy, and each computing task (such as ripple coefficient calculation and power grid response analysis) is allocated thread resources on average. This scheme has two major drawbacks: resource idling, when the power grid response calculation (lightweight task) is completed, its allocated threads enter an idle state (the idle rate is measured to be 65%), while the ripple coefficient calculation (computation-intensive) produces a backlog of tasks due to insufficient threads; blocking diffusion, lightweight tasks block and wait for heavy tasks to complete before releasing the thread pool, forming a resource deadlock. Measurement shows that when the two types of tasks are parallel, the overall computing delay increases by 210%.

[0080] The dynamic resource allocation technical solution of the present application is: 1. Predefine the weight The weight formula derivation is as follows: represents the single execution time of algorithm template i on the reference hardware (unit: ms), which is pre-stored through the metadata database.

[0081] The essence of the formula is normalization: the weight of the shortest execution time template is set to 1, and the weights of the remaining templates are enlarged by the same ratio as the execution time.

[0082] Dimension verification: the numerator and denominator are both time dimensions (ms), so W i is a dimensionless proportionality coefficient.

[0083] 2. Work stealing mechanism (algorithm basis: Cilk language task stealing theory) Triggering condition: when the ring buffer idle rate I x of the thread group G x ≥40% (first preset threshold), and there exists a buffer load L y of the thread group G y ≥80% (second preset threshold), cross-group stealing is performed.

[0084] Stealing process: Steal continuous data blocks (with original timestamp sequence) from the tail of the ring buffer of G y . Migrate the data blocks to the head of the buffer of G x by atomic operation (Compare-and-Swap). Immediately start the computing thread to process the stolen data. The physical meaning is to break the resource barrier between thread groups and convert idle threads into effective computing power. x

[0085] 3. Elastic expansion (algorithm basis: cloud computing elastic scaling model) Expansion condition: Monitor the computing delay D i of the high-weight thread group (W i > 1.0) D i ≥ 200 ms (third preset threshold).

[0086] Expansion logic: Deploy standby threads from the public resource pool , the public resource pool uses a Kubernetes-managed Docker container cluster, N add represents the number of threads that need to be dynamically increased for elastic expansion, W i represents the computational complexity weight of the i-th data processing algorithm template, determined by the execution time in the benchmark test, D i represents the computing delay of the i-th thread group, in milliseconds (ms), used to determine whether to trigger expansion; Bind the new thread to the ring buffer of the target thread group.

[0087] Dimension verification: W i (dimensionless) multiplied by D i (ms) and divided by 200 (ms) still results in a dimensionless value, meeting the integer requirement for the number of threads.

[0088] Scenario example: Ripple calculation group G1: the benchmark duration derives a weight W1 = 150 / 50 = 3.0; Power grid response group G2: the benchmark duration derives a weight W2 = 50 / 50 = 1.0; Total number of threads = 8, initial allocation: G1 thread number = 8 × 3.0 / (3.0 + 1.0) = 6, G2 thread number = 2.

[0089] Running event: G2 completes the calculation, its buffer idle rate I2 = 100% > 40%. G1 buffer load L1 = 90% > 80%; the system steals data blocks from G1 to G2, and G2 processes the data using idle threads; when G1 delay rises to D1 = 210 ms > 200 ms, triggering expansion: N add = 4, adding 4 threads to G1.

[0090] Initial resource distribution is ensured by weight proportion allocation (mathematical basis: normalization model); work stealing (improvement of computer classic algorithm) eliminates idling and blocking; elastic expansion (dimension consistency formula N add =f(W i , D i )) realizes millisecond-level resource adjustment. Actual measurement shows that resource utilization rate is improved to 98%, and high-weight task delay is reduced by 76%.

[0091] 4. Benchmark test environment of dynamic resource allocation weight formula Hardware configuration: computing node, 2x Intel Xeon Gold 6248R (3.0GHz / 24 cores); memory, 256GB DDR4 ECC; storage: NVMe SSD RAID 0 (read speed 6GB / s); Benchmark data set: DC voltage fluctuation rate, sampling rate 10kHz, duration 24 hours (864 million data points); power grid frequency response, sampling rate 1kHz, duration 24 hours (8640 million data points); Weight formula calibration method: perform full calculation on each algorithm template for 10 times, and take the average duration as T i , Ripple coefficient calculation logic, T 纹波 =150ms; power grid response determination logic, T 电网 =50ms; weight calculation: W i =T i / min(T1, T2, …). In the example, W 纹波 =150 / 50=3.0, W 电网 =50 / 50=1.0.

[0092] Threshold verification scenario: when the simulated load peak is 80%, the actual measurement result is that the high-weight thread group (ripple calculation) delay is reduced from 315ms of the traditional scheme to 72ms, and the resource utilization rate is improved from 65% to 95%.

[0093] The Chinese interpretation of technical terms and abbreviations is shown in the following table: Table 1 Chinese interpretation of technical terms and abbreviations While embodiments of the application have been disclosed in connection with the above specification and drawings this description is not intended to limit the scope of the application and many modifications, enhancements, alternatives, and variations will become apparent to those skilled in the art from this disclosure. Accordingly, it is intended that the application not be limited to the described embodiments, but that it include all variations falling within the scope of the claims, and their equivalents.

Claims

1. A method for automatically processing grid-connected test data of a photovoltaic inverter with a built-in energy storage system, characterized in that: include: Receive the original test data file through the Web server, which includes the time series data of DC bus voltage, AC output current, and battery charge and discharge power; receiving a test standard section identifier selected through a web interface and test parameters input; The distributed computing framework is called to match the corresponding data processing algorithm template according to the test standard section identifier, and the original test data file is parsed in parallel based on the test parameters. The data processing algorithm template includes ripple coefficient calculation logic and grid frequency response threshold determination logic. The ripple coefficient calculation logic is used to separate the ripple signal in the 0-100Hz frequency band, and the grid frequency response threshold determination logic is based on the target grid standard. Use multithreading to input the parsed data into multiple independent calculation threads simultaneously. Each calculation thread corresponds to the data processing flow of a test standard chapter. The following operations are performed in each calculation thread: Extract key performance indicator fields from the parsed data, execute numerical calculation logic according to the data processing algorithm template, and generate a structured result data table. Key performance indicator fields include DC voltage fluctuation rate and charge-discharge cycle efficiency; Based on the structured result data table, interactive charts are generated through the Canvas application program interface combined with the Web graphics library rendering engine. The interactive charts support real-time display of data point coordinate information and the original data sampling value of the corresponding timestamp when the cursor is hovered; The structured result data tables and interactive charts are classified and stored in a time series database according to the test standard chapter identifiers. In response to the report generation instruction, the structured result data tables and interactive charts of the specified test standard chapter are extracted from the time series database and automatically filled into the preset Word report template to generate a test report file.

2. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: Use multithreading to perform parallel computing, including: Create thread groups equal to the number of test standard sections. Each thread group is bound to an independent ring buffer with a capacity of 1024 records. Each record contains a millisecond timestamp, DC bus voltage, and AC output current fields. The timing alignment engine performs the following operations: sorting the parsed data in ascending order by the timestamp field, using the millisecond timestamp as the key, and creating a mapping relationship between timestamp, DC voltage value, and AC current value in a hash table; When the ring buffer accumulates data for 10 complete power grid cycles, the charge and discharge cycle efficiency calculation of the corresponding thread group is triggered; If the DC voltage value or AC current value data at the same timestamp is detected to be missing, an interrupt signal is sent to the exception handling coroutine and the data completion interface is called.

3. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: The steps of displaying the raw data sampling value corresponding to the time stamp in real time include: When the original test data file is uploaded, the entire file memory mapping is established through the mmap memory mapping system call to generate a read-only binary memory view; Build a Bloom filter index table, map timestamps to file storage offset addresses, and load the index table into the browser's IndexedDB cache; When a cursor hover event is triggered, the timestamp value is parsed from the data point coordinates, and the offset address is located within 1ms using a Bloom filter. The instantaneous value of the raw DC bus voltage for 64 consecutive sampling points before and after the offset address is extracted. The Catmull-Rom cubic spline interpolation algorithm is executed in a Web Worker thread to reconstruct the waveform and overlay it on the Canvas layer. The real-time calculation results of the interpolation waveform peak value and ripple coefficient are dynamically displayed at the cursor position.

4. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: The storage steps of a time series database include: The structured result data table is encoded in columnar storage format. The timestamp field is encoded using difference-of-difference compression. The DC voltage fluctuation rate field is converted to a 32-bit floating point number and then compressed using ZSTD lossless compression. Create independent metadata storage partitions for interactive charts, and name the metadata storage partitions according to standard chapter numbers; Data is written using a dynamic time slicing strategy. When the DC voltage fluctuation data sampling rate is greater than 10kHz, it automatically switches to writing data in batches every 5 seconds. Each batch of data is encapsulated in a protocol buffer format message body and comes with a CRC32 checksum. A hierarchical cache structure is built in memory, including: a first-level cache for storing the raw volatility data of the last two minutes, and a second-level cache for loading data blocks of the adjacent hour based on access frequency; When establishing a bidirectional B+ tree index, the DC voltage fluctuation rate data with a frequency greater than 100 Hz in the leaf nodes is marked as a high frequency band and independently allocated to the solid-state drive storage block.

5. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: The execution of the ripple factor calculation logic includes: Extract the instantaneous value sequence of the DC bus voltage from the key performance indicator field; The noise and real ripple signal are separated by two-stage filtering units, including: the first-stage high-pass filtering unit filters out the high-frequency noise components generated by the switching device, and the second-stage low-pass filtering unit retains the real ripple signal in the 0-100Hz frequency band; Performing sliding window peak-to-peak detection on the instantaneous value sequence of the filtered DC bus voltage, wherein the window width is synchronized with the grid cycle; A basic threshold is set based on the DC bus rated voltage, and the actual judgment threshold is dynamically adjusted according to the battery state of charge. When the battery state of charge deviates from the intermediate value, the basic threshold is proportionally corrected to generate the actual judgment threshold. When the detected peak-to-peak value exceeds the actual decision threshold, an anomaly is marked in the structured result data table and an interactive chart is triggered to highlight the abnormal frequency band in the spectrum waterfall diagram.

6. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: The steps to generate a Word report template include: Pre-embed the dynamic field code of the IEC standard chapter number in the DOCX template file; Write the DC voltage fluctuation rate data into the specified table through the XWPF table interface of the Apache Document Processing Toolkit; When calling the enhanced metafile conversion interface, execute the set resolution method to set the output resolution; Automatically add standard chapter number text labels below a figure when you insert it.

7. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 2, characterized in that: After generating an interactive chart, execute the abnormal data tracing process: Receive data anomaly location instructions triggered by the user through the visual interface, the instructions including the pixel coordinates of the cursor on the chart; Reverse mapping the pixel coordinates to associated record rows in the structured result data table, including: extracting the logical coordinates of the data point using the pixel reading method of the Web graphics library, querying the reverse index table of the time series database using the logical coordinates of the data point as a key, and obtaining the primary key of the record row; Based on the associated record behavior, a three-level timestamp alignment search is performed in the original test data file, including: primary search, which performs a binary search based on the timestamp field of the record row; secondary search, which scans adjacent records with a ±10ms time window if the primary search fails; and fault-tolerant search, which calls a Bloom filter to verify the existence of the timestamp. The retrieved raw data records and the contextual data of the 32 sampling points before and after them are synchronously marked through the heat map layer in the interactive chart. The thermal color scale reflects the multiple of the standard deviation of the data.

8. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: The distributed computing framework performs dynamic resource allocation including: Predefine the computational complexity weight for each data processing algorithm template. The weight value is determined based on the benchmark test duration and stored in the metadata database. When creating a thread group, initial thread resources are allocated according to the weight ratio. Thread groups with higher complexity weights are allocated more threads. The runtime dynamically balances the load through a work stealing mechanism. Specifically, when the idle rate of the ring buffer of a thread group reaches a first preset threshold, the data block carrying the original timestamp sequence is stolen from the thread group whose buffer load exceeds a second preset threshold, and is migrated to the idle thread group through atomic operations. The computational latency of each thread group is monitored in real time. If the latency of a high-weight thread group exceeds a third preset threshold, spare threads are dynamically allocated from the public resource pool for elastic capacity expansion.

9. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 8, characterized in that: The first preset threshold, the second preset threshold, and the third preset threshold are 40%, 80%, and 200ms, respectively.

10. The method for automatically processing grid-connected test data of a photovoltaic inverter with built-in energy storage system according to claim 1, characterized in that: Target grid standards include IEC 62116 and / or UL 1741.

Images