Wafer defect detection method, computer program product and computer device

Abstract

The application provides a wafer defect detection method, a computer program product and a computer device. The method comprises the following steps: obtaining a defect hotspot area of a wafer to be detected; performing electron beam scanning simulation on the defect hotspot area to obtain an electron distribution reference image of the defect hotspot area; obtaining an electron distribution detection image obtained by detecting the defect hotspot area by using an electron beam detection device according to the simulated scanning parameters; and comparing the electron distribution reference image and the electron distribution detection image, and marking a difference position as a defect point. According to the method, the number of images collected by the electron beam detection device is greatly reduced, and the detection speed is greatly improved, so that the efficiency of the electron beam detection device is improved, and the demand for wafer batch manufacturing is met.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of image data processing for semiconductor defect detection, and in particular, to a wafer defect detection method, a computer program product and a computer device. BACKGROUND

[0002] The core technical bottleneck in the field of semiconductor wafer defect detection lies in the fundamental contradiction between the atomic-level defect scale of advanced processes and the efficiency demand of mass production.

[0003] The specific performance of the above technical bottleneck is that: the optical detection technology has the advantage of high speed, but due to the limitation of optical diffraction limit, it cannot analyze the nanoscale defect morphology, and can only provide defect coordinates, and the false positive rate for multi-layer stacked structure is more than 40%; the electron beam detection technology can realize atomic-level resolution and three-dimensional defect reconstruction, but is limited by the single-point scanning mechanism and beam stability requirements, and the detection speed is extremely low, which leads to the production bottleneck in the hybrid detection mode. The combination scheme of optical detection for preliminary screening and electron beam detection for point-by-point review has appeared in the prior art. The optical detection device performs defect preliminary screening on the wafer under test, records the defect information such as position and shape, the electron beam detection device performs coordinate calibration according to the defect information, and performs point-by-point image capture according to the defect information to perform defect re-inspection and obtain the defect re-inspection result. Due to the time-consuming of repeated positioning and the interference of optical artifacts, the scheme cannot meet the economic requirements of advanced process defect coverage and online full inspection, which seriously restricts the yield climbing.

[0004] The above technical problems reflect the irreconcilable conflict between detection accuracy and detection speed: optical detection is limited by physical laws to approach the technical limit, while the efficiency bottleneck of electron beam detection makes it long-term limited to research and development and sampling inspection scenes. Therefore, the field urgently needs breakthrough innovation to realize the unity of atomic-level precision and mass production efficiency of semiconductor processes. SUMMARY

[0005] In view of the above problems, the present application provides a wafer defect detection method, a computer program product and a computer device which overcome the above problems or at least partially solve the above problems.

[0006] An object of the present application is to reduce the number of image acquisition of the electron beam detection device and improve the image acquisition speed.

[0007] In particular, the present application provides a wafer defect detection method, comprising:

[0008] Obtaining a defect hotspot area of a wafer under test;

[0009] Performing electron beam scanning simulation on the defect hotspot area to obtain an electron distribution reference image of the defect hotspot area;

[0010] acquire an electron distribution detection image obtained by the electron beam detection device detecting the defect hotspot area according to the simulated scanning parameters;

[0011] compare the electron distribution reference image and the electron distribution detection image, and mark the difference position as a defect point.

[0012] Optionally, the step of comparing the electron distribution reference image and the electron distribution detection image comprises:

[0013] acquire a pre-constructed image processing model;

[0014] process the electron distribution reference image and the electron distribution detection image into quality-enhanced images under the same parameter reference by using the image processing model, to form a pair of comparison images;

[0015] perform difference comparison using the pair of comparison images.

[0016] Optionally, the step of constructing the image processing model comprises:

[0017] acquire a source model for image quality enhancement processing;

[0018] perform transfer learning on the source model using a pre-acquired electron beam scanning image dataset, and construct the image processing model, wherein the images in the electron beam scanning image dataset are pre-labeled according to whether they meet the conditions required for comparison.

[0019] Optionally, the parameter reference comprises any one or more of the following: image contrast reference, image density reference, image sharpness reference.

[0020] Optionally, the step of acquiring the defect hotspot area of the wafer under test comprises:

[0021] perform an optical proximity correction process on the wafer under test, and record the hotspot positions found by the optical proximity correction process;

[0022] convert the hotspot positions into defect hotspot areas by using an offline recipe editing function in the optical proximity correction process, and record the defect hotspot areas in a process parameter combination file generated by the optical proximity correction process.

[0023] Optionally, after the step of converting the hotspot positions into defect hotspot areas, the method further comprises: configuring a parameter set for the probe die according to the defect hotspot area, and keeping the parameters of the reference die blank and unconfigured; the parameter set for the probe die comprises: index, coordinates, and size of the die; and

[0024] after obtaining the electron distribution reference image of the defect hotspot area, the method further comprises: storing the parameter set for the probe die and the electron distribution reference image in the process parameter combination file, respectively.

[0025] Optionally, the step of obtaining the electron distribution detection image obtained by the electron beam detection device detecting the defect hotspot area according to the simulated scanning parameter comprises:

[0026] reading the process parameter combination file, and converting the defect hotspot area into detection parameters of the electron beam detection device;

[0027] detecting the defect hotspot area by the electron beam detection device according to the detection parameters and the scanning parameter;

[0028] taking the image obtained by the electron beam detection device as the electron distribution detection image, and storing the image.

[0029] Optionally, the scanning parameter comprises a scanning point average parameter, a scanning line average parameter, and a scanning frame average parameter.

[0030] According to still another aspect of the present application, a computer device is also provided, which comprises a memory, a processor, and a machine executable program stored in the memory and running on the processor, and the processor implements the steps of any of the wafer defect detection methods when executing the machine executable program.

[0031] The wafer defect detection method of the present application obtains a defect hotspot area of a wafer to be detected, uses electron beam scanning simulation to obtain an electron distribution reference image, detects the defect hotspot area by an electron beam detection device according to a simulated scanning parameter to obtain an electron distribution detection image, and processes the electron distribution reference image and the electron distribution detection image into a contrast image pair meeting a difference contrast condition, so that the difference position can be accurately marked as a defect point, and the pertinence and accuracy of wafer defect detection are improved. Compared with comprehensive detection, unnecessary detection processes are reduced, and detection efficiency is improved. The number of images that need to be collected by the electron beam detection device is greatly reduced, and the detection speed is greatly improved, so that the efficiency of the electron beam detection device is improved, and the demand of wafer batch manufacturing is met.

[0032] Further, the wafer defect detection method of the present application is based on an AI image enhancement algorithm, a small-scale Scanning Electron Microscope (SEM) image dataset is constructed, a model is fine-tuned using data migration technology, an image processing model is constructed, and is used to realize Image Quality Enhancement (IQE), so that the signal-to-noise ratio and image sharpness are improved, and the image contrast and image density parameters of the image pair are adjusted to a unified benchmark, so as to improve the accuracy of image difference contrast.

[0033] Further, the wafer defect detection method of the present application utilizes a hotspot query function of an OPC process to obtain a defect hotspot region, and converts the defect hotspot region into a detection parameter of an electron beam detection device when detection is performed by the electron beam detection device; the electron beam detection device performs detection in the defect hotspot region according to the detection parameter and a scanning parameter, thereby avoiding the use of a GDS to design the defect hotspot region and avoiding the difficulty of hotspot positioning by the electron beam detection device, and reducing invalid detection.

[0034] The above and other objects, advantages and features of the present application will become more apparent from the following detailed description of some embodiments thereof, when taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0035] Some embodiments of the present application will now be described in detail with reference to the drawings, which are provided by way of example and not limitation. Like references refer to like elements throughout the drawings. It should be noted that the drawings are not necessarily drawn to scale. In the drawings:

[0036] Figure 1 is a schematic diagram of a wafer defect detection method according to an embodiment of the present application;

[0037] Figure 2 is a schematic diagram of an image comparison step in a wafer defect detection method according to an embodiment of the present application;

[0038] Figure 3 is a schematic diagram of a construction step of an image processing model in a wafer defect detection method according to an embodiment of the present application;

[0039] Figure 4 is a schematic diagram of an OPC process in a wafer defect detection method according to an embodiment of the present application;

[0040] Figure 5 is a schematic diagram of a detection process of an electron beam detection device in a wafer defect detection method according to an embodiment of the present application;

[0041] Figure 6 is a schematic diagram of a computer program product according to an embodiment of the present application;

[0042] Figure 7 is a schematic diagram of a computer readable storage medium according to an embodiment of the present application;

[0043] Figure 8 is a schematic diagram of a computer device according to an embodiment of the present application. DETAILED DESCRIPTION

[0044] Those skilled in the art will understand that the embodiments described below are merely a part of the embodiments of the present application, and are not the whole embodiments of the present application, and the part of the embodiments are intended to explain the technical principles of the present application, and are not intended to limit the protection scope of the present application. Based on the embodiments provided by the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort shall fall within the protection scope of the present application.

[0045] It should be noted that the logic and / or the steps represented in the flowcharts or otherwise described herein, for example, can be considered as a list of executable instructions for implementing logic functions, and can be specifically embodied in any computer readable medium for use by an instruction execution system, apparatus or device, such as a computer-based system, a system including a processor, or other system that can fetch and execute instructions from the instruction execution system, apparatus or device, or in conjunction with these instructions.

[0046] In the semiconductor production process, the resolution limit of optical imaging itself and the design problem of mask pattern can cause potential defects on the wafer, and the positions where the potential defects exist can be referred to as hot spots, and the areas where the hot spots are located are defect hot spot areas.

[0047] Optical proximity correction (OPC) is a technical means for compensating for optical proximity effect (OPE) in the photolithography process. OPC adds some auxiliary patterns or changes the shape, size, position, etc. of the original patterns on the mask by pre-adjusting and modifying the patterns on the mask, so as to offset the influence of the optical proximity effect, so that the patterns finally formed on the wafer are as close as possible to the ideal design patterns, and the precision and yield of chip manufacturing are improved. In the optical proximity correction process, a hot spot finding function (HotSpot Finder) can be added, which determines the position of the Hot Spot on the wafer in the relative position by combining the material and geometric information of the previous layer and the current layer of the chip.

[0048] In some related technologies of the present application, a script can be developed according to GDS and photolithography exposure effect design rules, the script is used to generate hot spots on the GDS, and then a clustering technology is used to convert the hot spots into defect detection hot spot areas (or care areas). The hot spot areas are further converted into detection parameters (Recipe) of an electron beam detection device. The electron beam detection device performs online inspection according to the detection parameters. The detection parameters can include detection positions, scanning modes, etc.

[0049] However, generating hot spots on the GDS by using scripts requires full understanding of the GDS design and the exposure performance of the lithography machine, which makes it difficult to accurately locate the hot spots. On the other hand, the electron beam detection device detects according to the detection parameters corresponding to the generated hot spots, and the throughput still cannot meet the needs of the wafer foundry.

[0050] The wafer defect detection method of the embodiment can accurately predict the defect hot spot area, and reduce the number of SEM images required for detection by reducing the detection conditions of the electron beam detection device, thereby improving the detection efficiency and reducing the detection time.

[0051] Figure 1 FIG. 1 is a schematic diagram of a wafer defect detection method according to an embodiment of the present application. The wafer defect detection method can generally include:

[0052] In step S101, the defect hot spot area of the wafer to be detected is obtained.

[0053] The defect hot spot area can be determined during the execution of the optical proximity correction process. For example, the step of obtaining the defect hot spot area of the wafer to be detected can include: executing the optical proximity correction process of the wafer to be detected, and recording the hot spot positions found by the optical proximity correction process; converting the hot spot positions into defect hot spot areas by using the offline recipe editing function in the optical proximity correction process, and recording in the process parameter combination file generated by the optical proximity correction process. Thus, this step can accurately obtain the defect hot spot area based on the optical proximity correction process, provide an accurate detection range for subsequent targeted detection, and improve the accuracy and targeting of the detection. The process parameter combination file Recipe can be used to record the parameter set of the detected wafer and the electron distribution reference image obtained by the subsequent simulation.

[0054] In step S102, electron beam scanning simulation is performed on the defect hot spot area to obtain an electron distribution reference image of the defect hot spot area. The electron distribution reference image obtained by the electron beam scanning simulation serves as a reference image (golden image) for subsequent comparison, and the electron distribution reference image represents the ideal state of the semiconductor.

[0055] In step S103, an electron distribution detection image obtained by detecting the defect hot spot area according to the simulated scanning parameters by the electron beam detection device is obtained.

[0056] The electron beam inspection apparatus can obtain the information of the defect hotspot area according to a recipe generated by an optical proximity correction process in advance. In some embodiments, the optical proximity correction process can further configure a parameter set of a detection die according to the defect hotspot area after the step of converting the hotspot position into the defect hotspot area, and keep the parameters of a reference die as blank and not configured. The parameters of the reference die are replaced by the electron distribution reference image.

[0057] The parameter set of the detection die and the electron distribution reference image are stored in a recipe respectively. The recipe is exported and used for inspection by the electron beam inspection apparatus and image difference comparison.

[0058] The parameter set of the detection die can include the index, coordinates and size of the die, which define the position of the defect hotspot area, thereby greatly reducing the scanning range of the electron beam inspection apparatus and improving the efficiency.

[0059] The inspection step of the electron beam inspection apparatus can include reading the recipe and converting the defect hotspot area into inspection parameters of the electron beam inspection apparatus, performing inspection in the defect hotspot area by the electron beam inspection apparatus according to the inspection parameters and scanning parameters, and storing the image obtained by the electron beam inspection apparatus as an electron distribution inspection image. The inspection process of the electron beam inspection apparatus is more targeted, thereby shortening the scanning time of the wafer.

[0060] The scanning parameters include dot average parameters, line average parameters and frame average parameters. In this embodiment, each defect hotspot area is simulated to obtain the same scanning physical effects of the electron gun in the defect hotspot area, including dot average, line average and frame average. The electron beam inspection apparatus also performs the same electron beam scanning in the defect hotspot area, including dot average, line average and frame average. The above-mentioned dot average, line average and frame average can be set to 1. By using the advantages of the simulation algorithm, the speed of image acquisition is improved, which can ensure stable and reliable scanning image quality and improve the speed of image acquisition.

[0061] In step S104, the electron distribution reference image and the electron distribution inspection image are compared, and the difference position is marked as a defect point.

[0062] Figure 2 is a schematic diagram of an image comparison step in a wafer defect detection method according to an embodiment of the present application. The step of comparing the electron distribution reference image and the electron distribution detection image can include:

[0063] In step S201, an image processing model previously constructed is obtained.

[0064] In step S202, the electron distribution reference image and the electron distribution detection image are processed into quality-enhanced images under the same parameter reference using the image processing model, forming a pair of comparison images.

[0065] In step S203, difference comparison is performed using the pair of comparison images.

[0066] The electron distribution detection image is obtained by scanning a real wafer using an electron beam detection device, and may be affected by scanning conditions, wafer material characteristics, device noise, etc., thereby having differences in image quality with the electron distribution reference image, which can cause misjudgment in comparison. Therefore, the method of the present embodiment enhances the image quality to perform difference comparison using the pair of comparison images, and adjusts the image quality to a uniform level.

[0067] The processing process of the pair of comparison images is realized by artificial intelligence (AI) image processing. After processing, the image quality of the pair of comparison images is greatly improved, comparison can be performed under the same standard, comparison errors caused by differences in image quality parameters are eliminated, and the accuracy and reliability of the defect detection result are further improved.

[0068] Figure 3 is a schematic diagram of a construction step of an image processing model in a wafer defect detection method according to an embodiment of the present application. The construction step of the image processing model can include:

[0069] In step S301, a source model for image quality enhancement processing is obtained.

[0070] In step S302, the source model is subjected to transfer learning using a previously collected electron beam scanning image dataset, and an image processing model is constructed. The images in the electron beam scanning image dataset are previously labeled according to whether they meet the required conditions for comparison. Using the labeled electron beam scanning image dataset to perform transfer learning to construct the image processing model can make the model more suitable for the characteristics of the electron beam scanning image, and reduce the amount of data required for model training. Using a general image processing model, the electron beam scanning image dataset is fine-tuned to better adapt to the application scenario of defect recognition of the present embodiment.

[0071] The parameter reference includes any one or more of the following: an image contrast reference, an image density reference, and an image sharpness reference. The image contrast reflects the light and dark contrast between different regions in the image (such as defects and normal regions, material boundaries, etc.). In a high-contrast image, the target region and the background are significantly different, and the defect profile is easier to identify; in a low-contrast image, the details may be lost due to the blurred light and dark differences. The image density reflects the signal intensity distribution density of the pixels in the image, and the over-darkness or signal fluctuation affects the contrast accuracy. The image sharpness reflects the clarity of the edges and the richness of the details in the image. In a high-sharpness image, the edges are clear, and the details are more abundant. The unification of the parameter reference provides more detailed and accurate parameter specifications for accurately identifying defect points in the contrast image, and improves the accuracy of the contrast. The image contrast reference, the image density reference, and the image sharpness reference are respectively configured according to the characteristics of the wafer image and the comparison needs.

[0072] The wafer defect detection method of the embodiment acquires a defect hotspot area of a wafer to be detected, obtains an electron distribution reference image by using electron beam scanning simulation, detects an electron distribution detection image in the defect hotspot area according to the simulated scanning parameters by using an electron beam detection device, and processes the electron distribution reference image and the electron distribution detection image into a contrast image pair that meets a difference comparison condition, so that the difference position can be accurately marked as a defect point, the pertinence and accuracy of wafer defect detection are improved, unnecessary detection processes are reduced compared with comprehensive detection, and the detection efficiency is improved. The number of images that need to be collected by the electron beam detection device is greatly reduced, and the detection speed is greatly improved, so that the efficiency of the electron beam detection device is improved, and the demand of wafer batch manufacturing is met.

[0073] The method of the embodiment mainly includes two parts: the first part is the improvement of the OPC process to determine the defect hotspot area; and the second part is the modification of the detection (inspection) process of the electron beam detection device.

[0074] Figure 4 FIG. 1 is a schematic diagram of an OPC process in a wafer defect detection method according to an embodiment of the present application; the OPC process can include:

[0075] In step S401, an optical proximity correction (OPC) process is performed.

[0076] In step S402, a hot spot finder function is run to determine the position of a hot spot Hot Spot by combining the material and geometric information of the previous layer and the current layer of the chip and the relative position on the wafer.

[0077] In step S403, an offline recipe editor function is used to convert the hot spot Hot Spot position into a suitable defect hotspot area Care Area.

[0078] Step S404, set the reference die information, only set the detection die, and keep the parameters of the reference die blank and not configured;

[0079] Step S405, set other parameters of the process parameter combination file Recipe, archive and export.

[0080] Figure 5 FIG. 1 is a schematic diagram of a detection process of an electron beam detection device in a wafer defect detection method according to an embodiment of the present application; the detection process of the electron beam detection device can include:

[0081] Step S501, perform electron beam scanning simulation on each defect hot spot area, simulate the scanning physical effect of the electron gun in the Hot Spot area, and perform dot average, line average, and frame average all being 1.

[0082] Step S502, collect an electron distribution image (EDI) formed by secondary electrons in the defect hot spot area Hot Spot area as an electron distribution reference image golden image, and store it. The defect detection algorithm is set to an inspection process based on the golden image, which can reduce the number of image captures.

[0083] Step S503, store the electron distribution reference image golden image into the process parameter combination file Recipe.

[0084] Step S504, the electron beam detection device reads the process parameter combination file Recipe, and detects in the defect hot spot area with scanning parameters of dot average, line average, and frame average all being 1, and captures the electron distribution detection image.

[0085] Step S505, the electron distribution detection image and the corresponding electron distribution reference image golden image form a comparison image pair, and perform defect detection calculation.

[0086] Step S506, the electron distribution detection image and the corresponding electron distribution reference image are processed by an image quality enhancement algorithm IQE to improve the signal-to-noise ratio and image sharpness, and to adjust the image contrast and image density of the image pair to a uniform level. The image quality enhancement algorithm IQE can be an AI-based image enhancement algorithm. A small-scale SEM image dataset is constructed, and a data migration technology is used to fine-tune the model to improve the adaptability of the model.

[0087] Step S507, the image pair after IQE processing is used for defect detection. The electron distribution detection image and the electron distribution reference image are compared, and the places where the images differ are marked to identify the defects and their positions.

[0088] The above method breaks through the technical barriers through the OPC technology, identifies the Hot Spot, reduces unnecessary defect hot spot areas, greatly improves the detection efficiency of the electron beam detection equipment, and through the AI-based image simulation and image enhancement technology, the lowest sampling condition can be used to perform the golden image-based inspection process, thereby further improving the sampling speed and greatly improving the equipment throughput.

[0089] The embodiment also provides a computer program product 10, a computer readable storage medium 20, and a computer device 30. Figure 6 is a schematic diagram of the computer program product 10 according to an embodiment of the present application, Figure 7 is a schematic diagram of the computer readable storage medium 20 according to an embodiment of the present application, Figure 8 is a schematic diagram of the computer device 30 according to an embodiment of the present application. The computer program product 10 includes a computer program 11, which, when executed by the processor 32, implements the steps of any of the wafer defect detection methods described above. The computer readable storage medium 20 stores the computer program 11 described above, and the computer program 11, when executed by the processor 32, implements the steps of any of the wafer defect detection methods described above. The computer device 30 can include a memory 31, a processor 32, and a computer program 11 stored on the memory 31 and running on the processor 32.

[0090] Computer program 11, which can also comprise programs 11 for performing operations of the present application, can be assembly instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state setting data, configuration data for an integrated circuit, or source code or object code written in any combination of one or more programming languages and processes. Computer program 11 can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer, or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate array (FPGA), or programmable logic array (PLA) can execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present application.

[0091] For the purposes of this description, computer program product 10 is a product of authorship that can include any physical or electronic device readable content, and can be a manufacture or composition of matter that results from the putting together or making of constituent parts, or a combination of physical components and computer readable code. For the purposes of this description, computer readable storage medium 20 is a tangible device that can retain and store computer program instructions for execution by an instruction execution device, apparatus, or machine. More specifically, computer readable storage medium 20 can be, for example, a computer readable storage medium that can include one or more of read-only memory (ROM); random access memory (RAM); electrically erasable programmable read only memory (EEPROM); compact disc read-only memory (CD-ROM); digital versatile disc (DVD); flash memory; cache memory; phase-change memory; and / or other storage — tangible device(s) that can retain and store instructions for processing by an instruction execution device. Accordingly, computer readable storage medium 20 can be, for example, a non-transitory computer readable storage medium. Therefore, computer readable storage medium 20 can not comprise signals. Additionally, computer readable storage medium 20 can be a computer readable storage medium that can communicate with an instruction execution device to provide the one or more instructions to the device or machine. Computer readable storage medium 20 can form, for example, a computer program product.

[0092] The computer device 30 can be, for example, a server, a desktop computer, a notebook computer, a tablet computer, or a smart phone. In some examples, the computer device 30 can be a cloud computing node. The computer device 30 can be described in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules can include routines, programs, objects, components, logic, data structures, and so on that perform particular tasks or implement particular abstract data types. The computer device 30 can be practiced in distributed cloud computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed cloud computing environment, program modules can be located in both local and remote computer system storage media including memory storage devices.

[0093] The computer device 30 can include a processor 32 adapted to execute stored instructions, a memory 31 that provides temporary storage for operations of the instructions during operation. The processor 32 can be a single core processor, a multi-core processor, a computing cluster, or any number of other configurations. The memory 31 can include random access memory (RAM), read only memory, flash memory, or any other suitable storage system.

[0094] The computer device 30 can also include a network adapter / interface and an input / output (I / O) interface. The I / O interface allows for input and output of data with external devices that can be connected to the computer device. The network adapter / interface can provide for communication between the computer device and a network, typically illustrated as a communication network.

[0095] To this end, it will be appreciated that, although specific embodiments of the application have been described herein for purposes of illustration, various modifications can be made in the details of the application without departing from the spirit and scope thereof. Therefore, it is to be understood that the scope of the application is not to be limited to the specific examples disclosed and that modifications or variations are possible so long as the spirit or principles of the application remain unaltered.

Claims

1. A method of detecting defects of a wafer, characterized by The method comprises the following steps: acquiring a defect hotspot area of a wafer to be detected; performing electron beam scanning simulation on the defect hotspot area to obtain an electron distribution reference image of the defect hotspot area, and storing the electron distribution reference image in a reference image of a process parameter combination file generated in an optical proximity correction process; acquiring an electron distribution detection image obtained by detecting the defect hotspot area by an electron beam detection device according to the simulated scanning parameters, the electron beam detection device pre-acquiring information of the defect hotspot area according to the process parameter combination file; comparing the electron distribution reference image and the electron distribution detection image, and marking a difference position as a defect point.

2. The wafer defect detection method according to claim 1, wherein The step of comparing the electron distribution reference image and the electron distribution detection image comprises the following steps: acquiring a pre-constructed image processing model; processing the electron distribution reference image and the electron distribution detection image into quality-enhanced images under the same parameter reference by using the image processing model to form a comparison image pair; performing difference comparison by using the comparison image pair.

3. The wafer defect detection method according to claim 2, wherein The step of constructing the image processing model comprises the following steps: acquiring a source model for image quality enhancement processing; performing transfer learning on the source model by using a pre-acquired electron beam scanning image data set, and constructing the image processing model, wherein images in the electron beam scanning image data set are pre-labeled according to whether they meet the required conditions for comparison.

4. The wafer defect detection method according to claim 2, wherein the parameter reference comprises any one or more of the following: an image contrast reference, an image density reference, and an image sharpness reference.

5. The wafer defect detection method according to claim 1, wherein The step of acquiring the defect hotspot area of the wafer to be detected comprises the following steps: performing an optical proximity correction process on the wafer to be detected, and recording hotspot positions queried by the optical proximity correction process; converting the hotspot positions into the defect hotspot area by using an offline recipe editing function in the optical proximity correction process, and recording the defect hotspot area in a process parameter combination file generated by the optical proximity correction process.

6. The wafer defect detection method according to claim 5, wherein after the step of converting the hotspot positions into the defect hotspot area, the method further comprises the following steps: configuring a parameter set of a detection wafer grain according to the defect hotspot area, and keeping parameters of a reference wafer grain as blank and not configured; the parameter set of the detection wafer grain comprises an index, a coordinate, and a size of the wafer grain, and after obtaining the electron distribution reference image of the defect hotspot area, the method further comprises the following step: storing the parameter set of the detection wafer grain in the process parameter combination file.

7. The wafer defect detection method according to claim 5, wherein The step of acquiring the electron distribution detection image obtained by detecting the defect hotspot area by the electron beam detection device according to the simulated scanning parameters comprises the following steps: reading the process parameter combination file, and converting the defect hotspot area into detection parameters of the electron beam detection device; detecting the defect hotspot area by the electron beam detection device according to the detection parameters and the scanning parameters; The image detected by the electron beam detection device is taken as the electron distribution detection image and stored.

8. The wafer defect detection method according to claim 1, wherein, The scanning parameters include a scanning point average parameter, a scanning line average parameter, and a scanning frame average parameter.

9. A computer program product, characterised in that A computer program is included, which, when executed by a processor, implements the steps of the wafer defect detection method according to any one of claims 1 to 8.

10. A computer device, comprising: A memory, a processor, and a computer program stored on the memory and running on the processor are included, and the processor, when executing the computer program, implements the steps of the wafer defect detection method according to any one of claims 1 to 8.

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