Wideband amplifier

Abstract

The invention relates to a broadband amplifier. The broadband amplifier provided by the embodiment of the invention comprises an input stage transistor module which is configured to be switched on or switched off under the control of an input voltage so as to control the output of a first internal voltage; the divider resistance module is configured to divide the first internal voltage to obtain a second internal voltage and output the second internal voltage; an output stage transistor module coupled in series with the input stage transistor module to receive the first internal voltage, and configured to be turned on or off under the control of the second internal voltage to control the output of an output voltage determined according to the second internal voltage; a first current source module configured as a current source load of the output stage transistor module; and the second current source module is configured to provide current for the divider resistance module so as to promote generation of a second internal voltage. According to the embodiment of the invention, the adjustable range of the output voltage is expanded, and the circuit can be more suitable for a high-speed circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit, in particular to a wideband amplifier. BACKGROUND

[0002] A shunt regulator built with bipolar transistors (referred to as triodes) can be called a common collector amplifier, and a shunt regulator built with metal-oxide-semiconductor field-effect transistors (referred to as MOS transistors) can be called a common drain amplifier. For example, the common collector amplifier, because its output voltage is equal to the input voltage minus the base-emitter voltage, and the base-emitter voltage is logarithmically related to the collector current, so even if the collector current changes, the base-emitter voltage is almost constant, the adjustable range of the output voltage of the common collector amplifier is very small, and the adjustable range of the output voltage of the common drain amplifier is also very small.

[0003] When the common collector / drain amplifier is used as a wideband amplifier, it is crucial to expand the adjustable range of its output voltage. SUMMARY

[0004] Therefore, the embodiments of the present application provide a wideband amplifier to solve at least one problem in the background art.

[0005] The embodiments of the present application provide a wideband amplifier, which comprises:

[0006] An input stage transistor module configured to be turned on or off under the control of an input voltage to control the output of a first internal voltage;

[0007] A voltage dividing resistor module configured to divide the first internal voltage to obtain a second internal voltage and output;

[0008] An output stage transistor module coupled in series with the input stage transistor module to receive the first internal voltage, and configured to be turned on or off under the control of the second internal voltage to control the output of an output voltage determined according to the second internal voltage;

[0009] A first current source module configured as a current source load of the output stage transistor module; and

[0010] A second current source module configured to provide a current to the voltage dividing resistor module to facilitate the generation of the second internal voltage.

[0011] In an optional embodiment, the second current source module is an adjustable current source.

[0012] In an optional embodiment, the second current source module is a PTAT current source.

[0013] In an optional embodiment, the input stage transistor module comprises a first triode; the output stage transistor module comprises a second triode; and the voltage dividing resistor module comprises a first resistor;

[0014] The base of the first triode is configured to input the input voltage, the collector of the first triode is connected to a power supply voltage terminal, and the emitter of the first triode is connected to the collector of the second triode.

[0015] The first end of the first resistor is connected to the collector of the second triode, and the second end of the first resistor is connected to the base of the second triode and the first end of the second current source module, respectively.

[0016] The first end of the first current source module is connected to the emitter of the second triode and configured to output the output voltage, and the second end of the first current source module and the second end of the second current source module are connected to a ground terminal, respectively.

[0017] In an optional embodiment, the input stage transistor module further comprises a plurality of base-collector connected third triodes.

[0018] The plurality of third triodes are connected in series between the emitter of the first triode and the collector of the second triode.

[0019] In an optional embodiment, the output stage transistor module further comprises a plurality of base-collector connected fourth triodes.

[0020] The plurality of fourth triodes are connected in series between the emitter of the second triode and the first end of the first current source module.

[0021] In an optional embodiment, the input stage transistor module further comprises a fifth triode and a sixth triode.

[0022] The emitter of the first triode is connected to the collector of the fifth triode, the base of the fifth triode, and the base of the sixth triode, respectively, the collector of the first triode is connected to the collector of the sixth triode, and the emitter of the fifth triode and the emitter of the sixth triode are connected to the collector of the second triode, respectively.

[0023] In an optional embodiment, the wideband amplifier further comprises:

[0024] A first capacitor is connected in parallel across the first resistor.

[0025] In an optional embodiment, the input stage transistor module comprises a first MOS tube M1; the output stage transistor module comprises a second MOS tube M2; and the voltage dividing resistor module comprises a first resistor R1.

[0026] The gate of the first MOS is configured to input the input voltage, the drain of the first MOS is connected with the power voltage terminal, and the source of the first MOS is connected with the drain of the second MOS;

[0027] The first end of the first resistor is connected with the drain of the second MOS, and the second end of the first resistor is connected with the gate of the second MOS and the first end of the second current source module respectively;

[0028] The first end of the first current source module is connected with the source of the second MOS and configured to output the output voltage, and the second end of the first current source module and the second end of the second current source module are connected with the ground terminal respectively.

[0029] In an optional embodiment, the input stage transistor module further comprises a plurality of gate and drain connected third MOS;

[0030] The plurality of third MOS are connected in series between the source of the first MOS and the drain of the second MOS.

[0031] In an optional embodiment, the output stage transistor module further comprises a plurality of gate and drain connected fourth MOS;

[0032] The plurality of fourth MOS are connected in series between the source of the second MOS and the first end of the first current source module.

[0033] In an optional embodiment, the input stage transistor module further comprises a fifth MOS and a sixth MOS;

[0034] The source of the first MOS is connected with the drain of the fifth MOS, the gate of the fifth MOS and the gate of the sixth MOS respectively, the drain of the first MOS is connected with the drain of the sixth MOS, and the source of the fifth MOS and the source of the sixth MOS are connected with the drain of the second MOS respectively.

[0035] The technical scheme provided by the embodiment has the beneficial effects that the output stage transistor module and the input stage transistor module are coupled in series to form a structure of two-stage shunt regulator, the second internal voltage is adjusted through the voltage dividing resistor module and the second current source module, the output voltage output by the output stage transistor module is regulated by the second internal voltage, the adjustable range of the output voltage is expanded, the input impedance of the wideband amplifier is improved, the output impedance of the wideband amplifier is reduced, and the wideband amplifier is more suitable for application in high-speed circuits.

[0036] The additional aspects and advantages of the embodiments of the present application will be in part apparent and in part pointed out below in the description of the embodiments of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0037] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and serve to explain the principles of the present application. In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments will be briefly introduced as follows. Obviously, those skilled in the art can further obtain other drawings from these drawings without any creative effort. These drawings and the description are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application for those skilled in the art by referring to specific embodiments. In the drawings:

[0038] Figure 1 a schematic diagram of a specific example of a wideband amplifier in the embodiments of the present application;

[0039] Figure 2 a circuit diagram of example one of the wideband amplifier in the embodiments of the present application;

[0040] Figure 3 a circuit diagram of example two of the wideband amplifier in the embodiments of the present application;

[0041] Figure 4 a circuit diagram of example three of the wideband amplifier in the embodiments of the present application;

[0042] Figure 5 a circuit diagram of example four of the wideband amplifier in the embodiments of the present application;

[0043] Figure 6 a circuit diagram of example five of the wideband amplifier in the embodiments of the present application;

[0044] Figure 7 a circuit diagram of example six of the wideband amplifier in the embodiments of the present application. DETAILED DESCRIPTION

[0045] In order to make the technical solutions and advantages of the embodiments of the present application more apparent and understandable, the embodiments will be described in detail below by way of enumeration. The drawings are not necessarily drawn to scale, and local features can be enlarged or reduced to more clearly show the details of the local features. Unless otherwise defined, the technical and scientific terms used herein have the same meaning as the technical and scientific terms in the technical field to which the embodiments of the present application belong.

[0046] It should be noted that the terms "first", "second", etc. can be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. When "first" is described, it does not necessarily mean that "second" must exist; when "second" is discussed, it does not necessarily mean that "first" must exist. The singular form "a", "an" and "the" can also be intended to include the plural form, unless the context clearly indicates otherwise. The term "includes" is used to determine the presence of the features included, but does not exclude the presence or addition of one or more other features. The term "and / or" includes any and all combinations of the related listed items. The term "a plurality of" means two or more.

[0047] The embodiment of the present application provides a wideband amplifier, which can also be called a high bandwidth amplifier, which can be applied to an analog front-end circuit of an instrument such as a signal source or an oscilloscope. Figure 1 As shown in the figure, the wideband amplifier 01 comprises:

[0048] The input stage transistor module 10 is configured to be turned on or off under the control of the input voltage VIN to control the output of the first internal voltage V1;

[0049] The voltage dividing resistor module 30 is configured to divide the first internal voltage V1 to obtain the second internal voltage V2 and output;

[0050] The output stage transistor module 20 is coupled in series with the input stage transistor module 10 to receive the first internal voltage V1, and is configured to be turned on or off under the control of the second internal voltage V2 to control the output of the output voltage VOUT determined according to the second internal voltage V2;

[0051] The first current source module 40 is configured as a current source load of the output stage transistor module 20; and

[0052] The second current source module 50 is configured to provide current to the voltage dividing resistor module 30 to facilitate the generation of the second internal voltage V2.

[0053] In the embodiments of the present application, the input stage transistor module 10 can be a transistor module receiving an input voltage VIN, and the output stage transistor module 20 can be a transistor module outputting an output voltage VOUT. The transistor module can include at least one of a BJT (triode) and a MOSFET (metal oxide semiconductor field effect transistor, MOS for short), for example, can be composed of one or more BJTs, or can be composed of one or more MOSFETs, but is not limited thereto. The transistor module can include a control end, a first signal end and a second signal end, and its working principle is that the path between the first signal end and the second signal end is turned on or turned off under the control of the control signal input at the control end, so as to connect or block the signal transmission between the first signal end and the second signal end. The description of the connection of the transistor module can be represented as the connection between its signal ends, for example, the input stage transistor module 10 and the output stage transistor module 20 are connected in series, which can be that the second signal end of the input stage transistor module 10 is connected with the first signal end of the output stage transistor module 20, the first signal end of the input stage transistor module 10 is configured as an input signal, and the second signal end of the output stage transistor module 20 is configured as an output signal, forming a two-stage series connection of the input stage transistor module 10 and the output stage transistor module 20.

[0054] The first signal end of the input stage transistor module 10 can be connected with a power voltage end VDD and configured as an input power voltage, the first current source module 40 can be connected between the port (i.e. the second signal end) outputting the output voltage VOUT of the output stage transistor module 20 and the ground end GND, the input voltage VIN is input from the control end of the input stage transistor module 10, and the output voltage VOUT is output from the second signal end of the output stage transistor module 20, but is not limited thereto. The first current source module 40 and the second current source module 50 are current sources, and the internal resistance thereof is much larger than the load impedance, so that the fluctuation of the load impedance will not change the size of the output current of the current source, and the specific circuit structure thereof can be set according to actual needs.

[0055] The voltage dividing resistor module 30 can generate a voltage drop according to the current provided by the second current source module 50, so as to obtain the second internal voltage V2 after dividing the first internal voltage V1, and thus the size of the second internal voltage V2 can be changed by the current provided by the second current source module 50. Since the output voltage VOUT is determined according to the second internal voltage V2, the size of the output voltage VOUT can be adjusted by the current provided by the second current source module 50, so as to achieve the purpose of expanding the adjustable range of the output voltage VOUT.

[0056] The output stage transistor module and the input stage transistor module are coupled in series in the embodiment of the application, a two-stage resistor series structure is formed, the second internal voltage can be adjusted through the voltage dividing resistor module and the second current source module, and the second internal voltage is used to regulate the output voltage output by the output stage transistor module, so that the output voltage can be adjusted, the adjustable range of the output voltage of the wideband amplifier with the structure is expanded, the input impedance of the wideband amplifier is improved, the output impedance of the wideband amplifier is reduced, and the wideband amplifier is more suitable for application in a high-speed circuit.

[0057] In an optional embodiment, the second current source module 50 is an adjustable current source.

[0058] In the embodiment of the application, the current output by the adjustable current source is adjustable. The size of the output voltage VOUT can be adjusted in real time by adjusting the size of the current provided by the second current source module 50 to the voltage dividing resistor module 30 in real time, so that the required level conversion is realized.

[0059] In an optional embodiment, the second current source module 50 is a PTAT current source.

[0060] In the embodiment of the application, the current output by the PTAT current source is proportional to the absolute temperature, that is, the higher the temperature, the greater the current output by the PTAT current source. Due to the existence of transistors such as bipolar transistors (referred to as triodes) or metal oxide semiconductor field effect transistors (referred to as MOS tubes) in the input stage transistor module 10 and the output stage transistor module 20, the output voltage VOUT is greatly affected by temperature, power supply voltage and process (PVT), for example, the higher the temperature, the smaller the base-emitter voltage Vbe of the transistor, and there is temperature drift, so when the environment of the wideband amplifier changes (for example, the temperature changes), the static operating point of the wideband amplifier will deviate, which reduces the stability. In the embodiment of the application, the second current source module 50 is configured as a PTAT current source, which can automatically adjust the voltage drop generated on the voltage dividing resistor module 30 according to the temperature, so as to offset the change of the output voltage VOUT caused by the temperature drift of the transistor in the wideband amplifier, thereby ensuring that the output voltage VOUT of the wideband amplifier does not change with the temperature, obtaining a stable output voltage VOUT that does not change with the temperature, and improving the stability. For example, as the temperature rises, the current output by the PTAT current source to the voltage dividing resistor module 30 increases, and the voltage drop generated on the voltage dividing resistor module 30 also increases. The amount of voltage drop increase can offset the amount of decrease of the base-emitter voltage Vbe of the transistor due to the increase of the temperature, so that the increase and decrease are balanced, and the output voltage VOUT that does not change with the temperature is obtained.

[0061] In an optional embodiment, as Figure 2As shown, the input stage transistor module 10 includes a first transistor Q1; the output stage transistor module 20 includes a second transistor Q2; and the voltage dividing resistor module 30 includes a first resistor R1.

[0062] The base of the first transistor Q1 is configured to input an input voltage VIN, the collector of the first transistor Q1 is connected with a power voltage terminal VDD, and the emitter of the first transistor Q1 is connected with the collector of the second transistor Q2.

[0063] The first end of the first resistor R1 is connected with the collector of the second transistor Q2, and the second end of the first resistor R1 is respectively connected with the base of the second transistor Q2 and the first end of a second current source module 50.

[0064] The first end of the first current source module 40 is connected with the emitter of the second transistor Q2 and is configured to output an output voltage VOUT; the second end of the first current source module 40 and the second end of the second current source module 50 are respectively connected with a ground terminal GND.

[0065] In the embodiment, the first transistor Q1 and the second transistor Q2 constitute a two-stage shunt regulator structure. The current value output by the first current source module 40 can be I1. The first transistor Q1 is turned on or turned off under the control of the input voltage VIN. The first internal voltage V1 (i.e., the emitter voltage of the first transistor Q1) is lower than the input voltage VIN (i.e., the base voltage of the first transistor Q1) by a base-emitter voltage Vbe. In the case that the base current of the second transistor Q2 is very small and can be ignored, the emitter current of the first transistor Q1 flows to the second current source module 50 through the first resistor R1 and flows to the first current source module 40 through the second transistor Q2. It can be seen that the calculation formula of the output voltage is: V OUT = V IN -Vbe1-R1×I2-Vbe2, wherein V OUT represents the voltage value of the output voltage VOUT, V IN represents the voltage value of the input voltage VIN, Vbe1 represents the base-emitter voltage of the first transistor Q1, R1 represents the resistance value of the first resistor R1, I2 represents the current value output by the second current source module 50, and Vbe2 represents the base-emitter voltage of the second transistor Q2.

[0066] Therefore, by adopting the two-stage resistor series connection structure, and connecting a first resistor R1 as a voltage dividing resistor between the base and the collector of the second transistor Q2, the size of the base voltage R1xI2 (i.e. the second internal voltage V2) of the second transistor Q2 can be changed by adjusting the size of the current value I2 output by the second current source module 50, so as to achieve the purpose of adjusting the output voltage VOUT, thereby realizing the adjustable range of the output voltage is expanded. Moreover, according to the adjustable range of the current value output by the second current source module 50, the adjustable range of the output voltage is determined. In addition, in the case that the second current source module 50 adopts the PTAT current source, with the increase of the temperature, the current value I2 output by the second current source module 50 increases, the base voltage R1xI2 of the second transistor Q2 increases, and the base-emitter voltage Vbe1 of the first transistor Q1 and the base-emitter voltage Vbe2 of the second transistor Q2 both decrease. As can be seen from the above calculation formula of the output voltage, the output voltage VOUT can be ensured not to change with the temperature.

[0067] In an optional embodiment, as shown in FIG. 1, the input stage transistor module 10 further comprises a plurality of third transistors connected between the base and the collector. Figure 3

[0068] The plurality of third transistors are connected in series between the emitter of the first transistor Q1 and the collector of the second transistor Q2.

[0069] In the embodiment, the number n of the plurality of third transistors Qa1, Qa2, …, Qan can be set according to actual needs. The plurality of third transistors Qa1, Qa2, …, Qan are connected in series in a stack between the emitter of the first transistor Q1 and the collector of the second transistor Q2, i.e. the emitter of the first transistor Q1 is connected to the collector of the first third transistor Qa1, the emitter of the first third transistor Qa1 is connected to the collector of the second third transistor Qa2, and so on, and the emitter of the nth third transistor Qan is connected to the collector of the second transistor Q2. The base and the collector of each third transistor are connected. By connecting a base and collector connected third transistor in series between the emitter of the first transistor Q1 and the collector of the second transistor Q2, the output voltage VOUT is reduced by one base-collector voltage Vbe. Therefore, the output voltage VOUT can be adjusted by adjusting the number of third transistors in the embodiment, further expanding the adjustable range of the output voltage.

[0070] In an optional embodiment, the output stage transistor module 20 further comprises a plurality of fourth transistors connected between the base and the collector.

[0071] ​A plurality of fourth transistors are connected in series between the emitter of the second transistor Q2 and the first end of the first current source module 40.

[0072] In the embodiment, the number m of the plurality of fourth transistors Qb1, Qb2, …, Qbm can be set according to actual requirements. The number m of the fourth transistors and the number n of the third transistors can be equal or not equal, for example, n = 1 and m = 1, that is, the fourth transistor and the third transistor are both one. The plurality of fourth transistors Qb1, Qb2, …, Qbm are connected in series between the emitter of the second transistor Q2 and the first end of the first current source module 40, that is, the emitter of the second transistor Q2 is connected with the collector of the first fourth transistor Qb1, the emitter of the first fourth transistor Qb1 is connected with the collector of the second fourth transistor Qb2, and so on, the emitter of the mth fourth transistor Qbm is connected with the first end of the first current source module 40. The base and the collector of each fourth transistor are connected. By connecting one fourth transistor with the base and the collector connected in series between the emitter of the second transistor Q2 and the first end of the first current source module 40, the output voltage VOUT is reduced by one base-collector voltage Vbe. For example, in the case where the fourth transistor and the third transistor are both one, Figure 3 The calculation formula of the output voltage of the wideband amplifier shown in FIG. 1 is: V OUT2 = V IN -Vbe1-Vbe3-R1×I2-Vbe2-Vbe4, wherein V OUT2 represents the voltage value of the output voltage VOUT, V IN represents the voltage value of the input voltage VIN, Vbe1 represents the base-emitter voltage of the first transistor Q1, Vbe3 represents the base-emitter voltage of the third transistor, R1 represents the resistance value of the first resistor R1, I2 represents the current value output by the second current source module 50, Vbe2 represents the base-emitter voltage of the second transistor Q2, and Vbe4 represents the base-emitter voltage of the fourth transistor. Therefore, the number of the fourth transistors can be adjusted to adjust the output voltage VOUT, and the adjustable range of the output voltage is further expanded.

[0073] In an optional embodiment, as shown in FIG. 2, the input stage transistor module 10 further includes a fifth transistor Q5 and a sixth transistor Q6. Figure 4

[0074] The emitter of the first transistor Q1 is connected with the collector of the fifth transistor Q5, the base of the fifth transistor Q5 and the base of the sixth transistor Q6 respectively, the collector of the first transistor Q1 is connected with the collector of the sixth transistor Q6, and the emitter of the fifth transistor Q5 and the emitter of the sixth transistor Q6 are connected with the collector of the second transistor Q2 respectively.​

[0075] In the embodiment, the calculation formula of the output voltage of the wideband amplifier is: V OUT3 = V IN -Vbe1-Vbe5-R1xI2-Vbe2, wherein, V OUT3 represents the voltage value of the output voltage VOUT, V IN represents the voltage value of the input voltage VIN, Vbe1 represents the base-emitter voltage of the first transistor Q1, Vbe5 represents the base-emitter voltage of the fifth transistor Q5, R1 represents the resistance value of the first resistor R1, I2 represents the current value output by the second current source module 50, and Vbe2 represents the base-emitter voltage of the second transistor Q2. It can be seen that the output voltage VOUT can also be adjusted by changing the current value output by the second current source module 50, so that the adjustable range of the output voltage of the wideband amplifier can be expanded. Moreover, a stable output voltage that does not change with temperature can also be obtained.

[0076] The ratio of the emitter area (i.e., the product of the emitter length and the emitter width) of the fifth transistor Q5 and the sixth transistor Q6 can be 1:k. In the case of ignoring the base current of the fifth transistor Q5 and the sixth transistor Q6 and the current on the first resistor R1, the collector current of the second transistor Q2 = the emitter current of the fifth transistor Q5 + the emitter current of the sixth transistor Q6, and the emitter current of the first transistor Q1 = the emitter current of the fifth transistor Q5, so that the emitter current of the first transistor Q1 is only 1 / (1+k) of the collector current of the second transistor Q2. The current input to the first transistor Q1 can be smaller than the current input to the first transistor Q1 in the wideband amplifier shown in Figure 2 and Figure 3 Therefore, the pair tube structure formed by the fifth transistor Q5 and the sixth transistor Q6 makes the input pair tube current small, the input impedance higher, and the bandwidth wider.

[0077] In addition, the wideband amplifier in Figure 4 may also have the structure in Figure 3 , for example, a plurality of base-collector connected transistors can also be connected in series between the emitter of the second transistor Q2 in Figure 4 and the first end of the first current source module 40, so as to further expand the adjustable range of the output voltage. The principle is the same as that in Figure 3 , which will not be described herein again.

[0078] In an optional embodiment, the wideband amplifier 01 further comprises:

[0079] The first capacitor C1 is connected in parallel across the first resistor R1.

[0080] In the embodiment of the present application, the first end of the first capacitor C1 can be connected to the first end of the first resistor R1, and the second end of the first capacitor C1 can be connected to the second end of the first resistor R1, thereby being connected in parallel across the first resistor R1. By connecting the first capacitor C1 in parallel across the first resistor R1, at high frequencies, the signal can directly pass through the first capacitor C1 to the base of the second transistor Q2, thereby preventing the first resistor R1 from generating high-frequency noise during the signal passage process and preventing the first resistor R1 and the second transistor Q2 from causing a decrease in high-frequency gain. As a result, the first resistor R1 no longer generates high-frequency noise, and the high-frequency frequency response no longer decreases.

[0081] As a specific example, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor may all be NPN transistors.

[0082] In an alternative embodiment, each transistor in the broadband amplifier of the present application embodiment can be replaced with a MOS transistor to improve the existing emitter-follower structure and obtain a broadband amplifier with an expanded adjustable range of output voltage. To this end, the broadband amplifier constructed with MOS transistors is described below. Its specific operating process and technical effects are described above and will not be further elaborated below.

[0083] like Figure 5 As shown, the input stage transistor module 10 includes a first MOS transistor M1; the output stage transistor module 20 includes a second MOS transistor M2; the voltage divider resistor module 30 includes a first resistor R1;

[0084] The gate of the first MOS transistor M1 is configured to input the input voltage VIN, the drain of the first MOS transistor M1 is connected to the power supply voltage terminal VDD, and the source of the first MOS transistor M1 is connected to the drain of the second MOS transistor M2;

[0085] A first end of the first resistor R1 is connected to the drain of the second MOS transistor M2, and a second end of the first resistor R1 is connected to the gate of the second MOS transistor M2 and the first end of the second current source module 50 respectively;

[0086] A first end of the first current source module 40 is connected to the source of the second MOS transistor M2 and is configured to output an output voltage VOUT; a second end of the first current source module 40 and a second end of the second current source module 50 are respectively connected to the ground GND.

[0087] like Figure 6 As shown, the input stage transistor module 10 further includes a plurality of third MOS transistors with gates and drains connected;

[0088] A plurality of third MOS transistors are connected in series between the source of the first MOS transistor M1 and the drain of the second MOS transistor M2.

[0089] In the embodiments of the present application, Figure 6 The number of the third MOS tubes can be p, i.e., Ma1, Ma2, …, Map, which are stacked and connected in series between the source of the first MOS tube M1 and the drain of the second MOS tube M2.

[0090] As shown in Figure 6 The output stage transistor module 20 further includes fourth MOS tubes connected in gate and drain.

[0091] The fourth MOS tubes are connected in series between the source of the second MOS tube M2 and the first end of the first current source module 40.

[0092] In the embodiments of the present application, Figure 6 The number of the fourth MOS tubes can be q, i.e., Mb1, Mb2, …, Mbq, which are stacked and connected in series between the source of the second MOS tube M2 and the first end of the first current source module 40.

[0093] As shown in Figure 7 The input stage transistor module 10 further includes a fifth MOS tube M5 and a sixth MOS tube M6.

[0094] The source of the first MOS tube M1 is connected to the drain of the fifth MOS tube M5, the gate of the fifth MOS tube M5 and the gate of the sixth MOS tube M6, respectively; the drain of the first MOS tube M1 is connected to the drain of the sixth MOS tube M6; and the source of the fifth MOS tube M5 and the source of the sixth MOS tube M6 are connected to the drain of the second MOS tube M2.

[0095] In the embodiments of the present application, the width-length ratio of the fifth MOS tube M5 and the sixth MOS tube M6 can be configured as the same as the fifth transistor Q5 and the sixth transistor Q6 in Figure 4 to reduce the input to the tube current, improve the input impedance, and thus increase the bandwidth.

[0096] In addition, Figure 7 The wideband amplifier in Figure 6 may also have the structure in Figure 7 For example, a plurality of MOS tubes connected in gate and drain can also be connected in series between the source of the second MOS tube M2 and the first end of the first current source module 40 in

[0097] As a specific example, the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube can all be NMOS transistors.

[0098] It should be understood that the above examples are exemplary and are not intended to limit the scope of the claims encompassing all possible embodiments. Various modifications and changes can be made thereto without departing from the scope of the present disclosure, which is set forth in the claims. Similarly, each of the individual features of the above examples can be arbitrarily combined to form additional embodiments of the present application, which can not be explicitly described. Therefore, the above examples merely express several embodiments of the present application, and do not limit the scope of the patent protection of the present application.

Claims

1. A broadband amplifier, characterized in that: The broadband amplifier comprises: an input-stage transistor module, configured to be turned on or off under the control of an input voltage to control the output of a first internal voltage; A voltage-dividing resistor module is configured to divide the first internal voltage to obtain and output a second internal voltage; an output-stage transistor module, coupled in series with the input-stage transistor module to receive the first internal voltage and configured to be turned on or off under the control of the second internal voltage to control the output of an output voltage determined according to the second internal voltage; a first current source module configured as a current source load of the output-stage transistor module; and The second current source module is configured to provide current to the voltage-dividing resistor module to promote the generation of the second internal voltage.

2. The broadband amplifier according to claim 1, wherein: The second current source module is an adjustable current source.

3. The broadband amplifier according to claim 1, wherein: The second current source module is a PTAT current source.

4. The broadband amplifier according to any one of claims 1 to 3, characterized in that: The input-stage transistor module includes a first transistor; the output-stage transistor module includes a second transistor; the voltage-dividing resistor module includes a first resistor; The base of the first transistor is configured to input the input voltage, the collector of the first transistor is connected to the power supply voltage terminal, and the emitter of the first transistor is connected to the collector of the second transistor; A first end of the first resistor is connected to the collector of the second transistor, and a second end of the first resistor is connected to the base of the second transistor and the first end of the second current source module respectively; The first end of the first current source module is connected to the emitter of the second transistor and is configured to output the output voltage; the second end of the first current source module and the second end of the second current source module are respectively connected to the ground.

5. The broadband amplifier according to claim 4, wherein: The input stage transistor module further includes a plurality of third transistors with bases and collectors connected; A plurality of third triodes are connected in series between the emitter of the first triode and the collector of the second triode.

6. The broadband amplifier according to claim 5, wherein: The output stage transistor module further includes a plurality of fourth transistors with bases and collectors connected; A plurality of fourth transistors are connected in series between the emitter of the second transistor and the first end of the first current source module.

7. The broadband amplifier according to claim 4, wherein: The input stage transistor module further includes a fifth triode and a sixth triode; The emitter of the first triode is connected to the collector of the fifth triode, the base of the fifth triode and the base of the sixth triode respectively, the collector of the first triode is connected to the collector of the sixth triode, and the emitter of the fifth triode and the emitter of the sixth triode are connected to the collector of the second triode respectively.

8. The broadband amplifier according to claim 4, wherein: The broadband amplifier further comprises: The first capacitor is connected in parallel to both ends of the first resistor.

9. The broadband amplifier according to any one of claims 1 to 3, characterized in that: The input-stage transistor module includes a first MOS transistor; the output-stage transistor module includes a second MOS transistor; the voltage-dividing resistor module includes a first resistor; The gate of the first MOS transistor is configured to input the input voltage, the drain of the first MOS transistor is connected to the power supply voltage terminal, and the source of the first MOS transistor is connected to the drain of the second MOS transistor; A first end of the first resistor is connected to the drain of the second MOS transistor, and a second end of the first resistor is connected to the gate of the second MOS transistor and the first end of the second current source module respectively; The first end of the first current source module is connected to the source of the second MOS transistor and is configured to output the output voltage; the second end of the first current source module and the second end of the second current source module are respectively connected to the ground.

10. The broadband amplifier according to claim 9, wherein: The input-stage transistor module further includes a plurality of third MOS transistors with gates and drains connected; A plurality of third MOS transistors are connected in series between the source of the first MOS transistor and the drain of the second MOS transistor.

11. The broadband amplifier according to claim 10, wherein: The output-stage transistor module further includes a plurality of fourth MOS transistors with gates and drains connected; A plurality of fourth MOS transistors are connected in series between the source of the second MOS transistor and the first end of the first current source module.

12. The broadband amplifier according to claim 9, wherein: The input-stage transistor module further includes a fifth MOS transistor and a sixth MOS transistor; The source of the first MOS transistor is respectively connected to the drain of the fifth MOS transistor, the gate of the fifth MOS transistor and the gate of the sixth MOS transistor, the drain of the first MOS transistor is connected to the drain of the sixth MOS transistor, and the source of the fifth MOS transistor and the source of the sixth MOS transistor are respectively connected to the drain of the second MOS transistor.

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