Global exposure image sensor, reading control method thereof and electronic equipment
By introducing a combination of a global control switch and a first current source transistor into the global exposure image sensor, the reset operation of the pixel array is simplified, solving the problems of high power consumption and complex reset operation of traditional global exposure pixel units, and achieving cost reduction and performance improvement.
Patent Information
- Application Number
- CN202511285706.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-10
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2045-09-10
AI Technical Summary
Traditional global exposure pixel unit designs suffer from high power consumption, high circuit costs, and complex reset operations. Especially in global exposure mode, the independent bias current source and multiple voltage source control lead to high logic control and hardware costs.
By employing a combination of a global control switch and a first current source transistor, the reset operation of the pixel array is simplified and the logic control cost and circuit hardware cost are reduced by controlling the global control switch to turn on and off.
By simplifying the reset operation of the pixel array, the cost of logic control and circuit hardware is reduced, while maintaining the efficient synchronous exposure performance of the global exposure image sensor.
Smart Images

Figure CN120812416A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of image sensors, and in particular to a global exposure image sensor, a reading control method thereof and an electronic device. BACKGROUND
[0002] CMOS image sensors are widely used in mobile phones, automotive auxiliary driving, security monitoring, industrial detection, ARVR wearable devices, unmanned aerial vehicles and other fields, to meet various video image recording and image recognition needs. CMOS image sensors usually have two exposure modes: rolling shutter (RS) and global shutter (GS). Among them, the pixels in the pixel array of the rolling shutter image sensor are scanned by row-by-row exposure, which is mainly suitable for image shooting of static objects or environment. When shooting high-speed dynamic scenes, distortion occurs due to the difference in exposure time of different rows in an image (jelly effect). When the global shutter image sensor captures an image, all pixels in the pixel array are exposed at the same time. After the exposure is completed, the image signals collected by the pixels are read one by one, so that each pixel in the pixel array is exposed synchronously to collect image signals, eliminating the distortion caused by the jelly effect. Therefore, the global shutter image sensor is more suitable for collecting images of moving objects and provides good clarity.
[0003] The global exposure mode used by the traditional global exposure pixel unit has some problems and shortcomings. In related technologies, either an independent bias current source is provided in each pixel unit, which results in high power consumption and high circuit cost of the pixel unit; or in the global exposure mode, the pixel unit needs to be reset by power control before sampling and reading. When controlling multiple independent voltage sources of the pixel unit array to reset, the reset operation is complex, and the logic control and hardware cost are high. SUMMARY
[0004] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides a global exposure image sensor, a reading control method thereof and an electronic device, which can pull down the output signal line of each column in the pixel array by controlling the newly added global control switch, and simplify the reset operation of the pixel array by cooperating with the control logic of the pixel array, thereby reducing the logic control cost and circuit hardware cost.
[0005] In a first aspect, an embodiment of the present application provides a global exposure image sensor, comprising: at least one global control switch; a readout module comprising a plurality of first current source transistors, the first current source transistors being connected with the global control switch; a pixel array comprising a plurality of pixel units arranged in m rows and n columns; wherein each column of the pixel units is connected to a drain of a first current source transistor through a multiplexed output signal line; wherein each of the pixel units comprises, in sequence, a basic pixel module, a sample-and-hold module, and a signal amplification module; an output terminal of the signal amplification module is connected to the output signal line; and the pixel array is connected to a second power supply; a control module connected to a gate of the global control switch, the readout module, and the pixel array; the control module is configured to: in response to a first timing control signal in a global exposure mode, control the global control switch to be turned on, pull up a current source gate voltage signal at a connection node of the first current source transistor and the global control switch, and pull down output signals of each column of pixel units; based on a sampling timing control signal, perform reset processing on the sample-and-hold module; after the reset processing ends, control the global control switch to be turned off, and control the pixel units to perform global sampling processing and control the readout module to perform row-by-row readout operation on each row of pixel units.
[0006] In a second aspect, an embodiment of the present application provides a read control method of a global exposure image sensor, which is characterized by being applied to a control module of the global exposure image sensor as described in any one of the embodiments of the first aspect, and the global exposure image sensor comprises: the control module, a readout module connected to the control module, a pixel array, and at least one first global control switch; the readout module comprises: a plurality of first current source transistors; the first current source transistors are connected to the first global control switch; the pixel array comprises a plurality of pixel units arranged in m rows and n columns; each of the pixel units comprises, in sequence, a basic pixel module, a sample-and-hold module, and a signal amplification module. The read control method comprises: in response to a first timing control signal in a global exposure mode, controlling the global control switch to be turned on, pulling up a current source gate voltage signal at a connection point of the first current source transistor and the global control switch in the readout module, and pulling down output signals of each column of pixel units; based on a sampling timing control signal, performing reset processing on the sample-and-hold module; after the reset processing ends, controlling the global control switch to be turned off, and controlling the pixel units to perform global sampling processing; after the global sampling processing ends, controlling the global control switch to remain turned off, and controlling the readout module to perform row-by-row readout operation on each row of pixel units.
[0007] In a third aspect, an embodiment of the present application provides an electronic device comprising the global exposure image sensor as described in any one of the embodiments of the first aspect.
[0008] Embodiments of the present application include: The global exposure image sensor comprises a control module, a readout module electrically connected with the control module, a pixel array, and at least one global control switch. The readout module comprises a plurality of first current source transistors, and the first current source transistors are connected with the global control switch. The pixel array comprises a plurality of pixel units arranged in m rows and n columns. Each column of pixel units is connected to the drain of one first current source transistor through a multiplexed output signal line. Each pixel unit comprises, in sequence, a basic pixel module, a sample-and-hold module, and a signal amplification module. The output end of the signal amplification module is connected with the output signal line. The pixel array is connected with a second power supply. The addition of the global control switch and the optimization of the external power supply reduce the hardware cost of the circuit. In the process of reading control of the global exposure image sensor, the control module controls the global control switch to be turned on in response to a first timing control signal in the global exposure mode, so as to pull up the current source gate voltage signal at the connection point between the first current source transistor in the readout module and the global control switch, to realize pulling down of the output signal of each column of pixel units, and to reset the sample-and-hold module based on a sampling timing control signal. After the reset processing is completed, the global control switch is controlled to be turned off, and the pixel units are controlled to be subjected to global sampling processing. After the global sampling processing is completed, the global control switch is controlled to remain turned off, and the readout module is controlled to perform row-by-row readout operation on each row of pixel units. The addition of the global control switch can pull down the output signal line of each column in the pixel array, and the control logic of the pixel array is matched to simplify the reset operation on the pixel array and reduce the logic control cost. That is, the scheme of the embodiment of the present application can pull down the output signal line of each column in the pixel array through the addition of the global control switch, and the control logic of the pixel array is matched to simplify the reset operation on the pixel array and reduce the logic control cost and the circuit hardware cost. BRIEF DESCRIPTION OF DRAWINGS
[0009] Figure 1 is a whole structure schematic diagram of a global exposure image sensor provided by an embodiment of the present application; Figure 2 is a specific structure schematic diagram of a global exposure image sensor with one global control switch provided by an embodiment of the present application; Figure 3 is a specific structure schematic diagram of a pixel unit provided by an embodiment of the present application; Figure 4 is a specific structure schematic diagram of a global exposure image sensor with a plurality of global control switches provided by an embodiment of the present application; Figure 5 is a connection relationship schematic diagram when one global control switch is connected with each column of first current source transistors provided by an embodiment of the present application. Figure 6 is a step flow diagram of a reading control method of a global exposure image sensor provided by an embodiment of the present application; Figure 7 is a schematic diagram of a first timing control signal in a global exposure mode provided by an embodiment of the present application; Figure 8 is a schematic diagram of a second timing control signal in a rolling exposure mode provided by an embodiment of the present application. DETAILED DESCRIPTION
[0010] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in combination with the drawings and embodiments.
[0011] It should be noted that although a logical sequence is shown in the flowchart in the description of the present application, in some cases, the steps shown or described can be performed in an order different from that in the flowchart. In the description of the present application, the meaning of "one or more" is one or more, and the meaning of "multiple" is two or more. The description of "first", "second" is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the sequence of indicated technical features.
[0012] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terms used herein are only for the purpose of describing the embodiments of the present application and are not intended to limit the present application.
[0013] The present application discloses a global exposure image sensor, a reading control method thereof and an electronic device, and relates to the technical field of image sensors. The global exposure image sensor comprises: at least one global control switch; a readout module comprising a plurality of first current source transistors, the first current source transistors being connected to the global control switch; a pixel array comprising a plurality of pixel units arranged in m rows and n columns; wherein each column of pixel units is connected to the drain of one first current source transistor through a multiplexed output signal line; wherein each pixel unit comprises: a basic pixel module, a sample-and-hold module and a signal amplification module connected in sequence; the output end of the signal amplification module is connected to the output signal line; the pixel array is connected to a second power supply; a control module connected to the gate of the readout module, the pixel array and the global control switch, respectively; which can simplify the reset operation of the pixel array and reduce the logic control cost and circuit hardware cost.
[0014] The embodiments of the present application are further described below in combination with the drawings.
[0015] As Figure 1As shown in the figure, the global exposure image sensor 1000 comprises: a control module 200, a readout module 300 electrically connected with the control module 200, a pixel array 100, and at least one global control switch sw5. The specific structure of each functional module in the global exposure image sensor 1000 is further described.
[0016] Specifically, as shown in the figure, Figure 2 , Figure 4 The readout module 300 comprises a plurality of first current source transistors nm1, wherein the first current source transistors nm1 are connected with the global control switch sw5; in addition, the readout module 300 further comprises an analog-to-digital converter array ADC ARRAY.
[0017] Specifically, as shown in the figures, Figure 2 and Figure 3 When each column multiplexed output signal line is connected with only one first current source transistor nm1, and when the global exposure image sensor 1000 comprises only one global control switch sw5, the source of the global control switch sw5 is connected with the gate of the first current source transistor nm1; the gate of the global control switch sw5 is connected with the control module 200; and the drain of the global control switch sw5 is connected with the first power supply VDDA. By controlling the on-off state of the global control switch sw5, the reset operation of the pixel array is simplified, and the logic control cost and the circuit hardware cost are reduced.
[0018] Specifically, in some embodiments, when the readout module 300 of the global exposure image sensor 1000, when each column multiplexed output signal line is connected with two first current source transistors nm1 in series, then there are two rows of first current source transistors nm1 in the readout module 300, and two global control switches sw5 are used to control the two rows of first current source transistors nm1. It can be understood that the gates of the two global control switches sw5 are connected with the control module 200; the control module 200 simultaneously controls the on-off state of the two global control switches sw5, and the on-off state of the two global control switches sw5 is consistent. Therefore, in the present application, the method control logic when using two global control switches sw5 is the same as the method control logic when using one global control switch sw5.
[0019] Specifically, as shown in the figures, Figure 4As shown, in the readout module 300 of the global exposure image sensor 1000, when each column of multiplexed output signal lines is connected to only one first current source transistor nm1, a global control switch sw5 can be provided corresponding to each column of first current source transistor nm1. In this case, the number of global control switches sw5 is the same as the number of first current source transistors nm1. The connection relationship between each column of first current source transistors nm1 and the corresponding global control switch sw5 is as follows: when each column has one first current source transistor nm1, the gate of the global control switch sw5 is connected to the control module 200, the source of the global control switch sw5 is grounded, and the drain of the global control switch sw5 is connected to the drain of the first current source transistor nm1. Specifically, the control module 200 simultaneously controls the on / off states of multiple global control switches sw5, and the on / off states of the multiple global control switches sw5 are consistent. Therefore, in this application, the control logic of the method using multiple global control switches sw5 is the same as the control logic of the method using a single global control switch sw5. It should be noted that, by adding a global control switch sw5 to the first current source transistor nm1 of each column, VPIX is directly pulled low when the global control switch sw5 of each column is turned on, and the sampling capacitor is reset in conjunction with the timing; more device area is required when a global control switch sw5 is set corresponding to the first current source transistor nm1 of each column.
[0020] It is understood that the number of global control switches sw5 can be selected as needed, and this application does not impose any specific limitation on the number of global control switches sw5. When the number of global control switches sw5 is different, the connection relationship between the global control switches sw5 and the first current source transistor nm1 is different. Therefore, this application does not impose any specific limitation on the connection relationship between the global control switches sw5 and the first current source transistor nm1.
[0021] In some embodiments, as Figure 2 As shown, the global exposure image sensor 1000 further includes: a second current source transistor nm0, and the connection relationship between the second current source transistor nm0 and the first current source transistor nm1 is as shown in FIG. Figure 2 The control logic of this application does not involve the second current source transistor nm0, and the second current source transistor nm0 will not be described in detail here.
[0022] Specifically, combined Figure 2 and Figure 3The pixel array 100 includes a plurality of pixel units 110 arranged in m rows and n columns. Each column of pixel units 110 is connected to a first current source transistor nm1 of the readout module 300 via a multiplexed output signal line VPIX. Each pixel unit 110 includes a basic pixel module 111, a sample-and-hold module 112, and a signal amplification module 113 connected in sequence. The output end of the signal amplification module 113 is connected to the output signal line VPIX. Specifically, Figure 2 Where P00 represents the pixel unit 110 at the 0th row and the 0th column.
[0023] Specifically, the global control switch sw5 is further described, such as Figure 2 As shown, the drain of the global control switch sw5 is connected to the first power supply VDDA; the source of the global control switch sw5 is connected to the readout module 300 and the pixel array 100 through the first current source transistor nm1.
[0024] It is understandable that if Figure 1 As shown, the gate of global control switch sw5 is used to receive the global reset control signal RST_GSC output by control module 200. When the global reset control signal RST_GSC is at a high level, global control switch sw5 is turned on; when the global reset control signal RST_GSC is at a low level, global control switch sw5 is turned off. The on and off of global control switch sw5 is controlled by control module 200.
[0025] like Figure 1 and Figure 2 As shown, the control module 200 is connected to the readout module 300, the pixel array 100, and the gate of the global control switch sw5. Specifically, the control module 200 includes a main control circuit 210 and a timing control unit 220. The output of the main control circuit 210 is connected to the pixel array 100, and the output of the timing control unit 220 is electrically connected to the main control circuit 210 and the readout module 300.
[0026] The control module 200 is used to: in response to the first timing control signal in the global exposure mode, control the global control switch sw5 to be turned on, pull up the current source gate voltage signal VBNPX at the connection node between the first current source transistor nm1 in the readout module 300 and the global control switch sw5, thereby pulling down the output signal of each column of pixel units 110, and reset the sample and hold module 112 based on the sampling timing control signal; after the reset process is completed, control the global control switch sw5 to be turned off, control the pixel units 110 to perform global sampling processing, and control the readout module 300 to perform a read operation on each row of pixel units 110 row by row.
[0027] In some embodiments, as Figure 2As shown, the global exposure image sensor 1000 further comprises a data processing unit 400, an interface module 500 and a power module 600; an output end of the readout module 300 is connected with an input end of the data processing unit 400; an output end of the data processing unit 400 is connected with an input end of the interface module 500; and the interface module 500 is used for connecting other terminal devices. It should be noted that the same power supply can be used to provide the second power supply VDDP for the pixel array 100, and the first power supply VDDA for the single global control switch sw5 when a global control switch sw5 is used; or different power supplies are used to provide the first power supply VDDA and the second power supply VDDP.
[0028] Based on the global exposure image sensor 1000 provided by the embodiments of the present application, in the process of reading control of the global exposure image sensor 1000, the connection node between the first current source transistor nm1 in the readout module 300 and the global control switch sw5 is pulled up by the control module 200 in response to the first timing control signal in the global exposure mode, so as to pull down the output signal of each column of pixel units 110, reset the sample and hold module 112 based on the sampling timing control signal; after the reset processing is completed, the global control switch sw5 is turned off, and the pixel units 110 are controlled to perform global sampling processing, and the readout module 300 is controlled to perform row-by-row readout operation on each row of pixel units 110; the output signal line of each column of the pixel array 100 can be pulled down by controlling the newly added global control switch sw5, and the control logic of the pixel array 100 is matched to simplify the reset operation of the pixel array 100 and reduce the logic control cost. That is to say, the scheme of the embodiments of the present application can pull down the output signal line of each column of the pixel array 100 by controlling the newly added global control switch sw5, match the control logic of the pixel array 100, simplify the reset operation of the pixel array, and reduce the logic control cost and circuit hardware cost.
[0029] The basic pixel module 111, the sample and hold module 112 and the signal amplification module 113 included in the pixel array 100 provided by the embodiments of the present application are further described.
[0030] As shown in Figure 3 According to some embodiments of the present application, the basic pixel module 111 comprises a photodiode D1, a pixel transfer control switch tx0, a pixel reset control switch rst, a first amplification drive transistor sf0 and a first control switch sw0.
[0031] Among them, one end of the photodiode D1 is grounded, the other end of the photodiode D1 is connected to the source of the pixel transfer control switch tx0, and the gate of the pixel transfer control switch tx0 is connected to the control module 200; the drain of the pixel transfer control switch tx0 and the gate of the first amplifying drive transistor sf0 are connected to the floating node FD; the drain of the pixel reset control switch rst and the drain of the first amplifying drive transistor sf0 are both connected to the second power supply VDDP, the source of the pixel reset control switch rst, the source of the first amplifying drive transistor sf0 and the drain of the first control switch sw0 are connected; the gate of the pixel reset control switch rst and the gate of the first control switch sw0 are both connected to the control module 200.
[0032] It can be understood that the gate of the pixel reset control switch rst is used to receive the pixel reset control signal RST. It can be understood that the gate of the pixel reset control switch rst is used to receive the pixel reset control signal RST sent by the control module 200. When the pixel reset control signal RST is at a high level, the pixel reset control switch rst is turned on; when the pixel reset control signal RST is at a low level, the pixel reset control switch rst is turned off.
[0033] It is understood that the gate of the first control switch sw0 is used to receive the first sampling enable signal SH_EN0. It is understood that the gate of the first control switch sw0 is used to receive the first sampling enable signal SH_EN0 sent by the control module 200. When the first sampling enable signal SH_EN0 is at a high level, the first control switch sw0 is turned on; when the first sampling enable signal SH_EN0 is at a low level, the first control switch sw0 is turned off.
[0034] It is understood that the pixel transmission control switch tx0 is used to receive the transmission control signal TX sent by the control module 200. When the transmission control signal TX is high, the pixel transmission control switch tx0 is turned on, and when the transmission control signal TX is low, the pixel transmission control switch tx0 is turned off.
[0035] like Figure 3 As shown, according to some embodiments of the present application, the sampling and holding module 112 includes: a second control switch sw1, a reset signal sampling and storage unit, and an image signal sampling and storage unit; wherein, the drain of the second control switch sw1 is connected to the source of the first control switch sw0, the gate of the second control switch sw1 is connected to the control module 200 and is used to receive the second sampling enable signal SH_EN1, and the source of the second control switch sw1 is respectively connected to the first end of the reset signal sampling and storage unit and the first end of the image signal sampling and storage unit; the second end of the reset signal sampling and storage unit is connected to the signal amplification module 113, and the second end of the image signal sampling and storage unit is grounded.
[0036] It can be understood that the reset signal sampling and storage unit and the image signal sampling and storage unit are connected in parallel to form a parallel sampling module; the parallel sampling module is connected in series with the second control switch sw1.
[0037] It can be understood that when the second sampling enable signal SH_EN1 is at a high level, the second control switch sw1 is turned on; and when the second sampling enable signal SH_EN1 is at a low level, the second control switch sw1 is turned off.
[0038] like Figure 3 As shown, according to some embodiments of the present application, the reset signal sampling storage unit includes: a third control switch sw2 and a first sampling capacitor c1; wherein the drain of the third control switch sw2 is connected to the source of the second control switch sw1; the source of the third control switch sw2 is grounded through the first sampling capacitor c1; and the gate of the third control switch sw2 is connected to the control module 200 and is used to receive the first sampling control signal SH_RST.
[0039] like Figure 3 As shown, the image signal sampling and storage unit includes: a fourth control switch sw3 and a second sampling capacitor c2; wherein the drain of the fourth control switch sw3 is connected to the source of the second control switch sw1; the source of the fourth control switch sw3 is grounded through the second sampling capacitor c2; and the gate of the fourth control switch sw3 is connected to the control module 200 and is used to receive the second sampling control signal SH_SIG.
[0040] It can be understood that when the first sampling control signal SH_RST is at a high level, the third control switch sw2 is turned on; when the first sampling control signal SH_RST is at a low level, the third control switch sw2 is turned off.
[0041] It can be understood that when the second sampling control signal SH_SIG is at a high level, the fourth control switch sw3 is turned on; when the second sampling control signal SH_SIG is at a low level, the fourth control switch sw3 is turned off.
[0042] During the sampling operation, in one embodiment, in conjunction with the sampling timing control signal, when the second control switch sw1 and the third control switch sw2 are turned on and the fourth control switch sw3 is turned off, the first sampling capacitor c1 in the reset signal sampling storage unit performs sampling to obtain the pixel reset sampling signal Vrst.
[0043] During the sampling operation, in one embodiment, in conjunction with the sampling timing control signal, when the second control switch sw1 and the fourth control switch sw3 are turned on and the third control switch sw2 is turned off, sampling is performed by the second sampling capacitor c2 in the image signal sampling storage unit to obtain the pixel image sampling signal Vsig.
[0044] As shown in Figure 3 According to some embodiments of the present application, the signal amplification module 113 includes a second amplification driving transistor sf1 and a fifth control switch sw4. The drain of the second amplification driving transistor sf1 is connected with the first power supply VDDA, and the gate of the second amplification driving transistor sf1 is connected with the source of the third control switch sw2. The source of the second amplification driving transistor sf1 and the drain of the fifth control switch sw4 are both connected with the source of the first control switch sw0. The gate of the fifth control switch sw4 is connected with the control module 200 and used for receiving a mode selection control signal SEL_RG, and the source of the fifth control switch sw4 is connected with the output signal line VPIX as the output terminal of the signal amplification module 113.
[0045] It can be understood that when the mode selection control signal SEL_RG is high, the fifth control switch sw4 is turned on; and when the mode selection control signal SEL_RG is low, the fifth control switch sw4 is turned off. The on-off state of the fifth control switch sw4 is controlled by the control module 200.
[0046] Specifically, in the global exposure image sensor 1000 provided by the embodiments of the present application, the global control switch sw5, the first current source transistor nm1, the pixel reset control switch rst, the first amplification driving transistor sf0, the first control switch sw0, the pixel transfer control switch tx0, the second control switch sw1, the third control switch sw2, the fourth control switch sw3, the second amplification driving transistor sf1 and the fifth control switch sw4 are all NMOS tubes.
[0047] In the global exposure image sensor 1000, the process of reading the pixel unit in the global exposure mode includes a reset phase, a sampling phase and a readout phase.
[0048] The control logic of the reset phase is that the first control switch sw0 is turned off, and the second control switch sw1, the third control switch sw2, the fourth control switch sw3, the fifth control switch sw4 and the global control switch sw5 are turned on at the same time, so as to reset the first sampling capacitor c1 and the second sampling capacitor c2. And the pixel reset control switch rst is turned on to reset the floating node FD.
[0049] The control logic of the sampling stage is that the fourth control switch sw3 and the global control switch sw5 are controlled to be in the off state, the first control switch sw0, the second control switch sw1, the third control switch sw2 and the fifth control switch sw4 are controlled to be in the on state, and the sampling pixel reset sampling signal Vrst is sampled to the first sampling capacitor c1. The third control switch sw2 and the global control switch sw5 are controlled to be in the off state, and the first control switch sw0, the second control switch sw1, the fourth control switch sw3 and the fifth control switch sw4 are controlled to be in the on state, and the sampling pixel image sampling signal Vsig is sampled to the second sampling capacitor c2.
[0050] The control logic of the readout stage is that the global control switch sw5 is controlled to be in the off state, and the first control switch sw0 and the second control switch sw1 of all pixel units 110 are controlled to be in the off state; the fifth control switch sw4 of the pixel unit 110 to be read in the current row is controlled to be in the on state, and the third control switch sw2 and the fourth control switch sw3 are controlled to be in the off state, and the pixel reset sampling signal Vrst sampled by the first sampling capacitor c1 is amplified by the second amplification driving transistor sf1, and a quantized reset signal is obtained after quantization processing of the readout module 300; the third control switch sw2 and the fourth control switch sw3 of the pixel unit 110 to be read in the current row are controlled to be in the on state, and the average voltage signal is obtained by taking the average of the sum of the pixel reset sampling signal Vrst sampled by the first sampling capacitor c1 and the pixel image sampling signal Vsig sampled by the second sampling capacitor c2; the average voltage signal is amplified by the second amplification driving transistor sf1, and a quantized average voltage signal is obtained after quantization processing of the readout module 300; the quantized average voltage signal is subtracted from the quantized reset signal to obtain the target image signal of the pixel unit 110 in the current row; after the readout operation of each row of pixel units 110 is completed, the global exposure readout operation of the pixel array 100 is completed.
[0051] Those skilled in the art can understand that the system structure shown in the figure does not constitute a limitation on the embodiments of the present application, and can include more or fewer components than the figure, or combine certain components, or different component arrangements.
[0052] The system embodiments described above are only schematic, and the units described as separate components can or can not be physically separated, i.e. can be located in one place or distributed on multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the present embodiment.
[0053] Those skilled in the art will understand that the system architecture and application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will know that with the evolution of the system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.
[0054] Based on the above-mentioned global exposure image sensor, various embodiments of the reading control method of the global exposure image sensor of the present application are proposed below.
[0055] First, as Figure 6 As shown, the reading control method of the global exposure image sensor can be applied to Figure 1 In the control module of the global exposure image sensor shown, the global exposure image sensor includes: a control module, a readout module connected to the control module, a pixel array, and at least one global control switch; the readout module includes: a plurality of first current source transistors; the first current source transistors are connected to the first global control switch; the pixel array includes a plurality of pixel units arranged in m rows and n columns; each pixel unit includes: a basic pixel module, a sampling and holding module, and a signal amplification module connected in sequence; the readout control method may include but is not limited to steps S110 to S130.
[0056] Step S110: In response to the first timing control signal in the global exposure mode, the global control switch is controlled to be turned on, and the current source gate voltage signal at the connection point between the first current source transistor and the global control switch is pulled high, so as to pull down the output signal of each column of pixel units, and the sampling and holding module is reset based on the sampling timing control signal.
[0057] Step S120: After the reset process is completed, the global control switch is controlled to be turned off, and the pixel unit is controlled to perform a global sampling process.
[0058] Step S130: After the global sampling process is completed, the global control switch is controlled to remain off, and the readout module is controlled to perform a readout operation on each row of pixel units row by row.
[0059] According to some embodiments of the present application, a basic pixel module includes: a photodiode, a pixel transfer control switch, a pixel reset control switch, a first amplifying drive transistor and a first control switch; a sampling and holding module includes: a second control switch, a reset signal sampling and storage unit and an image signal sampling and storage unit; the reset signal sampling and storage unit includes: a third control switch and a first sampling capacitor; and the image signal sampling and storage unit includes: a fourth control switch and a second sampling capacitor.
[0060] In one embodiment, the first timing control signal in step S110 is as follows:Figure 7 as shown.
[0061] Based on this, further description of step S110, wherein the reset processing of the sample and hold module includes but is not limited to steps S111 to S112.
[0062] Step S111: in the global exposure mode, control the first control switch to be off, control the second control switch, the fifth control switch and the global control switch to be on.
[0063] Step S112: control the first current source transistor to be in a pull-down state, ground each column of multiplexed output signal lines, control the third control switch and the fourth control switch to be on, and reset all first sample capacitors and second sample capacitors.
[0064] The global readout reset operation is completed through the logic control of steps S111 to S112.
[0065] It should be noted that when the first current source transistor is in a pull-down state, the first current source transistor is more completely turned on, thereby grounding each column of multiplexed output signal lines.
[0066] According to some embodiments of the present application, further description of step S120, wherein controlling the global control switch to be off and controlling the pixel unit to perform global sampling processing includes but is not limited to steps S121 to S123.
[0067] Step S121: control the global control switch to be off, for each pixel unit, control the first control switch and the second control switch to be on, control the fifth control switch to be off, and turn on the pixel reset control switch, reset the floating node, and turn off the pixel reset control switch after the reset of the floating node is completed.
[0068] Step S122: for each pixel unit, control the third control switch to be on and the fourth control switch to be off, and sample all pixel reset sampling signals through the first sample capacitor.
[0069] Step S123: for each pixel unit, control the pixel transfer control switch to be on, transfer the pixel photoelectric signal collected through the photodiode to the floating node, control the pixel transfer control switch to be off after the transfer is completed, control the fourth control switch to be on and the third control switch to be off, and sample all pixel image sampling signals through the second sample capacitor, and complete the sampling.
[0070] The global sampling operation is completed through the logic control of steps S121 to S123.
[0071] According to some embodiments of the present application, the signal amplification module comprises a second amplification driving transistor and a fifth control switch; further description of step S130, wherein the global control switch is controlled to remain off, and the readout module is controlled to perform row-by-row readout operation on each row of pixel units, including but not limited to steps S131-S134.
[0072] Step S131: control the global control switch to be off, and control the first control switch and the second control switch of all pixel units to be off; control the fifth control switch of the pixel unit to be read in the current row to be on, and control the third control switch and the fourth control switch to be off; the pixel reset sampling signal sampled by the first sampling capacitor is amplified by the second amplification driving transistor, and after quantization processing by the readout module, a quantized reset signal is obtained; Step S132: control the third control switch and the fourth control switch of the pixel unit to be read in the current row to be on, take the average of the sum of the pixel reset sampling signal sampled by the first sampling capacitor and the pixel image sampling signal sampled by the second sampling capacitor to obtain a mean voltage signal; the mean voltage signal is amplified by the second amplification driving transistor, and after quantization processing by the readout module, a quantized mean voltage signal is obtained; Step S133: subtract the quantized reset signal from the quantized mean voltage signal to obtain the target image signal of the pixel unit in the current row; Step S134: after the readout operation of each row of pixel units is completed, the global exposure readout operation of the pixel array is completed.
[0073] Through the logic control of steps S131-S134, the global exposure readout operation of the pixel array is completed in the global exposure mode.
[0074] Through steps S110 to S130, in the process of reading control of the global exposure image sensor, the control module is used to control the global control switch to be turned on in response to the first timing control signal in the global exposure mode, the current source gate voltage signal at the connection point of the first current source transistor and the global control switch is pulled up, the output signals of each column of pixel units are pulled down, and the sampling holding module is reset based on the sampling timing control signal; after the reset is completed, the global control switch is controlled to be turned off, and the pixel units are controlled to be globally sampled; after the global sampling is completed, the global control switch is controlled to be kept off, and the readout module is controlled to read each row of pixel units row by row; the output signal line of each column in the pixel array can be pulled down through the control of the newly added global control switch, and the reset operation of the pixel array is simplified, and the logic control cost is reduced. That is, the scheme of the embodiment of the application can pull down the output signal line of each column in the pixel array through the control of the newly added global control switch, cooperate with the control logic of the pixel array, simplify the reset operation of the pixel array, and reduce the logic control cost and the circuit hardware cost.
[0075] It should be emphasized that the global exposure image sensor of the embodiment of the application can work in the global exposure mode and the rolling exposure mode. That is, the global exposure image sensor of the embodiment of the application is compatible with the global exposure mode and the rolling exposure mode. The reading control method of the global exposure image sensor includes: reading control in the global exposure mode, and reading control in the rolling exposure mode.
[0076] It should be noted that when one global control switch, or two global control switches, or multiple global control switches are used, all the global control switches are in the same on-off state. Even if the number of global control switches is different, the control logic involved in the reading control method of the global exposure image sensor is consistent. Based on this, taking an example, based on the application scenario of using one global control switch, the reading control method of the global exposure image sensor in the global exposure mode is described in detail. Figure 7 The reading control method of the global exposure image sensor in the global exposure mode is described in detail.
[0077] In the global exposure mode, when the photodiode D1 in the basic pixel module 111 is reset, the reset of the photodiode D1 is realized by simultaneously turning on the pixel reset control switch rst and the pixel transfer control switch tx0, which is the same operation and will not be described here.
[0078] After the global exposure is completed, the global reading process is performed according to the first timing control signal as shown in Figure 7 The global reading process is as follows. T1 stage (global reset operation of all pixel units): In the GS working mode readout, the first sampling enable signal SH_EN0 is low, the first control switch sw0 is off; the second sampling enable signal SH_EN1 is high, the second control switch sw1 is on; the mode selection control signal SEL_RG is high, the fifth control switch sw4 is on; the global reset control signal RST_GSC is high, the global control switch sw5 is on, the first current source transistor nm1 is on to pull down the output voltage of the output signal line VPIX to the ground, and then the first sampling control signal SH_RST and the second sampling control signal SH_SIG simultaneously appear a high level pulse to reset the first sampling capacitor c1 and the second sampling capacitor c2 to 0 level, completing the reset operation before global sampling.
[0079] T2 stage (global sampling operation is performed on all pixel units): The first sampling enable signal SH_EN0 is high, the first control switch sw0 is on; the second sampling enable signal SH_EN1 is high, the second control switch sw1 is on; the mode selection control signal SEL_RG is low, the fifth control switch sw4 is off; the global reset control signal RST_GSC is low, the global control switch sw5 is off; the pixel reset control signal RST is high, the pixel reset control switch rst is on, and all floating nodes FD are reset; then the first sampling control signal SH_RST is high, the third control switch sw2 is on, and all pixel reset sampling signals Vrst are sampled to the VRST node of the first sampling capacitor; by controlling the transmission control signal TX to be high, the pixel transmission control switch tx0 is turned on, and the pixel photoelectric signal of the photodiode D1 of all pixel units is transmitted to the respective floating node FD, then the second sampling control signal SH_SIG is high, the fourth control switch sw3 is on, and the image photoelectric signal of all pixel units is sampled to the VSIG node on the respective second sampling capacitor c2; thus the global sampling operation of the signals of all pixel units is completed.
[0080] T3 stage (the signals sampled by the pixel array are read out row by row), and the following operations are performed on each row of pixel units in the pixel array: In this stage, the first sampling enable signal SH_EN0, the second sampling enable signal SH_EN1, and the global reset control signal RST_GSC are set to low level, and the first control switch sw0, the second control switch sw1, and the global control switch sw5 are turned off. For the pixel unit of the current row to be processed, the mode selection control signal SEL_RG is set to high level, the fifth control switch sw4 is turned on, the first current source transistor nm1 is set to a specific current source state, the first sampling control signal SH_RST and the second sampling control signal SH_SIG are set to low level, and the third control switch sw2 and the fourth control switch sw3 are turned off. At this time, the pixel reset sampling signal sampled on the VRST node is amplified by the second amplification driving transistor sf1 and then subjected to quantization processing of the external readout module to obtain a quantized reset signal Vrst. Then, the first sampling control signal SH_RST and the second sampling control signal SH_SIG of the current row are simultaneously set to high level pulses, the third control switch sw2 and the fourth control switch sw3 are turned on, and the pixel reset sampling signal sampled on the first sampling capacitor c1 and the pixel reset sampling signal sampled on the second sampling capacitor c2 are summed and averaged to obtain the level of the mean voltage signal of the VRST node as (VRST+VSIG) / 2. The mean voltage signal is amplified by the second amplification driving transistor sf1 and then subjected to quantization of the external readout module to obtain a quantized mean voltage signal: (Vrst+Vsig) / 2. The quantized mean voltage signal is subtracted from the quantized reset signal Vrst obtained in the first quantization to obtain a target image signal δVsig=Vrst-(Vrst+Vsig) / 2=(Vrst-Vsig) / 2, thereby realizing quantized readout of the target image signal δVsig after CDS of the current row.
[0081] According to the above steps of the T3 stage, the target image signal of the pixel unit of the next row is read out.
[0082] In summary, in the global exposure mode, all pixel units in the pixel array are simultaneously reset and exposed, the exposure signals of the pixels are simultaneously sampled to the first sampling capacitor c1 and the second sampling capacitor c2 in the pixel through the control switch for holding, and then the first row is read row by row.
[0083] Taking an example, the global exposure image sensor provided in the embodiments of the present application is combined with the rolling exposure mode. Figure 8 The flow of the readout control method of the global exposure image sensor provided in the embodiments of the present application in the rolling exposure mode is specifically described.
[0084] T1 stage (global reset operation on all pixel units): The global reset operation on all pixel units in the rolling exposure mode is the same as the global reset operation on all pixel units in the global exposure mode.
[0085] T2 stage, row-by-row readout operation: When the second sampling enable signal SH_EN1, the first sampling control signal SH_RST, the second sampling control signal SH_SIG, and the global reset control signal RST_GSC are all low, sw1, sw2, sw3, and sw5 are off; the first sampling enable signal SH_EN0 and the mode selection control signal SEL_RG are high, and sw0 and sw4 are on. The pixel reset control signal RST is high, and the pixel reset control switch rst is on. The floating node FD of the current row of pixel units is reset. After being amplified by sf0, Vrst is directly quantified by the external readout module. The transmission control signal TX is high, the pixel transmission control switch tx0 is on, the pixel photoelectric signal of the photodiode D1 of all pixel units is transmitted to the respective floating node FD, and Vsig is obtained by the external readout module after being amplified by sf0. The target image signal δVsig = Vrst-Vsig is obtained by the circuit operation of the readout module. The CDS image signal δVsig of one row is quantified and read out.
[0086] The operation is repeated according to the steps of the T2 stage, and the target image signal of the next row of pixel units is read out.
[0087] In summary, in the rolling exposure mode, the present application multiplexes each column output signal line VPIX and multiplexes the gating switch, reduces the device, and makes the pixel state in the rolling exposure mode consistent with that of the conventional rolling exposure pixel, with small noise and no loss of dynamic range (the RS mode signal generally needs to pass through the sampling structure (the second control switch sw1 and the third control switch sw2) in the global exposure image sensor). In the rolling exposure mode, the pixel array resets and exposes each row of pixel units row by row. After each row of exposure is completed, it is directly read out row by row until all row image information is output.
[0088] In summary, the global exposure image sensor provided in the embodiments of the present application has the following beneficial effects: the global exposure image sensor can be compatible with rolling exposure (RS) and global exposure (GS) output; in the global exposure mode, noise can be eliminated through CDS, and a high-quality image signal can be output; in the global exposure mode, all pixel units are powered by an external single power supply, power supply is simple and convenient to enhance, the power signal quality can be improved, and thus the signal quality can be improved; in the sampling structure, new switches and control logic are used, and the reset operation on the first sampling capacitor c1 and the second sampling capacitor c2 is implemented by skillfully controlling the pull-down of the output signal line of each column in the pixel array. It can be seen that, compared with the related art, the present application does not need to independently bias the current in the pixel unit; and the reset is not needed to be matched with the dynamic adjustment of the VRSF power supply. In addition, in the related art, true correlated double sampling (CDS) cannot be implemented when the signal is read, and thus the reset noise of the floating diffusion (FD) cannot be eliminated, and the read noise of the pixel output will be large. In addition, due to the large leakage current at the floating diffusion, the charge storage of the pixel signal read later is not complete enough in the signal reading process of this pixel structure, and thus there will be a problem of affecting the quality of the output image. The present application eliminates noise through CDS, and outputs a high-quality image signal.
[0089] The embodiments of the present application provide an electronic device, which includes the global exposure image sensor provided in the embodiments of the present application; can be compatible with rolling exposure (RS) and global exposure (GS) output; and can pull down the output signal line of each column in the pixel array through the control of the newly added global control switch, match the control logic of the pixel array, simplify the reset operation on the pixel array, and reduce the logic control cost and the circuit hardware cost.
[0090] The above is a specific description of the preferred embodiments of the present application, but the present application is not limited to the above embodiments, and those skilled in the art can make various equivalent modifications or replacements without departing from the spirit of the present application, and these equivalent modifications or replacements are all included in the scope defined by the present application.
Claims
1. A global exposure image sensor, characterized in that: include: at least one global control switch; a readout module comprising a plurality of first current source transistors, wherein the first current source transistors are connected to the global control switch; A pixel array comprising a plurality of pixel units arranged in m rows and n columns; wherein each column of the pixel units is connected to the drain of one of the first current source transistors via a multiplexed output signal line; wherein each of the pixel units comprises: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; an output end of the signal amplification module is connected to the output signal line; and the pixel array is connected to a second power supply. A control module is connected to the readout module, the pixel array, and the gate of the global control switch, respectively. The control module is used to: in response to a first timing control signal in a global exposure mode, control the global control switch to be turned on, pull up the current source gate voltage signal at the connection node between the first current source transistor and the global control switch, thereby pulling down the output signal of each column of pixel units, and reset the sampling and holding module based on the sampling timing control signal; after the reset process is completed, control the global control switch to be turned off, control the pixel units to perform global sampling processing, and control the readout module to perform a readout operation on each row of pixel units row by row.
2. The global exposure image sensor according to claim 1, wherein: The basic pixel module includes: a photodiode, a pixel transfer control switch, a pixel reset control switch, a first amplifying driving transistor and a first control switch; wherein one end of the photodiode is grounded, and the other end of the photodiode is connected to the source of the pixel transfer control switch; the drain of the pixel transfer control switch and the gate of the first amplifying driving transistor are connected to a floating node; the drain of the pixel reset control switch and the drain of the first amplifying driving transistor are both connected to a second power supply and the source of the pixel reset control switch; the source of the first amplifying driving transistor is connected to the drain of the first control switch; the gate of the pixel transfer control switch, the gate of the pixel reset control switch and the gate of the first control switch are all connected to a control module; The gate of the pixel transfer control switch is used to receive a pixel transfer control signal, the gate of the pixel reset control switch is used to receive a pixel reset control signal, and the gate of the first control switch is used to receive a first sampling enable signal.
3. The global exposure image sensor according to claim 2, wherein: The sampling and holding module includes: a second control switch, a reset signal sampling and storage unit, and an image signal sampling and storage unit; wherein, the drain of the second control switch is connected to the source of the first control switch, the gate of the second control switch is connected to the control module and is used to receive a second sampling enable signal, and the source of the second control switch is respectively connected to the first end of the reset signal sampling and storage unit and the first end of the image signal sampling and storage unit; the second end of the reset signal sampling and storage unit is connected to the signal amplification module, and the second end of the image signal sampling and storage unit is grounded.
4. The global exposure image sensor according to claim 3, wherein: The reset signal sampling and storage unit includes: a third control switch and a first sampling capacitor; wherein the drain of the third control switch is connected to the source of the second control switch; the source of the third control switch is grounded through the first sampling capacitor; and the gate of the third control switch is connected to the control module and is configured to receive the first sampling control signal; The image signal sampling and storage unit includes: a fourth control switch and a second sampling capacitor; wherein the drain of the fourth control switch is connected to the source of the second control switch; the source of the fourth control switch is grounded through the second sampling capacitor; and the gate of the fourth control switch is connected to the control module and is configured to receive a second sampling control signal.
5. The global exposure image sensor according to claim 4, wherein: The signal amplification module includes: a second amplification driving transistor and a fifth control switch; wherein, the drain of the second amplification driving transistor is connected to the first power supply, and the gate of the second amplification driving transistor is connected to the source of the third control switch; the source of the second amplification driving transistor and the drain of the fifth control switch are both connected to the source of the first control switch; the gate of the fifth control switch is connected to the control module and is used to receive a mode selection control signal, and the source of the fifth control switch is connected to the output signal line as the output end of the signal amplification module.
6. A reading control method for a global exposure image sensor, characterized in that: A control module for a global exposure image sensor according to any one of claims 1 to 5, the global exposure image sensor comprising: a control module, a readout module connected to the control module, a pixel array, and at least one first global control switch; the readout module comprising: a plurality of first current source transistors; the first current source transistors being connected to the first global control switch; the pixel array comprising a plurality of pixel units arranged in m rows and n columns; each pixel unit comprising: a basic pixel module, a sample-and-hold module, and a signal amplification module connected in sequence; The reading control method includes: In response to a first timing control signal in a global exposure mode, the global control switch is controlled to be turned on, a current source gate voltage signal at a connection point between the first current source transistor and the global control switch in the readout module is pulled high, thereby pulling down an output signal of each column of pixel units, and resetting the sample and hold module based on the sampling timing control signal; After the reset process is completed, the global control switch is controlled to be turned off, and the pixel unit is controlled to perform global sampling process; After the global sampling process is completed, the global control switch is controlled to remain off, and the readout module is controlled to perform a readout operation on each row of pixel units row by row.
7. The reading control method of the global exposure image sensor according to claim 6, characterized in that: The basic pixel module includes: a photodiode, a pixel transfer control switch, a pixel reset control switch, a first amplifying driving transistor and a first control switch; the sampling and holding module includes: a second control switch, a reset signal sampling and storage unit and an image signal sampling and storage unit; the reset signal sampling and storage unit includes: a third control switch and a first sampling capacitor; the image signal sampling and storage unit includes: a fourth control switch and a second sampling capacitor; the signal amplifying module includes: a second amplifying driving transistor and a fifth control switch; The resetting process of the sampling and holding module includes: In the global exposure mode, controlling the first control switch to be turned off, and controlling the second control switch, the fifth control switch, and the global control switch to be turned on; The first current source transistor is controlled to be in a pull-down state, so that the output signal line multiplexed in each column is grounded, and the third control switch and the fourth control switch are controlled to be turned on, so as to reset all the first sampling capacitors and the second sampling capacitors.
8. The reading control method of the global exposure image sensor according to claim 7, characterized in that: The controlling the global control switch to be turned off and controlling the pixel unit to perform global sampling processing includes: Controlling the global control switch to be off, controlling the first control switch and the second control switch to be on, and the fifth control switch to be off for each pixel unit, and turning on the pixel reset control switch to reset the floating node; and turning off the pixel reset control switch after the resetting of the floating node is completed; For each pixel unit, controlling the third control switch to be turned on and the fourth control switch to be turned off, and sampling all pixel reset sampling signals through the first sampling capacitor; For each pixel unit, the pixel transmission control switch is controlled to be turned on, and the pixel photoelectric signal collected by the photodiode is transmitted to the floating node. After the transmission is completed, the pixel reset control switch is controlled to be turned off, the fourth control switch is controlled to be turned on, and the third control switch is controlled to be turned off, and all pixel image sampling signals are sampled through the second sampling capacitor to complete the sampling.
9. The reading control method of the global exposure image sensor according to claim 7, characterized in that: The controlling the global control switch to remain off and controlling the readout module to perform a readout operation on each row of pixel units row by row includes: Controlling the global control switch to be turned off, and controlling the first control switch and the second control switch of all pixel units to be turned off; controlling the fifth control switch of the pixel unit to be read in the current row to be turned on, and controlling the third control switch and the fourth control switch to be turned off, and obtaining a quantized reset signal after the pixel reset sampling signal sampled by the first sampling capacitor is amplified by the second amplifying driving transistor and quantized by the readout module; Controlling the third control switch and the fourth control switch of the pixel unit to be read in the current row to be turned on, averaging the sum of the pixel reset sampling signal sampled by the first sampling capacitor and the pixel image sampling signal sampled by the second sampling capacitor to obtain a mean voltage signal; the mean voltage signal is amplified by the second amplifying driving transistor and quantized by the readout module to obtain a quantized mean voltage signal; Subtracting the quantization reset signal from the quantization mean voltage signal to obtain a target image signal of a pixel unit in a current row; After completing the readout operation on each row of pixel units, a global exposure readout operation is completed on the pixel array.
10. An electronic device, characterized in that: The device comprises the global exposure image sensor according to any one of claims 1 to 5.
Citation Information
Patent Citations
High-frame-rate global pixel CMOS (Complementary Metal Oxide Semiconductor) image sensor and signal transmission method thereof
CN104333720A
Global exposure image sensor
CN110611782A
Shared Readout Low Noise Global Shutter Image Sensor
US20140226046A1
Control method of high gain image sensor
US20250267376A1