Zener diode and manufacturing method thereof

Abstract

The invention discloses a Zener diode, which comprises a first epitaxial layer with a second conductive type, wherein field oxide and a first well region doped with the first conductive type are formed in the first epitaxial layer, and a first active region is isolated by the field oxide; a Zener injection region of a first conductive type is formed in the first active region, and a second injection region of a second conductive type is formed at the top of the Zener injection region; a second conduction type heavily doped third injection region is formed on the peripheral side of the Zener injection region; the second injection region and the Zener injection region are completely aligned up and down, and the junction depth of the third injection region is greater than that of the second injection region; and at the bottom of the second injection region, the third injection region and the Zener injection region are in side contact and are not overlapped up and down, so that the junction depth of the Zener injection region is not influenced by heavy doping of the third injection region. The invention further discloses a manufacturing method of the Zener diode. According to the invention, the electric leakage of the device can be improved, and the electric leakage of the device can be improved under different BCD process platforms.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor integrated circuit manufacturing, and in particular to a Zener diode; the present invention also relates to a method for manufacturing the Zener diode. Background Art

[0002] Zener diodes are surface-contact crystal diodes that utilize their avalanche breakdown effect, also known as voltage regulator diodes. Zener diodes are widely used in voltage regulators as reference voltage sources or as protection diodes in overvoltage protection circuits. They are often used as voltage regulators in mortgage circuits. They are also used in surge circuits, overvoltage protection, arc suppression, and series voltage regulation. They can be used to suppress transient interference and extremely high-speed pulse interference.

[0003] The BCD process integrates bipolar transistors, CMOS, and DMOS devices onto a single chip. Compared to the 90BCD platform (the 90nm process node), the 55BCD platform's Zener diodes suffer from faster leakage warping and greater leakage.

[0004] like Figure 1 FIG. 1 is a schematic diagram of the structure of an existing Zener diode; the existing Zener diode includes:

[0005] A P-type doped semiconductor substrate 101 has an N-type doped first buried layer 102 formed on the surface of the semiconductor substrate 101 , and a P-type doped first epitaxial layer 103 formed on the surface of the first buried layer 102 .

[0006] A field oxide 104 is formed in the first epitaxial layer 103 and a first active region is isolated by the field oxide 104 .

[0007] An N-type doped first well region 105 is formed in the first epitaxial layer 103 . The first well region 105 is located in the first active region and extends to the first epitaxial layer 103 outside the field oxide 104 on the periphery of the first active region. The junction depth of the first well region 105 is greater than the depth of the first epitaxial layer 103 .

[0008] The formation area of ​​the first well region 105 is defined by a photolithography process. The first well region 105 needs to be formed in the formation area of ​​the Zener diode. Figure 1 The first well region 105 is formed in the first epitaxial layer 103 in the formation region of the Zener diode shown.

[0009] An N-type Zener implantation region 108 is formed in the first active region, and a P-type heavily doped first implantation region 106 is formed on top of the Zener implantation region 108 .

[0010] The PN junction of the Zener diode is composed of a first implantation region 106 and a Zener implantation region 108. Figure 1 In the embodiment, the first implantation region 106 is an anode region, and the Zener implantation region 108 is a cathode region.

[0011] An N-type heavily doped second implantation region 107 is formed in a surface region of the first well region 105 outside the field oxide 104 of the first active region. The Zener implantation region 108 is led out through the first well region 105 and the second implantation region 107.

[0012] In the BCD process, the process of the doped regions of the devices integrated on the same chip can be shared to save cost. In the embodiment, the first implantation region 106 of the Zener diode can be realized by using the source-drain implantation process of the NMOS in the CMOS, and the second implantation region 107 can be realized by using the source-drain implantation process of the PMOS in the CMOS.

[0013] Meanwhile, the junction depths of the source-drain implantation regions of different process nodes are often different, which will change the junction depth of the Zener implantation region 108 after the first implantation region 106 is superimposed, so that the width of the depletion region of the PN junction of the Zener diode will change, and the leakage current will also change. For example, compared with the 90BCD platform, the Zener diode of the 55BCD platform has the problems of faster leakage current rise and larger leakage current. SUMMARY

[0014] The technical problem to be solved by the present application is to provide a Zener diode which can improve the leakage current of the device and can improve the leakage current of the device under different BCD process platforms. To this end, the present application also provides a manufacturing method of a Zener diode.

[0015] To solve the above technical problem, the Zener diode provided by the present application comprises:

[0016] a first epitaxial layer with a second conductivity type, in which a field oxide is formed and a first active region is isolated by the field oxide.

[0017] a first well region with a first conductivity type is formed in the first epitaxial layer, the first well region is located in the first active region and extends to the first epitaxial layer outside the field oxide on the side of the first active region, and the junction depth of the first well region is greater than the depth of the first epitaxial layer.

[0018] a Zener implantation region with the first conductivity type is formed in the first active region, and a second implantation region with the second conductivity type is formed on the top of the Zener implantation region.

[0019] A third implant region of the second conductivity type is formed on the side of the Zener implant region.

[0020] A first electrode region of a Zener diode is formed by the second implant region and the third implant region, and a second electrode region of the Zener diode is formed by the Zener implant region.

[0021] The second implant region and the Zener implant region are completely aligned vertically, and the junction depth of the third implant region is greater than the junction depth of the second implant region.

[0022] At the bottom of the second implant region, the third implant region and the Zener implant region are in lateral contact, and the three implant regions and the Zener implant region are not vertically overlapped to ensure that the junction depth of the Zener implant region is not affected by the heavy doping of the third implant region.

[0023] A further improvement is that the first epitaxial layer is formed on a semiconductor substrate of the second conductivity type.

[0024] A first buried layer of the first conductivity type is further formed between the first epitaxial layer and the semiconductor substrate.

[0025] A further improvement is that a fourth implant region of the first conductivity type is formed in the surface region of the first well region outside the field oxide of the first active region.

[0026] A further improvement is that the third implant region is a structure formed by a source-drain implant of the second conductivity type using a BCD process platform, and the fourth implant region is a structure formed by a source-drain implant of the first conductivity type using a BCD process platform.

[0027] A further improvement is that the field oxide uses a shallow trench isolation.

[0028] A further improvement is that the second implant region and the Zener implant region have structures defined by the same photolithography.

[0029] A further improvement is that the first conductivity type is N-type and the second conductivity type is P-type, or the first conductivity type is P-type and the second conductivity type is N-type.

[0030] To solve the above technical problems, the manufacturing method of the Zener diode provided by the present application comprises the following steps:

[0031] A first epitaxial layer of the second conductivity type is provided, and a field oxide is formed in the first epitaxial layer and separates a first active region.

[0032] forming a first well region of the first conductivity type in the first epitaxial layer, the first well region being located in the first active region and extending into the first epitaxial layer outside the field oxide around the first active region, the first well region having a junction depth greater than the depth of the first epitaxial layer.

[0033] forming a third implant region by a heavily doped implant of the second conductivity type in a region of the first active region outside a subsequently formed zener implant region.

[0034] opening a formation region of the zener implant region, sequentially performing ion implantation of the first conductivity type to form the zener implant region and performing ion implantation of the second conductivity type to form a second implant region; the second implant region being located on top of the zener implant region, and the third implant region being located around the zener implant region.

[0035] forming a first electrode region of a zener diode from the second implant region and the third implant region, and forming a second electrode region of the zener diode from the zener implant region.

[0036] the third implant region having a junction depth greater than the junction depth of the second implant region.

[0037] at the bottom of the second implant region, the third implant region and the zener implant region are in lateral contact, and the three implant regions and the zener implant region are not overlapped vertically to ensure that the junction depth of the zener implant region is not affected by the heavy doping of the third implant region.

[0038] Further improvement is that the first epitaxial layer is formed on a semiconductor substrate of the second conductivity type.

[0039] a first buried layer of the first conductivity type is further formed between the first epitaxial layer and the semiconductor substrate.

[0040] Further improvement is that after forming the first well region, further comprising:

[0041] forming a fourth implant region of the first conductivity type in the surface region of the first well region outside the field oxide of the first active region.

[0042] Further improvement is that the third implant region is formed by a heavily doped source-drain implant of the second conductivity type on a BCD process platform, and the fourth implant region is formed by a heavily doped source-drain implant of the first conductivity type on a BCD process platform.

[0043] Further improvement is that the field oxide is formed by a shallow trench isolation process.

[0044] Further improvement is that after the ion implantation of the zener implant region and the second implant region is completed, an annealing push well process is further performed.

[0045] Further improvement is that the first well region is formed by ion implantation and annealing push well, and the forming area of the first well region is defined by a photoetching process.

[0046] Further improvement is that the first conductive type is N type and the second conductive type is P type, or the first conductive type is P type and the second conductive type is N type.

[0047] Different from the prior art that the first electrode region is formed on the top of the Zener injection region, the heavy doped part of the first electrode region, i.e. the third injection region, is arranged on the side of the Zener injection region in the application, and the second injection region with the second conductive type and lower doping concentration than the third injection region is arranged on the top of the Zener injection region. In this way, the junction depth of the third injection region does not affect the junction depth of the Zener injection region, so that the junction depth of the Zener injection region can be kept stable. The leakage of the Zener diode is related to the size of the depletion region formed by the Zener injection region, so that the leakage of the Zener diode can be kept stable when the junction depth of the Zener injection region is kept stable. The leakage of the device can be improved by the application.

[0048] In addition, the Zener diode is usually applied in the BCD process, so that the doping region of the Zener diode can be realized by the process in the BCD process platform. For example, the third injection region can be realized by the source / drain injection with the second conductive type and heavy doping. Generally, the junction depths of the source / drain injection are different in different BCD process platforms, so that the junction depths of the third injection region are different in different BCD process platforms. However, since the junction depth of the third injection region does not affect the junction depth of the Zener injection region, the leakage performance of the Zener diode in different BCD process platforms can be improved, i.e. the leakage of the device in different BCD process platforms can be improved.

[0049] In addition, the application only needs to change the layout of the third injection region with the second conductive type and heavy doping, and the leakage of the device can be optimized without adding extra mask plates, so that the application has the advantages of simple process, easy implementation and compatibility with the prior art.

[0050] The application can further adjust the performance of the Zener diode by the second injection region, i.e. the performance of the Zener diode can be adjusted independently of the source / drain injection, so that the performance of the Zener diode can be optimized independently without being limited by the second conductive type and heavy doping of the third injection region. BRIEF DESCRIPTION OF DRAWINGS

[0051] The application will be further described in detail below in combination with the drawings and specific embodiments:

[0052] Figure 1is a structural schematic diagram of a prior Zener diode;

[0053] Figure 2 is a structural schematic diagram of a Zener diode according to an embodiment of the present application;

[0054] Figures 3A-3D is a structural schematic diagram of a Zener diode according to an embodiment of the present application. DETAILED DESCRIPTION

[0055] As Figure 2 is a structural schematic diagram of a Zener diode according to an embodiment of the present application; the Zener diode according to the embodiment of the present application comprises:

[0056] a first epitaxial layer 203 of a second conductivity type, in which a field oxide 204 is formed and a first active region is isolated by the field oxide 204.

[0057] a first well region 205 of a first conductivity type is formed in the first epitaxial layer 203, the first well region 205 is located in the first active region and extends into the first epitaxial layer 203 outside the field oxide 204 at the side of the first active region, and the junction depth of the first well region 205 is greater than the depth of the first epitaxial layer 203.

[0058] In the embodiment of the present application, the first epitaxial layer 203 is formed on a semiconductor substrate 201 of a second conductivity type.

[0059] a first buried layer 202 of the first conductivity type is further formed between the first epitaxial layer 203 and the semiconductor substrate 201. By means of the first buried layer 202, the Zener diode and the semiconductor substrate 201 can be isolated.

[0060] In the embodiment of the present application, the field oxide 204 adopts a shallow trench isolation.

[0061] a Zener implant region 208 of the first conductivity type is formed in the first active region, and a second implant region 209 of a second conductivity type is formed on the top of the Zener implant region 208.

[0062] a third implant region 206 of a second conductivity type and heavy doping is formed at the side of the Zener implant region 208.

[0063] a first electrode region of the Zener diode is formed by the second implant region 209 and the third implant region 206, and a second electrode region of the Zener diode is formed by the Zener implant region 208.

[0064] The second implant region 209 and the Zener implant region 208 are completely aligned.

[0065] In the embodiment of the present application, the second implant region 209 and the Zener implant region 208 have the same structure defined by the same photolithography, so that the introduction of the second implant region 209 does not need to increase an additional photolithography level, thus reducing the process cost.

[0066] The junction depth of the third implant region 206 is greater than that of the second implant region 209.

[0067] At the bottom of the second implant region 209, the third implant region 206 and the Zener implant region 208 are in lateral contact, and the three implant regions and the Zener implant region 208 are not overlapped vertically, so as to ensure that the junction depth of the Zener implant region 208 is not affected by the heavy doping of the third implant region 206.

[0068] In the embodiment of the present application, a fourth implant region 207 of the first conductive type is formed in the surface region of the first well region 205 outside the field oxide 204 of the first active region. The Zener implant region 208 can be extracted through the first well region 205 and the fourth implant region 207.

[0069] In the embodiment of the present application, the third implant region 206 is a structure formed by a second conductive type heavy doping source-drain implantation using a BCD process platform, and the fourth implant region 207 is a structure formed by a first conductive type heavy doping source-drain implantation using a BCD process platform. The junction depth of the third implant region 206 will be different for different BCD process platforms of different process nodes, but since the structure of the Zener diode in the embodiment of the present application does not affect the junction depth of the Zener implant region 208, the performance of the Zener diode can be ensured, and the third implant region 206 is still implemented by the process of the BCD process platform, that is, the process can be shared, thus reducing the process cost.

[0070] In the embodiment of the present application, the first conductive type is N type, and the second conductive type is P type. In other embodiments, the first conductive type can be P type, and the second conductive type can be N type.

[0071] Different from the prior art that the first electrode region is formed on the top of the zener injection region 208, the embodiment of the present application sets the heavily doped part of the first electrode region, i.e., the third injection region 206, on the side of the zener injection region 208, and only sets the second injection region 209 with a second conductivity type and a doping concentration lower than that of the third injection region 206 on the top of the zener injection region 208, so that the junction depth of the third injection region 206 does not affect the junction depth of the zener injection region 208, thereby keeping the junction depth of the zener injection region 208 stable. The leakage of the zener diode is related to the size of the depletion region formed by the zener injection region 208, so keeping the junction depth of the zener injection region 208 stable can keep the leakage of the zener diode stable, and the leakage of the zener diode will not increase due to the increase of the junction depth of the third injection region 206, so the embodiment of the present application can improve the leakage of the device.

[0072] In addition, the zener diode is usually applied in the BCD process, so the doping region of the zener diode is realized by the process in the BCD process platform, for example, the third injection region 206 can be realized by the source / drain injection of the second conductivity type. Generally, the junction depths of the source / drain injection of different BCD process platforms are different, so the junction depths of the third injection region 206 of different BCD process platforms are different. However, since the junction depth of the third injection region 206 does not affect the junction depth of the zener injection region 208, the leakage performance of the zener diode under different BCD process platforms can be finally improved, that is, the leakage of the device under different BCD process platforms can be improved.

[0073] In addition, the embodiment of the present application only needs to change the layout of the third injection region 206 of the second conductivity type, and the leakage of the device can be optimized without adding an additional mask, so the embodiment of the present application also has the advantages of simple process, easy implementation, and compatibility with the existing process.

[0074] The embodiment of the present application can further adjust the performance of the zener diode by setting the second injection region 209, that is, the performance of the zener diode can be adjusted independently of the source / drain injection, so the embodiment of the present application can realize independent optimization of the performance of the zener diode without being limited by the second conductivity type of the third injection region 206.

[0075] The zener diode device of the embodiment of the present application performs the injection of the P-type impurity hole, i.e., the injection of the second injection region 209, before the zener imp injection, i.e., the injection of the zener injection region 208, which is close to the commonly used process flow; and the method of the embodiment of the present application does not need to add an additional mask, and only the zener imp photoresist can realize the structure

[0076] The structure of the embodiment of the present application can effectively improve the leakage problem of the zener diode.

[0077] The method for manufacturing the Zener diode comprises the following steps:

[0078] As shown in Figure 3B , a first epitaxial layer 203 of a second conductivity type is provided, and a field oxide 204 is formed in the first epitaxial layer 203 and separates a first active region.

[0079] In the method, as shown in Figure 3A , the first epitaxial layer 203 is formed on a semiconductor substrate 201 of the second conductivity type.

[0080] A first buried layer 202 of the first conductivity type is further formed between the first epitaxial layer 203 and the semiconductor substrate 201. The first buried layer 202 is formed by an ion implantation plus annealing process.

[0081] As shown in Figure 3B , the field oxide 204 is formed by a shallow trench isolation process, comprising the following steps:

[0082] By using a photolithography and etching process, a shallow trench with a depth of is formed, and the shallow trench isolation, i.e., the field oxide 204, is formed by a furnace tube thermal oxidation and HDP CVD deposition of silicon dioxide, and then by a CMP planarization technology to remove the excess oxide layer.

[0083] In the method, after the field oxide 204 is formed, the method further comprises:

[0084] As shown in Figure 3C , a first well region 205 of the first conductivity type is formed in the first epitaxial layer 203, the first well region 205 is located in the first active region and extends into the first epitaxial layer 203 outside the field oxide 204 on the side of the first active region, and the junction depth of the first well region 205 is greater than the depth of the first epitaxial layer 203. The first well region 205 is formed by ion implantation plus annealing push well. Figure 3C In the figure, the arrow line 301 represents the ion implantation of the first well region 205.

[0085] The region of the ion implantation of the first well region 205 is defined by a photolithography process. That is, the first well region 205 will be formed in the selected region of the first epitaxial layer 203, Figure 3C The region shown is the formation region of the Zener diode, so Figure 3C the first well region 205 will be formed in the first epitaxial layer 203.

[0086] As shown in Figure 3DAs shown, a second conductive type heavily doped region is implanted in a region of the first active region outside a Zener implant region 208 to be formed subsequently to form a third implant region 206 .

[0087] The method in the embodiment of the present invention further includes: forming a fourth implantation region 207 heavily doped with the first conductivity type in a surface area of ​​the first well region 205 outside the field oxide 204 of the first active region.

[0088] The formation areas of the third implantation region 206 and the fourth implantation region 207 are defined by a photolithography process.

[0089] The third implantation region 206 is formed by heavily doped source and drain implantation of the second conductivity type using the BCD process platform, and the fourth implantation region 207 is formed by heavily doped source and drain implantation of the first conductivity type using the BCD process platform.

[0090] like Figure 2 As shown, the formation area of ​​the Zener injection region 208 is opened by a photolithography process, and the first conductive type ion implantation is performed in sequence to form the Zener injection region 208 and the second conductive type ion implantation is performed to form the second injection region 209; the second injection region 209 is located at the top of the Zener injection region 208, and the third injection region 206 is located on the peripheral side of the Zener injection region 208.

[0091] In the method of the embodiment of the present invention, after the ion implantation of the Zener implantation region 208 and the second implantation is completed, an annealing well-driving process is further performed.

[0092] The second injection region 209 and the third injection region 206 form a first electrode region of the Zener diode, and the Zener injection region 208 forms a second electrode region of the Zener diode.

[0093] The junction depth of the third injection region 206 is greater than the junction depth of the second injection region 209 .

[0094] At the bottom of the second injection region 209 , the third injection region 206 and the Zener injection region 208 are in side contact, and the third injection region and the Zener injection region 208 do not overlap up and down to ensure that the junction depth of the Zener injection region 208 is not affected by the heavy doping of the third injection region 206 .

[0095] In the embodiment of the present invention, the first conductivity type is N-type and the second conductivity type is P-type. In other embodiments, the first conductivity type may be P-type and the second conductivity type may be N-type.

[0096] The embodiment of the present application realizes a zener diode structure capable of effectively reducing BV leakage, which is different from the existing zener diode structure in that the P-type heavily doped region, i.e. the third implantation region 206, does not overlap with the zener implantation region, i.e. the zener implantation region 208, and the zener implantation is twice implantation, i.e. twice implantation for forming the zener implantation region 208 and the second implantation region 209, which makes the zener device obtained by the embodiment of the present application be able to be independently optimized and not be dependent on and affected by different process platforms. Therefore, through the P-type implantation, i.e. the implantation of the second implantation region 209, the same good performance as the zener diode of other platforms can be obtained.

[0097] The embodiment of the present application has the advantage of being not interfered by the process. Some processes have a deep Pplus (P+) junction depth of the third implantation region 20, and the structure that the P-type heavily doped region does not overlap with the zener implantation makes the zener implantation not be interfered by the deep Pplus junction depth of the existing process.

[0098] The embodiment of the present application is compatible with the existing process, and only needs to change the layout of the zener diode region Pplus without adding an extra mask plate, so that the device leakage can be optimized.

[0099] The present application is described in detail through specific embodiments, but these do not constitute a limitation on the present application. Those skilled in the art can also make many modifications and improvements without departing from the principle of the present application, and these should also be considered as the protection scope of the present application.

Claims

1. A Zener diode, characterized in that: include: a first epitaxial layer having a second conductivity type, wherein field oxide is formed in the first epitaxial layer and a first active region is isolated by the field oxide; A first well region doped with a first conductivity type is formed in the first epitaxial layer, the first well region is located in the first active region and extends to the first epitaxial layer outside the field oxide on a side of the first active region, and a junction depth of the first well region is greater than a depth of the first epitaxial layer; A Zener injection region of a first conductivity type is formed in the first active region, and a second injection region of a second conductivity type is formed on top of the Zener injection region; A third implantation region heavily doped with the second conductivity type is formed on the peripheral side of the Zener implantation region; The second injection region and the third injection region form a first electrode region of a Zener diode, and the Zener injection region forms a second electrode region of the Zener diode; The second injection region and the Zener injection region are completely aligned vertically, and the junction depth of the third injection region is greater than the junction depth of the second injection region; At the bottom of the second injection region, the third injection region and the Zener injection region are in side contact, and the third injection region and the Zener injection region do not overlap each other, so as to ensure that the junction depth of the Zener injection region is not affected by the heavy doping of the third injection region.

2. The Zener diode according to claim 1, wherein: The first epitaxial layer is formed on a semiconductor substrate of a second conductivity type; A first buried layer doped with a first conductivity type is formed between the first epitaxial layer and the semiconductor substrate.

3. The Zener diode according to claim 2, wherein: A fourth implantation region heavily doped with the first conductivity type is formed in a surface area of ​​the first well region outside the field oxide of the first active region.

4. The Zener diode according to claim 3, wherein: The third injection region is a structure formed by heavily doped source and drain of the second conductivity type using a BCD process platform, and the fourth injection region is a structure formed by heavily doped source and drain of the first conductivity type using a BCD process platform.

5. The Zener diode according to claim 1, wherein: The field oxide is isolated by shallow trench.

6. The Zener diode according to claim 1, wherein: The second implant region and the Zener implant region have a structure defined by the same photolithography.

7. The Zener diode according to any one of claims 1 to 6, characterized in that: The first conductivity type is N-type, and the second conductivity type is P-type; or, the first conductivity type is P-type, and the second conductivity type is N-type.

8. A method for manufacturing a Zener diode, characterized in that: The steps include: Providing a first epitaxial layer of a second conductivity type, wherein a field oxide is formed in the first epitaxial layer and a first active region is isolated by the field oxide; forming a first well region doped with a first conductivity type in the first epitaxial layer, the first well region being located in the first active region and extending into the first epitaxial layer outside the field oxide on a peripheral side of the first active region, wherein a junction depth of the first well region is greater than a depth of the first epitaxial layer; Performing a second conductive type heavily doped implant in a region of the first active region outside a subsequently formed Zener implant region to form a third implant region; Opening the formation area of ​​the Zener injection region, sequentially performing ion implantation of the first conductivity type to form the Zener injection region and performing ion implantation of the second conductivity type to form a second injection region; the second injection region is located on the top of the Zener injection region, and the third injection region is located around the Zener injection region; The second injection region and the third injection region form a first electrode region of a Zener diode, and the Zener injection region forms a second electrode region of the Zener diode; The junction depth of the third injection region is greater than the junction depth of the second injection region; At the bottom of the second injection region, the third injection region and the Zener injection region are in side contact, and the third injection region and the Zener injection region do not overlap each other, so as to ensure that the junction depth of the Zener injection region is not affected by the heavy doping of the third injection region.

9. The method for manufacturing a Zener diode according to claim 8, wherein: The first epitaxial layer is formed on a semiconductor substrate of a second conductivity type; A first buried layer doped with a first conductivity type is formed between the first epitaxial layer and the semiconductor substrate.

10. The method for manufacturing a Zener diode according to claim 9, wherein: After forming the first well region, the method further includes: A fourth implantation region heavily doped with the first conductivity type is formed in a surface area of ​​the first well region outside the field oxide of the first active region.

11. The method for manufacturing a Zener diode according to claim 10, wherein: The third implantation region is formed by heavily doped source and drain implantation of the second conductivity type using the BCD process platform, and the fourth implantation region is formed by heavily doped source and drain implantation of the first conductivity type using the BCD process platform.

12. The method for manufacturing a Zener diode according to claim 8, wherein: The field oxide is formed by a shallow trench isolation process.

13. The method for manufacturing a Zener diode according to claim 8, wherein: After the ion implantation of the Zener implantation area and the second implantation is completed, an annealing well-driving process is also performed.

14. The method for manufacturing a Zener diode according to claim 8, wherein: The first well region is formed by ion implantation and annealing, and the formation area of ​​the first well region is defined by a photolithography process.

15. The method for manufacturing a Zener diode according to any one of claims 8 to 14, wherein: The first conductivity type is N-type, and the second conductivity type is P-type; or, the first conductivity type is P-type, and the second conductivity type is N-type.

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