TO220 package chip detection and sorting device and method
By designing a TO220 packaged chip detection and sorting device, and utilizing image acquisition and vertical matching levers, the device achieves automated detection and sorting of TO220 packaged chip pins. This solves the problem of difficult automation in existing technologies and improves detection efficiency and sorting accuracy.
Patent Information
- Application Number
- CN202511319219.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-16
- Publication Date
- 2025-11-18
- Estimated Expiration
- 2045-09-16
AI Technical Summary
Existing technologies make it difficult to automate pin detection and sorting of TO220 packaged chips, especially in effectively distinguishing and outputting chips with normal, skewed, and tilted pins.
A detection and sorting device for TO220 packaged chips was designed. The device uses an image acquisition unit to obtain chip pin patterns from different directions. Combined with the cooperation of vertical guide rods and vertical levers, it can automatically sort chips with skewed or tilted pins. The chips are stably transported and sorted by the guidance of the vertical guide rods and vertical guide rods.
It realizes automated detection and sorting of TO220 packaged chips, improves detection efficiency, ensures that chips are output correctly according to category, avoids equipment jamming, and simplifies device structure.
Smart Images

Figure CN120815747B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of chip packaging and testing technology, specifically relating to a TO220 packaged chip detection and sorting device and method. Background Technology
[0002] In the field of semiconductor chip packaging and testing, chips that have completed packaging and undergone pin bending and rib separation require various tests. Pin testing is a necessary step before electrical testing. If a chip with abnormally shaped pins is sent to the electrical testing process, it may result in incorrect power-on or equipment malfunction. For TO220 packaged chips, it is necessary to test and sort them into three categories: chips with normal pins, chips with pins that are skewed to the left or right, and chips with pins that are tilted forward or backward. These are described in detail below. Figure 1 As shown, the chip includes a plastic package, a heat sink, and three pins. The heat sink protrudes from one side of the plastic package and is flush with it. The heat sink extends a predetermined length beyond one end of the plastic package, and the three pins extend from the middle of the other end of the plastic package. Figure 1 The chip on the left is the chip with normal pins 101, the chip in the middle is the chip with skewed pins 102, and the chip on the right is the chip with warped pins 103. After the detection and sorting process, chips with normal pins are sorted out for the electrical testing process, while chips with skewed pins on the left and right and chips with warped pins on the front and back are sorted out and sent to the shaping process. However, how to integrate the detection and sorting output of the three types using automation methods has become a problem that needs to be studied and solved. Summary of the Invention
[0003] To address the shortcomings of the aforementioned prior art, this application provides a TO220 packaged chip detection and sorting device and method, which enables automatic detection and outputs chips with normal pins, chips with skewed pins, and chips with tilted pins from different directions, thereby improving the degree of automation.
[0004] To achieve the above objectives, the present invention employs the following techniques:
[0005] A TO220 packaged chip inspection and sorting device, comprising:
[0006] The upper track is used to transport the chip under test in a horizontal orientation. The pins of the chip under test extend from one side of the upper track. A vertically downward first image acquisition unit is mounted above the upper track to acquire the front view of the pins of the chip under test. The upper track has a vertically through qualified channel.
[0007] The lower track is parallel to the upper track and positioned directly below it. One end of the lower track has a discharge plate that corresponds to the qualified channel. The length of the discharge plate is perpendicular to the length of the lower track. The discharge plate has two push slots along its length. Each push slot is fitted with a vertical lever that moves along the vertical direction and the length of the discharge plate. One end of the lower track has a push plate that moves along the length of the lower track and a second image acquisition device facing the push plate. The second image acquisition device is used to acquire the pin side pattern of the chip under test that falls into the discharge plate through the qualified channel.
[0008] The qualified channel is equipped with vertical guide rods fixed on both walls, and vertical support rods that move along the width of the upper track are attached to both walls. A support platform that moves synchronously and in the same direction as the vertical support rods is provided at one end of the qualified channel. Bearing plates are rotatably provided on both walls of the qualified channel, and the rotation of the bearing plates is synchronously driven by the movement of the vertical support rods.
[0009] The vertical guide rod, vertical fitting rod, and vertical lever have the same end face dimensions and are all used to fit into the grooves on both sides of the heat sink of the chip under test;
[0010] When the vertical mounting rod is in the initial position, it is spaced horizontally from the vertical guide rod. The support platform extends into the qualified channel from the other side of the upper rail. The inner end of the carrier plate is in the middle of the qualified channel. The extended section of the support platform and the vertical mounting rod are used to support the heat sink of the chip under test. The inner end of the carrier plate is used to support the plastic package of the chip under test.
[0011] When the vertical mounting rod moves to the bottom and aligns with the top of the vertical guide rod, the support platform exits the qualified channel from the other side of the upper track. The inner end of the bearing plate rotates into the receiving grooves on both sides of the qualified channel, releasing the bearing of the chip under test. The vertical mounting rod is matched into the grooves on both sides of the heat sink of the chip under test, and is used together with the vertical guide rod to guide the chip under test to fall from the qualified channel.
[0012] When the vertical lever is in the initial position, it is located directly below the vertical guide rod, and is used to continue guiding the chip under test falling from the qualified channel.
[0013] The top surface of the vertical mounting rod is flush with the downward-facing heat sink of the chip under test conveyed by the upper rail, and the bottom end of the vertical mounting rod is used to align with the top end of the vertical guide rod.
[0014] The top surface of the support platform is flush with the top surface of the vertical support rod, and the top surface of the bearing plate is flush with the downward-facing side of the plastic encapsulation of the chip to be tested on the upper track.
[0015] The distance between the bottom of the vertical guide rod and the top surface of the discharge plate is greater than the distance between the top side of the heat sink of the chip under test and the bottom side of the molding compound, and the distance between the bottom of the vertical guide rod and the top surface of the vertical guide rod in the starting position is less than the thickness of the heat sink of the chip under test.
[0016] When the vertical lever is in the initial position, the distance between its top surface and the top surface of the discharge plate is greater than the distance between the heat sink of the chip under test and the molded body.
[0017] The spacing between the vertical guide rods, the spacing between the vertical fitting rods, and the spacing between the vertical lever rods are all matched to the spacing between the grooves on both sides of the heat sink of the chip under test.
[0018] A method for detecting and sorting TO220 packaged chips, implemented using the TO220 packaged chip detection and sorting device, includes the following steps:
[0019] The chip under test is transported along the upper track by a step-by-step pushing method, and the front view of the pins of each chip under test passing below it is captured by the first image acquisition device.
[0020] Based on the front view of the pins, identify the pin-skewed chip with left and right pin deviations, and let it pass through the qualified channel to continue to be transported along the upper track. When passing through, the vertical mounting rod is in the initial position, the support platform extension section and the vertical mounting rod carry the heat sink of the pin-skewed chip, and the inner end of the carrier plate carries the plastic encapsulation of the pin-skewed chip.
[0021] For chips under test whose pin misalignment is not determined, when they are fully in the qualified channel and are supported, the vertical fitting rod moves from the initial position to the bottom end and aligns with the top end of the vertical guide rod. The support platform exits simultaneously, and the inner end of the support plate rotates simultaneously to release the support of the chip under test. The vertical fitting rod matches the grooves on both sides of the heat sink of the chip under test. The chip under test falls from the qualified channel through the vertical fitting rod and the vertical guide rod to the discharge plate.
[0022] The chip under test falls into the discharge plate, and the grooves on both sides of its heat sink are matched with the vertical lever in the starting position.
[0023] The second image acquisition device acquires the pin side pattern of the chip under test falling into the discharge plate. Based on the pin side pattern, the chip with normal pins that has not experienced pin warping and the chip with pin warping that has experienced pin warping are identified.
[0024] For chips with raised pins, the vertical lever is moved along the push groove to push them out along the length of the ejector plate; for chips with normal pins, the vertical lever is first lowered to below the side of the heat sink, and then the push plate pushes the chip with normal pins away from the ejector plate along the length of the lower track.
[0025] The beneficial effects of this invention are as follows:
[0026] 1. By acquiring the front view of the pins, the chip with skewed pins is sorted out and continued to be conveyed along the lower track, so that the remaining chips to be tested fall through the qualified track. Then, the side view of the pins of the chips to be tested that have fallen to the output plate is acquired to sort out the chip with tilted pins and the chip with normal pins. The chip with tilted pins is pushed out along the length of the output plate by moving the vertical lever along the push groove, or the vertical lever is lowered to the side below the heat sink, and then the chip with normal pins is pushed away from the output plate along the length of the lower track by the push plate. This realizes the automatic detection and sorting of the three cases and outputs from different directions.
[0027] 2. The qualified channel takes into account both falling and receiving scenarios. A support platform extends in to maintain complete support of the heat sink of the chip under test from the other side of the lower track, and a receiving plate supports the plastic package of the chip under test. The two-way support ensures the stability of the receiving. At the same time, in order to meet the falling requirements and provide good guidance after falling, the position of the vertical rod and its linkage with the support platform, the receiving plate, and the vertical guide rod form a guide. It can quickly switch between complete receiving and release of the receiving and guided falling, which is convenient for sorting.
[0028] 3. The device makes full use of the groove structure on both sides of the heat sink of the chip under test, thus cleverly constructing the transition of the vertical rod from receiving to guiding and falling. When the chip is pushed out of the pin, the device continues to use the groove structure on both sides of the heat sink as the pushing point after the guide falls, which simplifies the structure of the device. Attached Figure Description
[0029] Figure 1 This is a schematic diagram of the TO220 packaged chip structure, including the normal pins, left and right skewed pins, and front and rear tilted pins, according to an embodiment of this application.
[0030] Figure 2 This is a perspective view of the overall structure of the detection and sorting device according to an embodiment of this application.
[0031] Figure 3 This is a top view of the overall structure of the detection and sorting device according to an embodiment of this application.
[0032] Figure 4 This is a side view of the overall structure of the detection and sorting device according to an embodiment of this application.
[0033] Figure 5 This is a partial structural diagram of the vertical support rod at the qualified channel in the initial state according to an embodiment of this application.
[0034] Figure 6 This is a partial structural diagram of the connection between the vertical support rod and the vertical guide rod at the qualified passage in this application embodiment.
[0035] Figure 7This is a partial schematic diagram of the acquisition view of the first image acquisition device in an embodiment of this application.
[0036] Figure 8 This is a partial structural diagram of the vertical lever that pushes out the pin-lifting chip according to an embodiment of this application.
[0037] Figure 9 This is a partial structural diagram of the pusher plate pushing a normally pinned chip to the lower track according to an embodiment of this application.
[0038] Figure label:
[0039] 10 - Chip under test, 101 - Chip with normal pins, 102 - Chip with skewed pins, 103 - Chip with tilted pins;
[0040] 11-Upper track, 12-Lower track, 120-Discharge plate, 121-Pushing groove, 13-Connecting frame, 14-Horizontal frame, 15-Vertical frame, 16-Qualified channel, 17-Baffle, 18-Vertical guide rod, 19-Matching groove, 190-Accommodation groove, 191-Moving cavity, 192-Moving groove;
[0041] 21-First horizontal cylinder, 22-Support platform, 23-Moving rod, 24-Vertical rod, 25-Moving bar, 251-Oval groove, 26-Bearing plate, 27-Rotating column;
[0042] 30-First support, 31-Second horizontal cylinder, 32-Vertical plate, 33-Vertical lever, 34-Vertical cylinder, 35-Base;
[0043] 40 - Second bracket, 41 - Third horizontal cylinder, 42 - Push plate;
[0044] 51 - First image acquisition device, 52 - Second image acquisition device. Detailed Implementation
[0045] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the implementation methods of the present invention will be described in detail below with reference to the accompanying drawings. However, the embodiments described in this invention are only some embodiments of the present invention, and not all embodiments.
[0046] This example provides a TO220 packaged chip inspection and sorting device, used to detect whether the pins of TO220 packaged chips are normal, and to distinguish them through inspection and sorting. Figure 1 The chip 101 with normal pins, the chip 102 with skewed pins, and the chip 103 with tilted pins are shown, and they output from different directions respectively.
[0047] like Figures 2-4 As shown, the device described in this example includes an upper track 11, a lower track 12, a discharge plate 120, a first image acquisition device 51, a second image acquisition device 52, etc.
[0048] The upper rail 11 is used to transport the chip under test 10 in a horizontal orientation, with the pins of the chip under test 10 extending from one side of the upper rail 11. Specifically, the upper rail 11 is mounted on the vertical frame 15 via a horizontal frame 14. A mating groove 19 is recessed along the length of the top surface of the upper rail 11 to limit the positioning of the plastic package of the chip under test 10 being transported in a queue. One wall of the mating groove 19 is higher than the other wall, wherein one wall is used to support the heat sink of the chip under test 10, and the other wall is lower than the pins, allowing the pins to extend from one side of the upper rail 11.
[0049] The first image acquisition unit 51 is vertically mounted above the upper rail 11 and is used to acquire the front view of the pins of the chip under test 10. The upper rail 11 has a vertically penetrating qualified channel 16. The span of the qualified channel 16 is slightly larger than the width of the plastic package of the chip under test 10. Specifically, one end of the qualified channel 16 faces the other side of the upper rail 11 and extends outward from the lower part of the other side of the upper rail 11. The other end of the qualified channel 16 extends through one side of the upper rail 11, where one side of the upper rail 11 is the side where the pins protrude.
[0050] To improve the image acquisition effect, a partition 17 can be added. The partition 17 protrudes from one side of the upper track 11, corresponding to the position below the first image acquisition unit 51 and below the protruding pins of the chip under test 10. The size of the partition 17 is based on the vertical projection covering all pins of the chip under test 10. Along the conveying direction of the upper track 11, the chip under test 10 first passes through the partition 17 and then through the qualified channel 16.
[0051] The lower track 12 is arranged parallel to the upper track 11 directly below it, and multiple connecting frames 13 connect the lower track 12 and the upper track 11. One end of the lower track 12 has a discharge plate 120 whose position corresponds to the qualified channel 16. The length direction of the discharge plate 120 is perpendicular to the length direction of the lower track 12, and the discharge plate 120 has two pushing grooves 121 along its length.
[0052] Each push groove 121 is equipped with a vertical lever 33 that moves along the vertical direction and the length of the discharge plate 120. As an optional driving mechanism for the vertical lever 33, the bottom end of the vertical lever 33 is connected to a vertical plate 32, which is connected to the movable end of a second horizontal cylinder 31. The second horizontal cylinder 31 is mounted on a first bracket 30, which is connected to the movable end of a vertical cylinder 34, which is mounted on a base 35. Of course, depending on the application scenario, other horizontal and vertical linear mechanisms can also be used for driving.
[0053] One end of the lower track 12 is provided with a push plate 42 that moves along the length of the lower track 12. As an optional example of driving the push plate 42, the push plate 42 is connected to the movable end of the third horizontal cylinder 41. The third horizontal cylinder 41 is mounted on the second bracket 40, and the second bracket 40 is connected to the discharge plate 120.
[0054] The second image acquisition unit 52 is positioned facing the pushing direction of the pusher plate 42 and can be installed on the second bracket 40 or set up separately. The second image acquisition unit 52 is used to acquire the pin side patterns of the chip 10 under test that falls into the discharge plate 120 through the qualified channel 16. To improve the pin side pattern acquisition effect, a baffle plate can be set at the far end of the other end of the lower track 12. Specifically, the lower track 12 will push and convey the normally pinned chips 101 for detection and sorting. Baffle plates can be set at intervals at the far end where the normally pinned chips 101 are unloaded, so as not to affect the unloading and to assist in image acquisition. Specifically, the first image acquisition unit 51 and the second image acquisition unit 52 can be high-speed camera equipment.
[0055] like Figures 4-6 As shown, both walls of the qualified channel 16 are fixed with vertical guide rods 18, and both walls of the qualified channel 16 are fitted with vertical fitting rods 24 that move along the width direction of the upper track 11. One end of the qualified channel 16 is provided with a support platform 22 that moves synchronously and in the same direction as the vertical fitting rods 24. Both walls of the qualified channel 16 are rotatably provided with a bearing plate 26, and the rotation of the bearing plate 26 is synchronously driven by the movement of the vertical fitting rods 24. The end face dimensions of the vertical guide rods 18, the vertical fitting rods 24, and the vertical lever rods 33 are the same. The spacing between the vertical guide rods 18, the spacing between the vertical fitting rods 24, and the spacing between the vertical lever rods 33 are all matched with the spacing between the grooves on both sides of the heat sink of the chip under test 10, and are all used to fit into the grooves on both sides of the heat sink of the chip under test 10.
[0056] The top surface of the vertical mounting rod 24 is flush with the downward-facing side of the heat sink of the chip under test 10 conveyed by the upper rail 11, and the bottom end of the vertical mounting rod 24 is used to align with the top end of the vertical guide rod 18; the top surface of the support platform 22 is flush with the top surface of the vertical mounting rod 24, and the top surface of the carrier plate 26 is flush with the downward-facing side of the plastic encapsulation of the chip under test 10 on the upper rail 11.
[0057] The distance between the bottom end of the vertical guide rod 18 and the top surface of the discharge plate 120 is greater than the distance between the top surface of the heat sink of the chip under test 10 and the bottom surface of the molding compound, and the distance between the vertical guide rod 33 and the top surface of the vertical guide rod 33 in the initial position is less than the thickness of the heat sink of the chip under test 10; when the vertical guide rod 33 is in the initial position, the distance between its top surface and the top surface of the discharge plate 120 is greater than the distance between the bottom surface of the heat sink of the chip under test 10 and the bottom surface of the molding compound.
[0058] When the vertical rod 24 is in the initial position, such as Figure 5As shown, it has a horizontal gap with the vertical guide rod 18. The support platform 22 extends into the qualified channel 16 from the other side of the upper rail 11. The inner end of the carrier plate 26 is located in the middle of the qualified channel 16. The extended section of the support platform 22 and the vertical guide rod 24 are used to support the heat sink of the chip under test 10. The inner end of the carrier plate 26 is used to support the plastic package of the chip under test 10.
[0059] When the vertical guide rod 24 moves to the point where its bottom end aligns with the top end of the vertical guide rod 18, as follows: Figure 6 As shown, the support platform 22 exits the qualified channel 16 from the other side of the upper track 11, and the inner end of the bearing plate 26 rotates into the receiving groove 190 on both sides of the qualified channel 16, releasing the bearing of the chip under test 10. The vertical matching rod 24 is matched into the grooves on both sides of the heat sink of the chip under test 10 to guide the chip under test 10 to fall from the qualified channel 16. When the vertical lever 33 is in the starting position, it is located directly below the vertical guide rod 18 to cooperate with the vertical guide rod 18 to continue guiding the chip under test 10 falling from the qualified channel 16.
[0060] This embodiment also provides a method for detecting and sorting TO220 packaged chips, which is implemented using the TO220 packaged chip detection and sorting device described in the previous embodiment, and includes the following steps:
[0061] First, the chip under test 10 is conveyed along the upper track 11 by stepping and pushing. The first image acquisition unit 51 acquires the front view of each pin of the chip under test 10 passing below it.
[0062] Then, based on the pin front view, the pin misalignment chip 102 is identified, and it continues to be conveyed along the upper track 11 through the qualified channel 16. During this process, the vertical mounting rod 24 is in its initial position. Figure 5 As shown, the support platform 22 extends into the section and the vertical support rod 24 carries the heat sink of the pin-biased chip 102, and the inner end of the support plate 26 carries the plastic encapsulation of the pin-biased chip 102. Figure 2 and Figure 3 As shown, the pin-skewed chip 102 continues to be transported on the upper track 11 after passing through the qualified channel 16.
[0063] For the chip under test 10 whose pin misalignment is not determined, when it fully enters the qualified channel 16 and is carried, the vertical mounting rod 24 is moved from its initial position to its bottom end, which aligns with the top end of the vertical guide rod 18. Figure 6As shown, the support platform 22 retracts synchronously, and the inner end of the bearing plate 26 rotates synchronously, releasing the bearing of the chip under test 10. The vertical fitting rod 24 matches the grooves on both sides of the heat sink of the chip under test 10. The chip under test 10 falls from the qualified channel 16 through the vertical fitting rod 24 and the vertical guide rod 18 to the discharge plate 120. The grooves on both sides of the heat sink of the chip under test 10 falling into the discharge plate 120 are engaged with the vertical lever 33 in the starting position.
[0064] Then, the second image acquisition unit 52 acquires the pin side pattern of the chip 10 under test falling into the discharge plate 120. Based on the pin side pattern, it determines the chip 101 with normal pins that have not experienced pin warping and the chip 103 with warped pins that have experienced pin warping. Figure 7 The image shows chip 103, which was found to have a pin warped.
[0065] Then, for the pin-lifted chip 103, it is pushed out along the length of the discharge plate 120 by the movement of the vertical lever 33 along the push groove 121, as shown. Figure 8 As shown; for the chip 101 with normal pins, first lower the vertical lever 33 to below the downward-facing side of the heat sink to release the restriction on the heat sink, and then push the chip 101 with normal pins away from the discharge plate 120 along the length direction of the lower track 12 via the push plate 42, as shown. Figure 9 As shown. Specifically, the top surface of the lower track 12 is recessed along its length to form a limiting groove, which is used to limit the plastic package of the pushed-in pin normal chip 101.
[0066] As a preferred embodiment, such as Figures 5-6 As shown, the side wall of the support platform 22 and the vertical rod 24 are connected to the moving rod 23 at intervals. The moving rod 23 moves and engages in the moving cavity 191 opened in the side wall of the qualified channel 16. Specifically, the outer end of the support platform 22 is connected to the movable end of the first horizontal cylinder 21. The first horizontal cylinder 21 is mounted on the vertical frame 15. The moving rod 23 is driven by the first horizontal cylinder 21 to provide synchronous movement of the vertical rod 24 and the support platform 22.
[0067] The receiving groove 190 is formed by sinking down from the mating grooves 19 on both sides of the qualified channel 16. The receiving groove 190 penetrates both walls of the qualified channel 16 and is used to receive the bearing plate 26. The moving cavity 191 is connected to the moving groove 192 located below the mating groove 19. The moving groove 192 is deeper than the receiving groove 190 and connects to a part of the receiving groove 190. A rotating column 27 is provided in another part of the receiving groove 190. The middle part of the bearing plate 26 is rotatably engaged with the rotating column 27. A moving strip 25 connected to the moving rod 23 is provided in the moving groove 192. A transverse waist-shaped groove 251 is opened on the moving strip 25. A guide post is provided at the bottom of the outer end of the bearing plate 26 and is engaged with the waist-shaped groove 251. By moving the moving strip 25 with the moving rod 23, the outer end of the bearing plate 26 is driven to move with the moving strip 25, and the guide post moves in the waist-shaped groove 251, so as to realize the synchronous drive rotation of the inner end of the bearing plate 26. The line connecting the inner end of the support plate 26 and the rotating column 27 forms an obtuse angle with the line connecting the outer end of the support plate 26 and the rotating column 27. The obtuse angle, the lengths of both ends of the support plate 26, and the length of the waist-shaped groove 251 are designed to match the rotation angle requirements caused by the movement of the moving strip 25. The goal is to ensure that when the vertical mounting rod 24 and the vertical guide rod 18 are aligned, the inner end of the support plate 26 is fully inserted into the receiving groove 190, without affecting the d.T. chip 10's descent through the qualified channel 16. Specifically, when the inner end of the support plate 26 rotates to support the encapsulation of the d.T. chip 10, the inner ends of the two support plates 26 are in contact.
[0068] The above description is only a preferred embodiment of this application and is not intended to limit this application. Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application.
Claims
1. A TO220 packaged chip detection and sorting device, characterized in that, include: The upper track (11) is used to transport the chip under test (10) in a horizontal orientation. The pins of the chip under test (10) extend from one side of the upper track (11). A vertically downward first image acquisition unit (51) is mounted above the upper track (11) to acquire the front view of the pins of the chip under test (10). A vertically through qualified channel (16) is provided on the upper track (11). The lower track (12) is parallel to the upper track (11) directly below it. One end of the lower track (12) has a discharge plate (120) that is positioned corresponding to the qualified channel (16) and perpendicular to the length direction of the lower track (12). The discharge plate (120) has two push slots (121) along its length. Each push slot (121) is equipped with a vertical lever (33) that moves along the vertical direction and the length direction of the discharge plate (120). One end of the lower track (12) is provided with a push plate (42) that moves along the length direction of the lower track (12) and a second image acquisition device (52) that moves toward the push plate (42). The second image acquisition device (52) is used to acquire the pin side pattern of the chip (10) under test that falls into the discharge plate (120) through the qualified channel (16). Among them, vertical guide rods (18) are fixed on both walls of the qualified channel (16), and vertical support rods (24) that move along the width direction of the upper track (11) are attached to both walls of the qualified channel (16). A support platform (22) that moves synchronously and in the same direction as the vertical support rods (24) is provided at one end of the qualified channel (16). A bearing plate (26) is rotatably provided on both walls of the qualified channel (16). The rotation of the bearing plate (26) is synchronously driven by the movement of the vertical support rods (24). The vertical guide rod (18), the vertical fitting rod (24), and the vertical lever rod (33) have the same end face size and are all used to fit into the grooves on both sides of the heat sink of the chip under test (10); When the vertical mounting rod (24) is in the initial position, it is spaced from the vertical guide rod (18) in the horizontal direction. The support platform (22) extends into the qualified channel (16) from the other side of the upper rail (11). The inner end of the bearing plate (26) is in the middle of the qualified channel (16). The extension section of the support platform (22) and the vertical mounting rod (24) are used to support the heat sink of the chip under test (10). The inner end of the bearing plate (26) is used to support the plastic encapsulation of the chip under test (10). When the vertical support rod (24) moves to the bottom and aligns with the top of the vertical guide rod (18), the support platform (22) exits the qualified channel (16) from the other side of the upper track (11), and the inner end of the bearing plate (26) rotates into the receiving groove (190) on both sides of the qualified channel (16), releasing the bearing of the chip under test (10). The vertical support rod (24) is matched into the grooves on both sides of the heat sink of the chip under test (10) to guide the chip under test (10) to fall from the qualified channel (16) together with the vertical guide rod (18). When the vertical lever (33) is in the starting position, it is located directly below the vertical guide rod (18) and is used to cooperate with the vertical guide rod (18) to continue guiding the chip under test (10) falling from the qualified channel (16).
2. The TO220 packaged chip detection and sorting device according to claim 1, characterized in that, The top surface of the vertical mounting rod (24) is flush with the downward-facing side of the heat sink of the chip (10) under test conveyed by the upper rail (11), and the bottom end of the vertical mounting rod (24) is used to connect with the top end of the vertical guide rod (18). The top surface of the support platform (22) is flush with the top surface of the vertical support rod (24), and the top surface of the bearing plate (26) is flush with the downward-facing plastic encapsulation of the chip (10) to be tested on the upper rail (11); The distance between the bottom end of the vertical guide rod (18) and the top surface of the discharge plate (120) is greater than the distance between the top side of the heat sink of the chip under test (10) and the bottom side of the plastic package, and the distance between the top surface of the vertical lever (33) in the starting position is less than the thickness of the heat sink of the chip under test (10). When the vertical lever (33) is in the starting position, the distance between its top surface and the top surface of the discharge plate (120) is greater than the distance between the heat sink of the chip under test (10) facing down and the plastic package facing down.
3. The TO220 packaged chip detection and sorting device according to claim 1, characterized in that, The side wall of the support platform (22) and the vertical rod (24) are connected to the moving rod (23) at intervals. The moving rod (23) moves and engages in the moving cavity (191) opened in the side wall of the qualified channel (16). The top surface of the upper track (11) is recessed along the length direction to form a mating groove (19), which is used to limit the plastic encapsulation of the chip under test (10) being transported in a queue; The receiving groove (190) is formed by sinking down from the mating groove (19) on both sides of the qualified channel (16). The receiving groove (190) penetrates the two walls of the qualified channel (16) and is used to receive the bearing plate (26). The moving cavity (191) is connected to the moving groove (192) located below the mating groove (19). The moving groove (192) is deeper than the receiving groove (190) and connects to a part of the receiving groove (190). A rotating column (27) is provided in another part of the receiving groove (190). The middle part of the bearing plate (26) is rotatably fitted to the rotating column (27). A moving strip (25) connecting the moving rod (23) is provided in the moving groove (192). A transverse waist-shaped groove (251) is provided on the moving strip (25). A guide post is provided at the bottom of the outer end of the bearing plate (26). The guide post is fitted to the waist-shaped groove (251).
4. The TO220 packaged chip detection and sorting device according to claim 3, characterized in that, The outer end of the support platform (22) is connected to the movable end of the first horizontal cylinder (21).
5. The TO220 packaged chip detection and sorting device according to claim 3, characterized in that, The angle between the line connecting the inner end of the bearing plate (26) and the rotating column (27) and the line connecting the outer end of the bearing plate (26) and the rotating column (27) is an obtuse angle.
6. The TO220 packaged chip detection and sorting device according to claim 1, characterized in that, A partition (17) is formed by a protrusion on one side of the upper track (11). The partition (17) is located below the first image acquisition unit (51) and below the pins of the chip under test (10).
7. The TO220 packaged chip detection and sorting device according to claim 1, characterized in that, The bottom end of the vertical lever (33) is connected to a vertical plate (32), the vertical plate (32) is connected to the movable end of the second horizontal cylinder (31), the second horizontal cylinder (31) is located on the first bracket (30), the first bracket (30) is connected to the movable end of the vertical cylinder (34), and the vertical cylinder (34) is installed on the base (35).
8. The TO220 packaged chip detection and sorting device according to claim 1, characterized in that, The discharge plate (120) is connected to a second bracket (40), and a third horizontal cylinder (41) is installed on the second bracket (40), the movable end of which is connected to a push plate (42).
9. A method for detecting and sorting TO220 packaged chips, characterized in that, This is achieved using the TO220 packaged chip detection and sorting device as described in any one of claims 1-8, including the following steps: The chip under test (10) is transported along the upper track (11) by a step-by-step pushing method, and the pin front pattern of the chip under test (10) passing below it is acquired by the first image acquisition device (51). Based on the front view of the pin, the pin-skewed chip (102) with the pin skewed to the left and right is identified and transported along the upper track (11) through the qualified channel (16). When passing through, the vertical mounting rod (24) is in the initial position. The support platform (22) extension section and the vertical mounting rod (24) support the heat sink of the pin-skewed chip (102). The inner end of the support plate (26) supports the plastic body of the pin-skewed chip (102). For the chip under test (10) whose pins are not skewed to the left or right, when it is fully in the qualified channel (16) and is carried, the vertical fitting rod (24) is moved from the initial position to the bottom end and aligned with the top of the vertical guide rod (18). The support platform (22) is simultaneously withdrawn, and the inner end of the bearing plate (26) is simultaneously rotated to release the bearing of the chip under test (10). The vertical fitting rod (24) is matched into the grooves on both sides of the heat sink of the chip under test (10). The chip under test (10) falls from the qualified channel (16) through the vertical fitting rod (24) and the vertical guide rod (18) to the discharge plate (120). The chip under test (10) falls into the discharge plate (120), and the grooves on both sides of its heat sink are matched with the vertical lever (33) in the starting position. The second image acquisition device (52) acquires the pin side pattern of the chip under test (10) falling into the discharge plate (120), and determines the chip with normal pin (101) and the chip with pin tilted at the front and back (103) based on the pin side pattern. For the chip with raised pins (103), the chip is pushed out along the length of the discharge plate (120) by moving the vertical lever (33) along the push groove (121); for the chip with normal pins (101), the vertical lever (33) is lowered to below the side of the heat sink, and then the chip with normal pins (101) is pushed away from the discharge plate (120) along the length of the lower track (12) by the push plate (42).
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