Backlight control system and display equipment

Abstract

The embodiment of the invention belongs to the display technology, and provides a backlight control system and display equipment. The backlight control system comprises a backlight plate, a backlight control module and at least one backlight driving circuit, at least one backlight driving chip is connected in the backlight driving circuit; the backlight control module comprises at least one clock signal output end; the first clock signal output end of the backlight control module is connected with the clock signal receiving end of the first backlight driving chip in each path of backlight driving circuit; the first clock signal output end is one of the at least one clock signal output end; and the backlight control module is used for outputting a clock synchronization signal to the first backlight driving chips through the first clock signal output end and carrying out brightness adjustment on the backlight subareas through the backlight driving chips. The radiation of the backlight control system can be reduced, and the EMC of the display equipment can be improved.

Description

Technical Field

[0001] Embodiments of the present application relate to display technology, and more specifically, to a backlight control system and a display device. Background Art

[0002] The backlight panel of a display device may include multiple backlight partitions. The brightness of the backlight partitions may be controlled by a driver chip of a backlight control system. In the backlight control system, each driver circuit may include multiple driver chips, each of which may be used to control the brightness of at least one backlight partition. Currently, in existing backlight control systems, a serial clock (SCLK) signal is transmitted between the backlight controller (BCON) and each driver circuit via independent signal transmission lines to synchronize the transmitted data.

[0003] However, as the number of backlight partitions of the backlight panel increases, the number of SCLK signal lines also increases, resulting in superposition of SCLK high-frequency signals, which in turn leads to stronger radiation of the display device, that is, poor electromagnetic compatibility (EMC). Summary of the Invention

[0004] The exemplary embodiments of the present application provide a backlight control system and a display device, which can reduce the radiation of the backlight control system and improve the EMC of the display device.

[0005] In a first aspect, the present application provides a backlight control system, comprising: a backlight panel, a backlight control module, and at least one backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel comprises a plurality of backlight partitions; the backlight control module comprises at least one clock signal output terminal;

[0006] The first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first clock signal output end is one of the at least one clock signal output end; the first backlight driver chip is one of the at least one backlight driver chip;

[0007] The backlight control module is configured to output a clock synchronization signal to the first backlight driver chip via the first clock signal output terminal, and to adjust the brightness of the backlight partitions via each of the backlight driver chips. In some embodiments of the present application, the backlight control system includes N backlight driver circuits, where N is greater than 1, and further includes: N first jumper resistors, each of the N first jumper resistors corresponding one-to-one to the N backlight driver circuits;

[0008] The N first jumper resistors are connected in series to form a first jumper resistor module, and one end of the first jumper resistor module is connected to the first clock signal output end of the backlight control module; one end of the N first jumper resistors is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit.

[0009] In some embodiments of the present application, the backlight control module includes a plurality of clock signal output terminals, and any clock signal output terminal except the first clock signal output terminal is not connected to any first backlight driving chip.

[0010] In some embodiments of the present application, the backlight control module is further configured to control any clock signal output terminal except the first clock signal output terminal to output a clock synchronization signal.

[0011] In some embodiments of the present application, the backlight control module further includes: a backlight data output terminal corresponding to each of the backlight driving circuits, and / or a backlight driving chip status determination port; the backlight control module is also connected to the backlight driving chip in the corresponding backlight driving circuit through the backlight data output terminal and / or the backlight driving chip status determination port.

[0012] In a second aspect, the present application provides a backlight control system, comprising: a backlight panel, a backlight control module, and at least one backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel comprises a plurality of backlight partitions; the backlight control module comprises at least one clock signal output terminal; the clock signal output terminal corresponds one-to-one with the backlight driving circuit;

[0013] Each clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit, and the first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first backlight driver chip is one of the at least one backlight driver chip; the first clock signal output end is one of the at least one clock signal output ends;

[0014] The backlight control module is used to output a clock synchronization signal to the first backlight driver chip through the first clock signal output end, and adjust the brightness of the backlight partition through each backlight driver chip, and control any clock signal output end except the first clock signal output end to not output a clock synchronization signal.

[0015] In some embodiments of the present application, the backlight control system includes N backlight driving circuits, where N is greater than 1, and the backlight control system further includes: N second jumper resistors, where the N second jumper resistors correspond one-to-one to the N backlight driving circuits;

[0016] The N second jumper resistors are connected in series to form a second jumper resistor module, and one end of the second jumper resistor module is connected to the first clock signal output end of the backlight control module; one end of the N second jumper resistors is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit.

[0017] In some embodiments of the present application, the backlight control system further includes: N-1 third jumper resistors, the N-1 third jumper resistors corresponding one-to-one to the N-1 clock signal output terminals other than the first clock signal output terminal;

[0018] For any clock signal output end among the N-1 clock signal output ends, the clock signal output end is connected to the clock signal receiving end of the first backlight driving chip through the corresponding third jumper resistor.

[0019] In a third aspect, the present application provides a backlight control system, comprising: a backlight panel, a backlight control module, and a multi-channel backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel comprises a plurality of backlight partitions; the backlight control module comprises a plurality of clock signal output terminals;

[0020] The first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first clock signal output end is one of the at least one clock signal output end; the first backlight driver chip is one of the at least one backlight driver chip;

[0021] The backlight control module is used to output a clock synchronization signal to the first backlight driver chip through the first clock signal output end, and adjust the brightness of the backlight partition through each backlight driver chip, and control any clock signal output end except the first clock signal output end to not output a clock synchronization signal.

[0022] In a fourth aspect, the present application provides a display device, comprising: a backlight control system as described in any one of the first aspect, the second aspect, and the third aspect.

[0023] The backlight control system and display device provided by the present application can use one of the clock signal output terminals of the backlight control module as the first clock signal output terminal, and connect to the first backlight driver chip in each backlight driver circuit through the first clock signal output terminal. Through the above method, it is only necessary to pull out a clock signal transmission line from one clock signal output terminal of the backlight control module to transmit the constant signal to each backlight driver chip. Compared with the prior art that requires pulling multiple constant signal transmission lines from the backlight control module for clock signal transmission, the backlight control system provided by the present application reduces the number of clock signal transmission lines used, thereby reducing the number of high-frequency clock signals, reducing the radiation of the backlight control system, and thus improving the EMC of the display device using the backlight control system. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the implementation methods in the embodiments of the present application or related technologies, the following is a brief introduction to the drawings required for use in the embodiments or related technology descriptions. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.

[0025] Figure 1 A schematic diagram of the architecture of a backlight system for a display device;

[0026] Figure 2 It is a structural diagram of an existing backlight control system;

[0027] Figure 3 A schematic diagram of the architecture of a backlight control system 30 provided in this application;

[0028] Figure 4 A schematic diagram of the architecture of another backlight control system 30 provided in this application;

[0029] Figure 5 This is a schematic diagram of the architecture of another backlight control system 30 provided in this application;

[0030] Figure 6 A schematic diagram of the architecture of a backlight control system 60 provided in this application;

[0031] Figure 7 This is a schematic diagram of the architecture of another backlight control system 60 provided in this application. DETAILED DESCRIPTION

[0032] In order to make the purpose, implementation mode and advantages of the present application clearer, the exemplary implementation mode of the present application will be clearly and completely described below in conjunction with the drawings in the exemplary embodiments of the present application. Obviously, the described exemplary embodiments are only part of the embodiments of the present application, not all of the embodiments.

[0033] It should be noted that the brief descriptions of terms in this application are only for the purpose of facilitating the understanding of the embodiments described below, and are not intended to limit the embodiments of this application. Unless otherwise specified, these terms should be understood according to their ordinary and usual meanings.

[0034] In addition, the terms "comprises" and "comprising" and any variations thereof are intended to cover but not exclude inclusion, for example, a product or device comprising a list of components is not necessarily limited to those components expressly listed but may include other components not expressly listed or inherent to such product or device.

[0035] The display device provided in the embodiments of the present application may have various implementation forms, for example, it may be a smart TV, a laser projection device, a monitor, an electronic bulletin board, an electronic table, etc.

[0036] For example, Figure 1 FIG. 1 is a schematic diagram of the backlight system of a display device. Figure 1 Taking the backlight system shown in FIG. 1 as an example, during hybrid dimming, the image quality processing chip 11 can obtain and process the video stream to be displayed. The image quality processing chip 11 can separate the processed video stream into image data and backlight data. The image data can be used to illuminate the screen 13. For example, the image quality processing chip 11 can transmit the image data to the TCON 12, so that the TCON 12 can illuminate the screen 13 based on the image data. The backlight data can also be used to illuminate the backlight panel 14.

[0037] For the backlight portion, the image quality processing chip 11 can determine the parameters used to illuminate each partition of the backlight panel 14 based on the backlight data, such as the average pixel level (APL) value. The image quality processing chip 11 can then send these parameters to the microcontroller unit (MCU). Based on these parameters, the MCU 15 can control the driver chip on the light board of each backlight partition (that is, the backlight panel 14) through the BCON 16, so that the driver chip illuminates the light board, thereby illuminating the backlight panel 14.

[0038] Figure 2 FIG. 1 is a schematic diagram of the structure of an existing backlight control system. Figure 2 As shown, the DC-DC chip 21 (power conversion module) and the above-mentioned BCON16 can both belong to the central control board 22. The backlight board 13 can include multiple partitions, and each driver chip 23 can be used to control multiple backlight partitions. Figure 2 Taking the driver chip 23 shown in as an example, the backlight control system may include: ID-1-1, ID-1-2, ..., ID-1-M, ..., ID-N-1, ID-N-2, ..., ID-NM, a total of N*M driver chips 23. Each driver chip 23 may correspond to, for example, CH1, CH2, CH3, CH4, CH5, CH6, CH7, CH8, a total of 8 channels, where each channel can be used to correspond to a backlight partition. The DC-DC chip can be connected to the light-emitting diode (LED) on each channel and output a power supply voltage (Voltage for LED, VLED) to the LED to achieve brightness control of the lamp beads in the partition.

[0039] In addition, if Figure 2 As shown, the serial clock (SCLK) interface, master input slave output (MISO) interface, digital input signal (DIS) interface, display output selection (DOS) interface of BCON16 are connected to the driver chip 23 through transmission lines. Figure 2 The backlight control system architecture shown can also be called a backlight control system based on a serial peripheral interface (SPI)-like transmission protocol. This protocol stipulates that each signal path (for example, ID-1-1 to ID-1-M is one path, and ID-N-1 to ID-NM is another path) includes DIS, DOS, SCLK, and MISO. DIS1, DOS1, SCLK1, and MISO1 are interfaces for transmitting signals to the first driver chip 23 (ID-1-1 to ID-1-M). DISN, DOSN, SCLKN, and MISON are interfaces for transmitting signals to the Nth driver chip 23 (ID-N-1 to ID-NM). SCLKI ​​represents the SCLK signal input, SCLKO represents the SCLK signal output, and MOSI represents the master output slave input.

[0040] DIS is responsible for setting the address of the driver chip 23, and DOS is responsible for reading back the status of the driver chip 23. BCON16 then controls the DC-DC converter to distribute the VLED supply voltage to the LEDs in real time based on the status of the driver chip 23. SCLK and MISO work together to transmit backlight data and related configuration data.

[0041] The SCLK signal is a high-frequency clock signal used for data synchronization and determines the communication rate. The higher the communication rate, the higher the energy radiated from the SCLK signal transmission line. The more transmission lines used to transmit the SCLK signal, the more radiated energy accumulates, further increasing the energy radiated from the SCLK signal transmission line.

[0042] Currently, the number of backlight partitions in the backlight panel 14 is increasing rapidly, for example, thousands of backlight partitions. To shorten signal transmission time and achieve features such as zero delay, the increase in the number of partitions inevitably leads to an increase in the number of SCLK signal lines. For example, a backlight panel 14 with thousands of partitions often has dozens of SCLK signal transmission lines, and the SCLK signal transmission rate requirements are increasing. The radiation caused by the superposition of high-frequency signals will negatively impact other electronic devices around the display device, resulting in poor electromagnetic compatibility (EMC) of the display device.

[0043] Considering the above-mentioned problems existing in the existing backlight control system, the present application proposes a backlight control system capable of reducing the number of SCLK signal transmission lines to improve the EMC of the display device.

[0044] The following detailed description of the technical solution of the present application is provided in conjunction with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described in detail in some embodiments.

[0045] Figure 3 This is a schematic diagram of the architecture of a backlight control system 30 provided in this application. Figure 3 As shown, the backlight control system 30 may include: a backlight panel 31 , a backlight control module 32 , and at least one backlight driving circuit 33 .

[0046] For any backlight driver circuit 33, at least one backlight driver chip 331 may be connected to the backlight driver circuit 33. It should be understood that the number of backlight driver chips 331 included in different backlight driver circuits 33 may be the same or different, and this application does not limit this. Furthermore, it should be understood that this application does not limit the number of backlight driver circuits 33 included in the backlight control system 30. Figure 3 The backlight control system 30 is merely described in an exemplary manner by taking the example that the backlight control system 30 includes multiple backlight driving circuits 33 , and each backlight driving circuit 33 includes the same number of backlight driving chips 331 .

[0047] The backlight panel 31 may include multiple backlight sub-regions. In some embodiments, the backlight panel 31 may also be referred to as a light panel. In some embodiments, a display device may include multiple backlight panels 31, that is, a display screen may be composed of multiple backlight panels 31. This application does not limit the number of backlight sub-regions included in the backlight panel 31.

[0048] The backlight control module 32 may include at least one clock signal output terminal 321. Figure 3 As shown, the first clock signal output terminal 321 of the backlight control module 32 can be connected to the clock signal receiving terminal 332 of the first backlight driving chip 331 in each backlight driving circuit 33 .

[0049] The first clock signal output terminal 321 is one of the at least one clock signal output terminal 321. This application does not specify which clock signal output terminal 321 is used as the first clock signal output terminal 321. For any backlight driver circuit 33, the first backlight driver chip 331 of that backlight driver circuit 33 is one of the at least one backlight driver chips 331 in that backlight driver circuit 33. This application does not specify which backlight driver chip 331 is used as the first backlight driver chip 331.

[0050] Optionally, taking the example of the backlight driver circuit 33 including a plurality of backlight driver chips 331, the first backlight driver chip 331 can be used to forward the clock synchronization signal to the second backlight driver chip. The second backlight driver chip 331 is a backlight driver chip 331 other than the first backlight driver chip 331 in the backlight driver circuit 33. The plurality of backlight driver chips 331 can be connected in series, for example. For example, the clock signal output terminal 321 of the first backlight driver chip 331 can be connected to the clock signal receiving terminal 332 of the second backlight driver chip 331 in the backlight driver circuit 33. Exemplarily, the way in which the second backlight driver chip 331 receives the clock signal can refer to any existing method for the backlight driver chip 331 to receive the clock signal, for example Figure 2 The series connection method shown is not described in detail in this application.

[0051] Taking the backlight driving circuit 33 including one backlight driving chip 331 as an example, the backlight driving chip 331 is the first backlight driving chip 331 .

[0052] The backlight control module 32 may be configured to output a clock synchronization signal to the first backlight driver chip 331 via the first clock signal output terminal 321 , and to adjust the brightness of each backlight partition via each backlight driver chip 331 .

[0053] That is to say, in this implementation, the backlight control module 32 can simply output the clock synchronization signal through the above-mentioned first clock signal output terminal 321, and connect it with the first backlight driver chip 331, so that each backlight driver chip 331 can obtain the above-mentioned clock synchronization signal.

[0054] For example, the backlight control module 32 may be the aforementioned BCON. The clock signal output terminal may be an SCLK terminal.

[0055] By outputting the clock synchronization signal to the backlight driver chips 331 , each backlight driver chip 331 can respond to the clock synchronization signal, thereby achieving synchronous control of each backlight driver chip 331 .

[0056] The backlight driver chip 331 may also receive backlight data from the backlight control module 32, and control the brightness of the backlight subarea corresponding to the backlight driver chip 331 according to the backlight data. Optionally, the method for the backlight driver chip 331 to control the brightness of the backlight subarea based on the backlight data may refer to existing backlight brightness adjustment methods, which will not be described in detail here.

[0057] In this embodiment, the backlight control module 32 can use one of the clock signal output terminals 321 as the first clock signal output terminal 321, and connect to the first backlight driver chip 331 in each backlight driver circuit 33 through the first clock signal output terminal 321. Through the above method, it is only necessary to pull a clock signal transmission line from one clock signal output terminal of the backlight control module 32 to transmit the clock signal to each backlight driver chip. Compared with the prior art that requires pulling multiple clock signal transmission lines from the backlight control module for clock signal transmission, the backlight control system 30 provided in this application reduces the number of clock signal transmission lines used, thereby reducing the number of high-frequency clock signals, reducing the radiation of the backlight control system 30, and thus improving the EMC of the display device using the backlight control system 30.

[0058] Figure 4 This is a schematic diagram of the architecture of another backlight control system 30 provided in this application. Figure 4 As shown in FIG. 1 , as a possible implementation, taking the backlight control system 30 including N (N is greater than 1) backlight driving circuits 33 as an example, the backlight control system 30 may further include: N first jumper resistors 41. The N first jumper resistors 41 may correspond one-to-one to the N backlight driving circuits 33.

[0059] In some embodiments, the N first jumper resistors 41 can be connected in series to form a first jumper resistor module. One end of the first jumper resistor module can be connected to the first clock signal output end 321 of the backlight control module 32. Figure 4 As shown, the other end of the first jumper resistor module may include one end of the N first jumper resistors 41. One end of the N first jumper resistors 41 may be connected to the clock signal receiving end 332 of the first backlight driver chip 331 in the corresponding backlight driver circuit 33.

[0060] In some embodiments, the first jumper resistor 41 may also be referred to as a 0-ohm resistor. The resistance of the first jumper resistor 41 may not be zero, and may be a jumper resistor of any existing precision, which is not limited in this application. It should be understood that the resistance precision of the first jumper resistors 41 corresponding to different backlight drive circuits 33 may be the same or different.

[0061] Optionally, the first jumper resistor 41 may be provided on the backlight panel 31. Alternatively, the first jumper resistor 41 may be provided at other locations, which is not limited in the present application.

[0062] By connecting one end of the first jumper resistor module to the first clock signal output terminal 321 of the backlight control module 32, and connecting one end of the first jumper resistor 41 to the clock signal receiving terminal 332 of the first backlight driver chip 331 in the corresponding backlight driver circuit 33, the first clock signal output terminal 321 of the backlight control module 32 can be connected to the first backlight driver chip 331 through the first jumper resistor. The first jumper resistor forms a low-impedance circuit path between the first clock signal output terminal 321 and the first backlight driver chip 331, thereby achieving short-circuit protection between the first clock signal output terminal 321 and the first backlight driver chip 331. Impedance matching can also ensure clock signal transmission efficiency, thereby reducing radiation from the backlight control system 30 while ensuring clock signal transmission efficiency.

[0063] In some embodiments, taking the above-mentioned backlight control module 32 including multiple clock signal output terminals 321 as an example, optionally, any clock signal output terminal 321 except the first clock signal output terminal 321 may not be connected to any first backlight driving chip 331.

[0064] That is, the backlight control module 32 may output the clock signal only through the first clock signal output terminal 321. There may be no clock signal transmission line between any clock signal output terminal 321 other than the first clock signal output terminal 321 and any first backlight driving chip 331.

[0065] Through the above method, the backlight control module 32 outputs the clock signal only through the first clock signal output terminal 321 , laying a foundation for reducing the number of clock signal transmissions.

[0066] Still taking the above-mentioned backlight control module 32 including multiple clock signal output terminals 321 as an example, in some embodiments, the backlight control module 32 can also be used to control any clock signal output terminal 321 except the first clock signal output terminal 321 to output a clock synchronization signal.

[0067] Through the above method, a backlight control module 32 having the function of controlling any clock signal output terminal 321 except the first clock signal output terminal 321 to output a clock synchronization signal can be used, so that the backlight control module 32 can be any existing backlight control module, reducing the workload of re-developing the backlight control module 32 and improving the production efficiency, application scope and compatibility of the backlight control system.

[0068] As a possible implementation, the backlight control module 32 may further include, for example: a backlight data output terminal 51 corresponding to each backlight driving circuit 33 , and / or a backlight driving chip state determination terminal 52 .

[0069] In some embodiments, the backlight control module 32 may also be connected to the backlight driver chip 331 in the corresponding backlight driver circuit 33 via the backlight data output terminal 51 and / or the backlight driver chip state determination port 52 .

[0070] The backlight control module 32 is connected to the backlight driver chip 331 in the corresponding backlight driver circuit 33 through the above-mentioned backlight data output terminal 51, so that the backlight control module 32 can output backlight data to the backlight driver chip 331, laying the foundation for the backlight driver chip 331 to control the brightness of the LED in the corresponding backlight partition based on the backlight data.

[0071] The backlight control module 32 is connected to the backlight driver chip 331 in the corresponding backlight driver circuit 33 through the above-mentioned backlight driver chip status determination port 52, so that the backlight control module 32 can obtain data used to represent the operating status of the above-mentioned backlight driver chip 331, laying the foundation for the backlight control module 32 to control the backlight driver chip 331 based on the data used to represent the operating status of the above-mentioned backlight driver chip 331.

[0072] Taking the above-mentioned backlight control module 32 including: the backlight data output terminal 51 corresponding to each backlight driving circuit 33, and the backlight driving chip state determination terminal 52 as an example, Figure 5 This is a schematic diagram of the architecture of another backlight control system 30 provided by this application. Figure 5As shown, the flexible flat cable (FFC) socket of BCON belongs to the backlight control module 32. Resistors R1, R3, and R3 are all the first jumper resistor 41. The backlight data output terminal 51 may include, for example, MISO1, MISO2, ..., MISON ports, and the backlight driver chip status determination port 52 may include, for example, DIS1, DIS2, ..., DISN ports, and DOS1, DOS2, ..., DOSN ports. Figure 5 As shown, BCON can control all SCLK pins to still send SCLK signals, because only the SCLK1 pin is connected to the backlight driver chip, because the light board (backlight board) can only use one SCLK signal.

[0073] Figure 6 This is a schematic diagram of the architecture of a backlight control system 60 provided in this application. Figure 6 As shown in FIG. 1 , as a possible implementation, a backlight control system 60 may include: a backlight panel 31, a backlight control module 32, and at least one backlight driving circuit 33. The backlight driving circuit 33 is connected to at least one backlight driving chip 331. The backlight panel 31 includes multiple backlight partitions.

[0074] The backlight control module 32 includes at least one clock signal output terminal 321, and the clock signal output terminal 321 corresponds one-to-one with the backlight driving circuit 33. For example, if the backlight control system 60 includes eight backlight driving circuits 33, the backlight control system 60 includes eight clock signal output terminals 321.

[0075] like Figure 6 As shown, each clock signal output terminal 321 of the backlight control module 32 can be connected to the clock signal receiving terminal 332 of the first backlight driver chip 331 in the corresponding backlight driver circuit 33. The first clock signal output terminal 321 of the backlight control module 32 is also connected to the clock signal receiving terminal 332 of the first backlight driver chip 331 in each backlight driver circuit 33.

[0076] The manner in which the first clock signal output terminal 321 of the backlight control module 32 is connected to the clock signal receiving terminal 332 of the first backlight driver chip 331 in each backlight driver circuit 33, as well as the manner in which the other backlight driver chips 331 other than the first backlight driver chip 331 receive the clock synchronization signal, can refer to the manner described in the aforementioned embodiment. Furthermore, the first backlight driver chip 331 and the first clock signal output terminal 321 can also refer to the aforementioned embodiment and will not be described in detail here.

[0077] As Figure 6Taking the backlight control system 60 shown as an example, the backlight control module 32 can be used to output a clock synchronization signal to the first backlight driver chip 331 through the above-mentioned first clock signal output terminal 321, and to adjust the brightness of the backlight partition through each backlight driver chip 331, and the backlight control module 32 can control any clock signal output terminal 321 "except the first clock signal output terminal 321" not to output a clock synchronization signal.

[0078] Optionally, the backlight control module 32 adjusts the brightness of the backlight partitions through the backlight driving chips 331 , for example, can refer to the method described in the above embodiment, which will not be described in detail here.

[0079] In this embodiment, compared with the existing backlight control system, the backlight control module 32 in the backlight control system 60 provided by the present application can control any clock signal output terminal 321 "except the first clock signal output terminal 321" not to output the clock synchronization signal, thereby realizing the output of the clock synchronization signal to the first backlight driver chip 331 only through the above-mentioned first clock signal output terminal 321. Therefore, without changing the connection method between any clock signal output terminal 321 "except the first clock signal output terminal 321" and other backlight driver chips, it is possible to pull out only one clock signal transmission line from one clock signal output terminal of the backlight control module 32 to transmit the clock synchronization signal to each backlight driver chip, thereby reducing the number of clock signal transmission lines used, thereby reducing the number of high-frequency clock signals, reducing the radiation of the backlight control system 30, and thereby improving the EMC of the display device using the backlight control system 30.

[0080] As a possible implementation, taking the backlight control system 60 including N (N is greater than 1) backlight driving circuits 33 as an example, the backlight control system may further include: N second jumper resistors. The N second jumper resistors correspond one-to-one to the N backlight driving circuits 33.

[0081] The N second jumper resistors are connected in series to form a second jumper resistor module, and one end of the second jumper resistor module is connected to the first clock signal output terminal 321 of the backlight control module 32. One end of the N second jumper resistors is connected to the clock signal receiving terminal 332 of the first backlight driver chip 331 in the corresponding backlight driver circuit 33.

[0082] Optionally, the second jumper resistor and the first jumper resistor may be of the same or different types. The implementation principle and technical effect of the second jumper resistor in the backlight control system 60 are similar to those of the backlight control system 30, and will not be described in detail.

[0083] In some embodiments, the backlight control system may further include: N-1 third jumper resistors, wherein the N-1 third jumper resistors may correspond one-to-one to the N-1 clock signal output terminals 321 except the first clock signal output terminal 321 .

[0084] For any clock signal output end 321 among the N−1 clock signal output ends 321 , the clock signal output end 321 may be connected to the clock signal receiving end 332 of the first backlight driving chip 331 via a corresponding third jumper resistor, for example.

[0085] Optionally, the third jumper resistor may be of the same type as or different from the first jumper resistor or the second jumper resistor.

[0086] For example, taking the above-mentioned second jumper resistor being the same as the first jumper resistor, Figure 7 This is a schematic diagram of the architecture of another backlight control system 60 provided in this application. Figure 7 As shown, the resistors R1, R2, and R3 are all second jumper resistors; the resistors R4 and R5 are all third jumper resistors. Figure 7 As shown, each light strip line (one backlight panel corresponds to one light strip line) can retain multiple SCLKs. By changing the BCON software, it is possible to control any clock signal output terminal 321 "except the first clock signal output terminal 321" to not output the clock synchronization signal, that is, each FFC socket has only one SCLK output. After the SCLK is output to the light panel, it can be connected to the backlight driver chip of other backlight driver circuits through the second jumper resistor. Figure 7 Other ports or components shown in Figure 5 , I will not go into details here.

[0087] The present application also provides another backlight control system. As a possible implementation, the architecture of the backlight control system can refer to the aforementioned backlight control system 30. For example, the backlight control system may include: a backlight panel 31, a backlight control module 32, and a multi-channel backlight driving circuit 33. The backlight driving circuit 33 is connected to at least one backlight driving chip 331. The backlight panel 31 may include multiple backlight partitions, and the backlight control module 32 includes multiple clock signal output terminals 321. The first clock signal output terminal 321 of the backlight control module 32 may be connected to the clock signal receiving terminal 332 of the first backlight driving chip 331 in each backlight driving circuit 33.

[0088] In some embodiments, the backlight control system provided in this embodiment includes a backlight control module 32 that can be used to output a clock synchronization signal to a backlight driver chip 331 via a first clock signal output terminal 321, and to adjust the brightness of the backlight partitions via each of the backlight driver chips 331. Furthermore, the backlight control module 32 can be used to control any clock signal output terminal 321 "except the first clock signal output terminal 321" to not output a clock synchronization signal.

[0089] In this embodiment, the clock synchronization signal is output to the backlight driver chip 331 via the first clock signal output terminal 321, allowing the backlight control module 32 to output the clock synchronization signal to the first backlight driver chip 331 only through the first clock signal output terminal 321. This reduces the number of high-frequency clock signals, lowers the radiation emitted by the backlight control system 30, and thereby improves the EMC of a display device using the backlight control system 30. By controlling any clock signal output terminal 321 other than the first clock signal output terminal 321 to not output the clock synchronization signal, the energy consumption required for signal output by the backlight control module 32 is reduced. This reduces the radiation emitted by the backlight control system 30, the energy consumption of the backlight control module 32, and the number of clock synchronization signal output pins required by the backlight control module 32 is reduced.

[0090] The present application also provides a display device, which may include the backlight control system described in any of the above embodiments. The implementation principle and technical effects of the display device provided by the present application are similar to those of the above backlight control system, and will not be described in detail.

[0091] It should be understood that this application does not limit whether the display device includes other components. For example, taking the display device as a smart TV as an example, the display device may also include a speaker, a system on chip (SOC), etc.

[0092] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

[0093] For ease of explanation, the above description has been made with reference to specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the embodiments to the specific forms disclosed above. Based on the above teachings, various modifications and variations are possible. The above embodiments are selected and described to better explain the principles and practical applications, so that those skilled in the art can better utilize the embodiments and various different variations of the embodiments suitable for specific use considerations.

Claims

1. A backlight control system, characterized in that: The backlight control system includes: a backlight panel, a backlight control module, and at least one backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel includes multiple backlight partitions; the backlight control module includes at least one clock signal output terminal; The first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first clock signal output end is one of the at least one clock signal output end; the first backlight driver chip is one of the at least one backlight driver chip; The backlight control module is configured to output a clock synchronization signal to the first backlight driver chip via the first clock signal output terminal, and to adjust the brightness of the backlight partitions via each of the backlight driver chips.

2. The backlight control system according to claim 1, characterized in that: The backlight control system includes N backlight driving circuits, where N is greater than 1, and the backlight control system further includes: N first jumper resistors, where the N first jumper resistors correspond one-to-one to the N backlight driving circuits; The N first jumper resistors are connected in series to form a first jumper resistor module, and one end of the first jumper resistor module is connected to the first clock signal output end of the backlight control module; one end of the N first jumper resistors is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit.

3. The backlight control system according to claim 1 or 2, characterized in that: The backlight control module includes a plurality of clock signal output terminals, and any clock signal output terminal except the first clock signal output terminal is not connected to any first backlight driving chip.

4. The backlight control system according to claim 3, characterized in that: The backlight control module is further configured to control any clock signal output terminal except the first clock signal output terminal to output a clock synchronization signal.

5. The backlight control system according to claim 1 or 2, characterized in that: The backlight control module also includes: a backlight data output terminal corresponding to each of the backlight driving circuits, and / or a backlight driving chip status determination port. The backlight control module is also connected to the backlight driving chip in the corresponding backlight driving circuit through the backlight data output terminal and / or the backlight driving chip status determination port.

6. A backlight control system, characterized in that: The backlight control system includes: a backlight panel, a backlight control module, and at least one backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel includes multiple backlight partitions; the backlight control module includes at least one clock signal output terminal; the clock signal output terminal corresponds to the backlight driving circuit in a one-to-one manner; Each clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit, and the first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first backlight driver chip is one of the at least one backlight driver chip; the first clock signal output end is one of the at least one clock signal output ends; The backlight control module is used to output a clock synchronization signal to the first backlight driver chip through the first clock signal output end, and adjust the brightness of the backlight partition through each backlight driver chip, and control any clock signal output end except the first clock signal output end to not output a clock synchronization signal.

7. The backlight control system according to claim 6, characterized in that: The backlight control system includes N backlight driving circuits, where N is greater than 1, and the backlight control system further includes: N second jumper resistors, where the N second jumper resistors correspond one-to-one to the N backlight driving circuits; The N second jumper resistors are connected in series to form a second jumper resistor module, and one end of the second jumper resistor module is connected to the first clock signal output end of the backlight control module; one end of the N second jumper resistors is connected to the clock signal receiving end of the first backlight driver chip in the corresponding backlight driver circuit.

8. The backlight control system according to claim 7, characterized in that: The backlight control system further includes: N-1 third jumper resistors, wherein the N-1 third jumper resistors correspond one-to-one to the N-1 clock signal output terminals other than the first clock signal output terminal; For any clock signal output end among the N-1 clock signal output ends, the clock signal output end is connected to the clock signal receiving end of the first backlight driving chip through the corresponding third jumper resistor.

9. A backlight control system, characterized in that: The backlight control system includes: a backlight panel, a backlight control module, and a multi-channel backlight driving circuit; at least one backlight driving chip is connected to the backlight driving circuit; the backlight panel includes multiple backlight partitions; the backlight control module includes multiple clock signal output terminals; The first clock signal output end of the backlight control module is connected to the clock signal receiving end of the first backlight driver chip in each backlight driver circuit; the first clock signal output end is one of the at least one clock signal output end; the first backlight driver chip is one of the at least one backlight driver chip; The backlight control module is used to output a clock synchronization signal to the first backlight driver chip through the first clock signal output end, and adjust the brightness of the backlight partition through each backlight driver chip, and control any clock signal output end except the first clock signal output end to not output a clock synchronization signal.

10. A display device, characterized in that: The display device comprises: a backlight control system according to any one of claims 1 to 9.

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