Driving method, driving circuit and display device of display panel

Abstract

The application provides a driving method, a driving circuit and a display device of a display panel. In the driving method of the display panel, display picture information of the display panel is acquired first. When the display time of the same picture information exceeds a preset time, the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of each pixel unit is determined according to the positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling pressure drop value of each pixel unit corresponding to the gray scale brightness and the common electrode voltage. The positive polarity gray scale voltage and the negative polarity gray scale voltage are switched to the corresponding pixel unit with different frame numbers respectively according to the output frame number ratio, so that the display time of the positive polarity gray scale voltage is greater than that of the negative polarity gray scale voltage, the total mobile charge under the positive polarity gray scale voltage is equal to the number of the mobile charge under the negative polarity gray scale voltage, the internal electric field and the display residual image are eliminated, and the display effect is improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of display panel, and particularly relates to a driving method of display panel, a driving circuit and a display device. BACKGROUND

[0002] TFT-LCD (Thin Film Transistor Liquid Crystal Display) is one of the main varieties of current flat panel display, and has become an important display platform in modern IT and video products.

[0003] The display panel usually has arrayed pixel units, a plurality of data lines and a plurality of scan lines, the data lines are used for inputting corresponding polarity gray scale data, and the scan lines are used for inputting row scanning signals. When a falling edge of the row scanning signal appears, the gray scale data will be coupled to appear a voltage drop. Under the same gray scale brightness, the positive polarity gray scale voltage and the negative polarity gray scale voltage will both appear a voltage drop of the same size, so that the voltage difference of the two relative to the voltage of a common electrode is twice the voltage drop. The voltage difference of the positive polarity gray scale voltage and the negative polarity gray scale voltage is equivalent to applying a direct current voltage with a voltage drop of twice to both ends of the liquid crystal. When a fixed picture is displayed, the movement and aggregation of positive and negative polarity charges in the liquid crystal will occur, an internal electric field is formed, the internal electric field will offset part of the external electric field applied to both ends of the liquid crystal, thereby affecting the deflection of the liquid crystal. Under different gray scale voltages, different voltage drops are caused, so that different internal electric fields are formed in different regions of the display panel under the same display picture. When other display pictures are switched, the liquid crystals in different regions are also affected by different internal electric fields, so that display residual images appear in the display panel. SUMMARY

[0004] The present application aims to provide a driving method of display panel, and aims to solve the problem of residual images caused by coupling voltage drop in the traditional display panel.

[0005] A first aspect of the embodiment of the present application provides a driving method of display panel, the display panel comprising arrayed pixel units, a plurality of data lines and a plurality of scan lines, the pixel units corresponding to one data line and one scan line;

[0006] The driving method of the display panel comprises:

[0007] obtaining display picture information of the display panel;

[0008] When the display panel displays the same picture information for more than a preset time, the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of each pixel unit is determined according to the positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling voltage drop value corresponding to the gray scale brightness of each pixel unit and the common electrode voltage, wherein the coupling voltage drop value is the coupling change difference of the gray scale voltage of the data line when the row scanning signal input by the scanning line corresponding to the pixel unit changes.

[0009] The positive polarity gray scale voltage and the negative polarity gray scale voltage are respectively switched and output to the corresponding pixel unit in different frame numbers according to the output frame number ratio.

[0010] Optionally, the driving method of the display panel further comprises:

[0011] When the display panel displays the same picture for less than a preset time, the positive polarity gray scale voltage and the negative polarity gray scale voltage corresponding to the pixel unit are alternately output in adjacent frames.

[0012] Optionally, the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of each pixel unit is determined according to the positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling voltage drop value corresponding to the gray scale brightness of each pixel unit and the common electrode voltage, comprising:

[0013] The positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling voltage drop value corresponding to the gray scale brightness of each pixel unit are obtained, and the common electrode voltage of the display panel is obtained.

[0014] The output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of the pixel unit is determined according to the ratio of the first difference value and the second difference value, the first difference value is the absolute value of the positive polarity gray scale voltage minus the coupling voltage drop value and the common electrode voltage, and the second difference value is the absolute value of the negative polarity gray scale voltage minus the coupling voltage drop value and the common electrode voltage.

[0015] Optionally, before the display picture information of the display panel is obtained, the method further comprises:

[0016] The coupling voltage drop value corresponding to each target gray scale brightness is determined based on the difference between the optimal common electrode voltage of the plurality of target gray scale brightness and the initial common electrode voltage of the display panel.

[0017] The coupling voltage drop value corresponding to each gray scale brightness of the display panel is determined by performing linear interpolation calculation on the coupling voltage drop values corresponding to the plurality of target gray scale brightness.

[0018] Optionally, the difference between the optimal common electrode voltage based on the multiple target gray scale brightness and the initial common electrode voltage of the display panel determines the coupling pressure drop value corresponding to the multiple target gray scale brightness, and the method further comprises the following steps:

[0019] The flicker values of the gray scale voltages of the multiple target gray scales are measured in sequence.

[0020] The size of the common electrode voltage is adjusted until the flicker values are minimized, and the common electrode voltage corresponding to the minimized flicker value is set as the optimal common electrode voltage corresponding to the multiple target gray scales.

[0021] Optionally, the output of the positive polarity gray scale voltage and the negative polarity gray scale voltage to the corresponding pixel units is switched at different frame numbers according to the output frame number ratio, comprising the following steps:

[0022] An output cycle is m+n frames, and the ratio of m to n is equal to the output frame number ratio.

[0023] The positive polarity gray scale voltage and the negative polarity gray scale voltage are alternately output to the corresponding pixel units for m1 frames and n1 frames, and finally the positive polarity gray scale voltage and the negative polarity gray scale voltage are sequentially output to the corresponding pixel units for m2 frames and n2 frames, wherein m1+m2=m, n1+n2=n, m1 and n1 are greater than or equal to 1, and m2 and n2 are greater than or equal to 0.

[0024] The second aspect of the embodiment of the application provides a driving circuit of a display panel, comprising a source driving circuit, a gate driving circuit and a timing controller.

[0025] The timing controller is configured to:

[0026] The output row scanning control signal controls the gate driving circuit to output a row scanning signal to the display panel row by row.

[0027] The first polarity control signal is output based on the driving method of the display panel to control the source driving circuit to output the positive polarity gray scale voltage and the negative polarity gray scale voltage corresponding to the frame number to the corresponding pixel units according to the output frame number ratio, or the second polarity control signal is output to control the source driving circuit to alternately output the positive polarity gray scale voltage and the negative polarity gray scale voltage to the corresponding pixel units in adjacent frames.

[0028] Optionally, the timing controller is specifically configured to:

[0029] In the corresponding frame, when the output row scanning control signal controls the gate driving circuit to output a row scanning signal to the corresponding row of pixel units, the data transmission control signal is output to control the source driving circuit to latch and output the gray scale voltage of each pixel unit in the current row.

[0030] The driving method of the display panel outputs a plurality of first polarity control signals or a plurality of second polarity control signals to control the source driving circuit to output a plurality of gray scale voltages of corresponding polarity to each corresponding pixel unit in the current row.

[0031] Optionally, a data buffer is configured to store a plurality of first polarity control signals or one second polarity control signal corresponding to each row of pixel units during line-by-line scanning, and output a plurality of first polarity control signals or one second polarity control signal when the data transmission control signal is received.

[0032] A plurality of driving units, each of which is connected to a data line of the display panel, and each of which comprises a selection switch, a positive polarity digital-to-analog converter, and a negative polarity digital-to-analog converter.

[0033] An input end of the selection switch is configured to input a gray scale voltage, a first output end of the selection switch is connected to an input end of the positive polarity digital-to-analog converter, and a second output end of the selection switch is connected to an input end of the negative polarity digital-to-analog converter, an output end of the positive polarity digital-to-analog converter and an output end of the negative polarity digital-to-analog converter are connected to the corresponding data line, and the data buffer is connected to a control end of the selection switch of each of the plurality of driving units.

[0034] The selection switch is configured to connect the input end and the first output end of the selection switch according to the received first polarity control signal, or connect the input end and the second output end of the selection switch according to the received second polarity control signal, so as to transmit the gray scale voltage to the positive polarity digital-to-analog converter and the negative polarity digital-to-analog converter according to the output frame number ratio, or alternately connect the input end to the first output end and the second output end in adjacent frames.

[0035] The positive polarity digital-to-analog converter is configured to convert the gray scale voltage into the positive polarity gray scale voltage.

[0036] The negative polarity digital-to-analog converter is configured to convert the gray scale voltage into the negative polarity gray scale voltage.

[0037] A third aspect of the embodiment of the present application provides a display device, which comprises a display panel and a display panel driving circuit as described above, and the display panel driving circuit is connected to the display panel.

[0038] The beneficial effects of the present invention embodiments compared with the prior art are as follows: In the above-mentioned display panel driving method, the display screen information of the display panel is first obtained. When the display time of the same screen information exceeds a preset time, the output frame ratio of the positive and negative gray level voltages of each pixel unit is determined according to the positive and negative gray level voltages of the corresponding gray level brightness of each pixel unit, the coupling voltage drop value, and the common electrode voltage. The positive and negative gray level voltages are switched to the corresponding pixel units with different frame numbers according to the output frame ratio, so that the display time of the positive gray level voltage is greater than the display time of the negative gray level voltage, so that the total moving charge under the positive gray level voltage is equal to the number of moving charges under the negative gray level voltage, thereby eliminating the internal electric field and display afterimages and improving the display effect. Attached Figure Description

[0039] Figure 1 This is a schematic diagram of a first structure of a display panel provided in Embodiment 1 of the present invention;

[0040] Figure 2 This is a schematic diagram of the waveform changes of various signals of the display panel provided in Embodiment 1 of the present invention;

[0041] Figure 3 This is a schematic diagram of a second structure of the display panel provided in Embodiment 1 of the present invention;

[0042] Figure 4 This is a schematic diagram of charge movement during positive and negative polarity driving of a pixel unit according to Embodiment 1 of the present invention;

[0043] Figure 5 This is a schematic diagram of a first-order process for driving a display panel according to Embodiment 1 of the present invention.

[0044] Figure 6 for Figure 5 A flowchart illustrating step S20 in the driving method for the display panel shown.

[0045] Figure 7 This is a schematic diagram of a second process for driving a display panel according to Embodiment 1 of the present invention;

[0046] Figure 8 This is a waveform diagram of linear interpolation provided in Embodiment 1 of the present invention;

[0047] Figure 9 This is a schematic diagram of a third process for driving a display panel according to Embodiment 1 of the present invention;

[0048] Figure 10 for Figure 5 A flowchart illustrating step S30 in the driving method for the display panel shown.

[0049] Figure 11 Structure schematic diagram of driving circuit and display device of display panel provided for embodiment two and embodiment three of the present application;

[0050] Figure 12 Structure schematic diagram of source driving circuit provided for embodiment two of the present application;

[0051] Figure 13 Signal timing schematic diagram of source driving circuit provided for embodiment two of the present application.

[0052] In the drawings, various reference numerals are used throughout the various figures and these are cross-referenced where appropriate. Specifically, reference numerals 100, 200, 110, 120, 210, 220, 230, 10, 211, 212, 11, 12, 13, S1, S2, S3, S4, S5, S6, G1, G2, G3, Ga, Da, V1, V2, AV, Vcom, IS, POL, TP, OE, IS1, IS2, IS3 are respectively designated as follows:

[0053] 100, display panel; 200, driving circuit of display panel; 110, array substrate; 120, color film substrate; 210, source driving circuit; 220, gate driving circuit; 230, timing controller; 10, pixel unit; 211, data buffer; 212, driving unit; 11, selection switch; 12, positive polarity digital-to-analog converter; 13, negative polarity digital-to-analog converter; S1, first data line; S2, second data line; S3, third data line; S4, fourth data line; S5, fifth data line; S6, sixth data line; G1, first scan line; G2, second scan line; G3, third scan line; Ga, row scan signal; Da, gray scale voltage; V1, positive polarity gray scale voltage; V2, negative polarity gray scale voltage; AV, coupling voltage drop value; Vcom, common electrode voltage; IS, first polarity control signal; POL, second polarity control signal; TP, data transmission control signal; OE, row scan control signal; IS1, first polarity control signal of first path; IS2, first polarity control signal of second path; IS3, first polarity control signal of third path.

[0054] S1, first data line; S2, second data line; S3, third data line; S4, fourth data line; S5, fifth data line; S6, sixth data line; G1, first scan line; G2, second scan line; G3, third scan line;

[0055] Ga, row scan signal; Da, gray scale voltage; V1, positive polarity gray scale voltage; V2, negative polarity gray scale voltage; AV, coupling voltage drop value; Vcom, common electrode voltage; IS, first polarity control signal; POL, second polarity control signal; TP, data transmission control signal; OE, row scan control signal; IS1, first polarity control signal of first path; IS2, first polarity control signal of second path; IS3, first polarity control signal of third path. DETAILED DESCRIPTION

[0056] In order to make the technical problems to be solved by the present application, technical solutions and beneficial effects more clearly understood, the present application will be further described in detail below in conjunction with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and not used to limit the present application.

[0057] The terms "first", "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0058] Embodiment one

[0059] A first aspect of the embodiments of the present application provides a driving method of a display panel 100, as shown in the accompanying drawings. Figure 1 As shown in the accompanying drawings, the display panel 100 includes pixel units 10 arranged in an array, a plurality of data lines and a plurality of scan lines, for example, the plurality of data lines include a first data line S1, a second data line S2, a third data line S3, a fourth data line S4, a fifth data line S5, a sixth data line S6, etc., the plurality of scan lines include a first scan line G1, a second scan line G2, a third scan line G3, etc., the pixel units 10 are connected to a data line and a scan line corresponding thereto, the plurality of scan lines are connected to a corresponding gate driving circuit 220 and input a row scan signal Ga line by line, the row scan signal Ga is composed of a row opening signal and a row closing signal alternately, the plurality of data lines are connected to a corresponding source driving circuit 210 and input a plurality of gray scale voltages Da, as shown in the accompanying drawings. Figure 2 As shown in the accompanying drawings, the gray scale voltages Da can include positive polarity gray scale voltages V1 and negative polarity gray scale voltages V2, for example, when scanning a row, the data lines of adjacent two rows input gray scale voltages Da of opposite polarity, or when scanning a target row and a target pixel unit in a previous frame, the data line connected to the target pixel unit inputs a positive polarity gray scale voltage V1, and when scanning the target pixel unit in the next frame, the data line connected to the target pixel unit switches to input a negative polarity gray scale voltage V2 of opposite polarity.

[0060] As shown in the accompanying drawings, the display panel 100 includes an array substrate 110 and a color filter substrate 120, and a liquid crystal layer disposed between the array substrate 110 and the color filter substrate 120, the pixel units 10, the data lines and the scan lines are disposed on the array substrate 110, and the color filter substrate 120 is provided with a color resistance layer and a common electrode. Figure 2 As shown in the accompanying drawings, the common electrode transmits a common electrode voltage Vcom, the common electrode voltage Vcom forms a positive polarity driving voltage and a negative polarity driving voltage with the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 respectively, and the absolute values of the positive polarity driving voltage and the negative polarity driving voltage are equal at the same gray scale brightness, that is, the same brightness display is achieved.

[0061] Wherein, when the falling edge of the row scanning signal Ga appears, the gray scale voltage Da will be coupled to appear a voltage drop, under the same gray scale brightness, the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 will both appear a voltage drop of the same size, for example, the common electrode voltage Vcom is 6V, under the same gray scale brightness, the input positive polarity gray scale voltage V1 is 10V, the negative polarity gray scale voltage V2 is 2V, the positive polarity driving voltage and the negative polarity driving voltage are equal, when the falling edge of the row scanning signal Ga appears, the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 receive a coupling voltage drop value ΔV, for example, the coupling voltage drop value ΔV is 1V, correspondingly, the positive polarity gray scale voltage V1 will be coupled to drop to 9V, the negative polarity gray scale voltage V2 will be coupled to drop to 1V, thus, as shown in Figure 3 the figure, the voltage difference of the two relative to the common electrode voltage Vcom is 2ΔV, the voltage difference of the positive polarity and the negative polarity gray scale voltage Da is equivalent to a direct current voltage with a voltage drop of twice as much applied at both ends of the liquid crystal, when displaying a fixed picture, it will cause the movement and gathering of the positive and negative polarity charges inside the liquid crystal.

[0062] As shown in Figure 4 the figure, after the coupling voltage drop, the positive polarity gray scale voltage V1 changes to V1-ΔV, the negative polarity gray scale voltage V2 changes to -V2-ΔV, which is equal to V1+ΔV, therefore, the driving voltage of the positive polarity gray scale voltage V1 relative to the common electrode voltage Vcom is less than the driving voltage of the negative polarity gray scale voltage V2 relative to the common electrode, causing the movement speed of the positive and negative charges under the positive polarity gray scale voltage V1 display to be slower than the movement speed under the negative polarity gray scale voltage V2 display, so that the positive and negative charges gather in one direction, forming an internal electric field, which will offset part of the external electric field applied at both ends of the liquid crystal, thereby affecting the deflection of the liquid crystal.

[0063] In addition, under different gray scale voltages Da, the coupling voltage drop values ΔV generated by the positive and negative polarity gray scale voltages are different, because under different gray scale brightness, the equivalent capacitance of the liquid crystal is different, according to the capacitive coupling effect, under different liquid crystal capacitance values, the coupling of the row scanning signal Ga to the gray scale voltage Da is not the same, causing the number of charge movements to be different under different gray scales, wherein the coupling voltage drop value ΔV is:

[0064] ΔV=(Vgh-Vgl)*Cgs / (Cgs+Cst+ Clc);

[0065] Wherein, Vgh is a row opening signal, Vgl is a row closing signal, Cgs is a parasitic capacitance of the pixel unit 10, Cst is a storage capacitance, Clc is a liquid crystal capacitance, the liquid crystal capacitance is formed by a pixel electrode and a common electrode of the pixel unit 10, the pixel electrode is used to input a gray scale voltage Da, therefore, when the gray scale voltage Da is different, the liquid crystal capacitance is different, according to the formula, the greater the gray scale voltage Da, the greater the liquid crystal capacitance, and the smaller the coupling voltage drop value ΔV, under different gray scale voltages Da, the coupling voltage drop value ΔV caused is different, resulting in that under the same display screen, the internal electric field formed in different regions of the display panel 100 is different, when switching to other display screens, the liquid crystal in different regions also receives different influences of the internal electric field, thereby causing the display panel 100 to have display residual images.

[0066] In order to solve the problem that the existing display panel 100 has coupling voltage drop, causing the display panel 100 to have display residual images, in the embodiment, as shown in Figure 5 The driving method of the display panel 100 includes:

[0067] S10, obtaining display screen information of the display panel 100;

[0068] S20, when the display panel 100 displays the same screen information for more than a preset time, determining an output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of each pixel unit 10 according to the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2 and the coupling voltage drop value ΔV corresponding to the gray scale brightness of each pixel unit 10 and the common electrode voltage Vcom, wherein the coupling voltage drop value ΔV is a coupling change difference of the gray scale voltage Da of the data line when the row scanning signal Ga input by the scanning line corresponding to the pixel unit 10 changes;

[0069] S30, switching and outputting the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 with different frame numbers respectively according to the output frame number ratio.

[0070] In the embodiment, first, the display screen information of the display panel 100 is obtained, and whether the display panel 100 displays the same display screen for a long time is judged, when the same display screen is displayed for a long time, the difference in the number of charges is caused, therefore, when the display screen information is obtained, it is judged whether the same display screen at present exceeds a preset time, when the preset time is exceeded, it is determined that the frame number adjustment of the gray scale voltage Da of different polarities for each pixel unit 10 of the display panel 100 is needed.

[0071] At this time, the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2, the coupling voltage drop value AV and the common electrode voltage Vcom corresponding to the current gray scale brightness are obtained, and the frame number ratio of the output frame number of the positive polarity gray scale voltage V1 and the output frame number of the negative polarity gray scale voltage V2 is determined according to the four parameters, wherein the frame number ratio is greater than 1, that is, the output frame number of the positive polarity gray scale voltage V1 is greater than the output frame number of the negative polarity gray scale voltage V2, for example, the frame number ratio of the output frame number of the positive polarity gray scale voltage V1 and the output frame number of the negative polarity gray scale voltage V2 of one of the pixel units 10 is 5:3, and the frame number ratio of the output frame number of the positive polarity gray scale voltage V1 and the output frame number of the negative polarity gray scale voltage V2 of another of the pixel units 10 is 5:2.

[0072] After the output frame number ratio of the positive and negative gray scale voltages Da corresponding to the pixel units 10 is determined, the source driving circuit 210 further controls the polarity of the gray scale voltage Da of each pixel unit 10 in each frame when continuously outputting the gray scale voltage Da, for example, the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of one of the pixel units 10 is 5:3, and when continuously outputting the gray scale voltage Da to the pixel unit 10, the positive polarity gray scale voltage V1 is continuously output for 5 frames, then the negative polarity gray scale voltage V2 is continuously output for 3 frames, and the output rule is repeated in the subsequent frames.

[0073] In the line-by-line scanning, the gray scale brightness of different pixel units 10 corresponding to the same row or different pixel units 10 corresponding to the same column may be different, and correspondingly, the coupling voltage drop value AV caused thereby is also different, and the output frame number ratio corresponding thereto is also different. By determining the output frame number ratio of each pixel unit 10 of the display panel 100, the polarity control of the gray scale voltage Da of each pixel unit 10 can be realized.

[0074] At the same time, by increasing the output frame number of the positive polarity gray scale voltage V1 and increasing the output time of the positive polarity gray scale voltage V1, the total moving charge corresponding to the positive polarity gray scale voltage V1 is increased, so that the number of moving charges under the positive polarity gray scale voltage V1 is equal to the number of moving charges under the negative polarity gray scale voltage V2, and the internal electric field is eliminated. When the internal electric field cannot be established, the external electric field applied at both ends of the liquid crystal layer will not be offset, and the liquid crystal of the liquid crystal layer can normally deflect. For different pixel units 10, by adjusting the frame number output, the offset of the external electric field of each pixel unit 10 can be realized. When switching to other pictures, the liquid crystals in different regions normally deflect, and display residual images do not occur, thereby improving the display effect of the display panel 100.

[0075] In addition, when it is detected that the display picture is not fixed as the same picture for a long time, frame number adjustment is not required. In an optional embodiment, the driving method of the display panel 100 further includes:

[0076] S40, when the display panel 100 displays the same picture for less than a preset time, alternately output the corresponding positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 in adjacent frames.

[0077] In this embodiment, when it is detected that the display panel 100 displays the same picture for less than a preset time, it is determined that there is no internal electric field and no display afterimage at present, at this time, the source driving circuit 210 outputs the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 according to the conventional polarity mode, wherein the conventional polarity mode is the frame inversion mode, that is, in adjacent frames, the gray scale voltage Da received by the pixel unit 10 is respectively the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2, the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2, etc., realizing frame inversion, at this time, the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage is 1.

[0078] Wherein, when the display panel displays the same display picture for a long time, the output frame number ratio can be obtained by corresponding calculation, in an optional embodiment, as shown in Figure 6 S20 includes:

[0079] S21, obtain the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2 and the coupling voltage drop value AV of each pixel unit 10 corresponding to the gray scale brightness, and obtain the common electrode voltage Vcom of the display panel 100;

[0080] S22, determine the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of the pixel unit 10 according to the ratio of the first difference value and the second difference value, the first difference value is the absolute value of the positive polarity gray scale voltage V1 minus the coupling voltage drop value AV and the common electrode voltage Vcom, and the second difference value is the absolute value of the negative polarity gray scale voltage V2 minus the coupling voltage drop value AV and the common electrode voltage Vcom.

[0081] In this embodiment, when it is determined that the display panel displays the same picture for a long time, the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2 and the coupling voltage drop value AV of each pixel unit 10 are obtained, wherein the coupling voltage drop value AV can be obtained by voltage detection and theoretical calculation, and at the same time, the common electrode voltage Vcom of the common electrode on the color film substrate 120 is also obtained.

[0082] The ratio of the positive polarity gray scale voltage V1 to the negative polarity gray scale voltage V2 is equal to the ratio of the first difference value and the second difference value after coupling, wherein the first difference value is the absolute value of the positive polarity gray scale voltage V1 minus the coupling voltage drop value AV and the common electrode voltage Vcom, and the first difference value is V1-AV-Vcom, and the second difference value is the absolute value of the negative polarity gray scale voltage V2 minus the coupling voltage drop value AV and the common electrode voltage Vcom, and the second difference value is V2-AV-Vcom, that is, equal to V1+AV-Vcom.

[0083] Correspondingly, the output frame number ratio of the positive polarity gray scale voltage V1 to the negative polarity gray scale voltage V2 is (V1+AV-Vcom) / (V1-AV-Vcom).

[0084] For example, the positive polarity gray scale voltage V1 corresponding to the gray scale brightness of one of the pixel units 10 is 10V, the negative polarity gray scale voltage V2 is 2V, the coupling voltage drop value AV is 1V, and the common electrode voltage Vcom is 6V, and through calculation, the output frame number ratio of the positive polarity gray scale voltage V1 to the negative polarity gray scale voltage V2 is 5:3.

[0085] Alternatively, the positive polarity gray scale voltage V1 corresponding to the gray scale brightness of another pixel unit 10 is 9.5V, the negative polarity gray scale voltage V2 is 2.5V, the coupling voltage drop value AV is 1.5V, and through calculation, the output frame number ratio of the positive polarity gray scale voltage V1 to the negative polarity gray scale voltage V2 is 5:2.

[0086] When driving frame by frame, the output frame number of the positive polarity gray scale voltage V1 is greater than the output frame number of the negative polarity gray scale voltage V2, so that the number of charges moving under the positive polarity gray scale voltage V1 is equal to the number of charges moving under the negative polarity gray scale voltage V2, eliminating internal electric field and eliminating display residual image, and improving the display effect of the display panel 100.

[0087] In the fixed picture, the optimal common electrode voltage corresponding to each pixel unit 10 can be calculated and measured, wherein the optimal common electrode voltage is the common electrode voltage Vcom required by the pixel unit 10 after coupling, for example, when the positive polarity gray scale voltage V1 after coupling changes to 9V, and the negative polarity gray scale voltage V2 after coupling changes to 1V, then the optimal common electrode voltage is 5V, and correspondingly, the absolute value of the difference between the optimal common electrode voltage and the common electrode voltage Vcom on the original common electrode is the coupling voltage drop value AV.

[0088] Based on the coupling pressure drop value AV, the common electrode voltage Vcom, the output frame number ratio of each pixel unit 10 corresponding to the positive and negative polarity gray scale voltage can be calculated, and the output frame number ratio of each pixel unit 10 corresponding to the positive and negative polarity gray scale voltage can be determined. However, due to too many gray scales, there are problems of large data calculation and storage when calculating the coupling pressure drop value AV of each pixel unit 10 after coupling. In order to simplify the calculation amount and reduce the storage and operation burden of the processor, in an optional embodiment, as shown in FIG. 10, S10 further includes: Figure 7

[0089] S50, determining the coupling pressure drop value AV corresponding to the plurality of target gray scale brightness based on the difference between the optimal common electrode voltage and the initial common electrode voltage Vcom of the display panel 100.

[0090] S60, performing linear interpolation calculation on the coupling pressure drop value AV corresponding to the plurality of target gray scale brightness to determine the coupling pressure drop value AV corresponding to each gray scale brightness of the display panel 100.

[0091] In this embodiment, the optimal common electrode voltage of the specific target gray scale brightness and the common electrode voltage Vcom of the common electrode are used, for example, as shown in FIG. 11, the optimal common electrode voltage of the gray scale brightness of 1, 32, 64, 127, 160, 192, 224 and 255 specific nodes is obtained respectively, and the initial common electrode voltage Vcom on the common electrode is subtracted to obtain the coupling pressure drop value AV of the plurality of target gray scale brightness. Figure 8

[0092] Then, through linear interpolation calculation, all coupling pressure drop values AV of gray scale brightness 1-255 are obtained, and the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 corresponding to all gray scale brightness is calculated according to the coupling pressure drop value AV. When driving frame by frame, the polarity and output frame number of the gray scale voltage Da corresponding to each pixel unit 10 are controlled to eliminate internal electric field and display residual image and improve display effect.

[0093] The optimal common electrode voltage can be obtained by theoretical calculation or actual measurement. In an optional embodiment, as shown in FIG. 12, S50 further includes: Figure 9

[0094] S70, measuring the flicker value of the gray scale voltage Da of the plurality of target gray scale brightness in turn.

[0095] S80, adjusting the size of the common electrode voltage Vcom until each flicker value is minimum, and setting each common electrode voltage Vcom corresponding to each minimum flicker value as the optimal common electrode voltage corresponding to the plurality of target gray scale brightness.

[0096] ​​​In this embodiment, the flicker value is measured and adjusted for multiple target gray scale brightnesses. For each target gray scale brightness, the size of the common electrode voltage Vcom is adjusted, and the flicker value is measured. When the flicker value is the smallest, the corresponding common electrode voltage Vcom at this time is the optimal common electrode voltage for the current target gray scale brightness. Through multiple measurements and adjustments, multiple optimal common electrode voltages corresponding to multiple target gray scale brightnesses can be obtained, so that the coupling voltage drop value AV corresponding to each target gray scale brightness can be further obtained.

[0097] When the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 corresponding to a pixel unit 10 is determined, a preset number of positive polarity gray scale voltages V1 and another preset number of positive polarity gray scale voltages V1 can be continuously output in a frame period in the above manner. However, for liquid crystals, continuously outputting multiple frames of gray scale voltages Da of the same polarity is easy to cause polarization of the liquid crystals.

[0098] In order to avoid polarization of the liquid crystals, in an optional embodiment, as shown in FIG. 3, S30 includes: Figure 10

[0099] S31, taking m+n frames as an output period, the ratio of m and n is equal to the output frame number ratio;

[0100] S32, alternately outputting m1 frames of positive polarity gray scale voltages V1 and n1 frames of negative polarity gray scale voltages V2 to the corresponding pixel unit 10, and sequentially outputting m2 frames of positive polarity gray scale voltages V1 and n2 frames of negative polarity gray scale voltages V2 to the corresponding pixel unit 10 at the end, wherein m1+m2=m, n1+n2=n, m1 and n1 are greater than or equal to 1, and m2 and n2 are greater than or equal to 0.

[0101] Taking corresponding data as an example, assuming that the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 is m / n, m is 5, and n is 3. At this time, m1 can be 2, n1 can be 1, m2 can be 1, and n2 can be 1. That is, taking 8 frames as a period, in the period, two frames of positive polarity gray scale voltages V1 are continuously output first, then one frame of negative polarity gray scale voltage V2 is output, then two frames of positive polarity gray scale voltages V1 are continuously output, then one frame of negative polarity gray scale voltage V2 is output, and then one frame of positive polarity gray scale voltage V1 and one frame of negative polarity gray scale voltage V2 are output. By alternately outputting the positive and negative gray scale voltages Da according to the output frame number, polarization of the liquid crystals is avoided, wherein m1 and n1 can be as small as possible.

[0102] It should be understood that the size of the serial number of each step in the above embodiment does not mean the order of execution. The execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0103] ​Compared with the prior art, the driving method of the display panel 100 has the beneficial effects that: first, the display screen information of the display panel 100 is acquired; when the display time of the same screen information exceeds the preset time, the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of each pixel unit 10 is determined according to the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2 and the coupling voltage drop value AV of each pixel unit 10 corresponding to the gray scale luminance and the common electrode voltage Vcom; and the output frame number ratio is used to switch the output of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 with different frame numbers respectively, so that the display time of the positive polarity gray scale voltage V1 is greater than the display time of the negative polarity gray scale voltage V2, the total mobile charge under the positive polarity gray scale voltage V1 is equal to the number of mobile charges under the negative polarity gray scale voltage V2, the internal electric field and the display residual image are eliminated, and the display effect is improved.

[0104] Embodiment two

[0105] Corresponding to the driving method of the display panel 100 as shown in Figure 11 The second aspect of the embodiment of the present application proposes a display panel driving circuit 200, which comprises a source driving circuit 210, a gate driving circuit 220 and a timing controller 230.

[0106] The timing controller 230 is configured to:

[0107] output a row scanning control signal OE to control the gate driving circuit 220 to output a row scanning signal Ga to the display panel 100 row by row; and

[0108] output a plurality of first polarity control signals IS to control the source driving circuit 210 to output the corresponding frame number of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 according to the output frame number ratio, or output a second polarity control signal POL to control the source driving circuit 210 to alternately output the corresponding positive polarity gray scale voltage V1 and negative polarity gray scale voltage V2 to the corresponding pixel unit 10 in adjacent frames based on the driving method of the display panel 100.

[0109] In this embodiment, the timing controller 230 serves as the control subject and performs screen detection, voltage detection, optimal common electrode voltage calculation, coupling voltage drop value calculation and output frame number calculation according to the driving method of the display panel 100. When the timing controller 230 outputs a row scanning control signal OE to control the gate driving circuit 220 to output a row scanning signal Ga to the display panel 100, the timing controller 230 synchronously controls the source driving circuit 210 to output the corresponding frame number of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 according to the output frame number ratio of the gray scale voltage Da of the determined positive and negative polarity.

[0110] When it is detected that the display panel 100 displays the same display screen for a long time, the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2, the coupling voltage drop value AV and the common electrode voltage Vcom corresponding to the current gray scale luminance of the corresponding pixel unit 10 are obtained, and the frame number ratio of the output frame number of the positive polarity gray scale voltage V1 and the output frame number of the negative polarity gray scale voltage V2 is determined according to the four parameters. After the output frame number ratio of the positive and negative gray scale voltages Da of the corresponding pixel unit 10 is determined, a first polarity control signal IS is output to each pixel unit 10 to control the source driving circuit 210 to change the polarity of the gray scale voltage Da of the corresponding pixel unit 10 in each frame according to the output frame number ratio when the source driving circuit 210 continuously outputs the gray scale voltage Da to the pixel unit 10 for multiple frames.

[0111] For example, when it is detected that the display panel 100 displays the same display screen for a long time, the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of the first pixel unit is determined to be 2:1, and the output frame number ratio of the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 of the second pixel unit is determined to be 3:1. Then, when the source driving circuit 210 outputs the gray scale voltage, the timing controller 230 synchronously outputs two first polarity control signals IS, which are high level at this time, to convert the gray scale voltage Da of the first pixel unit and the second pixel unit to the positive polarity gray scale voltage V1 in the first frame and the second frame. Then, in the third frame, the two first polarity control signals IS are low level and high level respectively, which converts the gray scale voltage Da of the first pixel unit to the negative polarity gray scale voltage V2 and converts the gray scale voltage Da of the second pixel unit to the positive polarity gray scale voltage V1. Then, in the fourth frame, the two first polarity control signals IS are high level and low level respectively, which converts the gray scale voltage of the first pixel unit to the positive polarity gray scale voltage V1 and converts the gray scale voltage of the second pixel unit to the negative polarity gray scale voltage V2. In this way, the polarity of the gray scale voltage Da of the first pixel unit changes according to the output frame number ratio of 2:1, and the polarity of the gray scale voltage Da of the second pixel unit changes according to the output frame number ratio of 3:1.

[0112] By increasing the output frame number of the positive polarity gray scale voltage V1 and increasing the output time of the positive polarity gray scale voltage V1, the total number of mobile charges corresponding to the positive polarity gray scale voltage V1 is increased, so that the number of mobile charges under the positive polarity gray scale voltage V1 is equal to the number of mobile charges under the negative polarity gray scale voltage V2, the internal electric field and the display residual image are eliminated, and the display effect of the display panel 100 is improved.

[0113] Meanwhile, when it is detected that the display panel 100 displays the same picture for less than the preset time, it is determined that there is no internal electric field and no display residual image at present. At this time, when the source driving circuit 210 continuously outputs the gray scale voltage Da to the corresponding pixel unit 10 for multiple frames, a second polarity control signal POL is output to control the source driving circuit 210 to alternately output the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 to the corresponding pixel unit 10 in the frame inversion mode, so that the gray scale voltage Da of the corresponding pixel unit 10 alternately changes to the positive polarity gray scale voltage V1 and the negative polarity gray scale voltage V2 in each frame.

[0114] Correspondingly, when the source driving circuit 210 is controlled to work, on the one hand, the source driving circuit 210 needs to be controlled to output work, and on the other hand, the polarity needs to be switched in the corresponding frame. Therefore, in an optional embodiment, the timing controller 230 is specifically used for:

[0115] In the corresponding frame, when the output row scanning control signal OE is output to control the gate driving circuit 220 to output a row scanning signal to the corresponding row of pixel units 10, the data transmission control signal TP is output to control the source driving circuit 210 to latch and output the gray scale voltage Da of each pixel unit 10 in the current row;

[0116] Based on the above-mentioned driving method of the display panel 100, the source driving circuit 210 is controlled to output multiple gray scale voltages Da of corresponding polarities to each corresponding pixel unit 10 in the current row based on the output of the multiple first polarity control signals IS or the second polarity control signal POL.

[0117] In the embodiment, when the gate driving circuit 220 is controlled to scan each row of pixel units 10, the timing controller 230 first outputs the data transmission control signal to control the source driving circuit 210 to start working. When the rising edge of the data transmission control signal TP is input, the source driving circuit 210 latches the input gray scale voltage Da, and when the falling edge of the data transmission control signal TP is input, the source driving circuit 210 outputs the gray scale voltage Da required by the current multiple pixel units 10.

[0118] Meanwhile, the polarity of the gray scale voltage Da received by each pixel unit 10 in each frame is determined according to the output frame number ratio of the positive and negative polarity gray scale voltages determined by the driving method of the display panel 100, and the multiple first polarity control signals IS or the second polarity control signal POL is output according to the polarity of the gray scale voltage Da, and the source driving circuit 210 is controlled to output the gray scale voltage Da of the corresponding polarity of each pixel unit 10 in each frame.

[0119] The data transmission control signal TP is outputted in sequence after the line scanning signal in each frame. When the gate driving circuit 220 outputs a line scanning signal, the source driving circuit 210 receives a data transmission control signal TP and outputs the gray scale voltage Da of the corresponding polarity of the current line.

[0120] The data transmission control signal TP is the trigger signal of the first polarity control signal IS. After determining the polarity of the gray scale voltage Da of the plurality of pixel units 10 of each line in each frame, when the timing controller 230 receives a data transmission control signal TP, the timing controller 230 outputs a plurality of first polarity control signals IS to the source driving circuit 210, so that the source driving circuit 210 switches or maintains the polarity of each pixel unit 10 of the current line. Then, when scanning to the next line and receiving the next data transmission control signal TP, the timing controller 230 outputs a plurality of first polarity control signals IS to the source driving circuit 210 again, so that the source driving circuit 210 switches or maintains the polarity of each pixel unit 10 of the next line.

[0121] The source driving circuit 210 can be composed of a single driving circuit and a flip chip thin film. In an optional embodiment, as shown in FIG. 2B, the source driving circuit 210 includes: Figure 12

[0122] The data buffer 211 is used to store a plurality of first polarity control signals IS or a second polarity control signal POL corresponding to each line of pixel units 10 when scanning line by line, and output a plurality of first polarity control signals IS or a second polarity control signal POL when receiving a data transmission control signal TP;

[0123] The plurality of driving units 212 are connected with one data line of the display panel 100. Each driving unit 212 includes a selection switch 11, a positive polarity digital-to-analog converter 12 and a negative polarity digital-to-analog converter 13.

[0124] The input end of the selection switch 11 is used to input the gray scale voltage Da. The first output end of the selection switch 11 is connected with the input end of the positive polarity digital-to-analog converter 12. The second output end of the selection switch 11 is connected with the input end of the negative polarity digital-to-analog converter 13. The output end of the positive polarity digital-to-analog converter 12 and the output end of the negative polarity digital-to-analog converter 13 are connected with the corresponding data line. The data buffer 211 is connected with the control end of the selection switch 11 of the plurality of driving units 212 respectively.

[0125] ​The selection switch 11 is used for connecting the input end and the first output end of the selection switch 11 or connecting the input end and the second output end of the selection switch 11 according to the received first polarity control signal IS, so as to transmit the gray scale voltage Da to the positive polarity digital-to-analog converter 12 and the negative polarity digital-to-analog converter 13 respectively according to the output frame number ratio, or alternatively connect the input end to the first output end and the second output end in adjacent frames according to the received second polarity control signal POL.

[0126] The positive polarity digital-to-analog converter 12 is used for converting the gray scale voltage Da into a positive polarity gray scale voltage V1.

[0127] The negative polarity digital-to-analog converter 13 is used for converting the gray scale voltage Da into a negative polarity gray scale voltage V2.

[0128] In the embodiment, the source driving circuit 210 is composed of a plurality of thin film flip chips, one data buffer 211 and a plurality of driving units 212 are arranged in one thin film flip chip, the data buffer 211 is connected with the plurality of driving units 212, the driving unit 212 is connected with one data line, the driving unit 212 can receive the input gray scale voltage Da and output the gray scale voltage Da with corresponding polarity switching.

[0129] When the timing controller 230 detects that the display panel 100 displays the same display screen for a long time, the positive polarity gray scale voltage V1, the negative polarity gray scale voltage V2, the coupling voltage drop value AV and the common electrode voltage Vcom corresponding to the current gray scale luminance of the corresponding pixel unit 10 are obtained, and the frame number ratio of the output frame number of the positive polarity gray scale voltage V1 and the output frame number of the negative polarity gray scale voltage V2 is determined according to the four parameters.

[0130] After the output frame number ratio of the positive and negative gray scale voltages Da of the corresponding pixel unit 10 is determined, the first polarity control signal IS of the corresponding level is switched to the data buffer 211 of the corresponding driving unit in the corresponding frame, the data buffer 211 buffers data, and the first polarity control signal IS of the current corresponding level is output after receiving the data transmission control signal TP, so as to control the driving unit 212 to change the polarity of the gray scale voltage Da of the corresponding pixel unit 10 in each frame according to the output frame number ratio.

[0131] Specifically, when driving each pixel unit 10 in a corresponding row of a frame, the timing controller 230 first outputs multiple first polarity control signals IS to the data buffer 211 according to the polarity of the grayscale voltage Da determined in the current frame, and then outputs a data transmission control signal IS to the data buffer 211. The data buffer 211 outputs the multiple first polarity control signals IS to the selection switches 11 of multiple driving units 212 respectively. The selection switches 11 transmit the input grayscale voltage Da to the corresponding positive polarity digital-to-analog converter 12 or negative polarity digital-to-analog converter 13, and convert and output the positive polarity grayscale voltage V1 or the negative polarity grayscale voltage V2 to the corresponding pixel unit 10 connected to the grayscale voltage of the current row, and drive the pixel unit 10 to display the corresponding screen information.

[0132] like Figure 13 As shown, assuming that the timing controller 230 determines the grayscale voltage Da of the pixel unit 10 in the first, second and third columns of the i-th row in the current frame as positive, negative and negative respectively, and the grayscale voltage Da of the pixel unit 10 in the first, second and third columns of the i+1-th row as negative, negative and positive respectively.

[0133] When scanning to the i-th row, the timing controller 230 first outputs a first polarity control signal IS1, a second polarity control signal IS2, and a third polarity control signal IS3 to the data buffer 211. The data buffer 211 stores the polarity control signal corresponding to the pixel unit 10 in the current row. The first polarity control signal IS1, the second polarity control signal IS2, and the third polarity control signal IS3 are high, low, and low, respectively. When scanning to the i-th row, when the data buffer 211 receives the data transmission control signal TP, it transmits the first polarity control signal IS1, the second polarity control signal IS2, and the third polarity control signal IS3 to the data buffer connected to the first column and the second column. The pixel units 10 in the first and third columns are connected to the selection switches 11 of the three driving units 212. The first selection switch 11 is connected to its own input terminal and first output terminal. The grayscale voltage Da is transmitted to the positive polarity digital-to-analog converter 12, converted into a positive grayscale voltage V1, and transmitted to the pixel unit 10 in the first column of the i-th row. The second selection switch 11 is connected to its own input terminal and second output terminal. The grayscale voltage Da is transmitted to the negative polarity digital-to-analog converter 13, converted into a negative grayscale voltage V2, and transmitted to the pixel unit 10 in the second column of the i-th row. The third selection switch 11 is connected to its own input terminal and second output terminal. The grayscale voltage Da is transmitted to the negative polarity digital-to-analog converter 13, converted into a negative grayscale voltage V2, and transmitted to the pixel unit 10 in the third column of the i-th row.

[0134] Then when scanning to the i+1th row, the timing controller 230 outputs the first polarity control signal IS1 of the first path, the second polarity control signal IS2 of the second path and the third polarity control signal IS3 of the third path to the data buffer 211 respectively, the data buffer 211 stores the polarity control signal corresponding to the pixel unit 10 of the i+1th row, the first polarity control signal IS1 of the first path, the second polarity control signal IS2 of the second path and the third polarity control signal IS3 of the third path are low level, low level and high level respectively, when scanning to the i+1th row, the data buffer 211 receives the next path of the data transmission control signal TP, and transmits the first polarity control signal IS1 of the first path, the second polarity control signal IS2 of the second path and the third polarity control signal IS3 of the third path to the selection switch 11 connected with the three driving units 212 of the pixel unit 10 of the first column, the second column and the third column, the first selection switch 11 connects the input end and the second output end, the gray scale voltage Da is transmitted to the negative polarity digital-to-analog converter 13 to convert the negative polarity gray scale voltage V2 and is transmitted to the pixel unit 10 of the first column of the i+1th row, the second selection switch 11 connects the input end and the second output end, the gray scale voltage Da is transmitted to the negative polarity digital-to-analog converter 13 to convert the negative polarity gray scale voltage V2 and is transmitted to the pixel unit 10 of the second column of the i+1th row, the third selection switch 11 connects the input end and the first output end, the gray scale voltage Da is transmitted to the positive polarity digital-to-analog converter 12 to convert the positive polarity gray scale voltage V1 and is transmitted to the pixel unit 10 of the third column of the i+1th row.

[0135] The selection switch 11 can select the corresponding analog switch of single input multiple output, or adopt two switches, for example, when adopting the first switch and the second switch, the first ends of the first switch and the second switch are connected and used for inputting the gray scale voltage Da, the second end of the first switch is connected with the positive polarity digital-to-analog converter 12, and the second end of the second switch is connected with the negative polarity digital-to-analog converter 13, when receiving the high level first polarity control signal, the first switch is controlled to be turned on, the second switch is controlled to be turned off, the gray scale voltage Da is transmitted to the positive polarity digital-to-analog converter 12 and is converted into the positive polarity gray scale voltage V1, when receiving the low level first polarity control signal, the first switch is controlled to be turned off, the second switch is controlled to be turned on, the gray scale voltage Da is transmitted to the negative polarity digital-to-analog converter 13 and is converted into the negative polarity gray scale voltage V2.

[0136] Simultaneously, when it is detected that the display panel 100 displays the same image for no more than a preset time, it is determined that there will be no internal electric field or display afterimage. At this time, when the timing controller 230 controls the source drive circuit 210 to continuously output grayscale voltage Da to the corresponding pixel unit 10 for multiple frames, it outputs a second polarity control signal POL to the data buffer 211. The data buffer 211 buffers data and, upon receiving the data transmission control signal TP, outputs the second polarity control signal POL corresponding to the current level. The second polarity control signal POL switches its level state frame by frame; for example, it is high in the first frame and low in the next frame. When the selector switch 11 receives a high-level second polarity control signal POL, it switches between its input terminal and its first output terminal. The positive polarity digital-to-analog converter 12 converts and outputs a positive polarity grayscale voltage V1 to the pixel unit 10 corresponding to the current row. When the selector switch 11 receives a low-level second polarity control signal POL, it switches between its input terminal and its second output terminal. The negative polarity digital-to-analog converter 13 converts and outputs a negative polarity grayscale voltage V2 to the pixel unit 10 corresponding to the current row. Thus, the positive polarity grayscale voltage V1 and the negative polarity grayscale voltage V2 are alternately output to the pixel unit 10 of the corresponding row frame by frame according to the frame flipping mode.

[0137] Example 3

[0138] A third aspect of the present invention provides a display device, such as... Figure 11 As shown, the display device includes a display panel 100 and a driving circuit 200 for the display panel. The specific structure of the driving circuit 200 for the display panel is as described in the above embodiments. Since this display device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here. The driving circuit 200 for the display panel is connected to the display panel 100.

[0139] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A driving method of a display panel, the display panel comprising a plurality of pixel units arranged in an array, a plurality of data lines and a plurality of scan lines, each pixel unit being connected to one data line and one scan line; the driving method comprising: obtaining display image information of the display panel; when the display panel displays the same image information for more than a preset time, determining an output frame number ratio of a positive polarity gray scale voltage and a negative polarity gray scale voltage of each pixel unit according to the positive polarity gray scale voltage, the negative polarity gray scale voltage and a coupling voltage drop value corresponding to a gray scale brightness of each pixel unit and a common electrode voltage, wherein the coupling voltage drop value is a coupling change difference of the gray scale voltage of the data line when a row scan signal input to the scan line corresponding to the pixel unit changes; and switching output of the positive polarity gray scale voltage and the negative polarity gray scale voltage to the corresponding pixel units with different frame numbers respectively according to the output frame number ratio; wherein the determining of the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of each pixel unit according to the positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling voltage drop value corresponding to a gray scale brightness of each pixel unit and the common electrode voltage comprises: obtaining the positive polarity gray scale voltage, the negative polarity gray scale voltage and the coupling voltage drop value corresponding to a gray scale brightness of each pixel unit, and obtaining the common electrode voltage of the display panel; and determining the output frame number ratio of the positive polarity gray scale voltage and the negative polarity gray scale voltage of each pixel unit according to a ratio of a first difference value and a second difference value, wherein the first difference value is an absolute value of the positive polarity gray scale voltage minus the coupling voltage drop value and the common electrode voltage, and the second difference value is an absolute value of the negative polarity gray scale voltage minus the coupling voltage drop value and the common electrode voltage; and wherein the driving method further comprises: when the display panel displays the same image information for less than the preset time, alternately outputting the positive polarity gray scale voltage and the negative polarity gray scale voltage to the corresponding pixel units in adjacent frames; and wherein the driving method further comprises, before the obtaining of the display image information of the display panel: determining a coupling voltage drop value corresponding to each of a plurality of target gray scale brightnesses based on a difference between an optimal common electrode voltage of the plurality of target gray scale brightnesses and an initial common electrode voltage of the display panel; and performing linear interpolation calculation on the coupling voltage drop values corresponding to the plurality of target gray scale brightnesses to determine a coupling voltage drop value corresponding to each gray scale brightness of the display panel; and wherein the determining of the coupling voltage drop value corresponding to each of the plurality of target gray scale brightnesses based on the difference between the optimal common electrode voltage of the plurality of target gray scale brightnesses and the initial common electrode voltage of the display panel further comprises: sequentially measuring a flicker value of the gray scale voltage of each of the plurality of target gray scale brightnesses; adjusting a size of the common electrode voltage until each flicker value is minimized; and setting each common electrode voltage corresponding to each minimum flicker value as the optimal common electrode voltage corresponding to each of the plurality of target gray scale brightnesses; and wherein the switching output of the positive polarity gray scale voltage and the negative polarity gray scale voltage to the corresponding pixel units with different frame numbers respectively according to the output frame number ratio comprises: taking m+n frames as one output period, wherein a ratio of m to n is equal to the output frame number ratio. characterized in that ​ ​ ​ ​ ​ ​ ​ 2. The driving method of a display panel according to claim 1, wherein ​ ​ 3. The driving method of a display panel according to claim 1, wherein ​ ​ ​ 4. The driving method of a display panel according to claim 3, wherein ​ ​ ​ 5. The driving method of a display panel according to claim 1, wherein ​ ​ Alternately output m1 frames of the positive polarity gray scale voltage and n1 frames of the negative polarity gray scale voltage to the corresponding pixel units, and finally output m2 frames of the positive polarity gray scale voltage and n2 frames of the negative polarity gray scale voltage to the corresponding pixel units in sequence, wherein m1+m2=m, n1+n2=n, m1 and n1 are greater than or equal to 1, and m2 and n2 are greater than or equal to 0.

6. A drive circuit of a display panel, characterized by comprising: The display panel comprises a source driving circuit, a gate driving circuit and a timing controller. The timing controller is configured to: output a row scanning control signal to control the gate driving circuit to output a row scanning signal to the display panel row by row; and output a plurality of first polarity control signals or a second polarity control signal to control the source driving circuit to output a plurality of gray scale voltages of corresponding polarities to each corresponding pixel unit in the current row based on the driving method of the display panel according to any one of claims 1-5.

7. The driving circuit of a display panel according to claim 6, wherein The timing controller is specifically configured to: output a data transmission control signal to control the source driving circuit to output the gray scale voltage of each pixel unit in the current row when the row scanning control signal is output to control the gate driving circuit to output the row scanning signal to the corresponding row of pixel units in the corresponding frame. The source driving circuit comprises:

8. The driving circuit of a display panel according to claim 7, wherein a data buffer configured to store a plurality of the first polarity control signals or the second polarity control signal corresponding to each row of pixel units when scanning row by row, and output the plurality of the first polarity control signals or the second polarity control signal when the data transmission control signal is received; a plurality of driving units, each driving unit being connected to a data line of the display panel, and each driving unit comprising a selection switch, a positive polarity digital-to-analog converter and a negative polarity digital-to-analog converter; an input end of the selection switch is configured to input a gray scale voltage, a first output end of the selection switch is connected to an input end of the positive polarity digital-to-analog converter, a second output end of the selection switch is connected to an input end of the negative polarity digital-to-analog converter, an output end of the positive polarity digital-to-analog converter and an output end of the negative polarity digital-to-analog converter are connected to the corresponding data line, and the data buffer is connected to control ends of the selection switches of the plurality of driving units, respectively. ​ The selection switch is configured to connect the input end and the first output end of the selection switch according to the received first polarity control signal, or connect the input end and the second output end of the selection switch according to the received second polarity control signal, so as to transmit the gray scale voltage to the positive polarity digital-to-analog converter and the negative polarity digital-to-analog converter according to the output frame number ratio, or alternately connect the input end, the first output end and the second output end in adjacent frames according to the received second polarity control signal. The positive polarity digital-to-analog converter is configured to convert the gray scale voltage into the positive polarity gray scale voltage. The negative polarity digital-to-analog converter is configured to convert the gray scale voltage into the negative polarity gray scale voltage.

9. A display device, characterized by comprising: The display panel and the driving circuit of the display panel according to any one of claims 6-8 are connected.

Images