Back contact cells and photovoltaic modules

Abstract

The embodiment of the present application relates to the photovoltaic field, and provides a back contact cell and a photovoltaic module to improve the yield of the back contact cell. The back contact cell comprises a substrate and a first grid line and a second grid line arranged in a central ring on the substrate, the first grid line and the second grid line are a Huazi-shaped grid line; a first main grid line is electrically connected with a first connecting segment of the first grid line and a second connecting segment of N1 first grid lines, the orthographic projection of the first main grid line on the substrate overlaps with the first connecting segment, and a first overlap ratio is greater than 90%; a second main grid line is electrically connected with a third connecting segment of the second grid line and a fourth connecting segment of M1 second grid lines, the orthographic projection of the second main grid line on the substrate overlaps with the third connecting segment, and a second overlap ratio is greater than 90%; and an insulating glue is located between the first main grid line and the fourth connecting segment and between the second main grid line and the second connecting segment.

Description

Technical Field

[0001] This application relates to the photovoltaic field, and in particular to a back-contact battery and a photovoltaic module. Background Technology

[0002] Currently, with the gradual depletion of fossil fuels, solar cells are becoming increasingly widely used as a new energy alternative. A solar cell is a device that converts sunlight into electrical energy. Solar cells utilize the photovoltaic principle to generate charge carriers, which are then extracted using electrodes, thus facilitating the efficient utilization of electrical energy.

[0003] Current solar cells mainly include IBC cells (Interdigitated Back Contact), TOPCON (Tunnel Oxide Passivated Contact) cells, PERC cells (Passivated emitter and real cell), and heterojunction cells. Different film layer configurations and functional limitations are used to reduce optical losses and decrease photogenerated carrier recombination on and within the silicon substrate, thereby improving the photoelectric conversion efficiency of solar cells.

[0004] In the process of assembling solar cells into strings, the entire cell is typically slicing into pieces, and then assembling these pieces into strings. This helps reduce encapsulation losses, optimize processes in module manufacturing, improve module reliability, and also helps reduce manufacturing costs. However, this technology also brings some new challenges and problems, requiring further optimization and improvement. Summary of the Invention

[0005] This application provides a back-contact battery and a photovoltaic module, which at least helps to improve the photoelectric conversion efficiency of the back-contact battery.

[0006] According to some embodiments of this application, one embodiment of this application provides a back contact battery, comprising: a substrate; N first grid lines and M second grid lines located on the substrate, wherein the conductivity types of the first grid lines and the second grid lines are opposite, the first grid lines are U-shaped grid lines, and the first grid lines include a first connecting segment and a second connecting segment; the second grid lines are U-shaped grid lines, and the second grid lines include a third connecting segment and a fourth connecting segment; the first grid lines and the second grid lines are arranged in a centrally encircling manner; a first main grid line located on the substrate, the first main grid line being electrically connected to the first connecting segment of one of the first grid lines and the N1 first grid lines... The second connecting segment is electrically connected, and the orthographic projection of the first main grid line on the substrate overlaps with the first connecting segment, with a first overlap ratio greater than 90%; the second main grid line is located on the substrate, and is electrically connected to the third connecting segment of one of the second grid lines and to the fourth connecting segments of M1 of the second grid lines, with the orthographic projection of the second main grid line on the substrate overlapping with the third connecting segment, with a second overlap ratio greater than 90%; the insulating adhesive is located between the first main grid line and the fourth connecting segment, and between the second main grid line and the second connecting segment; wherein, N and M are positive integers, and M1 and N1 are 0 or positive integers.

[0007] In some embodiments, the substrate includes a first region and a second region, with at least a portion of the second connection segment located in the first region and at least a portion of the fourth connection segment located in the second region; it also includes: a first intrinsic semiconductor layer located in the first region; a first doped semiconductor layer located on the surface of the first intrinsic semiconductor layer; a first transparent conductive layer located on the surface of the first doped semiconductor layer; the second connection segment being electrically connected to the first transparent conductive layer; and the insulating adhesive being located between the first transparent conductive layer and the second main gate line.

[0008] In some embodiments, the system further includes: a second intrinsic semiconductor layer located in the second region; a second doped semiconductor layer located on the surface of the second intrinsic semiconductor layer; a second transparent conductive layer located on the surface of the second doped semiconductor layer; the fourth connecting segment electrically connected to the second transparent conductive layer; the insulating adhesive also located between the second transparent conductive layer and the first main gate line; or, a tunneling dielectric layer located in the second region; a third doped semiconductor layer located on the surface of the tunneling dielectric layer; and the fourth connecting segment electrically connected to the second doped semiconductor layer.

[0009] In some embodiments, the back contact battery includes a tunneling dielectric layer and a second doped semiconductor layer; it also includes a third transparent conductive layer located on the surface of the third doped semiconductor layer; the fourth connecting segment is electrically connected to the third transparent conductive layer; and the insulating adhesive is also located between the third transparent conductive layer and the first main grid line.

[0010] In some embodiments, a first main gate line is electrically connected to a first connecting segment of the first gate line; a second main gate line is electrically connected to a third connecting segment; N1 equals 0, M1 equals 0.

[0011] In some embodiments, the system further includes: a passivation layer located on the substrate; the first gate line and the second gate line located on the passivation layer; the second connection segment and the fourth connection segment penetrating the thickness of the passivation layer; and the first connection segment and the third connection segment located on the surface of the passivation layer.

[0012] In some embodiments, the insulating adhesive is made of silicone, polyolefin elastomer hot melt adhesive, and epoxy resin.

[0013] In some embodiments, one of the second connecting segment or the fourth connecting segment includes a straight grid line, a broken grid line, a wavy grid line, or an arc grid line.

[0014] In some embodiments, the substrate includes an edge region and a central region; the first gate line includes a first edge gate line located in the edge region and a first central gate line located in the central region, the first edge gate line including a first connecting segment and a second connecting segment; the first main gate line is electrically connected to the first central gate line; the second gate line includes a second edge gate line located in the edge region and a second central gate line located in the central region, the second edge gate line including a third connecting segment and a fourth connecting segment; the second main gate line is electrically connected to the second central gate line; the first central gate line and the second central gate line are alternately arranged along a first direction; the insulating adhesive is also located between the second central gate line and the first main gate line and between the first central gate line and the second main gate line.

[0015] In some embodiments, the total area of ​​the first gate line accounts for 40% to 50%; the total area of ​​the second gate line accounts for 50% to 60%.

[0016] According to some embodiments of this application, another aspect of this application provides a photovoltaic module, including: a battery string, formed by connecting a plurality of back-contact batteries as described in any of the above embodiments; an encapsulating film for covering the surface of the battery string; and a cover plate for covering the surface of the encapsulating film away from the battery string.

[0017] The technical solution provided in this application has at least the following advantages:

[0018] The back contact battery provided in this application embodiment has an overlap area of ​​>90% between the first main grid line and the first connecting segment, and an overlap area of ​​>90% between the second main grid line and the third connecting segment. The first main grid line almost completely covers the first connecting segment of the first grid line, reducing the shading of the main grid line and improving the welding performance between them. Furthermore, the first main grid line and the first connecting segment are highly overlapped, and the second main grid line and the second connecting segment are highly overlapped, minimizing the area requiring insulation adhesive for isolation in physical space. The insulation adhesive only needs to cover the minimal overlap or gap area between the edge of the main grid line and adjacent, non-target connecting segments where a short circuit risk may occur.

[0019] This solution improves the welding performance with the main grid by setting a larger overlap ratio, and sets the first grid line and the second grid line into a U-shape, lengthening the length of each fine grid and reducing the cross-sectional area of ​​the fine grid to reduce the volume resistivity; it can also improve the problems of high resistivity, poor welding performance with the main grid and long curing time caused by low temperature slurry. Attached Figure Description

[0020] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a back contact battery provided in an embodiment of this application;

[0022] Figure 2 A schematic diagram of the structure of a first grid line and a second grid line in a back contact battery provided in an embodiment of this application;

[0023] Figure 3 This is a schematic diagram of another structure of a back contact battery provided in an embodiment of this application;

[0024] Figure 4 A cross-sectional view of a back contact battery provided in an embodiment of this application;

[0025] Figure 5 Another cross-sectional view of a back contact battery provided in an embodiment of this application;

[0026] Figure 6 This application provides a schematic diagram of the structure of a photovoltaic module according to one embodiment.

[0027] Explanation of reference numerals in the attached figures:

[0028] 10, Solar cell; 11, Second zone; 12, First zone; 110, First grid line; 111, First connecting segment; 112, Second connecting segment; 120, Second grid line; 121, Third connecting segment; 122, Fourth connecting segment; 131, First main grid line; 132, Second main grid line; 141, First insulating adhesive; 142, Second insulating adhesive;

[0029] 200, Substrate; 205, Passivation layer; 211, Tunneling dielectric layer; 212, Third doped semiconductor layer; 213, First intrinsic semiconductor layer; 214, First doped semiconductor layer; 215, First transparent conductive layer; 216, Third transparent conductive layer; 221, Second intrinsic semiconductor layer; 222, Second doped semiconductor layer; 223, Second transparent conductive layer;

[0030] 30, Solar cell; 302, Connecting component; 31, Encapsulating film; 32, Cover plate. Detailed Implementation

[0031] As can be seen from the background technology, the current yield of back contact batteries is poor and the photoelectric conversion efficiency is poor.

[0032] This application provides a back-contact battery to reduce the area of ​​insulating adhesive, thereby improving a series of problems caused by insulating adhesive and increasing the photoelectric conversion efficiency of solar cells.

[0033] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0034] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0035] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. In addition, the character " / " in this document generally indicates that the related objects before and after it have an "or" relationship.

[0036] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0037] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0038] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0039] In the accompanying drawings corresponding to the embodiments of this application, the thickness and area of ​​the layers are enlarged for better understanding and ease of description. When describing a component (such as a layer, film, region, or substrate) on or on the surface of another component, the component may be "directly" located on the surface of the other component, or there may be a third component between the two components. Conversely, when describing a component on the surface of another component, or when another component is formed or disposed on the surface of a component, it indicates that there is no third component between the two components. Furthermore, when describing a component as being "generally" formed on another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a portion of the edge of the entire surface.

[0040] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on / located" on another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may be present therein. Moreover, when a component such as a layer, film, region, or plate is "directly located" on another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it indicates that no other components are located therein.

[0041] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "part" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0042] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0043] According to some embodiments of this application, one aspect of this application provides a back contact battery for improving the yield of back contact batteries and increasing photoelectric conversion efficiency.

[0044] Figure 1 This is a schematic diagram of a back contact battery provided in an embodiment of this application; Figure 2 This is a schematic diagram of the structure of a first grid line and a second grid line in a back contact battery according to an embodiment of this application.

[0045] refer to Figure 1 and Figure 2The back contact battery includes: a substrate; N first grid lines 110 and M second grid lines 120 located on the substrate, wherein the conductivity types of the first grid lines 110 and the second grid lines 120 are opposite; the first grid lines 110 are U-shaped grid lines, and each first grid line 110 includes a first connecting segment 111 and a second connecting segment 112; the second grid lines 120 are U-shaped grid lines, and each second grid line 120 includes a third connecting segment 121 and a fourth connecting segment 122; the first grid lines 110 and the second grid lines 120 are arranged in a centrally encircling manner; a first main grid line 131 located on the substrate, the first main grid line 131 being electrically connected to the first connecting segment 111 of one of the first grid lines 110 and the second connecting segment 122 of the N1 first grid lines 110. Connecting segment 112 is electrically connected, and the orthographic projection of the first main grid line 131 on the substrate overlaps with the first connecting segment 111, with a first overlap ratio greater than 90%; second main grid line 132 is located on the substrate, and the second main grid line 132 is electrically connected to the third connecting segment 121 of one of the second grid lines 120 and to the fourth connecting segment 122 of M1 second grid lines 120, and the orthographic projection of the second main grid line 132 on the substrate overlaps with the third connecting segment 121, with a second overlap ratio greater than 90%; insulating adhesive is located between the first main grid line 131 and the fourth connecting segment 122, and between the second main grid line 132 and the second connecting segment 112; wherein, N and M are positive integers, and M1 and N1 are 0 or positive integers.

[0046] The back contact battery provided in this application embodiment has an overlap area of ​​>90% between the first main grid line 131 and the first connecting segment 111, and an overlap area of ​​>90% between the second main grid line 132 and the third connecting segment 121. The first main grid line 131 almost completely covers the first connecting segment 111 of the first grid line 110, reducing the shading of the main grid line and improving the welding performance between them. Furthermore, the first main grid line 131 and the first connecting segment 111 are highly overlapped, and the second main grid line 132 and the second connecting segment 112 are highly overlapped, minimizing the area requiring insulation adhesive for isolation in physical space. The insulation adhesive only needs to cover the minimal overlap or gap area between the edge of the main grid line and adjacent, non-target connecting segments where a short circuit risk may occur.

[0047] This solution improves the welding performance with the main grid by setting a larger overlap ratio, and sets the first grid line 110 and the second grid line 120 into a U-shape, lengthening the length of each fine grid and reducing the cross-sectional area of ​​the fine grid to reduce the volume resistivity; it can also improve the problems of high resistivity, poor welding performance with the main grid and long curing time caused by low temperature slurry.

[0048] The above technical features will be described in detail below with reference to the accompanying drawings.

[0049] refer to Figure 1The solar cell 10 can be a whole cell or a segmented cell. Segmented cells can be half-cells, three-quarters, four-quarters, or eight-quarters cells, etc. This application uses a half-cell solar cell as an example; a half-cell cell can also be understood as a cell cut in half or a cell divided into two segments.

[0050] refer to Figure 3 The battery cell 10 includes, but is not limited to, one or any combination of IBC cells, TBC cells that combine BC cells and TOPCon cells, and HBC cells that combine BC cells and HIT / HJT cells.

[0051] The solar cell 10 can be a monocrystalline silicon solar cell, a polycrystalline silicon solar cell, an amorphous silicon solar cell, or a multi-component compound solar cell. Specifically, the multi-component compound solar cell can be a cadmium sulfide solar cell, a gallium arsenide solar cell, a copper indium selenide solar cell, or a perovskite solar cell.

[0052] In some embodiments, the first grid line 110 and the second grid line 120 are sub-grid lines of the back contact battery, the first grid line 110 is one of a P-type grid line or an N-type grid line, and the second grid line 120 is the other of a P-type grid line or an N-type grid line.

[0053] In some embodiments, the first main grid line 131 and the second main grid line 132 are positive grid lines of the back contact battery. The first main grid line 131 corresponds to the first grid line 110 and is electrically connected to the first grid line 110. The second main grid line 132 corresponds to the second grid line 120 and is electrically connected to the second grid line 120.

[0054] In some embodiments, the first gate line 110 includes a first connecting segment 111 and a second connecting segment 112, such as Figure 2 As shown, the first connecting segment 111 is a straight connecting segment. The first main grid line 131 is connected to the first connecting segment 111, and the overlapping area is large, so as to achieve a better electrical connection effect and welding effect, thereby improving the yield of photovoltaic modules.

[0055] In some embodiments, the second connecting segment 112 includes straight grid lines, broken grid lines, wavy grid lines, or arc-shaped grid lines. Specifically, the second connecting segment 112 can be as follows: Figure 2The diagram shows a linear pattern, but it can also be non-linear, such as wavy, broken, or arbitrary curves. The key is to ensure that the first main grid line 131 is electrically connected to the second connecting segments 112 of a portion of the first grid lines 110. Connecting the first main grid line 131 to multiple second connecting segments 112 establishes an electrical connection between the first main grid line 131 and multiple first grid lines 110, avoiding electrical losses caused by an open circuit between one main grid line and a sub-grid line, thus improving battery efficiency. Furthermore, the electrical connection between the first main grid line 131 and multiple first grid lines 110 ensures uniformity among the multiple first grid lines 110, which helps improve appearance defects.

[0056] Similarly, in some embodiments, the second gate line 120 includes a third connecting segment 121 and a fourth connecting segment 122, such as Figure 2 As shown, the third connecting segment 121 is a straight connecting segment. The second main grid line 132 is connected to the third connecting segment 121, and the overlapping area is large, so as to achieve a better electrical connection effect and welding effect, thereby improving the yield of photovoltaic modules.

[0057] In some embodiments, the fourth connecting segment 122 includes straight grid lines, broken grid lines, wavy grid lines, or arc-shaped grid lines. Specifically, the fourth connecting segment 122 can be as follows: Figure 2 The diagram shows a linear pattern, but it can also be non-linear, such as wavy, polygonal, or arbitrary curves. The key is to ensure that the second main grid line 132 is electrically connected to the fourth connecting segment 122 of a portion of the second grid lines 120. Connecting the second main grid line 132 to multiple fourth connecting segments 122 establishes an electrical connection between the second main grid line 132 and multiple second grid lines 120, avoiding electrical losses caused by an open circuit between one main grid line and a sub-grid line, thus improving battery efficiency. Furthermore, the electrical connection between the second main grid line 132 and multiple second grid lines 120 ensures uniformity among the multiple second grid lines 120, which helps improve appearance defects.

[0058] Figure 3 This is a schematic diagram of another structure of a back contact battery provided in an embodiment of this application.

[0059] refer to Figure 3 In some embodiments, a first main busbar 131 is electrically connected to a first connecting segment 111 of a first busbar 110; a second main busbar 132 is electrically connected to a third connecting segment 121; N1 equals 0, M1 equals 0. That is, by electrically connecting the first main busbar 131 to the first connecting segment 111 and the second main busbar 132 to the third connecting segment 121, the amount of main busbars used is reduced, the amount of silver paste used is reduced, and the adverse effects between the insulating adhesive and the main busbars are also reduced, thereby lowering manufacturing costs and improving the yield of photovoltaic modules.

[0060] Continue to refer to Figure 3The overlap area between the first main grid line 131 and the first connecting segment 111 is greater than 90%, and the overlap area between the second main grid line 132 and the third connecting segment 121 is also greater than 90%. The first main grid line 131 almost completely covers the first connecting segment 111 of the first grid line 110, reducing the shading of the main grid line and improving the welding performance between them. Furthermore, the first main grid line 131 and the first connecting segment 111 are highly overlapped, and the second main grid line 132 and the second connecting segment 112 are highly overlapped, minimizing the area requiring insulation adhesive for isolation in physical space. The insulation adhesive only needs to cover the minimal overlap or gap area between the edge of the main grid line and adjacent, non-target connecting segments where a short circuit risk may occur.

[0061] Figure 4 A cross-sectional view of a back contact battery provided in an embodiment of this application; Figure 5 Another cross-sectional view of a back contact battery provided in an embodiment of this application.

[0062] In some embodiments, reference Figure 4 or Figure 5 The substrate 200 can be made of an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material can be monocrystalline, polycrystalline, amorphous, or microcrystalline (a state that simultaneously possesses both monocrystalline and amorphous states is called microcrystalline). For example, silicon can be at least one of monocrystalline silicon, polycrystalline silicon, amorphous silicon, or microcrystalline silicon.

[0063] In some embodiments, the substrate 200 may also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanide, silicon carbide, gallium arsenide, indium gallium dihydrogen phosphate, perovskite, cadmium telluride, and copper indium selenide. The substrate 200 may also be a sapphire substrate, a silicon-on-insulator substrate, or a germanium-on-insulator substrate.

[0064] In some embodiments, the substrate 200 may be an N-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type dopant element, which may be any one of group V elements such as phosphorus (P), bismuth (Bi), antimony (Sb), or arsenic (As).

[0065] In some embodiments, the substrate 200 includes a first region 12 and a second region 11, with at least a portion of the second connection segment 112 located in the first region 12 and at least a portion of the fourth connection segment 122 located in the second region 11; it also includes: a first intrinsic semiconductor layer 213 located in the first region 12; a first doped semiconductor layer 214 located on the surface of the first intrinsic semiconductor layer 213; a first transparent conductive layer 215 located on the surface of the first doped semiconductor layer 214; the second connection segment 112 being electrically connected to the first transparent conductive layer 215; and an insulating adhesive located between the first transparent conductive layer and the second main gate line 132.

[0066] In some embodiments, the first region 12 is either a P-type doped region or an N-type doped region, and the second region 11 is either a P-type doped region or an N-type doped region. The first region 12 corresponds to the first gate line 110. If the first region 12 is a P-type doped region, then the first gate line 110 is a P-type gate line. The second region 11 corresponds to the second gate line 120. If the second region 11 is an N-type doped region, then the second gate line 120 is an N-type gate line.

[0067] In some embodiments, the first intrinsic semiconductor layer 213, the first doped semiconductor layer 214, and the first transparent conductive layer 215 can be the intrinsic semiconductor layer, the doped semiconductor layer, and the transparent conductive layer in a conventional HJT. This will only be briefly described here and will not be elaborated in detail.

[0068] In some embodiments, references Figure 4 The back contact cell includes a tunneling dielectric layer 211 and a third doped semiconductor layer 212.

[0069] In some embodiments, the third doped semiconductor layer 212 can form a band bend on the surface of the substrate 200, and the tunneling dielectric layer 211 causes an asymmetric shift in the energy band on the surface of the substrate 200, so that the potential barrier for the majority carriers (also known as majority carriers) is lower than the potential barrier for the minority carriers (also known as minority carriers). Therefore, the majority carriers can more easily perform quantum tunneling through the tunneling dielectric layer 211, while the minority carriers have difficulty passing through the tunneling dielectric layer 211, so as to achieve selective transport of carriers.

[0070] Furthermore, the tunneling dielectric layer 211 provides chemical passivation. Specifically, due to interface state defects at the interface between the substrate 200 and the tunneling dielectric layer 211, the interface state density on the back side of the substrate 200 is relatively high. This increased interface state density promotes the recombination of photogenerated carriers, increasing the fill factor, short-circuit current, and open-circuit voltage of the solar cell, thereby improving the photoelectric conversion efficiency. By positioning the tunneling dielectric layer 211 on the back side of the substrate 200, the tunneling dielectric layer 211 provides chemical passivation to the surface of the substrate 200. Specifically, by saturating the dangling bonds of the substrate 200, it reduces the defect state density of the substrate 200, thereby reducing the number of recombination centers and lowering the carrier recombination rate.

[0071] In some embodiments, the thickness of the tunneling dielectric layer 211 is 0.5 nm to 5 nm. The thickness range of the tunneling dielectric layer 211 is 0.5 nm to 1.3 nm, 1.3 nm to 2.6 nm, 2.6 nm to 4.1 nm, or 4.1 nm to 5 nm. When the thickness of the tunneling dielectric layer 211 is within any of these ranges, it is relatively thin, allowing majority carriers to easily tunnel through the tunneling dielectric layer 211, while minority carriers have difficulty passing through, thus achieving selective carrier transport.

[0072] In some embodiments, the third doped semiconductor layer 212 serves as a field passivation effect. Specifically, an electrostatic field pointing inwards from the substrate 200 is formed on the surface of the substrate 200, causing minority carriers to escape from the interface, thereby reducing the minority carrier concentration and decreasing the carrier recombination rate at the interface of the substrate 200. This, in turn, increases the open-circuit voltage, short-circuit current, and fill factor of the solar cell, thereby improving the photoelectric conversion efficiency of the solar cell.

[0073] In some embodiments, reference Figure 4 It also includes: a third transparent conductive layer 216, which is located on the surface of the third doped semiconductor layer 212; a fourth connecting segment 122 electrically connected to the third transparent conductive layer 216; and insulating adhesive located between the third transparent conductive layer 216 and the first main gate line 131. A lateral transport layer is formed through the third transparent conductive layer 216 to improve the carrier transport capability.

[0074] In some embodiments, reference Figure 5It also includes: a second intrinsic semiconductor layer 221, located in the second region 11; a second doped semiconductor layer 222, located on the surface of the second intrinsic semiconductor layer 221; a second transparent conductive layer 223, located on the surface of the second doped semiconductor layer 222; a fourth connecting segment 122 electrically connected to the second transparent conductive layer 223; an insulating adhesive is also located between the second transparent conductive layer 223 and the first main gate line 131; or, a tunneling dielectric layer, located in the second region; a third doped semiconductor layer, located on the surface of the tunneling dielectric layer; and the fourth connecting segment 122 electrically connected to the third doped semiconductor layer.

[0075] In some embodiments, the second intrinsic semiconductor layer, the second doped semiconductor layer, and the second transparent conductive layer can be the intrinsic semiconductor layer, the doped semiconductor layer, and the transparent conductive layer in a conventional HJT, which are generally the same as the first intrinsic semiconductor layer, the first doped semiconductor layer, and the first transparent conductive layer. The difference is that the first intrinsic semiconductor layer and the first doped semiconductor layer are doped with either an N-type dopant element or a P-type dopant element, and the second intrinsic semiconductor layer and the second doped semiconductor layer are doped with either an N-type dopant element or a P-type dopant element. Other parts can be referred to the first intrinsic semiconductor layer and the first doped semiconductor layer, and will not be described in detail here.

[0076] In some embodiments, the system further includes a front passivation layer 205, which is located on the surface of the substrate 200. The front passivation layer 205 can be a single-layer structure or a stacked structure, and the material of the front passivation layer 205 can be one or more of the following materials: silicon oxide, silicon nitride, silicon oxynitride, silicon carbonitride, titanium oxide, hafnium oxide, or aluminum oxide.

[0077] In some embodiments, the insulating adhesive material includes: silicone rubber, polyolefin elastomer (POE) hot melt adhesive, and epoxy resin. The silicone rubber can be high-temperature vulcanizing silicone rubber (HTV) or room-temperature vulcanizing silicone rubber (RTV). The polyolefin elastomer (POE) hot melt adhesive can be polypropylene adhesive or styrene-butadiene rubber (SBR).

[0078] In some embodiments, the insulating adhesive between the first main grid line 131 and the second main grid is a first insulating adhesive 141, and the insulating adhesive between the second main grid line 132 and the first main grid is a second insulating adhesive 142.

[0079] In some embodiments, the substrate includes an edge region and a central region; the first grid line 110 includes a first edge grid line located in the edge region and a first central grid line located in the central region, the first edge grid line including a first connecting segment 111 and a second connecting segment 112; the first main grid line 131 is electrically connected to the first central grid line; the second grid line 120 includes a second edge grid line located in the edge region and a second central grid line located in the central region, the second edge grid line including a third connecting segment 121 and a fourth connecting segment 122; the second main grid line 132 is electrically connected to the second central grid line; the first central grid line and the second central grid line are alternately arranged along a first direction; insulating adhesive is also located between the second central grid line and the first main grid line 131 and between the first central grid line and the second main grid line 132. Thus, the solar cell is divided into different regions, and the arrangement of the first grid line 110 and the second grid line 120 is adjusted based on these different regions, thereby achieving a higher photoelectric conversion efficiency.

[0080] In some embodiments, the total area of ​​the first grid line 110 accounts for 40% to 50%; the total area of ​​the second grid line 120 accounts for 50% to 60%. The first grid line is a P-type grid line and the second grid line is an N-type grid line. Setting the proportion of the first grid line is relatively small can reduce the recombination reaction between the P-type grid line and the insulating adhesive, thereby improving the yield of the photovoltaic module.

[0081] In some embodiments, the total area of ​​the first gate line 110 can be 40%, 43%, 45%, 47%, or 50%. The total area of ​​the second gate line 120 can be 50%, 53%, 55%, 57%, or 60%.

[0082] Accordingly, according to some embodiments of this application, another aspect of this application provides a photovoltaic module, including the solar cell provided in the above embodiments, and the same or corresponding technical features as those in the above embodiments will not be described in detail here.

[0083] Figure 6 This application provides a schematic diagram of the structure of a photovoltaic module according to one embodiment.

[0084] refer to Figure 6 The photovoltaic module includes: a battery string, which is formed by connecting multiple back-contact batteries as described in any of the above embodiments; an encapsulating film 31 for covering the surface of the battery string; and a cover plate 32 for covering the surface of the encapsulating film 31 away from the battery string.

[0085] in, Figure 6 The adjacent solar cells 30 shown have gaps between them to achieve electrical insulation between the different solar cells 30. In other embodiments, there are no gaps between adjacent cells, i.e., the cells are stacked together. The back contact cell is the solar cell 30.

[0086] The materials of the encapsulating film 31 include organic encapsulating films such as EVA, POE, or PVB.

[0087] In some embodiments, the glass transition temperature of the encapsulating film 31 is -70 to -10°C. The glass transition temperature of the film is used to ensure that the film can be in a molten state during the lamination process to fill the gaps in the photovoltaic module and improve the yield of the photovoltaic module.

[0088] In some embodiments, the melting points of the encapsulating film and the connecting member 302 can be set according to actual needs. When the melting point of the encapsulating film 31 is greater than that of the connecting member 302, the connecting member 302 can be alloyed before the encapsulating film 31 reaches a molten state, which can effectively prevent the molten encapsulating film 31 from immersing between the grid lines and the connecting member 302 and from pushing the connecting member 302 to cause it to shift. When the melting point of the encapsulating film 31 is less than that of the connecting member 302, a lower lamination temperature can be set, thereby improving the thermal stress on the solar cell 30 and increasing the yield of the photovoltaic module.

[0089] In some embodiments, the cover plate 32 can be a glass cover plate, a plastic cover plate, or other cover plate with light-transmitting function. Specifically, the surface of the cover plate 32 away from the encapsulating film 31 can be an uneven surface, thereby increasing the utilization rate of incident light. The cover plate 32 includes a first cover plate and a second cover plate, the first cover plate facing the front side of the battery cell and the second cover plate facing the back side of the battery cell.

[0090] Those skilled in the art will understand that the above embodiments are specific examples of implementing this application, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. A back-contact battery, characterized in that, include: Base; N first gate lines and M second gate lines are located on the substrate. The conductivity types of the first gate lines and the second gate lines are opposite. The first gate lines are U-shaped gate lines and include a first connecting segment and a second connecting segment. The second gate lines are U-shaped gate lines and include a third connecting segment and a fourth connecting segment. The first gate lines and the second gate lines are arranged in a centrally encircling pattern. A first main gate line is located on the substrate. The first main gate line is electrically connected to a first connecting segment of one of the first gate lines and to the second connecting segments of N1 of the first gate lines. The orthographic projection of the first main gate line on the substrate overlaps with the first connecting segment, and the first overlap ratio is greater than 90%. The second main grid line is located on the substrate. The second main grid line is electrically connected to the third connecting segment of one of the second grid lines and to the fourth connecting segments of M1 of the second grid lines. The orthographic projection of the second main grid line on the substrate overlaps with the third connecting segment, and the second overlap ratio is greater than 90%. Insulating adhesive, wherein the insulating adhesive is located between the first main grid line and the fourth connecting segment, and the insulating adhesive is located between the second main grid line and the second connecting segment; Where N and M are positive integers, and M1 and N1 are 0 or positive integers.

2. The back contact battery according to claim 1, characterized in that, The substrate includes a first region and a second region, with at least a portion of the second connecting segment located in the first region and at least a portion of the fourth connecting segment located in the second region; it also includes: A first intrinsic semiconductor layer is located in the first region; A first doped semiconductor layer is located on the surface of the first intrinsic semiconductor layer; A first transparent conductive layer is located on the surface of the first doped semiconductor layer; the second connecting segment is electrically connected to the first transparent conductive layer. The insulating adhesive is also located between the first transparent conductive layer and the second main grid line.

3. The back contact battery according to claim 2, characterized in that, Also includes: The second intrinsic semiconductor layer is located in the second region; A second doped semiconductor layer is located on the surface of the second intrinsic semiconductor layer; A second transparent conductive layer is located on the surface of the second doped semiconductor layer; the fourth connecting segment is electrically connected to the second transparent conductive layer; the insulating adhesive is also located between the second transparent conductive layer and the first main gate line; or... A tunneling dielectric layer located in the second region; a third doped semiconductor layer located on the surface of the tunneling dielectric layer; and a fourth connecting segment electrically connected to the second doped semiconductor layer.

4. The back contact battery according to claim 3, characterized in that, The back contact battery includes a tunneling dielectric layer and a second doped semiconductor layer; it also includes a third transparent conductive layer located on the surface of the third doped semiconductor layer; the fourth connecting segment is electrically connected to the third transparent conductive layer; and the insulating adhesive is located between the third transparent conductive layer and the first main grid line.

5. The back contact battery according to claim 1, characterized in that, The first main grid line is electrically connected to the first connecting segment of the first grid line; the second main grid line is electrically connected to the third connecting segment; N1 equals 0, M1 equals 0.

6. The back contact battery according to claim 1, characterized in that, Also includes: A passivation layer is located on the substrate, the first gate line and the second gate line are located on the passivation layer, the second connection segment and the fourth connection segment penetrate the thickness of the passivation layer; the first connection segment and the third connection segment are located on the surface of the passivation layer.

7. The back contact battery according to claim 1, characterized in that, The insulating adhesive is made of silicone, polyolefin elastomer hot melt adhesive, and epoxy resin.

8. The back contact battery according to claim 1, characterized in that, One of the second connecting segment or the fourth connecting segment includes a straight grid line, a broken grid line, a wavy grid line, or an arc grid line.

9. The back contact battery according to claim 1, characterized in that, The substrate includes an edge region and a central region; The first gate line includes a first edge gate line located in the edge region and a first center gate line located in the center region. The first edge gate line includes a first connecting segment and a second connecting segment. The first main gate line is electrically connected to the first center gate line. The second gate line includes a second edge gate line located in the edge region and a second center gate line located in the center region. The second edge gate line includes the third connecting segment and the fourth connecting segment. The second main gate line is electrically connected to the second center gate line. The first center gate line and the second center gate line are arranged alternately along a first direction. The insulating adhesive is also located between the second central grid line and the first main grid line, and between the first central grid line and the second main grid line.

10. The back contact battery according to claim 1, characterized in that, The total area of ​​the first gate line accounts for 40% to 50%; the total area of ​​the second gate line accounts for 50% to 60%.

11. A photovoltaic module, characterized in that, include: A battery string is formed by connecting multiple back-contact batteries as described in any one of claims 1 to 10; An encapsulating film is used to cover the surface of the battery string; A cover plate is used to cover the surface of the encapsulating film that faces away from the battery string.

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