Semiconductor manufacturing apparatus, coating apparatus, and method for manufacturing semiconductor device

Abstract

The invention provides a semiconductor manufacturing apparatus capable of improving coating uniformity, a coating apparatus, and a manufacturing method of a semiconductor device. This semiconductor manufacturing device is provided with: a coating device which has a syringe for storing a paste, a nozzle support provided at the tip of the syringe, a nozzle provided on the nozzle support, and a heating unit for heating the nozzle support, and which coats the paste on an object to be coated; and a control unit configured so that the temperature of the nozzle support is adjusted by the heating unit, and the paste is applied from the nozzle onto the object to be applied.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor manufacturing apparatus, for example, which is applicable to a semiconductor manufacturing apparatus capable of applying a paste to a semiconductor chip. BACKGROUND

[0002] As one of manufacturing processes of a semiconductor device, a workpiece picked up from a wafer is attached to a semiconductor chip on which a paste-like adhesive is applied (for example, Japanese Patent Application Publication No. 2022-150045).

[0003] PRIOR ART DOCUMENT

[0004] PATENT DOCUMENT

[0005] Patent Document 1: Japanese Patent Application Publication No. 2022-150045 SUMMARY

[0006] When a paste is applied to an application object, sometimes the application uniformity is reduced.

[0007] An object of the present application is to provide a technology capable of improving application uniformity. Other objects and novel features will be apparent from the description and drawings.

[0008] If the outline of a representative aspect in the present application is simply explained, it is as follows.

[0009] That is, the semiconductor manufacturing apparatus is provided with: an application device having a syringe that stores a paste, a nozzle support provided at a front end of the syringe, a nozzle provided at the nozzle support, and a heating portion that heats the nozzle support, which applies the paste to an application object; and a control portion configured to adjust the temperature of the nozzle support by the heating portion and to apply the paste from the nozzle to the application object.

[0010] EFFECT OF THE INVENTION

[0011] According to the present application, it is possible to improve application uniformity. BRIEF DESCRIPTION OF DRAWINGS

[0012] Figure 1 is a plan view showing the outline of a chip mounter in an embodiment.

[0013] Figure 2 is a plan view showing the outline of a chip mounter in an embodiment. Figure 1 is a sectional view showing the outline of a die supply portion shown in

[0014] Figure 3 is a sectional view showing the outline of a die supply portion shown in Figure 1 is a side view showing the outline of a pre-processing portion shown in

[0015] is a side view showing the outline of a pre-processing portion shown inFigure 4 is a side view showing a summary of the bare chip supply section and the mounting section. Figure 1

[0016] Figure 5 is a flowchart showing a bare chip mounting process of the chip mounter shown in Figure 1

[0017] Figure 6 is a side view showing the coating device and the pre-processing stage.

[0018] Figure 7 is a plan view showing a structure example of the substrate in the embodiment.

[0019] Figure 8 is a plan view showing a coating example of the paste.

[0020] Figure 9 is a graph showing a temperature transition of the paste in the nozzle.

[0021] Explanation of Reference Numerals

[0022] 1 ••• chip mounter (semiconductor manufacturing device)

[0023] 80 ••• control section

[0024] 91 ••• syringe

[0025] 92 ••• nozzle

[0026] 93a ••• heating section DETAILED DESCRIPTION

[0027] Hereinafter, the embodiments will be described using the drawings. In the following description, the same reference numerals are assigned to the same structural elements and repeated description is omitted. Further, in order to make the description more clear, there are cases in which the width, thickness, shape, and the like of each portion are schematically shown in the drawings compared to the actual state. In addition, among the plurality of drawings, the dimensional relationship of each element, the ratio of each element, and the like are not necessarily consistent.

[0028] A chip mounter (chip mounting device) as one embodiment of a semiconductor manufacturing device will be described. Figures 1 to 4 Figure 1 is a plan view showing a summary of the chip mounter in the embodiment. Figure 2 is a side view showing a summary of the bare chip supply section and the mounting section. Figure 1 is a cross-sectional view showing a summary of the bare chip supply section shown in Figure 3 is a side view showing a summary of the pre-processing section shown in Figure 1 Figure 4 Figure 1 ​​​​​An outline side view of the bare chip supply section and mounting section.

[0029] As Figure 1 shown, the chip mounter 1 generally has a wafer supply section 10, a pre-processing section 90, a mounting section 40, a conveyance section 50, a substrate supply section 60, a substrate conveyance section 70, and a control section (control device) 80. A Y2-Y1 direction is a front-rear direction of the chip mounter 1, an X2-X1 direction is a left-right direction, and a Z1-Z2 direction is an up-down direction. The wafer supply section 10 is disposed on a front side of the chip mounter 1, and the mounting section 40 is disposed on a rear side.

[0030] As Figure 2 shown, the wafer supply section 10 has a wafer holding table 12 that holds a wafer W, and a lifting unit 13 that lifts a bare chip D from the wafer W. The wafer W is bonded (attached) to a dicing tape DT, and the wafer W is divided into a plurality of bare chips D. The dicing tape DT is held by a wafer ring WR. The wafer W is, for example, a glass wafer or a semiconductor wafer, and the bare chip D is a glass chip or a semiconductor chip. The semiconductor chip is, for example, a logic chip or a memory chip, an image sensor chip, or the like. The bare chip D is also referred to as a workpiece.

[0031] A wafer cassette (not shown) that stores a plurality of wafer rings WR is loaded into a wafer cassette elevator (not shown). The wafer ring WR is taken out from the wafer cassette and supplied to the wafer holding table 12, or is taken out from the wafer holding table 12 and stored into the wafer cassette.

[0032] The wafer holding table 12 has an extension ring 15 that holds the wafer ring WR, and a support ring 17 that horizontally positions the dicing tape DT that is held by the wafer ring WR and to which a plurality of bare chips D are bonded. The lifting unit 13 is disposed inside the support ring 17. The control section 80 moves the wafer holding table 12 in the X1-X2 direction and the Y1-Y2 direction by a wafer stage (not shown) to move the bare chip D to a position (pick-up position) of the lifting unit 13.

[0033] The wafer holding table 12 lowers the extension ring 15 that holds the wafer ring WR at the time of lifting the bare chip D. As a result, the dicing tape DT held by the wafer ring WR is stretched to expand the interval of the bare chips D, and the bare chip D is lifted from below by the lifting unit 13, improving the pick-up property of the bare chip D.

[0034] As Figure 3As shown, the pre-processing unit 90 includes a syringe 91, a driving unit (not shown) that moves the syringe 91 in the X1-X2 direction, the Y1-Y2 direction, and the Z1-Z2 direction, a pre-processing camera 94 that identifies the application position of the syringe 91, and a pre-processing stage 96. The pre-processing unit 90 uses the syringe 91 to apply the paste PA to the substrate S conveyed by the conveying unit 50 or the semiconductor chip HT mounted on the substrate S. Here, the paste PA is a liquid adhesive, such as a resin paste. The syringe 91 has a nozzle 92 at the front end. The syringe 91 is sealed with the paste PA inside and is configured to use air pressure to press the paste PA from the front end of the nozzle 92 to the substrate S or the semiconductor chip HT mounted on the substrate S for application. Here, the substrate S and the semiconductor chip HT mounted on the substrate S are also referred to as components of the semiconductor device. The semiconductor chip HT is, for example, a logic chip, a memory chip, an image sensor chip, etc. The substrate S is a wiring substrate or a lead frame, etc.

[0035] like Figure 4 As shown, the mounting section 40 has a mounting head 41, a Y drive section (not shown), a substrate recognition camera 44 and a mounting platform 46. The mounting head 41 has a collet 42 that adsorbs and holds the bare chip D at the front end. The Y drive section moves the mounting head 41 in the Y1-Y2 direction. The substrate recognition camera 44 captures the position recognition mark (not shown) of the substrate S to identify the mounting position. The mounting section 40 picks up the bare chip D from the wafer supply section 10 and mounts it on the conveyed substrate S or the semiconductor chip HT mounted on the substrate S. At this time, the mounting head 41 corrects the picking position and posture based on the shooting data of the wafer recognition camera 24 and picks up the bare chip D from the wafer W. Then, the mounting head 41 mounts the bare chip D on the substrate S or the semiconductor chip HT mounted on the substrate S based on the shooting data of the substrate recognition camera 44.

[0036] like Figure 1 As shown, the conveyor unit 50 includes a conveyor channel 52 serving as a conveying path for the substrate S. With this structure, the substrate S moves from the substrate supply unit 60 along the conveyor channel 52 to the coating position, and after coating, moves to the placement position. After placement, the substrate S moves to the substrate unloading unit 70, where it is delivered.

[0037] The control unit 80 is configured as a computer including a CPU (Central Processing Unit) and a storage device. The storage device is configured as a computer-readable recording medium.

[0038] In the storage device, a control program for monitoring and controlling the operation of each of the above-described parts of the chip mounter 1, a program recipe of the sequence and conditions of the die mount process described later, and the like are stored in a readable manner. The program recipe is composed in such a manner that the control section 80 performs each step in the die mount process described later and obtains a prescribed result, and functions as a program.

[0039] The CPU is configured to read out and execute the control program from the storage device, and to read out the program recipe. The CPU is configured to control the coating operation of the pre-processing section 90, the heating operation of the nozzle 92, and the like in a manner in accordance with the contents of the read-out program recipe.

[0040] Next, the die mount process using the chip mounter in the embodiment will be described. Figure 5 A die mount process using the chip mounter shown in Fig. 1 will be described with reference to the flowchart of Fig. 2. Here, an example in which a die D composed of a glass chip is mounted on a substrate S on which a semiconductor chip HT is mounted will be described. Figure 5 Figure 1 A die mount process using the chip mounter shown in Fig. 1 will be described with reference to the flowchart of Fig. 2. Here, an example in which a die D composed of a glass chip is mounted on a substrate S on which a semiconductor chip HT is mounted will be described.

[0041] (Wafer carrying-in step: Step S1)

[0042] A wafer cassette in which a wafer ring WR is accommodated is fed to the wafer cassette elevator. The control section 80 takes out the wafer ring WR from the fed wafer cassette and carries it into the wafer holding table 12.

[0043] (Substrate carrying-in step: Step S2)

[0044] A carrying jig in which a substrate S on which a semiconductor chip HT is mounted is accommodated is fed to the substrate supply section 60. After the feeding, the control section 80 carries the substrate S by the carrying section 50 and carries it into the pre-processing stage 96 provided in the pre-processing section 90.

[0045] (Pre-processing step: Step S3)

[0046] The control section 80 acquires an image of the surface of the semiconductor chip HT mounted on the substrate S before the coating of the paste PA by the pre-processing camera 94 and confirms the surface to be coated with the paste PA. If the surface to be coated is not problematic, the control section 80 confirms the position of the substrate S to be coated with the paste PA supported by the pre-processing stage 96 and performs positioning.

[0047] ​The control section 80 applies the paste PA in a frame shape (annular shape) to the semiconductor chip HT mounted on the substrate S from the nozzle 92 of the tip of the injector 91. The paste PA is, for example, an adhesive such as an ultraviolet (UV) curable adhesive, which has high viscosity (large viscosity). After the application, the control section 80 captures the applied paste PA by the pre-processing camera 94. The control section 80 confirms whether the paste PA is applied correctly based on the image acquired by the capturing, and performs inspection (appearance inspection) of the applied paste PA. If the application is correct, the control section 80 transports the substrate S to the mounting stage 46 provided in the mounting section 40 by the transport section 50.

[0048] (Mounting Step: Step S4)

[0049] (Positioning of the bare chip)

[0050] After Step S1, the control section 80 performs wafer stage pitch operation to move the wafer holding table 12 in a manner that the desired bare chip D can be picked up from the wafer W. The control section 80 captures the bare chip D by the wafer recognition camera 24, and performs positioning and surface inspection of the bare chip D based on the image data acquired by the capturing. The control section 80 calculates the offset amount (X, Y, θ direction) of the bare chip D on the wafer holding table 12 with respect to the bare chip position reference point of the chip mounter 1 by image processing of the image data, and performs positioning. Further, as for the bare chip position reference point, a prescribed position of the wafer holding table 12 is set as the initial setting of the device and is maintained. The control section 80 performs surface inspection of the bare chip D by image processing of the image data.

[0051] (Positioning of the substrate)

[0052] After Step S3, the control section 80 captures the substrate S placed on the mounting stage 46 by the substrate recognition camera 44, and acquires image data. The control section 80 calculates the offset amount (X, Y, θ direction) of the substrate S with respect to the substrate position reference point of the chip mounter 1 by image processing of the image data. Further, as for the substrate position reference point, the control section 80 sets a prescribed position of the mounting section 40 as the initial setting of the device and maintains it.

[0053] (Picking up and mounting)

[0054] The control section 80 moves the mounting head 41 horizontally to a position directly above the picked-up die D and lowers it, corrects the suction position of the mounting head 41 according to the calculated offset of the die D, and vacuum-sucks the die D with the collet 42. The control section 80 mounts the die D sucked with the mounting head 41 from the wafer W to a prescribed position of the semiconductor chip HT of the substrate S mounted on the mounting stage 46 with the mounting head 41. The control section 80 photographs the die D mounted on the semiconductor chip HT with the substrate recognition camera 44, and performs inspection of whether the die D is mounted at a desired position or the like based on image data acquired by the photographing.

[0055] (Substrate carrying-out process: process S5)

[0056] The control section 80 carries the substrate S on which the die D is mounted from the mounting section 40 to the substrate carrying-out section 70 with the carrying section 50. The control section 80 takes out the substrate S in the substrate carrying-out section 70 and stores it to the carrying jig, thereby carrying out the substrate S.

[0057] Use Figure 6 Details of the pre-processing section 90 will be described. Figure 6 is a side view showing a coating device and a pre-processing stage.

[0058] The pre-processing section 90 has a syringe 91, a nozzle 92, a nozzle support 92a, a holding member 93, a support member 95, and a pre-processing stage 96. The syringe 91 houses the paste PA. The syringe 91 has the nozzle support 92a at its front end portion. The nozzle support 92a holds the nozzle 92 therein. The holding member 93 holds the nozzle support 92a. The holding member 93 also has a function of a heater block, and has a heating portion 93a embedded therein. The heating portion 93a is constituted by an electric heater such as a resistance heater. The support member 95 supports the holding member 93, and has a function of adjusting a gradient. The support member 95 is moved in the vertical direction and the horizontal direction by a not-shown driving section, whereby the syringe 91 is movable.

[0059] The holding member 93 has a not-shown temperature sensor in the vicinity of the nozzle support 92a, and the control section 80 controls the heating portion 93a based on the temperature of the temperature sensor. Heat of the heating portion 93a is transmitted to the entire nozzle 92 via the nozzle support 92a by heat conduction, and the paste PA in the nozzle 92 is heated and maintained at an appropriate temperature.

[0060] The syringe 91, the nozzle 92, the nozzle support 92a, the holding member 93, and the support member 95 constitute a coating device. Further, the pre-processing stage 96 can also be included in the coating device.

[0061] When the paste PA is applied to the semiconductor chip HT, the paste PA is previously put in the syringe 91, and a predetermined amount of the paste PA is ejected by supplying pressurized gas such as air from the upper portion of the syringe 91 at a constant time from a dispenser (not shown) of a gas pulse type, for example. The ejection pressure of the paste PA is a predetermined pressure, and the moving speed of the nozzle 92 is a predetermined speed, for example. At the time of application, the syringe 91 is caused to perform one-stroke scanning (drawing operation) in two dimensions in the XY plane in a state where the nozzle 92 is brought close to the semiconductor chip HT.

[0062] The paste PA is applied using Figure 7 and Figure 8 The application of the paste PA will be described. Figure 7 is a plan view showing a structure example of a substrate in the embodiment. Figure 8 is a plan view showing an example of application of a paste.

[0063] As shown in Figure 7 , a plurality of product areas (hereinafter also referred to as mounting areas P) which finally become one package are formed in a lattice shape on the substrate S. In addition, the semiconductor chip HT is mounted (assembled) on each mounting area P. Further, hereinafter, an example in which the mounting areas P are one column of four and are arranged in eight columns will be described. The mounting area P is also referred to as a tab.

[0064] The control section 80 applies the paste PA to the semiconductor chip HT from the mounting area P of the first row (CN=1, RN=1) of the first column on the upper right of the substrate S in which the mounting areas P are arranged in a lattice shape, sequentially in the downward direction by the syringe 91. Further, after the paste PA is applied to the semiconductor chip HT of the mounting area P of the fourth row (CN=1, RN=4) of the first column on the lower right, the control section 80 moves the substrate S to perform surface inspection and positioning on the second column from the right. Then, the control section 80 sequentially applies the paste PA from the uppermost position (first row) (CN=2, RN=1) of the second column from the right in the downward direction. Then, similarly, the control section 80 applies to the third column, the fourth column,..., the eighth column. By such continuous application work, the control section 80 applies the paste PA to all of the mounting areas P of the substrate S.

[0065] The ejection process of the paste PA will be described. The paste PA is accommodated in the syringe 91. First, by moving the support member 95, the nozzle 92 is moved to a position where the nozzle 92 is in contact with the surface of the paste PA. Then, the control section 80 supplies pressurized gas such as air to the syringe 91, and the paste PA is ejected from the nozzle 92. The ejection pressure of the paste PA is a predetermined pressure, and the moving speed of the nozzle 92 is a predetermined speed, for example. Figure 8The position WS where writing is started is shown to move upward. By lowering the support member 95, the front end of the nozzle 92 is lowered from a relatively high position and reaches a prescribed height (nozzle height) from the upper surface of the substrate S at the ejection start timing. The nozzle height is, for example, 100 to 200 μm. At this time, when the dispenser supplies compressed air, the air pressure in the syringe 91 rapidly rises, and ejection gradually starts. In synchronization therewith, the tracing operation is started. That is, specifically, by moving the support member 95, the nozzle 92 moves in two dimensions horizontally. The nozzle 92 generally returns to the position WS where writing is started, and the tracing operation is ended there. In synchronization therewith, when the dispenser stops the supply of compressed air, the air pressure in the syringe 91 rapidly falls, and ejection gradually weakens and stops. In approximately synchronization with the stop of ejection, the support member 95 raises the nozzle 92. By such an operation, for example, as shown in Figure 8 The paste PA is applied in a ring shape on the semiconductor chip HT as shown.

[0066] The object to be applied is, for example, a semiconductor chip HT on which wire bonding has been performed as shown. Figure 6 and Figure 8 The paste PA is applied in a ring shape on the semiconductor chip HT as shown. Figure 8 As shown, a case is assumed in which the paste PA is applied to a peripheral region of the semiconductor chip HT including the portion on which wire bonding has been performed. In a case where the paste PA is a paste having a high viscosity, the height and width of the paste PA applied can be different between a region (portion, site) HS having the bonded wire BW and a region (portion, site) LS not having the bonded wire BW. Here, the region HS is a region in which the bonded wire BW is arranged at a narrower interval than a prescribed interval, and is a region in which the application surface is high. The region LS is a region in which the bonded wire BW is arranged at a wider interval than the prescribed interval, and is a region in which the application surface is low.

[0067] The paste PA applied from the region LS to the region HS generates a surface tension between the paste PA and the bonded wire BW at the same time as the ejection of the paste PA, and only a part of the height becomes high and the width becomes large. The paste PA applied to the region LS has a lower height and a narrower width than the paste PA applied to the region HS.

[0068] In the present embodiment, the temperature adjustment of the nozzle 92 is performed by the heating portion 93a provided in the vicinity of the nozzle 92, and thereby the temperature adjustment of the paste PA in the nozzle 92 is performed. Thereby, the viscosity of the paste PA in the nozzle 92 is adjusted.

[0069] The temperature adjustment is performed using, for example, a heater. Figure 9 An example of the temperature adjustment will be described. Figure 9 is a graph showing the temperature transition of the paste in the nozzle. Figure 9 The horizontal axis of the graph shown is time (t), and the vertical axis is temperature (T).

[0070] Before the application of the paste PA starts, the temperature of the paste PA in the nozzle 92 is set to room temperature (TR). First, the control unit 80 starts heating the nozzle 92 before a specified period (P0) before the start of application of the paste PA (P1). When the nozzle 92 is heated to the specified temperature, the paste PA in the nozzle 92 is heated to the specified temperature (TH). Here, the specified temperature (TH) is a temperature at which the viscosity of the paste PA in the nozzle 92 becomes a specified viscosity, and is a temperature that does not solidify the paste PA, for example, 40 to 50°C. In addition, before the start of production refers to before the start of the application action, and it is preferably not to heat the nozzle 92 before the period required for the temperature of the nozzle 92 to rise from the start of heating to the specified temperature before the start of the application action.

[0071] During the production process (P1 to P2), the control unit 80 continues to heat the nozzle 92, maintains the temperature of the paste PA in the nozzle 92 at a specified temperature (TH), and maintains the viscosity of the paste PA in the nozzle 92 at a specified viscosity. Here, the production process refers to a state in which a continuous coating action is performed. The paste PA is repeatedly sprayed and stopped during the continuous coating action. If the period from the stop of spraying to the start of spraying exceeds the specified time, it does not comply with the continuous coating action. For Figure 7 The coating operation for multiple mounting areas P on a single substrate S is continuous unless interrupted by a malfunction or the like. Substrates S are continuously conveyed from the substrate supply unit 60 to the pre-processing unit 90, and the coating operation for these substrates S is continuous unless interrupted by a malfunction or the like.

[0072] After the production is finished (P2), the control unit 80 stops heating the nozzle 92. Here, the end of production means that the continuous coating action stops and the coating device becomes a standby state. For example, when the transport jig for storing substrates put into the substrate supply unit 60 is empty and needs to be replaced with a transport jig for storing substrates, the coating action is interrupted and becomes a standby state. In addition, when it is necessary to replace the wafer ring WR held on the wafer holding table 12 or replace the syringe 91, it also becomes a standby state. In addition, if Figure 9 As shown, when the waiting period (P2-P3) is short, the temperature of the paste PA in the nozzle 92 does not drop to room temperature. On the other hand, when the waiting period (P2-P3) is long, the temperature of the paste PA in the nozzle 92 drops to room temperature.

[0073] By using the temperature control function of the nozzle 92, the viscosity of the paste PA in the nozzle 92 is temporarily reduced, the fluidity is improved, and the influence of the bonding wire BW is reduced. As a result, the uniformity of the applied paste can be improved. In addition, the viscosity of the paste PA is reduced by temporarily heating only the tip of the nozzle 92, not the entire syringe 91. In other words, instead of performing temperature control (heating) of the entire syringe 91 and constant temperature control (heating) of the nozzle 92, the degradation of the paste PA can be reduced.

[0074] Since the nozzle 92 is heated before the coating starts, the influence of thixotropy can be reduced. If the coating is not performed for more than a predetermined time, the coating amount at the beginning of the coating becomes unstable due to the influence of thixotropy. Thixotropy means that if a certain force is continuously applied, the viscosity gradually decreases and becomes liquid. Alternatively, if it remains stationary, the viscosity increases and becomes solid. As a result, Figure 8 As shown, the amount of paste at the starting point WS may be insufficient, resulting in an unapplied area on the semiconductor chip HT. Furthermore, the effects of thixotropy can be reduced not only for objects with varying application surfaces but also for objects with a roughly constant distance between the application surface and the nozzle. This improves the uniformity of the applied paste.

[0075] As mentioned above, the invention completed by the present inventors has been specifically described based on the embodiments. However, the present invention is not limited to the above-mentioned embodiments, and various modifications are possible, of course.

[0076] For example, in addition to the temperature of the nozzle 92 , at least one of the horizontal movement speed of the nozzle 92 and the discharge pressure of the paste may be controlled to control the amount of paste applied.

[0077] The distance from the tip of the nozzle 92 to the coating surface can also be measured and detected to control the temperature of the nozzle 92. Information about the distance from the tip of the nozzle 92 to the coating surface can be pre-input to control the temperature of the nozzle 92. The paste temperature can be controlled per splice, per splice row, or per substrate.

[0078] In the embodiment, the electric heater for resistance heating is described as an example of the heating portion. However, an electric heater for infrared heating, induction heating, or the like, or a Peltier element may be used.

[0079] In the embodiment, an example is described in which the paste PA is applied in a ring shape on the semiconductor chip HT. However, the paste PA may be applied in a shape other than a ring shape (for example, an X shape or a Z shape) on the semiconductor chip HT.

[0080] In the embodiment, an example in which the glass chip is attached on the semiconductor chip HT is described, but a semiconductor chip (a bare chip) separated from a semiconductor wafer can be stacked on the semiconductor chip HT.

[0081] In addition, in the embodiment, an example in which the paste PA is applied on the semiconductor chip HT is described, but the paste PA can be applied on the substrate S. In this case, the semiconductor chip is attached on the substrate S.

[0082] In addition, in the embodiment, an example in which the bare chip D picked up from the wafer supply section 10 is attached to the semiconductor chip HT mounted on the substrate S by the attachment head 41 is described. An intermediate stage can be provided between the wafer supply section 10 and the attachment section 40, the bare chip D picked up from the wafer supply section 10 by the pickup head is placed on the intermediate stage, and the bare chip D is picked up again from the intermediate stage by the attachment head 41 and attached to the semiconductor chip HT mounted on the substrate S.

Claims

1. A semiconductor manufacturing apparatus characterized by comprising: Possessing: a coating device having a syringe that stores a paste, a nozzle support provided at a front end of the syringe, a nozzle provided at the nozzle support, and a heating section that heats the nozzle support, and that coats the paste on a coating object; and a control section configured to adjust the temperature of the nozzle support by the heating section, and to coat the paste from the nozzle onto the coating object.

2. The semiconductor manufacturing apparatus according to claim 1, wherein the control section is configured to maintain the temperature adjustment of the nozzle support during a continuous coating operation that repeatedly performs an operation of ejecting the paste from the nozzle and stopping the ejection, and to stop the heating of the nozzle support during a standby period in which the continuous coating operation is not performed.

3. The semiconductor manufacturing apparatus according to claim 2, wherein the control section is configured to heat the nozzle support by the heating section before starting the coating to the coating object.

4. The semiconductor manufacturing apparatus according to claim 2, wherein the standby period is a period in which a substrate is not present in a substrate holding transport jig, and in which the substrate holding transport jig is to be replaced with a substrate held transport jig.

5. The semiconductor manufacturing apparatus according to claim 1, wherein the coating object is a semiconductor chip that is mounted to a substrate and connected to the substrate by a bonding wire.

6. The semiconductor manufacturing apparatus according to claim 5, wherein the control section is configured to perform the coating in a ring shape at a peripheral portion of the coating object by the coating device.

7. The semiconductor manufacturing apparatus according to claim 6, further comprising: a mounting head, the control section is configured to place a workpiece on the paste coated on the semiconductor chip by the mounting head.

8. The semiconductor manufacturing apparatus according to claim 7, wherein the workpiece is a glass chip, the paste contains an ultraviolet-curable adhesive.

9. A coating apparatus characterized by comprising: Possessing: a syringe that stores a paste; a nozzle support provided at a front end of the syringe; a nozzle provided at the nozzle support; a heating section that heats the nozzle; and a control section configured to adjust the temperature of the nozzle by the heating section, and to coat the paste from the nozzle onto a coating object.

10. The coating device according to claim 9, wherein the control section is configured to maintain the temperature adjustment of the nozzle support during a continuous coating operation that repeatedly performs an operation of ejecting the paste from the nozzle and stopping the ejection, and to stop the heating of the nozzle support during a standby period in which the continuous coating operation is not performed.

11. The coating device according to claim 10, wherein the control section is configured to heat the nozzle support by the heating section before starting the coating to the coating object.

12. The coating device according to claim 9, wherein ​ The coated object is a semiconductor chip mounted on a substrate and connected to the substrate by a bonding wire.

13. A method of manufacturing a semiconductor device, characterized by Comprising: a process of coating the paste on the coated object by the coating apparatus of claim 12; and a process of mounting a bare chip on the semiconductor chip.

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