Vertical cavity surface emitting laser, preparation method and light source module

Abstract

The invention provides a vertical cavity surface emitting laser, a preparation method and a light source module, and the vertical cavity surface emitting laser comprises an N-type Bragg reflection layer, an active layer, a first oxidation limiting layer and a P-type Bragg reflection layer which are sequentially stacked. The N-type Bragg reflection layer, the active layer, the first oxidation limiting layer and the P-type Bragg reflection layer which are stacked form a mesa structure, and an ion implantation region is arranged in a region, extending towards the interior of the mesa structure, of the peripheral surface of the mesa structure; wherein in the horizontal direction, the depth of the ion implantation region is smaller than or equal to the depth of the first oxidation limiting layer, so that the influence of peripheral stray capacitance on the whole device is avoided by utilizing the structure of the device, the performance stability of the device is improved, and the application cost of a hardware circuit for correspondingly limiting the stray capacitance is reduced.

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to the technical field of laser, in particular to a vertical cavity surface emitting laser, a preparation method and a light source module. BACKGROUND

[0002] The vertical cavity surface emitting laser (VCSEL) has the advantages of small volume, circular output light spot, single longitudinal mode output, small threshold current and easy integration of large area array, and is widely used in optical communication, optical interconnection and optical storage fields. However, the parasitic capacitance of the device will affect the performance of the device in the application of the VCSEL. SUMMARY

[0003] The present application provides a vertical cavity surface emitting laser, a preparation method and a light source module, which avoids the influence of peripheral parasitic capacitance on the overall device by using its own structure, improves the performance stability of the device, and reduces the application cost of the corresponding hardware circuit which limits the parasitic capacitance.

[0004] In the first aspect, the embodiment of the present application provides a vertical cavity surface emitting laser, comprising: N-type Bragg reflection layer, active layer, first oxidation limiting layer and P-type Bragg reflection layer which are stacked in sequence.

[0005] The N-type Bragg reflection layer, the active layer, the first oxidation limiting layer and the P-type Bragg reflection layer are stacked to form a mesa structure, and an ion implantation region is arranged in the area extending from the periphery of the mesa structure to the inside of the mesa structure; wherein, in the horizontal direction, the depth of the ion implantation region is less than or equal to the depth of the first oxidation limiting layer.

[0006] Optionally, the vertical cavity surface emitting laser further comprises: a second oxidation limiting layer, the second oxidation limiting layer is arranged between the first oxidation limiting layer and the P-type Bragg reflection layer; wherein, the depth of the second oxidation limiting layer is less than or equal to the depth of the first oxidation limiting layer.

[0007] Optionally, the second oxidation limiting layer comprises at least two oxidation layers; the high aluminum component layer in the P-type Bragg reflection layer after oxidation is used as the oxidation layer.

[0008] Optionally, the vertical cavity surface emitting laser further comprises: a first ohmic contact layer and a first electrode.

[0009] The mesa structure is arranged on the first ohmic contact layer; the first electrode is arranged on the first ohmic contact layer, and the first electrode comprises a surrounding area and an extending area; wherein the first electrode of the surrounding area is closed loop around the mesa structure, or the first electrode of the surrounding area has at least one gap and is non-closed loop around the mesa structure; the first electrode of the extending area extends outward away from the mesa structure.

[0010] Optionally, the vertical cavity surface emitting laser further comprises at least one insulating layer, a second ohmic contact layer, a second electrode, a first metal layer and a second metal layer.

[0011] The second ohmic contact layer is arranged on the P-type Bragg reflection layer away from the active layer, and the second electrode is arranged on the second ohmic contact layer away from the active layer, and the second electrode is electrically connected with the second ohmic contact layer.

[0012] The at least one insulating layer covers the sidewall of the mesa structure, the first ohmic contact layer, the first electrode, the second ohmic contact layer and the second electrode.

[0013] The at least one insulating layer comprises a connecting area and a through hole; the connecting area is used for leaking out part of the first electrode of the extending area; and the first metal layer is connected with the first electrode of the extending area through the connecting area.

[0014] The through hole is used for leaking out part of the second electrode, and the second metal layer is connected with the second electrode through the through hole; the vertical projection of the second metal layer on the first ohmic contact layer does not overlap with the vertical projection of the first electrode on the first ohmic contact layer, and the vertical projection of the second metal layer on the first ohmic contact layer does not overlap with the vertical projection of the first metal layer on the first ohmic contact layer.

[0015] Optionally, the second metal layer extends to the plane on one side of the mesa structure along the sidewall path of the mesa structure on the surface of the at least one insulating layer.

[0016] In a second aspect, an embodiment of the present application provides a preparation method of a vertical cavity surface emitting laser, comprising:

[0017] forming N-type Bragg reflection layer, active layer, first oxidation limiting layer and P-type Bragg reflection layer which are sequentially stacked;

[0018] etching the first oxidation limiting layer and the P-type Bragg reflection layer to form a first step structure;

[0019] oxidizing the first oxidation limiting layer;

[0020] performing ion implantation on the first stepped structure and the structure below;

[0021] The N-type Bragg reflective layer and the active layer are etched to form a second stepped structure; the first stepped structure and the second stepped structure form a mesa structure; an ion implantation region is provided in an area extending from the periphery of the mesa structure to the interior of the mesa structure; wherein, in a horizontal direction, a depth of the ion implantation region is less than or equal to a depth of the first oxide restriction layer.

[0022] Optionally, the vertical cavity surface emitting laser further includes a first ohmic contact layer and a first electrode, and the mesa structure is provided on the first ohmic contact layer;

[0023] After etching the N-type Bragg reflective layer and the active layer to form a second stepped structure, the method includes:

[0024] The insulating layer on the first ohmic contact layer is etched according to a preset pattern to generate a first electrode in the etched area; wherein the first electrode includes a surrounding area and an extension area; the first electrodes in the surrounding area and the extension area are integrally connected; wherein the first electrode in the surrounding area surrounds the mesa structure in a closed loop, or the first electrode in the surrounding area has a gap and surrounds the mesa structure in a non-closed loop; the first electrode in the extension area extends outward away from the mesa structure.

[0025] In a third aspect, an embodiment of the present invention provides a light source module, comprising the vertical cavity surface emitting laser described in any embodiment of the present invention.

[0026] The technical solution provided by the embodiments of the present invention provides an ion implantation region extending inward from the periphery of the mesa structure. In the horizontal direction, the depth of the ion implantation region is less than or equal to the depth of the first oxide confinement layer. The ion implantation region near the active layer restricts carriers, allowing the injected current to be further injected into the active layer. Because the ion implantation region is distributed over the entire periphery of the mesa structure, it can serve as an isolation layer, thereby utilizing its own structure to prevent the impact of peripheral parasitic capacitance on the overall device, improving the performance stability of the device and reducing the application cost of the corresponding hardware circuit for limiting parasitic capacitance. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 A schematic diagram of a top view of a vertical cavity surface emitting laser provided in an embodiment of the present invention;

[0028] Figure 2 for Figure 1 Schematic diagram of the cross-sectional structure of AA`;

[0029] Figure 3 for Figure 1 Schematic diagram of the cross-sectional structure of the middle BB`;

[0030] Figure 4 A schematic diagram of a top-down structure of electrodes of a vertical cavity surface emitting laser is provided;

[0031] Figure 5 A schematic diagram of a top view structure of an electrode of another vertical cavity surface emitting laser is provided;

[0032] Figure 6 A schematic flow chart of a method for manufacturing a vertical cavity surface emitting laser provided in an embodiment of the present invention;

[0033] Figure 7 A schematic structural diagram of an intermediate process of a method for manufacturing a vertical cavity surface emitting laser provided by an embodiment of the present invention;

[0034] Figure 8 A schematic structural diagram of an intermediate process of a method for manufacturing a vertical cavity surface emitting laser provided by an embodiment of the present invention;

[0035] Figure 9 A schematic structural diagram of an intermediate process of a method for preparing a vertical cavity surface emitting laser provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0036] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0037] VCSEL is a semiconductor laser structure that forms an optical resonant cavity in a direction perpendicular to the semiconductor epitaxial wafer and emits a laser beam perpendicular to the substrate surface. It has the advantages of small size, low power consumption, high efficiency, long life, circular beam, and two-dimensional array integration. The parasitic effects of VCSEL will affect the injection current into the active area, thereby limiting the high-speed modulation performance of VCSEL. Therefore, in order to obtain a high modulation bandwidth, it is necessary to reduce the impact of limiting factors such as parasitic capacitance on the modulation bandwidth. In the prior art, the impact of peripheral parasitic effects is reduced by designing peripheral circuits, which also reduces the hardware cost of device preparation to a certain extent.

[0038] In view of this, Figure 1 A schematic diagram of a vertical cavity surface emitting laser (VCSEL) according to an embodiment of the present invention is shown in FIG. Figure 2 forFigure 1 A cross-sectional structure diagram of the middle AA', Figure 3 is Figure 1 A cross-sectional structure diagram of the middle BB', see Figures 1-3 , comprising: N-type Bragg reflection layer 110, active layer 120, first oxidation limiting layer 130 and P-type Bragg reflection layer 140 are sequentially stacked;

[0039] The stacked N-type Bragg reflection layer 110, active layer 120, first oxidation limiting layer 130 and P-type Bragg reflection layer 140 form a mesa structure, and the ion implantation region 150 is provided in the area of the periphery of the mesa structure extending to the inside of the mesa structure; wherein, in the horizontal direction, the depth of the ion implantation region 150 is less than or equal to the depth of the first oxidation limiting layer 130.

[0040] Specifically, the main structure of the VCSEL is composed of three parts of the upper and lower Bragg reflection layers and the middle active layer 120, as shown in Figure 2 and Figure 3 The epitaxial structure from bottom to top is substrate, first ohmic connection layer 320, N-type Bragg reflection layer 110, active layer 120, first oxidation limiting layer 130, P-type Bragg reflection layer 140 and second ohmic connection layer 330. The middle region of the first oxidation limiting layer 130 which is not oxidized forms an oxidation hole, and the oxidation hole serves as a channel for current and photons. The structure of the oxidation hole can effectively reduce the threshold current of the VCSEL laser.

[0041] The N-type Bragg reflection layer 110 and the P-type Bragg reflection layer 140 are generally formed by alternately growing two materials with different refractive indexes and a quarter of the thickness of the light wavelength, for example, alternately forming a gallium arsenide material layer and a gallium aluminum arsenide material layer. In order to reduce optical loss, the reflectivity of the N-type Bragg reflection layer 110 is close to 100%, which can be used as a full mirror of the resonant cavity, and the reflectivity of the P-type Bragg reflection layer 140 is relatively low, which can be used as an exit mirror of the resonant cavity. The N-type Bragg reflection layer 110, the active layer 120, the first oxidation limiting layer 130 and the P-type Bragg reflection layer 140 form a mesa structure after etching. The sidewall region of the mesa structure, that is, the region extending inwardly from the periphery of the mesa structure, is ion implanted on both sides of the N-type Bragg reflection layer 110, the active layer 120, the first oxidation limiting layer 130 and the P-type Bragg reflection layer 140 to form an ion implantation region 150 by an ion implantation process. The ion implantation process is to implant charged particles with a certain energy into semiconductor materials by using a high-energy ion implantation device, so as to change the electrical and optical properties of the semiconductor materials. The energy of ion implantation can be determined according to the mass of the ion and the implantation depth. In the horizontal direction, the depth of the ion implantation region 150 is less than or equal to the depth of the first oxidation limiting layer 130, so as to avoid that a large implantation depth narrows the aperture of the oxidation hole, thereby affecting the passing efficiency of the current. At the same time, the ion implantation region 150 forms a high-resistance region in the periphery of the mesa structure, and the ion implantation region 150 near the active layer 120 limits the carriers, so as to further inject the injection current into the active layer 120. The ion implantation region 150 is distributed on the entire periphery of the mesa structure, so that the ion implantation region 150 can be used as an isolation layer to play an isolation role, thereby avoiding the influence of the peripheral parasitic capacitance on the overall device.

[0042] The technical scheme provided by the embodiment of the present application sets the ion implantation region in the region extending inwardly from the periphery of the mesa structure, and in the horizontal direction, the depth of the ion implantation region is less than or equal to the depth of the first oxidation limiting layer. The ion implantation region near the active layer limits the carriers, so as to further inject the injection current into the active layer. Since the ion implantation region is distributed on the entire periphery of the mesa structure, the ion implantation region can be used as an isolation layer to play an isolation role, thereby avoiding the influence of the peripheral parasitic capacitance on the overall device by using the structure itself, improving the performance stability of the device, and reducing the application cost of the corresponding parasitic capacitance limiting hardware circuit.

[0043] In a general VCSEL structure, the lateral dimension (horizontal dimension) of the VCSEL is usually tens of microns, which leads to insufficient confinement of the lateral optical field of the VCSEL, resulting in multi-lateral-mode output, and the multi-lateral-mode is asymmetrically distributed, which can cause the bandwidth of the output to increase and the beam divergence angle to become larger. Therefore, the first oxidation confinement layer 130 is used to confine the lateral optical field. In the preparation process, the first oxidation confinement layer 130 forms an insulating layer after oxidation, and the unoxidized area forms an oxidation hole, which causes the current of the VCSEL to be concentrated in the active layer 120, thereby reducing the threshold current of the VCSEL. However, since the first oxidation confinement layer 130 is located between the N-type Bragg reflection layer 110 and the P-type Bragg reflection layer 140, when the VCSEL is working, the first oxidation confinement layer 130 is charged and discharged first, and then the current is injected into the active layer 120 to generate photons, thereby generating intrinsic parasitic capacitance. From the expression formula of the capacitance C = πe0e1 / d, where e0 is the vacuum permittivity, e1 is the dielectric constant of the insulating layer, and d is the thickness of the insulating layer, it can be seen that the thinner the thickness of the oxidation confinement layer, the larger the parasitic capacitance.

[0044] In order to improve the bandwidth of the VCSEL, the intrinsic parasitic capacitance should be reduced as much as possible. Therefore, in some embodiments, the vertical cavity surface emitting laser further comprises: a second oxidation confinement layer 210, the second oxidation confinement layer 210 is arranged between the first oxidation confinement layer 130 and the P-type Bragg reflection layer 140; wherein the depth of the second oxidation confinement layer 210 is less than or equal to the depth of the first oxidation confinement layer 130. By using multiple oxidation confinement layers, the moving direction of the carriers is changed, so that the carriers move in the effective direction, thereby improving the gain. Here, the depth of the second oxidation confinement layer 210 is less than or equal to the depth of the first oxidation confinement layer 130, so as to avoid the second oxidation confinement layer 210 narrowing the aperture of the oxidation hole, thereby affecting the current passing efficiency. Moreover, using the multi-layer oxidation confinement layer structure can reduce the parasitic capacitance of the VCSEL device and improve the modulation bandwidth thereof.

[0045] In some embodiments, the P-type Bragg reflection layer 140 is formed by alternating layers of GaAs material and GaAlAs material with a quarter of the wavelength of light thickness. Because the P-type Bragg reflection layer 140 has a high aluminum component layer, which is usually GaAlAs material, after the P-type region of the epitaxial wafer is etched to form the upper half of the mesa structure, i.e., the first step mesa of the active region, the high aluminum component layer of the P-type Bragg reflection layer 140 and the first oxidation confinement layer 130 are exposed. Then, by using a wet oxidation process to oxidize the first oxidation confinement layer 130 in the platform, at least two outer layers of the high aluminum component layer of the P-type Bragg reflection layer 140 can be oxidized to aluminum oxide, while the middle region is not oxidized to form an oxidation hole. Thus, the second oxidation confinement layer is formed by at least two layers of the high aluminum component layer of the P-type Bragg reflection layer 140. Because the thickness of the GaAlAs material layer corresponding to the high aluminum component layer in the P-type Bragg reflection layer 140 is relatively thick, the parasitic capacitance of the active region can be reduced by using multiple layers of the high aluminum component layer to form the oxidation confinement layer.

[0046] Continuing to refer to Figure 1 and Figure 2 In some embodiments, the vertical cavity surface emitting laser further includes: a first ohmic contact layer 320 and a first electrode 310;

[0047] The mesa structure is disposed on the first ohmic contact layer 320; the first electrode 310 is disposed on the first ohmic contact layer 320, and the first electrode 310 includes a surrounding area 311 and an extension area 312; wherein the first electrode 310 of the surrounding area 311 is a closed loop surrounding the mesa structure, or the first electrode 310 of the surrounding area 311 has at least one gap and is a non-closed loop surrounding the mesa structure; the first electrode 310 of the extension area 312 extends outward away from the mesa structure.

[0048] Specifically, the first ohmic contact layer 320 is a doped GaN-type connection layer, and a first ohmic contact layer 320 is disposed on the surface of the substrate. The first ohmic contact layer 320 is in contact with the N-type Bragg reflection layer 110 of the mesa structure. The first electrode 310 is disposed on the first ohmic contact layer 320, and the first electrode 310 includes a surrounding area 311 and an extension area 312. In the surrounding area 311, the first electrode 310 is distributed on the first ohmic contact layer 320 around the mesa structure. The first electrode 310 can be a closed loop or a half-ring with an opening. By surrounding, the contact area of the first electrode 310 and the first ohmic contact layer 320 is increased, and the uniformity of current injection is also provided. The first electrode 310 of the extension area 312 is used for line extension, and the first electrode 310 can be routed according to a predetermined route. It should be noted that, in some embodiments, the first electrode 310 of the surrounding area 311 has a gap, and surrounds the mesa structure in the form of a half-ring or multiple half-rings.Figure 4 and Figure 5 Provided is a schematic diagram of a top view of an electrode of a vertical cavity surface emitting laser, a gap position can avoid a line of a redistribution metal of a second electrode, and flexibility of a layout of a wire is improved.

[0049] Continuing to refer to Figures 1 to 3 Optionally, the vertical cavity surface emitting laser further comprises at least one insulating layer 350, a second ohmic contact layer 330, a second electrode 340, a first metal layer 360, and a second metal layer 370.

[0050] The second ohmic contact layer 330 is arranged on a side of the P-type Bragg reflection layer 140 away from the active layer 120, the second electrode is arranged on a side of the second ohmic contact layer 330 away from the active layer 120, and the second electrode 340 is electrically connected to the second ohmic contact layer 330.

[0051] The at least one insulating layer 350 covers the sidewall of the mesa structure, the first ohmic contact layer 320, the first electrode 310, the second ohmic contact layer 330, and the second electrode 340.

[0052] Specifically, the second ohmic contact layer 330 is arranged on a surface of the P-type Bragg reflection layer 140, and the second electrode 340 is arranged on a surface of the second ohmic contact layer 330. The second electrode 340 can be designed to have a corresponding pattern to improve uniformity during current injection. For example, the second electrode 340 can be arranged in a circular ring shape on the P-type Bragg reflection layer 140. In the preparation process, in order to protect the surface of the second electrode 340, an insulating layer can be arranged on the surface of the second electrode 340. In the subsequent process of gradually etching to form the mesa structure, a plurality of insulating layers 350 can be prepared correspondingly, wherein the insulating layer 350 plays a protective role.

[0053] In some embodiments, when the first electrode 310 and the second electrode 340 need to be designed for redistribution, a connection area and a via hole can be arranged on the at least one insulating layer 350. The connection area is used to leak out the first electrode 310 of the partial extension area 312, the first metal layer 360 is connected to the first electrode 310 of the extension area 312 through the connection area, the via hole is used to leak out the second electrode 340, and the second metal layer 370 is connected to the second electrode 340 through the via hole. The vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first electrode 310 on the first ohmic contact layer 320, and the vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first metal layer 360 on the first ohmic contact layer 320.

[0054] Specifically, the position where the insulating layer 350 and the orthographic projection of the first electrode 310 of the extension region 312 have an overlapping position can be provided with a connection region, the first metal layer 360 covers the connection region to be electrically connected with the first electrode 310, and the first metal layer 360 can be extended as needed and designed as a corresponding pad. Correspondingly, the second electrode 340 is on the top surface of the mesa structure, and therefore the position where the insulating layer 350 and the orthographic projection of the second electrode 340 have an overlapping position can be provided with a hole to form a through hole. The second metal layer 370 can be connected with the second electrode 340 through the through hole, and the second metal layer 370 can be extended as needed and designed as a corresponding pad. The second metal layer 370 can extend to a position region on the same plane as the first metal layer 360. For example, the second metal layer 370 extends along the sidewall path of the mesa structure on the surface of the insulating layer 350 to the plane on one side of the mesa structure, so as to realize the design of the coplanar first metal layer 360 and second metal layer 370. The vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first electrode 310 on the first ohmic contact layer 320, and the vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first metal layer 360 on the first ohmic contact layer 320, that is, the first electrode 310 and the second electrode 340 are separated by the first metal layer 360 and the second metal layer 370, and the first metal layer 360 and the second metal layer 370 are separated by the first electrode 310 and the second electrode 340, so as to reduce the parasitic capacitance between the electrode and the metal layer and between the metal layers, and improve the high-speed characteristics of the device. Figure 1 As shown in FIG. 6, the orthographic projection of the first electrode 310 and the second electrode 340 does not overlap, and the orthographic projection of the first metal layer 360 and the second metal layer 370 does not overlap, so as to reduce the parasitic capacitance between the electrode and the metal layer and between the metal layers, and improve the high-speed characteristics of the device.

[0055] Figure 5 A flowchart of a preparation method of a vertical cavity surface emitting laser provided by an embodiment of the present application is shown in FIG. 6. Figure 6 An intermediate process structure diagram of a preparation method of a vertical cavity surface emitting laser provided by an embodiment of the present application is shown in FIG. 6. Figures 5-6 , comprising:

[0056] S110, forming an N-type Bragg reflection layer, an active layer, a first oxidation limiting layer and a P-type Bragg reflection layer which are sequentially stacked;

[0057] Specifically, considering the process and progress of each layer in the structure of the vertical cavity surface emitting laser, the first ohmic contact layer 320, the N-type Bragg reflection layer 110, the active layer 120, the first oxidation limiting layer 130, the P-type Bragg reflection layer 140 and the second ohmic contact layer 330 can be sequentially epitaxially grown on the substrate, the second electrode 340 of a preset shape is prepared on the second ohmic contact layer 330, and an insulating layer 350 is generated on the surface of the second electrode 340.

[0058] S120, etching the first oxidation limiting layer and the P-type Bragg reflection layer to form a first stepped structure;

[0059] Specifically, the first oxidation confinement layer 130, the P-type Bragg reflector layer 140, and the second ohmic contact layer 330 of the P-type region are etched, and the etched first oxidation confinement layer 130 and the P-type Bragg reflector layer 140 are denoted as a first stepped structure.

[0060] S130, oxidizing the first oxidation confinement layer;

[0061] Specifically, the first oxidation confinement layer 130 in the platform is oxidized by using a wet oxidation process, and the middle region is not oxidized to form an oxidation hole. Before the next step, an insulating layer 350 can be arranged for protection.

[0062] In some embodiments, while the first oxidation confinement layer 130 is subjected to the oxidation process in step S130, at least two layers of high aluminum component layers in the P-type Bragg reflector layer 140 can also be oxidized to form a second oxidation confinement layer 210, wherein the depth of the second oxidation confinement layer 210 is less than or equal to the depth of the first oxidation confinement layer 130.

[0063] The P-type Bragg reflector layer 140 is formed by alternating layers of gallium arsenide material and gallium aluminum arsenide material with a quarter wavelength thickness. Since the P-type Bragg reflector layer 140 has high aluminum component layers, which are usually gallium aluminum arsenide material, after the first stepped mesa of the active region is formed by etching the epitaxial wafer during preparation, the high aluminum component layers of the P-type Bragg reflector layer 140 and the first oxidation confinement layer 130 are exposed. Then, after the first oxidation confinement layer 130 in the platform is oxidized by using a wet oxidation process, the outer ring components of at least two layers of high aluminum component layers of the P-type Bragg reflector layer 140 are oxidized to aluminum oxide, while the middle region is not oxidized to form an oxidation hole. Thus, the second oxidation confinement layer is formed by using at least two layers of high aluminum component layers of the P-type Bragg reflector layer 140. Since the layer thickness of the gallium aluminum arsenide material layer corresponding to the high aluminum component layer in the stack of the P-type Bragg reflector layer 140 is relatively thick, the parasitic capacitance of the active region is reduced by using multiple high aluminum component layers to form the oxidation confinement layer.

[0064] S140, ion implantation is performed on the first stepped structure and the structure below;

[0065] Specifically, the ion implantation area 150 is formed by ion implantation on both sides of the N-type Bragg reflector 110, the active layer 120, the first oxidation confinement layer 130 and the P-type Bragg reflector 140. The ion implantation process is to implant charged particles with certain energy into semiconductor materials by high-energy ion implantation equipment, so as to change the electrical and optical properties of the semiconductor materials. The energy of ion implantation can be determined according to the mass of ions and the implantation depth. In order to improve the consistency of the implantation depth in the horizontal direction, that is, the implantation depth on the side close to the edge of the oxidation hole is as uniform as possible, the ion implantation can be performed on the first stepped structure and the structure below in the vertical direction.

[0066] S150, etching the N-type Bragg reflector and the active layer to form a second stepped structure; the first stepped structure and the second stepped structure form a mesa structure; the region of the side surface of the mesa structure extending to the inside of the mesa structure has an ion implantation area; wherein, in the horizontal direction, the depth of the ion implantation area is less than or equal to the depth of the first oxidation confinement layer.

[0067] Specifically, the N-type Bragg reflector 110 and the active layer 120 of the N-type region are etched, and the etched N-type Bragg reflector 110 and the active layer 120 are denoted as a second stepped structure. At this time, the first stepped structure and the second stepped structure form a mesa structure, and then a layer of insulating layer 350 is generated. The sidewall region of the mesa structure, that is, the ion implantation area 150 retained in the region extending to the inside of the mesa structure, has a depth in the horizontal direction less than or equal to the depth of the first oxidation confinement layer 130, which avoids that a larger implantation depth narrows the caliber of the oxidation hole, thereby affecting the passing efficiency of the current. At the same time, the ion implantation area 150 forms a high-resistance area in the circumferential direction of the mesa structure, and the ion implantation area 150 near the active layer 120 restricts the carriers, which can make the injected current further injected into the active layer 120. The ion implantation area 150 is distributed on the entire circumferential surface of the mesa structure, so the ion implantation area 150 can act as an isolation layer and play an isolation role, thereby avoiding the influence of the peripheral parasitic capacitance on the overall device. Exemplarily, the structure is as shown in Figure 7

[0068] ​Optionally, after the etching of the N-type Bragg reflection layer and the active layer to form the second step structure in S150, the method further comprises: etching the insulating layer 350 on the first ohmic contact layer 320 according to a preset pattern in the setting area of the first electrode 310 on the first ohmic contact layer 320, and generating the first electrode 310 in the etched area; wherein the first electrode 310 comprises a surrounding area 311 and an extension area 312; the first electrode 310 in the surrounding area 311 and the extension area 312 are integrally connected; wherein the first electrode 310 in the surrounding area 311 forms a closed loop to surround the mesa structure, or the first electrode 310 in the surrounding area 311 has a notch to form an open loop to surround the mesa structure; the first electrode 310 in the extension area 312 extends outward away from the mesa structure.

[0069] The overlapping position of the second metal layer 370 of the second electrode 340 on the surface of the first ohmic contact layer 320 can be removed by etching process, and the setting position of the second metal layer 370 is reserved, and then an insulating layer 350 is formed on the whole structure. Thus, the intermediate structure in the region of the first electrode 310 and the second electrode 340 is obtained, wherein, Figure 8 、 Figure 9 Figure 8 and Figure 9 are intermediate process structure schematic diagrams of a preparation method of a vertical cavity surface emitting laser provided by the embodiments of the present application.

[0070] The first metal layer 360 and the second metal layer 370 are designed to be rerouted. The connection area and the through hole are set on the at least one insulating layer 350; the connection area is used for leaking out the first electrode 310 in the part of the extension area 312; the first metal layer 360 is connected with the first electrode 310 in the extension area 312 through the connection area; the through hole is used for leaking out the second electrode 340, and the second metal layer 370 is connected with the second electrode 340 through the through hole; the vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first electrode 310 on the first ohmic contact layer 320, and the vertical projection of the second metal layer 370 on the first ohmic contact layer 320 does not overlap with the vertical projection of the first metal layer 360 on the first ohmic contact layer 320, as shown in the structure of Figure 2 and Figure 3 .

[0071] The embodiments of the present application further provide a light source module, wherein the light source module can be a point light source or an array light source, and is applied to the fields of display, communication and sensing, etc. Since the light source module comprises the vertical cavity surface emitting laser of any embodiment of the present application, the light source module has the same beneficial effects, which will not be described herein.

[0072] ​It should be pointed out finally that the above embodiments are only used to illustrate the technical solutions of the present application, but not to limit the same; and although the present application has been described in detail with reference to the foregoing embodiments, it should be appreciated by those skilled in the art that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features thereof can be replaced equivalently; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A vertical cavity surface emitting laser, characterized by Comprise: N-type Bragg reflection layer, active layer, first oxidation limiting layer and P-type Bragg reflection layer are stacked in turn; The N-type Bragg reflection layer, the active layer, the first oxidation limiting layer and the P-type Bragg reflection layer are stacked and form a mesa structure, the ion implantation area is arranged on the area of the periphery of the mesa structure extending to the inside of the mesa structure;Wherein, in the horizontal direction, the depth of the ion implantation area is less than or equal to the depth of the first oxidation limiting layer.

2. The vertical cavity surface emitting laser of claim 1, wherein, Also include: The second oxidation limiting layer is arranged between the first oxidation limiting layer and the P-type Bragg reflection layer;Wherein, the depth of the second oxidation limiting layer is less than or equal to the depth of the first oxidation limiting layer.

3. The vertical cavity surface emitting laser of claim 2, wherein, The second oxidation limiting layer comprises at least two oxidation layers;The high aluminum component layer in the P-type Bragg reflection layer after oxidation as the oxidation layer.

4. The vertical cavity surface emitting laser of claim 1, wherein, Also include: The first ohmic contact layer and the first electrode; The mesa structure is arranged on the first ohmic contact layer;The first electrode is arranged on the first ohmic contact layer, and the first electrode comprises a surrounding area and an extension area;Wherein, the first electrode of the surrounding area is closed loop around the mesa structure, or the first electrode of the surrounding area has at least one gap and is not closed loop around the mesa structure;The first electrode of the extension area extends outward away from the mesa structure.

5. The vertical cavity surface emitting laser of claim 4, wherein, Also include at least one insulating layer, a second ohmic contact layer, a second electrode, a first metal layer and a second metal layer; The second ohmic contact layer is arranged on the side of the P-type Bragg reflection layer away from the active layer, and the second electrode is arranged on the side of the second ohmic contact layer away from the active layer, and the second electrode is electrically connected with the second ohmic contact layer; The at least one insulating layer covers the sidewall of the mesa structure, the first ohmic contact layer, the first electrode, the second ohmic contact layer and the second electrode; Wherein, the at least one insulating layer comprises a connecting area and a through hole;The connecting area is used for leaking out part of the first electrode of the extension area;The first metal layer is connected with the first electrode of the extension area through the connecting area; The through hole is used for leaking out part of the second electrode, and the second metal layer is connected with the second electrode through the through hole;The vertical projection of the second metal layer on the first ohmic contact layer does not overlap with the vertical projection of the first electrode on the first ohmic contact layer, and the vertical projection of the second metal layer on the first ohmic contact layer does not overlap with the vertical projection of the first metal layer on the first ohmic contact layer.

6. The vertical cavity surface emitting laser of claim 5, wherein, The second metal layer extends to the plane on one side of the mesa structure along the sidewall path of the mesa structure on the surface of the at least one insulating layer.

7. A method of manufacturing a vertical cavity surface emitting laser, characterized by, Comprise: Form N-type Bragg reflection layer, active layer, first oxidation limiting layer and P-type Bragg reflection layer stacked in turn; Etching the first oxidation limiting layer and the P-type Bragg reflection layer to form a first step structure; Oxidize the first oxidation limiting layer; Ion implantation is carried out on the first step structure and the structure below. Etching the N-type Bragg reflection layer and the active layer to form a second stepped structure; the first stepped structure and the second stepped structure form a mesa structure; the peripheral surface of the mesa structure extends to the area of the interior of the mesa structure, which has an ion implantation region; wherein, in the horizontal direction, the depth of the ion implantation region is less than or equal to the depth of the first oxidation confinement layer.

8. The method of producing a vertical cavity surface emitting laser according to claim 7, wherein At the same time of the oxidation process of the first oxidation confinement layer, at least two high aluminum component layers in the P-type Bragg reflection layer are oxidized to form a second oxidation confinement layer, wherein the depth of the second oxidation confinement layer is less than or equal to the depth of the first oxidation confinement layer.

9. The preparation method of the vertical cavity surface emitting laser according to claim 7, characterized in that, The vertical cavity surface emitting laser further comprises a first ohmic contact layer and a first electrode, and the mesa structure is arranged on the first ohmic contact layer. After etching the N-type Bragg reflection layer and the active layer to form a second stepped structure, comprising: Etching the insulating layer on the first ohmic contact layer according to a preset pattern to generate a first electrode in the etched area; wherein, the first electrode comprises a surrounding area and an extending area; the first electrode in the surrounding area and the extending area are integrally connected; wherein, the first electrode of the surrounding area is closed loop and surrounds the mesa structure, or the first electrode of the surrounding area has a notch and does not surround the mesa structure in a closed loop; the first electrode of the extending area extends outward away from the mesa structure.

10. A light source module, characterized by The vertical cavity surface emitting laser according to any one of claims 1-6.

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