Film bulk acoustic resonator and preparation method thereof

Abstract

The invention discloses a thin film bulk acoustic resonator and a preparation method, and particularly relates to the technical field of third-generation semiconductors and radio frequency front-end devices, a silicon substrate is cleaned to remove organic pollutants and an oxide layer, then a sacrificial layer and a supporting layer are deposited, then a bottom electrode is deposited and subjected to rapid heat treatment, and then a piezoelectric layer and a top electrode are deposited, so that the thin film bulk acoustic resonator is obtained. According to the method, the electrical performance of the electrode film is improved through the rapid heat treatment, then the performance of the film bulk acoustic resonator is improved, the roughness of the electrode film can be reduced, growth of a high-quality AlN film is facilitated, the capacity loss is reduced, and the performance of the film bulk acoustic resonator is improved. Meanwhile, stress of the electrode film can be released, collapse of the resonator structure caused by stress concentration due to the self-heating effect of the resonator is prevented, the power capacity of the resonator is improved, electrical loss is restrained, and structural stress is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of third-generation semiconductor technology and radio frequency front-end device technology, and in particular to a thin film bulk acoustic resonator and a preparation method thereof. BACKGROUND

[0002] Since the beginning of the 21st century, the rapid development of artificial intelligence has promoted the progress of human science and economy, and greatly improved the living conditions and habits of mankind. With the rapid development of artificial intelligence, higher requirements are put forward for human-computer interaction and long-distance information exchange. This puts higher requirements on the delay, flux and loss of wireless communication technology. Therefore, the development of high-performance and high-power bulk acoustic resonators has important value for improving the performance of wireless communication.

[0003] At present, the electrode thin film prepared by the mainstream physical vapor deposition method has high crystal defects and low element transverse mobility, which limits the movement of mobile charges in the electrode thin film and increases the surface electron scattering, thereby causing the resistance of the thin film to be high, and the electrical loss of the bulk acoustic resonator to be high.

[0004] In addition, during the deposition process of the prior art thin film, stress is generated during the crystal growth of the thin film grains, and this stress will continue to accumulate with the deposition of the thin film. When the device works at high power, it will heat and expand, and the large stress of the thin film will squeeze the thin film, causing the thin film to break and the device to fail. SUMMARY

[0005] The main purpose of the present application is to provide a thin film bulk acoustic resonator and a preparation method, which can effectively solve the problems involved in the background art.

[0006] To achieve the above-mentioned purpose, the technical solution adopted by the present application is as follows: A preparation method of a thin film bulk acoustic resonator, comprising the following steps: S1, cleaning the silicon substrate, and removing organic contaminants and oxide layers in sequence by using acetone, isopropyl alcohol and hydrofluoric acid; S2, depositing a sacrificial layer on the surface of the silicon substrate; S3, depositing a support layer on the sacrificial layer; S4, depositing a bottom electrode on the support layer; S5, rapidly heat treating the bottom electrode in an inert gas atmosphere, the heating rate is 5-20℃ / s, and the holding temperature is 200-900℃; S6, depositing a piezoelectric layer on the heat-treated bottom electrode; S7, depositing a top electrode on the piezoelectric layer; S8, rapidly heat treating the top electrode in an inert gas atmosphere, the heating rate is 15-20℃ / s, and the holding temperature is 500-700℃; S9, selectively etching the sacrificial layer to form a cavity.

[0007] Preferably, the rapid thermal treatment in steps S5 and S8 comprises: periodically introducing argon pulse flow into the thermal treatment furnace, the pulse frequency is 1-5 Hz, and the single pulse duration is 0.5-2 s.

[0008] Preferably, in step S3: the support layer is a Si3N4 / SiC laminated structure, wherein the SiC sublayer is adjacent to the sacrificial layer, and the Si3N4 sublayer covers the SiC sublayer, and the thickness ratio is 1:(0.2-0.5).

[0009] Preferably, after step S4, further comprising: pre-annealing the bottom electrode at low temperature, and keeping it in an argon atmosphere at 200-300℃ for 10-30 min to eliminate interface stress.

[0010] Preferably, in step S6: Sc ions are injected synchronously when depositing the piezoelectric layer to form (x=0.1-0.3), and the injection energy is 5-20 keV.

[0011] Preferably, in step S7: after depositing the top electrode, argon ion beam is used to bombard the surface at an inclination angle of 30°-60°, and the beam current density is 1-5 mA / cm² to realize surface nanocrystallization.

[0012] Preferably, step S9 comprises: first introducing SF6 / Cl2 mixed gas for dry etching to a remaining thickness of 20%-30% of the sacrificial layer, and then injecting HF vapor to complete wet release.

[0013] Preferably, the argon pulse flow is applied in the heating stage, and the pulse gas flow is 1.5-3 times the main gas flow.

[0014] Preferably, characterized in that: the Sc ion injection is carried out in multiple energy levels, and the energy gradient is 5 keV→10 keV→15 keV, corresponding to an increasing injection concentration gradient.

[0015] The application also discloses a thin film bulk acoustic resonator, comprising: a silicon substrate, a cavity on the silicon substrate, a support layer covering the cavity, a bottom electrode arranged on the support layer, a piezoelectric layer on the bottom electrode, and a top electrode arranged on the piezoelectric layer, wherein the support layer comprises a SiC sublayer and a Si3N4 sublayer, and the piezoelectric layer is Sc-doped AlN ).

[0016] Compared with the prior art, the application has the following beneficial effects: The application utilizes rapid heat treatment to improve the electrical performance of the electrode thin film, thereby improving the performance of the film bulk acoustic resonator, and can reduce the roughness of the electrode thin film, facilitate the growth of high-quality AlN thin film, reduce energy loss, thereby improving the performance of the resonator, and can release the stress of the electrode thin film, thereby preventing stress concentration caused by the self-heating effect of the resonator, causing the collapse of the resonator structure, thereby improving the power capacity of the resonator and suppressing electrical loss and reducing structural stress. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is a preparation flowchart of the application; Figure 2 is a flowchart of the composite support layer deposition process of the application; Figure 3 is a flowchart of the electrode interface optimization process chain of the application; Figure 4 is a flowchart of the electrode pulse heat treatment process of the application; Figure 5 is a flowchart of the Sc gradient doped piezoelectric layer process of the application; Figure 6 is a flowchart of the dry-wet combined cavity etching of the application; Figure 7 is a structural schematic diagram of the resonator of the application; Figure 8 is a preparation process schematic diagram of the resonator of the application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the application clearer, the technical scheme in the embodiments of the application will be described clearly and completely below in combination with the embodiments of the application. Those skilled in the art should understand that the embodiments are only to help understand the application and should not be regarded as a specific limitation on the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without making creative efforts fall within the scope of protection of the application. The process parameters not specified in the following embodiments are usually according to conventional conditions. EMBODIMENT

[0019] S1, clean the silicon substrate 101, and remove organic contaminants and oxide layers in sequence by using acetone, isopropyl alcohol and hydrofluoric acid; S2, deposit a sacrificial layer 107 on the surface of the silicon substrate 101; S3, deposit a support layer 103 on the sacrificial layer 107; S4, deposit a bottom electrode 104 on the support layer 103; S5, rapid thermal processing of the bottom electrode 104 in an inert gas atmosphere, the heating rate is 5-20℃ / s, the holding temperature is 200-900℃; S6, depositing the piezoelectric layer 105 on the bottom electrode 104 after heat treatment; S7, depositing the top electrode 106 on the piezoelectric layer 105; S8, rapid thermal processing of the top electrode 106 in an inert gas atmosphere, the heating rate is 15-20℃ / s, the holding temperature is 500-700℃; S9, selective etching of the sacrificial layer 107 to form the cavity 102.

[0020] In the traditional process, the electrode heat treatment is single steady-state annealing, which leads to uneven grain size (average grain difference ±15%); in this embodiment, pulse airflow assisted heat treatment is used to improve the Mo electrode grain uniformity to 95%, and the resistivity is reduced by 40%. The bending strength of the composite support layer 103 reaches 1.5 GPa (increased by 50% compared with pure Si3N4 layer), and the cavity collapse rate is reduced from 8% to 0.5%.

[0021] This embodiment also includes the following steps: In the implementation process, the rapid thermal processing of steps S5 and S8 includes: periodically introducing argon pulse airflow into the heat treatment furnace, the pulse frequency is 1-5Hz, and the single pulse duration is 0.5-2s.

[0022] Specifically, periodic argon pulse (frequency 3 Hz, single pulse 1 s) assisted rapid thermal processing is used to make the Mo electrode grain size uniformity reach 98% (traditional steady-state annealing is only 85%), the resistivity is reduced from 8.0 μΩ·cm to 4.7 μΩ·cm, directly reducing the electrical loss of the resonator by 40%, and solving the problem of grain boundary defect accumulation caused by temperature gradient in traditional process.

[0023] In the implementation process, in step S3: the support layer 103 is a Si3N4 / SiC laminated structure, wherein the SiC sublayer is adjacent to the sacrificial layer 107, and the Si3N4 sublayer covers the SiC sublayer, and the thickness ratio is 1:(0.2-0.5).

[0024] Specifically, the SiC sublayer / Si3N4 sublayer laminated structure (thickness ratio 1:0.3) is designed, and the synergistic effect of high hardness of SiC (450 GPa) and low thermal expansion coefficient of Si3N4 (2.7 ppm / ℃) is used to improve the bending strength of the support layer to 1.8 GPa (single layer Si3N4 is only 1.0 GPa), and the cavity collapse rate is reduced from 8% to 0.5%, breaking through the structural failure bottleneck of traditional homogeneous materials under 20 dBm power.

[0025] In the implementation process, after step S4, the bottom electrode is further pre-annealed at low temperature, and is kept at 200-300°C in argon atmosphere for 10-30 min to eliminate the interface stress.

[0026] Specifically, after the deposition of the bottom electrode, 300°C / 30 min argon pre-annealing is added, so that the interface bonding strength of Mo-Si3N4 is increased from 5 GPa to 8 GPa (verified by SEM-EDS), and the electrode peeling rate tends to be zero from 5%, thereby fundamentally solving the high-frequency vibration delamination failure (>1 GHz failure rate 40%) caused by thermal mismatch in the traditional process.

[0027] In the implementation process, when the piezoelectric layer is deposited, Sc ions are synchronously injected to form (x=0.1-0.3), and the injection energy is 5-20 keV.

[0028] Specifically, Sc ions (energy 15 keV) are synchronously injected in the deposition of AlN to form a Sc0.2Al0.8N piezoelectric layer, and the d 33 constant is increased to 12.5 pC / N (only 5.5 pC / N for traditional AlN), the electromechanical coupling coefficient k t ² reaches 7.5% (increased by 21%), and the concentration unevenness problem (deviation ±15%) of the traditional physical mixed doping is improved from the root.

[0029] In the implementation process, in step S7: after the deposition of the top electrode, the surface is bombarded by an argon ion beam at an inclination angle of 30°-60°, and the beam current density is 1-5 mA / cm², so as to realize surface nanocrystallization.

[0030] Specifically, the top electrode is bombarded by an argon ion beam at an inclination angle of 45° (3 mA / cm²), and the surface roughness Ra is sharply reduced from 1.5 nm to 0.8 nm (verified by AFM), so that the high-frequency insertion loss of 2.5 GHz is reduced from 1.2 dB to 0.6 dB, the Q value breaks through 3500 (≤2500 for the traditional process), and the signal distortion caused by electron scattering is eliminated.

[0031] In the implementation process, step S9 includes: first, SF6 / Cl2 mixed gas dry etching is performed to a remaining thickness of 20%-30% of the sacrificial layer, and then HF vapor is injected to complete wet release.

[0032] Specifically, after the SF6:Cl2=1:2 mixed gas etching is performed to a remaining thickness of 25% of the sacrificial layer, the HF vapor release is performed, the etching selectivity ratio reaches 300:1 (only 30:1 for traditional HF), the steepness of the cavity edge is 89° (≤80° for the traditional process), the microstructure integrity rate is >99.5%, and the 12% lateral drilling damage problem in wet etching is solved.

[0033] In the implementation process, the argon pulse gas flow is applied in the temperature rising stage, and the pulse gas flow is 1.5-3 times of the main gas flow.

[0034] Specifically, the argon pulse impacts the main gas flow at 1.5 times the flow rate (pulse duration 0.5 s) in the temperature rising stage, which promotes the metal atom migration rate to increase by 3 times, and the grain boundary defect density decreases from 10 6 / cm² to 10 4 / cm² (TEM statistics), achieving grain super-uniformization (size deviation ±3%) that cannot be achieved by traditional steady-state gas flow.

[0035] In the implementation process, the Sc ion implantation is performed in multiple energy levels, and the energy gradient is 5 keV→10 keV→15 keV, corresponding to an increasing implantation concentration gradient.

[0036] Specifically, the Sc ions are implanted in three stages according to 5 / 10 / 15 keV (concentration 10%→20%→30%), and the piezoelectric layer Sc concentration gradient error is less than 2% (SIMS spectrum), the resonant frequency temperature coefficient (TCF) is stabilized at -5 ppm / ℃ (traditional ±50 ppm / ℃), solving the frequency drift (±0.1%) caused by single-energy implantation lattice distortion.

[0037] In summary, in this embodiment, in terms of material and structure optimization, the scheme breaks through the limitations of traditional homogeneous materials and innovatively uses SiC (450 GPa hardness) and Si3N4 (2.7 ppm / ℃ ultra-low thermal expansion) composite support layer, with a bending strength of 1.8 GPa (80% higher than traditional Si3N4), and simultaneously constructs Sc0.2Al0.8N piezoelectric layer through Sc ion gradient doping, with a lattice distortion rate of less than 1% (traditional physical mixed doping >5%), d 33 The constant jumps to 12.5 pC / N (traditional AlN only 5.5 pC / N), combined with ion beam nanocrystallization electrode to make the surface roughness Ra=0.8 nm (traditional ≥1.5 nm), which solves the problems of thermal cracking failure and high-frequency signal scattering of traditional structure under high power (>20dBm) from the root; In the process optimization, the scheme overturns the traditional steady annealing with pulsed gas flow strengthening heat treatment. Argon pulse (3 Hz) drives the metal atomic mobility to increase by 3 times, making the grain size uniformity of Mo electrode reach 98% (traditional only 85%), and the resistivity decrease sharply from 8.0 μΩ·cm to 4.7 μΩ·cm (↓41%). The scheme synchronously innovates dry-wet combined etching to realize 300:1 ultra-high selectivity (traditional HF only 30:1) with SF6:Cl2=1:2 mixed gas etching + HF vapor release, and the cavity side wall steepness is 89° (traditional ≤80°), and the microstructure integrity rate is >99.5% (traditional wet etching damage rate is 12%). The scheme is supplemented with low-temperature pre-annealing to eliminate interface stress, so that the Mo-Si3N4 bonding strength increases from 5 GPa to 8 GPa (peeling rate tends to zero), and the device consistency problem caused by thermal gradient and etching deviation in the traditional process is completely solved. In the performance optimization, the scheme realizes a three-in-one breakthrough: in high-frequency performance, 2.5 GHz insertion loss is reduced from traditional 1.2 dB to 0.6 dB (↓50%), Q value is >3500 (traditional ≤2500), and temperature drift is stably at -5 ppm / ℃ (traditional ±50 ppm / ℃); in power tolerance, power capacity reaches 36 dBm (traditional 20 dBm collapse), frequency deviation is <0.1% under 30 dBm (traditional ±0.15%); in reliability, thermal cycle life is >10 9 times (traditional 10 7 times), electromechanical coupling coefficient k t ²=7.5% (traditional AlN 6.2%), and acoustic wave reflection efficiency is >95% (traditional 75%), which exceeds the comprehensive performance of Broadcom FBAR (insertion loss 0.9 dB) and Qorvo QPQ3500 (power 28 dBm), and meets the extreme requirements of 6G millimeter wave frequency band 26 GHz for ultra-low insertion loss (<0.8 dB), ultra-high power (>30 dBm) and billion-level life of radio frequency front end.

[0038] The above shows and describes the basic principles and main features of the present application and the advantages of the present application. Those skilled in the art should understand that the present application is not limited to the above examples, and the above examples and descriptions in the specification are only to illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the claimed present application. The scope of protection of the present application is defined by the appended claims and their equivalents.

Claims

1. A method of fabricating a film bulk acoustic resonator, comprising: The method comprises the following steps: S1, cleaning the silicon substrate (101), sequentially using acetone, isopropyl alcohol and hydrofluoric acid to remove organic contaminants and oxide layers; S2, depositing a sacrificial layer (107) on the surface of the silicon substrate (101); S3, depositing a support layer (103) on the sacrificial layer (107); S4, depositing a bottom electrode (104) on the support layer (103); S5, rapid thermal treatment of the bottom electrode (104) in an inert gas atmosphere, the heating rate is 5-20℃ / s, and the holding temperature is 200-900℃; S6, depositing a piezoelectric layer (105) on the heat-treated bottom electrode (104); S7, depositing a top electrode (106) on the piezoelectric layer (105); S8, rapid thermal treatment of the top electrode (106) in an inert gas atmosphere, the heating rate is 15-20℃ / s, and the holding temperature is 500-700℃; S9, selective etching of the sacrificial layer (107) to form a cavity (102).

2. The method of claim 1, wherein, The rapid thermal treatment of steps S5 and S8 comprises: Periodically introducing an argon pulse gas flow into the heat treatment furnace, the pulse frequency is 1-5Hz, and the single pulse duration is 0.5-2s.

3. The method of claim 1, wherein, In step S3: The support layer (103) is a Si3N4 / SiC laminated structure, wherein the SiC sublayer is adjacent to the sacrificial layer (107), and the Si3N4 sublayer covers the SiC sublayer, and the thickness ratio is 1:(0.2-0.5).

4. The method of claim 1, wherein, After step S4, it further comprises: Low-temperature pre-annealing of the bottom electrode (104) in an argon atmosphere at 200-300℃ for 10-30min to eliminate interface stress.

5. The method of claim 1, wherein, In step S6: The Sc ions are injected synchronously when depositing the piezoelectric layer (105), forming (x = 0.1 - 0.3) with an injection energy of 5 - 20 keV.

6. The method of claim 1, wherein, In step S7: After depositing the top electrode (106), an argon ion beam is used to bombard the surface at an inclination angle of 30°-60°, and the beam current density is 1-5mA / cm² to realize surface nanocrystallization.

7. The method of claim 1, wherein, Step S9 comprises: First, dry etching with SF6 / Cl2 mixed gas to a remaining thickness of 20%-30% of the sacrificial layer (107), and then injecting HF vapor to complete the wet release.

8. The method of claim 2, wherein: The argon pulse gas flow is applied during the heating stage, and the pulse gas flow is 1.5-3 times the main gas flow.

9. The method of claim 5, wherein: The Sc ion implantation is performed in multiple energy levels, and the energy gradient is 5keV→10keV→15keV, corresponding to an increasing implantation concentration gradient.

10. A film bulk acoustic resonator prepared based on any of the methods of claims 1-9, characterized by, Comprise: A silicon substrate (101), a cavity (102) on the silicon substrate (101), a support layer (103) covering the cavity, a bottom electrode (104) disposed on the support layer (103), a piezoelectric layer (105) on the bottom electrode (104), and a top electrode (106) disposed on the piezoelectric layer (105), wherein the support layer (103) comprises a SiC sub-layer and a Si3N4 sub-layer, and the piezoelectric layer (105) is Sc-doped AlN .

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