Image sensor and operating method of image sensor

Abstract

An image sensor and an operation method of the image sensor are provided. The image sensor includes: a first pixel group including a plurality of first pixels in which a plurality of first microlenses are respectively located on the plurality of first pixels; a second pixel group including a plurality of second pixels, in which the second microlenses are located on at least two second pixels of the plurality of second pixels; and a timing controller configured to: control output of a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion of the plurality of second pixels in a first sensing readout period of the readout period; and, in a second sensing readout period after the first sensing readout period of the readout period, controlling to output a third image signal generated from each of the plurality of first pixels and a fourth image signal generated from each of the plurality of second pixels.

Description

TECHNICAL FIELD

[0001] The disclosure relates to an image sensor, and more particularly, to an image sensor including a normal pixel and an auto focus pixel, and a readout method of the image sensor. BACKGROUND

[0002] An image sensor is a device that captures a two-dimensional or three-dimensional image of an object. The image sensor generates image data of an object by using a photoelectric conversion element that reacts according to the intensity of light reflected from or emitted by the object.

[0003] Recently, an auto focus (AF) technology that can automatically detect a focus of an image sensor has been widely used. In particular, various studies are being conducted on a phase difference auto focus technology due to a fast focus detection speed thereof. For example, in the phase difference auto focus, a focal length can be adjusted by automatically driving a focus lens so that light passing through an image capturing lens is split and detected at different positions, and detection signals have the same intensity at the same phase.

[0004] For an image sensor including a normal pixel and an auto focus pixel, a technology that improves image quality while performing an auto focus detection operation is needed. SUMMARY

[0005] One or more embodiments provide an image sensor for reading out a second image signal generated from some second pixels of a second pixel group while reading out a first image signal generated from a first pixel, and reading out a fourth image signal generated from all second pixels of the second pixel group while reading out a third image signal generated from the first pixel, thereby improving image quality; and also provide an image processing device.

[0006] According to an aspect of an embodiment, an image sensor includes a first pixel group including a plurality of first pixels, wherein a plurality of first micro lenses are respectively located on the plurality of first pixels, a second pixel group including a plurality of second pixels, wherein a second micro lens is located on at least two second pixels of the plurality of second pixels, and a timing controller configured to control output of a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion of the plurality of second pixels in a first sensing readout period of a readout period, and control output of a third image signal generated from each of the plurality of first pixels and a fourth image signal generated from each of the plurality of second pixels in a second sensing readout period after the first sensing readout period of the readout period.

[0007] According to another aspect of the embodiment, an image sensor includes: a first pixel group, the first pixel group including a plurality of first pixels arranged in rows and columns; a second pixel group, the second pixel group including a plurality of second pixels arranged in rows and columns; a plurality of first microlenses, the plurality of first microlenses being respectively located on the plurality of first pixels; a second microlens, the second microlens being located on at least two second pixels among the plurality of second pixels, the diameter of the second microlens being larger than the diameter of the first microlens among the plurality of first microlenses; and a readout circuit, the readout circuit being configured to: sequentially output a first pixel value generated based on each first pixel in the plurality of first pixels and a third pixel value generated based on each first pixel in the plurality of first pixels in a readout period, and sequentially output a second pixel value generated based on a plurality of second pixels in a first part of the plurality of second pixels and a fourth pixel value generated based on each second pixel in the plurality of second pixels in the readout period.

[0008] According to another aspect of the present invention, a method for operating an image sensor is provided, the image sensor including a first pixel group having first pixels, a second pixel group having second pixels, first microlenses respectively disposed on the first pixels, and second microlenses disposed on at least two second pixels. The method includes: outputting a first reset signal for each of the first pixels and a second reset signal for each of the second pixels; outputting a first image signal generated from each of the first pixels and a second image signal generated from a first portion of the second pixels; and outputting a third image signal generated from each of the first pixels and a fourth image signal generated from each of the second pixels. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The following description of the embodiments in conjunction with the accompanying drawings will more clearly illustrate the above and other aspects and features.

[0010] Figure 1 is a diagram showing a structure of a digital imaging device according to an embodiment.

[0011] Figure 2 is a block diagram illustrating an image sensor according to an embodiment.

[0012] Figure 3 is a diagram showing a pixel array according to an embodiment.

[0013] Figure 4 is a diagram for describing an image signal according to the embodiment.

[0014] Figure 5A is a diagram showing a pixel array according to an embodiment.

[0015] Figure 5Bis a diagram illustrating a pixel array according to an embodiment.

[0016] Figure 5C is a diagram illustrating a pixel array according to an embodiment.

[0017] Figure 6 is a circuit diagram of a pixel included in Figure 2 a pixel array of FIG.

[0018] Figure 7 is a circuit diagram of a pixel included in an image sensor according to an embodiment.

[0019] Figure 8 is a timing chart of an image sensor for reading out a pixel signal according to an embodiment.

[0020] Figure 9 is a flowchart of a method of operating an image sensor according to an embodiment.

[0021] Figure 10 is a circuit diagram illustrating an implementation example of a pixel according to an embodiment.

[0022] Figure 11 is a timing chart of an image sensor for reading out a pixel signal according to an embodiment.

[0023] Figure 12 is a diagram describing an image signal of a first pixel group according to an embodiment.

[0024] Figure 13 is a block diagram illustrating an electronic device according to an embodiment. DETAILED DESCRIPTION

[0025] Embodiments will hereinafter be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals are used to refer to like elements, and redundant descriptions thereof will be omitted. It will be understood that when a component or layer is referred to as being "on" another component or layer, "connected to" or "coupled to" another component or layer, it can be directly present thereon, connected thereto, or coupled thereto, or intervening components or layers can be present. In contrast, when a component is referred to as being "directly on" another component or layer, "directly connected to" or "directly coupled to" another component or layer, there are no intervening components or layers present. The embodiments described herein are example embodiments, and as such, the present disclosure is not limited thereto, and can also be embodied in other various forms. Each of the embodiments provided in the following description are not exclusive of one or more features or aspects of another example or embodiment provided herein, or not provided herein, but which are in conformity therewith.

[0026] Figure 1is a diagram illustrating a structure of a digital imaging device according to an embodiment. The digital imaging device 1 can perform an auto focus (AF) function of automatically detecting a focus.

[0027] The digital imaging device 1 according to an embodiment can include an imaging unit (i.e., an imaging device) 200, an image sensor 100, and a processor 300. The digital imaging device 1 can have a focus detection function. The digital imaging device 1 can be an electronic device having an image or light sensing function. For example, the electronic device can be any one of a camera, a smart phone, a wearable device, an Internet of Things (IoT), a tablet personal computer (PC), a personal digital assistant (PDA), a portable multimedia player (PMP), and a navigation device. For example, the electronic device can be a device provided as a part of a vehicle, furniture, manufacturing equipment, a door, or various measuring devices.

[0028] The operation of the digital imaging device 1 can be controlled by the processor 300. The processor 300 can provide a control signal for the operation of each component, such as a lens actuator 220, an aperture actuator 240, and a timing controller 120.

[0029] The imaging unit 200 is a component that receives light, and can include a lens 210, the lens actuator 220, an aperture 230, and the aperture actuator 240. The lens 210 can include a plurality of lenses.

[0030] The lens actuator 220 can communicate information about focus detection with the processor 300, and adjust the position of the lens 210 according to a control signal provided by the processor 300. The lens actuator 220 can move the lens 210 in a direction in which the distance from the object 2 increases or decreases. Accordingly, the distance between the lens 210 and the object 2 can be adjusted. The object 2 can be focused or blurred according to the position of the lens 210.

[0031] For example, if the distance between the lens 210 and the object 2 is relatively short, the lens 210 can deviate from a focus position focusing on the object 2, and there can be a phase difference between images captured by the image sensor 100. The lens actuator 220 can move the lens 210 in a direction in which the distance from the object 2 increases based on a control signal provided from the processor 300.

[0032] Alternatively, when the distance between the lens 210 and the object 2 is relatively long, the lens 210 can be out of focus, and there can be a phase difference between images formed on the image sensor 100. The lens actuator 220 can move the lens 210 in a direction in which the distance from the object 2 decreases based on a control signal provided from the processor 300.

[0033] The image sensor 100 can convert incident light into an image signal. The image sensor 100 can include a pixel array 110 and a timing controller 120. A light signal passing through the lens 210 and the aperture 230 can reach a light-receiving surface of the pixel array 110 to form an image of a subject.

[0034] The pixel array 110 can be a complementary metal-oxide semiconductor image sensor (CIS) that converts a light signal into an electrical signal. The sensitivity or the like of the pixel array 110 can be adjusted by the timing controller 120. The pixel array 110 can include a plurality of pixels that convert a light signal into an electrical signal. The plurality of pixels can generate a pixel signal according to the intensity of each ray of light sensed. The pixel array 110 can include pixels that perform an AF function or a distance measurement function. As an example, some of the plurality of pixels included in the pixel array 110 can be AF pixels for performing an AF function, and some of the remaining pixels can be normal pixels that generate an image signal. For example, 50% of the plurality of pixels included in the pixel array 110 can be AF pixels, and the remaining 50% can be normal pixels. However, embodiments are not limited thereto.

[0035] The image sensor 100 can include a microlens array disposed on the pixel array 110. The microlens array can include microlenses corresponding to the plurality of pixels included in the pixel array 110. The microlens array can include microlenses corresponding to the AF pixels and microlenses corresponding to the normal pixels.

[0036] The image sensor 100 can generate image data by using the normal pixels and the AF pixels. The image data can include a frame-by-frame image and / or AF data. For example, the image sensor 100 can generate AF data using the AF pixels. The image sensor 100 can generate signal-to-noise ratio (SNR) image data to improve the SNR by using the normal pixels. The image sensor 100 can generate high dynamic range (HDR) image data to generate an HDR image by using the normal pixels.

[0037] The timing controller 120 can control the overall operation of the image sensor 100. The timing controller 120 can control the operation of components included in the image sensor 100. The timing controller 120 can control the operation of the pixels included in the pixel array 110. For example, the timing controller 120 can generate a plurality of control signals to control the operation of the pixels included in the pixel array 110.

[0038] The image sensor 100 can provide image data to the processor 300. The image data can include frame-by-frame images and / or AF data. The processor 300 can perform phase difference calculation for an AF function using the AF data. In an embodiment, the processor 300 can perform phase difference calculation based on a phase detection signal included in the AF data. The processor 300 can process image data output from the image sensor 100. As a result of the phase difference calculation, the processor 300 can obtain a position of a focus, a direction of the focus, or a distance between the object 2 and the image sensor 100. The processor 300 can output a control signal to the lens actuator 220 to move the position of the lens 210 based on a result of the phase difference calculation.

[0039] In an embodiment, the processor 300 can generate an image having an improved SNR by using the image data. The processor 300 can receive SNR image data to improve the SNR, and generate an image having an improved SNR based on the SNR image data.

[0040] In an embodiment, the processor 300 can generate an HDR image by using the image data. The processor 300 can receive HDR image data for generating an HDR image, and generate an HDR image based on the HDR image data.

[0041] The processor 300 can perform image signal processing to improve image quality, such as reducing noise of an input signal, performing gamma correction, filter array interpolation, color matrix, color correction, and color enhancement. In addition, image data generated through image signal processing to improve image quality can be compressed to generate an image file, or the image data is restored from the image file.

[0042] Figure 2 is a block diagram illustrating an image sensor according to an embodiment.

[0043] Reference Figure 2 The image sensor 100 can include a pixel array 110, a timing controller 120, a readout circuit 130, and a row driver 140. The readout circuit 130 can include an analog-to-digital conversion (ADC) circuit 131 and a data bus 132. In an embodiment, the pixel array 110, the row driver 140, the readout circuit 130, the ramp signal generator 150, the timing controller 120, and the signal processor 160 can be implemented as a single semiconductor chip or semiconductor module. In an embodiment, the pixel array 110, the row driver 140, the readout circuit 130, the ramp signal generator 150, and the timing controller 120 can be implemented as a single semiconductor chip or semiconductor module, and the signal processor 160 can be implemented as another semiconductor chip or semiconductor module.

[0044] The pixel array 110 may be connected to a plurality of row lines RL and a plurality of column lines CL and may include a plurality of pixels PX arranged in rows and columns. The pixel array 110 may include a plurality of pixels PX that may sense light of different wavelengths. The arrangement of the pixels PX may be achieved in various ways. In an embodiment, the pixel array 110 may include normal pixels and AF pixels.

[0045] Each pixel PX in the plurality of pixels PX may include at least one photoelectric conversion element. The pixel PX may detect light using the photoelectric conversion element and output an image signal as an electrical signal based on the detected light. For example, the photoelectric conversion element may include a light sensing element comprising an organic or inorganic material, such as an inorganic photodiode, an organic photodiode, a perovskite photodiode, a phototransistor, a photogate, or a pinned photodiode. For example, each pixel in the plurality of pixels PX may include one photoelectric conversion element. However, embodiments are not limited thereto, and each pixel in the plurality of pixels PX may include multiple photoelectric conversion elements, and some pixels in the plurality of pixels PX may include multiple photoelectric conversion elements, while other pixels in the plurality of pixels PX may include one photoelectric conversion element.

[0046] Microlenses for light focusing (e.g. Figure 3 The first microlens ML1 and the second microlens ML2 in the pixel array 110 can be arranged on each pixel in a plurality of pixels PX or on each pixel including adjacent pixels PX. As an example, microlenses corresponding to some pixels PX among the pixels included in the pixel array 110 are arranged on some pixels PX. Microlenses corresponding to pixel groups can be arranged on some pixel groups among the pixel groups including adjacent pixels PX in the pixel array 110. Pixels PX can detect light in a specific spectral region of the light received by the microlenses arranged thereon.

[0047] The pixel array 110 may include a first pixel group and a second pixel group. The pixel array 110 may include a structure in which the first pixel group and the second pixel group are alternately and repeatedly arranged in rows and columns. The first pixel group may include a plurality of first pixels. A first microlens may be disposed on each first pixel. First microlenses corresponding to the first pixels may be disposed on the first pixels included in the first pixel group.

[0048] For example, the first pixel group can include four first pixels arranged in 2x2. The first microlens can be disposed on each of the four first pixels. That is, the first pixel group can include four first pixels, and four first microlenses can be respectively arranged to correspond to the first pixels, respectively. One first microlens can be disposed per first pixel. However, this is only an example, and embodiments are not limited thereto. The first pixels included in the same first pixel group can detect the same color. The first pixels can be referred to as normal pixels.

[0049] The second pixel group can include a plurality of second pixels. The second pixels can be referred to as AF pixels. The AF pixels can be pixels having a circuit or a physical structure for AF. The second microlens can be disposed on the second pixels. The second microlens can be disposed on at least two second pixels included in the second pixel group. For example, the second pixel group can include a plurality of second pixels, and a second microlens corresponding to the second pixel group can be disposed. For example, the second pixel group can include four second pixels arranged in 2x2. The four second pixels included in the second pixel group can be adjacent to each other, and one second microlens can be disposed on the four second pixels. One second microlens can be disposed per four second pixels. However, embodiments are not limited thereto. The second pixels included in the same second pixel group can detect the same color.

[0050] According to an embodiment, the second pixel group can include a plurality of second pixels, and the second pixel group can include a sub-pixel group including at least two adjacent second pixels. The second microlens can be disposed on the sub-pixel group. For example, the second pixel group can include two sub-pixel groups, and each sub-pixel group can include two second pixels. One second microlens can be disposed per sub-pixel group. One second microlens can be disposed per two second pixels. However, embodiments are not limited thereto.

[0051] For example, the number of second pixels included in one second pixel group can be equal to the number of first pixels included in one first pixel group. For example, the first pixel group can include four first pixels, and the second pixel group can include four second pixels. However, embodiments are not limited thereto, and the first pixel group can include 16 first pixels, and the second pixel group can include 16 second pixels. Each of the first pixel group and the second pixel group can include a different number of pixels.

[0052] The first pixel group can output a first image signal generated from all of the first pixels included in the first pixel group. The second pixel group can output a second image signal generated from some of the second pixels included in the second pixel group. The second image signal can also be output in a period in which the first image signal is output. The second image signal can be output from the second pixel group while the first image signal is output from the first pixel group.

[0053] In an embodiment, the first image signal and the second image signal can be output in a first sensing readout period included in the readout period. In the first sensing readout period, a first image signal obtained by adding image signals of all first pixels included in the first pixel group can be output. In the first sensing readout period, a second image signal obtained by adding image signals of some second pixels included in the second pixel group can be output. For example, a second image signal obtained by adding image signals of second pixels arranged in different adjacent rows and the same column in the second pixel group can be output. However, embodiments are not limited thereto, and a second image signal obtained by adding image signals of second pixels arranged in different adjacent columns and the same row in the second pixel group can also be output.

[0054] The first pixel group can output a third image signal generated from all first pixels included in the first pixel group. The third image signal can be output after the first image signal. The second pixel group can output a fourth image signal generated from all second pixels included in the second pixel group. The fourth image signal can be output after the second image signal. The fourth image signal can also be output in a period in which the third image signal is output. The fourth image signal can be output from the second pixel group while the third image signal is output from the first pixel group.

[0055] In an embodiment, the third image signal and the fourth image signal can be output from a second sensing readout period included in the readout period. The second sensing readout period can be a period after the first sensing readout period. In the second sensing readout period, a third image signal obtained by adding image signals of all first pixels included in the first pixel group can be output. In the second sensing readout period, a fourth image signal obtained by adding image signals of all second pixels included in the second pixel group can be output.

[0056] In an embodiment, the first image signal and the third image signal can be used to generate image data to improve SNR. The first image signal and the third image signal can be image signals output from the first pixel group. In the readout period, the first image signal and the third image signal can be sequentially output. For example, each of the first image signal and the third image signal can include an image signal obtained by adding image signals of all first pixels included in the first pixel group in one frame, but can also include different or the same noise signals. That is, the first image signal can include a first noise signal, the third image signal can include a second noise signal, and the first noise signal and the second noise signal can be different from each other. SNR image data for generating an image having improved SNR can be generated based on the first image signal and the third image signal.

[0057] In an embodiment, the first image signal and the third image signal can be used to generate an HDR image. The first pixels can be operated by a double conversion gain operation. The double conversion gain includes a low conversion gain (LCG) and a high conversion gain (HCG). Hereinafter, for convenience of description, an operation mode in which the HCG is used to generate an image signal is referred to as an HCG mode, and an operation mode in which the LCG is used to generate an image signal is referred to as an LCG mode. Each of the first pixels can be operated in the HCG mode and the LCG mode.

[0058] As an example, the first image signal can be an image signal generated from all of the first pixels included in the first pixel group in the HCG mode. The third image signal can be an image signal generated from all of the first pixels included in the first pixel group in the LCG mode. In a readout period, the first image signal in the HCG mode and the third image signal in the LCG mode can be sequentially output. HDR image data for generating an HDR image can be generated based on the first image signal and the third image signal.

[0059] In an embodiment, the second image signal and the fourth image signal can be used to generate phase detection data for AF. The second image signal and the fourth image signal can be image signals output from the second pixel group. In a readout period, the second image signal and the fourth image signal can be sequentially output. AF data for phase difference calculation of an AF function can be generated based on the second image signal and the fourth image signal. In addition, the fourth image signal can be used to generate an image frame by frame.

[0060] A color filter can be arranged on each of the plurality of pixels PX to allow light in a specific spectral region to be transmitted, and a color to be detected by the pixel can be determined according to the color filter arranged on each of the plurality of pixels PX. However, embodiments are not limited thereto, and the pixel array 110 can include a pixel that converts light in a spectral region other than red, green, and blue into an electrical signal. For example, a color filter that allows cyan light, yellow light, or magenta light to pass through can be provided on each of the plurality of pixels PX.

[0061] The timing controller 120 can generally control the image sensor 100. The timing controller 120 can control operations of components included in the image sensor 100. As an example, the timing controller 120 can control the row driver 140 to control operations of the pixels included in the pixel array 110. For example, the timing controller 120 can control the row driver 140 so that the pixels PX output an image signal in a readout period. The timing controller 120 can generate a control signal. The timing controller 120 can generate a control signal RCS for controlling the row driver 140.

[0062] The timing controller 120 can control the row driver 140 so that, in the first sensing readout period, the first image signal is output from the first pixel group and the second image signal is output from the second pixel group. As an example, the timing controller 120 can generate a control signal RCS to control the row driver 140 so that the first image signal and the second image signal are output in the first sensing readout period.

[0063] The timing controller 120 can control the row driver 140 so that, in the second sensing readout period, the third image signal is output from the first pixel group and the fourth image signal is output from the second pixel group. As an example, the timing controller 120 can generate a control signal RCS to control the row driver 140 so that the third image signal and the fourth image signal are output in the second sensing readout period.

[0064] The row driver 140 can generate a plurality of control signals so as to be able to control the operation of the pixels PX arranged in respective rows under the control of the timing controller 120. The row driver 140 can provide the plurality of control signals to the plurality of pixels PX of the pixel array 110 through a plurality of row lines RL, respectively. The pixel array 110 can be driven in units of rows in response to the plurality of control signals provided from the row driver 140. In this regard, the plurality of pixels PX of the pixel array 110 can sequentially output the pixel signals PXS in units of rows. The pixel signals PXS can include a reset signal indicating a reset level of the pixels PX and an image signal generated from the pixels PX.

[0065] The row driver 140 can transmit a control signal for outputting the pixel signals PXS to the pixel array 110, and the pixels PX can operate in response to the control signal to output the pixel signals PXS. For example, the row driver 140 can generate a control signal to control the pixels PX to output the pixel signals PXS in a readout period, and provide the generated control signal to the pixel array 110. The row driver 140 can be controlled so that the first image signal and the second image signal are output in the first sensing readout period, and the third image signal and the fourth image signal are output in the second sensing readout period.

[0066] The readout circuit 130 can include an ADC circuit 131 and a data bus 132. The pixel signals PXS can be read out from the pixels PX of a row selected among the plurality of pixels PX from the row driver 140. The pixel signals PXS can include a reset signal or an image signal (or a sensing signal). The readout circuit 130 can convert the reset signal and the image signal received from the pixel array 110 through a plurality of column lines CL into a digital signal based on a ramp signal from the ramp signal generator 150, to generate a plurality of pixel values pdt corresponding to the plurality of pixels PX.

[0067] The readout circuit 130 can output the pixel value pdt based on the pixel signal PXS. In the first sensing readout period, the readout circuit 130 can output the first pixel value based on the first image signal of the first pixel group and output the second pixel value based on the second image signal of the second pixel group. In the second sensing readout period, the readout circuit 130 can output the third pixel value based on the third image signal of the first pixel group and output the fourth pixel value based on the fourth image signal of the second pixel group. In the readout period, the readout circuit 130 can sequentially output the first pixel value and the third pixel value from the first pixel group and the second pixel value and the fourth pixel value from the second pixel group.

[0068] The ADC circuit 131 can include at least one analog-to-digital converter (ADC). For example, the ADC circuit 131 can include a plurality of ADCs corresponding to a plurality of column lines CL, respectively. The ADC can compare the reset signal and the image signal received through the corresponding column line CL with the ramp signal and generate the pixel value pdt based on the comparison result. For example, the ADC can remove the reset signal from the image signal and generate the pixel value pdt representing the amount of light detected from the pixel PX. The plurality of pixel values pdt generated in the ADC circuit 131 can be output through the data bus 132.

[0069] The ADC circuit 131 can include a plurality of correlated double sampling (CDS) circuits and a plurality of counter circuits. The ADC circuit 131 can convert the pixel signal PXS output from the pixel array 110 into the pixel value pdt of the digital signal. Each of the pixel signals PXS received through each of the plurality of column lines CL is converted into the pixel value pdt of the digital signal by the CDS circuit and the counter circuit.

[0070] The CDS circuit can compare the pixel signal PXS received through the column line CL with the ramp signal RAMP and output a comparison result. When the level of the ramp signal RAMP is the same as the level of the pixel signal PXS, the CDS circuit can output a comparison signal converted from a first level (e.g., a logic high) to a second level (e.g., a logic low). The point at which the level of the comparison signal is converted can be determined according to the level of the pixel signal PXS.

[0071] The CDS circuit can sample and hold the pixel signal PXS provided from the pixel PX according to the CDS method, double sample the level of a certain noise (e.g., the reset signal) and the level according to the image signal, and generate a comparison signal based on a level corresponding to the difference between the levels.

[0072] The data bus 132 can temporarily store the pixel value pdt output from the ADC circuit 131 and then output the value. The data bus 132 can include a column decoder and a plurality of column memories. The plurality of pixel values pdt stored in the plurality of column memories can be output to the signal processor 160 inside the image sensor 100 under the control of the column decoder, or can be output to an image signal processor outside the image sensor 100.

[0073] The ramp signal generator 150 can generate a ramp signal (e.g., a ramp voltage) under the control of the timing controller 120, the level of which rises or falls at a predetermined slope. The ramp signal RAMP can be provided to the readout circuit 130. For example, the ramp signal RAMP can be provided to the ADC circuit 131.

[0074] According to an embodiment, the image sensor 100 can further include the signal processor 160. The signal processor 160 can receive the pixel value pdt from the readout circuit 130 and perform signal processing on the received pixel value pdt. The signal processor 160 can generate image data IDT by performing signal processing on the pixel value pdt. The image data IDT can include a frame-by-frame image, AF data, SNR image data, HDR image data, etc.

[0075] The signal processor 160 can generate SNR image data to improve the SNR based on the first pixel value and the third pixel value generated from the first pixel group. For example, the processor (e.g., the processor 300 of FIG. 1) can generate an image having an improved SNR based on the SNR image data. The processor can generate an image having an improved SNR based on an average of the first pixel value and the third pixel value. However, embodiments are not limited thereto, and the signal processor 160 can be implemented to generate an image having an improved SNR. Figure 1

[0076] In addition, when the pixel PX operates in a dual conversion gain mode including an HCG mode and an LCG mode, the signal processor 160 can generate HDR image data for generating an HDR image based on the first pixel value and the third pixel value generated from the first pixel group. For example, the first pixel value can be a pixel value of the HCG mode, the third pixel value can be a pixel value of the LCG mode, and the processor can generate an HDR image based on the HDR image data. However, embodiments are not limited thereto, and the signal processor 160 can be implemented to generate an HDR image.

[0077] ​The signal processor 160 may generate AF data based on the second pixel value and the fourth pixel value generated from the second pixel group. For example, the processor may perform an AF operation based on the AF data. The signal processor 160 may generate AF data for use in phase difference calculation based on the second pixel values ​​generated from at least two pixels adjacently arranged in different rows but the same column in the second pixel group and the fourth pixel values ​​output from all second pixels included in the second pixel group.

[0078] In addition, the signal processor 160 may also perform noise reduction processing, gain adjustment, waveform normalization processing, interpolation processing, white balance processing, gamma processing, edge emphasis processing, and binning processing on the pixel value pdt. In an embodiment, the signal processor 160 may be provided in a processor external to the image sensor 100 (e.g., Figure 1 processor 300).

[0079] Figure 3 is a diagram showing a pixel array according to an embodiment. Figure 3 The pixel array 110a may correspond to Figure 2 The pixel array 110. Details overlapping with the above contents are omitted.

[0080] refer to Figure 3 , the pixel array 110a may include pixel groups PG, each pixel group including two or more pixels PX adjacent to each other. The pixel array 110a may include a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110a may include a structure in which the first pixel groups PXG1 and the second pixel groups PXG2 are alternately and repeatedly arranged in rows and columns.

[0081] refer to Figure 3 , each pixel group PXG including four pixels PX is shown, but is not limited thereto, and each pixel group PXG may have various numbers of pixels PX, such as 9 and 16 pixels. For example, the pixel array 110a may include a plurality of pixel groups PXG, each pixel group including pixels PX arranged in an n×n matrix (n is a positive integer). However, the embodiment is not limited thereto, and the pixel array 110a may include a plurality of pixel groups PXG, each pixel group including pixels PX arranged in a 2n×2n matrix (n is a positive integer). In addition, in Figure 3 64 pixels PX are shown as an example, but this is only for the convenience of description. The number of pixels PX can be determined according to the resolution of the pixel array 110a. In addition, the image sensor (e.g., Figure 2 The image sensor 100) can be applied to Figure 3 The pixel array 100 a shown in FIG. 1 and the pixel array having a pattern different from the pattern of the first microlenses ML1 and the second microlenses ML2 .

[0082] The pixel array 110a can include color filters that sense various colors. In an embodiment, the same color filter can be included in units of a pixel group. That is, four pixels PX arranged adjacent to each other in the pixel array 110a can include the same color filter. The same color filter can be arranged on n x n pixels included in each pixel group.

[0083] For example, the first pixel group PXG1_1, the first pixel group PXG1_2, the second pixel group PXG2_1, and the second pixel group PXG2_2 can each include one of a green (G) color filter, a red (R) color filter, and a blue (B) color filter. For example, the first pixel group PXG1_1 and the first pixel group PXG1_2 can include a green (G) color filter, the second pixel group PXG2_1 can include a red (R) color filter, and the second pixel group PXG2_2 can include a blue (B) color filter. In an embodiment, the arrangement ratio of the red (R) color filter, the green (G) color filter, and the blue (B) color filter in the pixel array 110a can be 1:2:1.

[0084] However, embodiments are not limited thereto, and the first pixel groups PXG1_1 and PXG1_2 and the second pixel groups PXG2_1 and PXG2_2 can each include at least one of a white color filter, a yellow color filter, a cyan color filter, and a magenta color filter. Alternatively, the first pixel groups PXG1_1 and PXG1_2 and the second pixel groups PXG2_1 and PXG2_2 can each include one of a white color filter, a yellow color filter, a green (G) color filter, a red (R) color filter, and a blue (B) color filter.

[0085] A pixel on which the first microlens ML1 is disposed can be a first pixel PX1, and the first pixel group PXG1 can include the first pixel PX1. The first microlens ML1 corresponding to the first pixel PX1, respectively, can be disposed on the first pixel PX1 included in the first pixel group PXG1. As an example, a green (G) filter can be arranged in the first pixel group PXG1. For example, the first pixel group PXG1_1 can include a first green pixel Gr1, a second green pixel Gr2, a third green pixel Gr3, and a fourth green pixel Gr4. The first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 can be the first pixel PX1. The first microlens ML1 can be disposed on the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4, respectively.

[0086] For example, the first pixel group PXG1_2 can include a first green pixel Gb1, a second green pixel Gb2, a third green pixel Gb3, and a fourth green pixel Gb4. The first green pixel Gb1, the second green pixel Gb2, the third green pixel Gb3, and the fourth green pixel Gb4 can be the first pixel PX1. The first microlens ML1 can be disposed on the first green pixel Gb1, the second green pixel Gb2, the third green pixel Gb3, and the fourth green pixel Gb4, respectively.

[0087] The pixel on which the second microlens ML2 is disposed can be the second pixel PX2, and the second pixel group PXG2 can include the second pixel PX2. The second microlens ML2 can be disposed on at least two second pixels PX2 included in the second pixel group PXG2. For example, the second pixel group PXG2 can include a plurality of second pixels PX2, and the second microlens ML2 corresponding to the second pixel group PXG2 can be disposed.

[0088] In an embodiment, a diameter of the second microlens ML2 can be greater than a diameter of the first microlens ML1. Here, the diameter of the microlens can refer to a length of a longest portion of a widest cross section of the microlens. For example, the diameter of the first microlens ML1 can be r1, and the diameter of the second microlens ML2 can be r2. r2 can be greater than r1.

[0089] The second microlens ML2 corresponding to the second pixel group PXG2 can be disposed on the second pixel group PXG2. For example, the second pixel group PXG2 can include four second pixels arranged in 2x2. The four second pixels PX2 included in the second pixel group PXG2 can be adjacent to each other, and one second microlens ML2 can be disposed on the four second pixels PX2. However, embodiments are not limited thereto. The first pixel group PXG1_1 can be adjacent to the second pixel group PXG2_1 in the first direction X, and the first pixel group PXG1_1 can be adjacent to the second pixel group PXG2_2 in the second direction Y. In addition, the first pixel group PXG1_2 can be adjacent to the second pixel group PXG2_2 in the first direction X, and can be adjacent to the second pixel group PXG2_1 in the second direction Y. These pixel groups PXG can be repeatedly and alternately arranged within the pixel array 110a.

[0090] For example, a red (R) color filter or a blue (B) color filter can be arranged in the second pixel group PXG2. For example, the second pixel group PXG2_1 can include a first red pixel R1, a second red pixel R2, a third red pixel R3, and a fourth red pixel R4. The first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 can be the second pixels PX2. The second microlens ML2 can be disposed on the second pixel group PXG2_1. For example, the second pixel group PXG2_2 can include a first blue pixel B1, a second blue pixel B2, a third blue pixel B3, and a fourth blue pixel B4. The first blue pixel B1, the second blue pixel B2, the third blue pixel B3, and the fourth blue pixel B4 can be the second pixels PX2. The second microlens ML2 can be disposed on the second pixel group PXG2_2.

[0091] Figure 4 is a diagram for describing an image signal according to an embodiment. Details repeated from the above are omitted.

[0092] Reference Figure 4 The pixel array 110a can include a first pixel group PXG1_1 and a second pixel group PXG2_1. In Figure 4 , for convenience of description, the first pixel group PXG1_1 and the second pixel group PXG2_1 are shown, but details described with reference to Figure 4 can also be applied to other pixel groups in Figure 3 . In addition, the details described above can also be applied to pixel arrays of various patterns and first and second pixel groups included in the pixel arrays.

[0093] The pixels PX can operate in response to a transfer control signal. For example, the first pixels PX1 included in the first pixel group PXG1_1 can operate in response to a plurality of first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4, and the second pixels PX2 included in the second pixel group PXG2_1 can operate in response to a plurality of second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4. Here, the operation of the first pixels PX1 and the second pixels PX2 means that photocharges generated from a photoelectric conversion element (for example, Figure 6 in the first pixels PX1 and the second pixels PX2 are transferred to a floating diffusion node (FD) within the pixels PX. Figure 6

[0094] The plurality of first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4, and the plurality of second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4 can be from a row driver (for example, Figure 2 ​The row driver 140 in FIG. 1 provides different signals through different row lines RL. The connection relationship between the row line RL and the first pixel PX1 and the second pixel PX2 is represented by a connection CNT.

[0095] The plurality of rows of the pixel array 110a can be sequentially read out in a plurality of readout cycles (or a plurality of horizontal cycles). In this regard, a plurality of signals can be read out from a plurality of pixels PXa in units of rows. For example, in conjunction with reference Figure 3 and Figure 4 In the first readout period, pixel signals may be output from the pixel group PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1. In the second readout period, pixel signals may be output from the pixel group PXG arranged in the same row as the second pixel group PXG2_2 and the first pixel group PXG1_2. However, embodiments are not limited thereto, and the order in which the multiple rows are read out may be different.

[0096] The first pixel group PXG1_1 may output a first image signal IS1 generated from all first pixels PX1 included in the first pixel group PXG1_1. For example, image signals generated from the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 may be added together and output as the first image signal IS1.

[0097] The second pixel group PXG2_1 can output a second image signal IS2 generated from some of the second pixels PX2 included in the second pixel group PXG2_1. For example, the second image signal IS2 can be output from second pixels PX2 arranged in the same column and different rows in the second pixel group PXG2_1. For example, the image signals generated from the first red pixel R1 and the third red pixel R3 can be added and output as the second image signal IS2. For example, when generating the second image signal IS2, the image signals generated from the second red pixel R2 and the fourth red pixel R4 can be excluded. The left image signal of the second pixel group PXG2_1 can be the second image signal IS2. However, the second image signal IS2 is not limited to this, and the second image signal IS2 can be output from second pixels PX2 arranged in the same row and different columns. In an embodiment, the first image signal IS1 and the second image signal IS2 can be output in a first sensing readout period included in the readout period.

[0098] The first pixel group PXG1_1 can output a third image signal IS3 generated from all the first pixels PX1 included in the first pixel group PXG1_1. For example, image signals respectively generated from the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 can be added to generate the third image signal IS3. The third image signal IS3 can be output after the first image signal IS1.

[0099] The second pixel group PXG2_1 can output a fourth image signal IS4 generated from all the second pixels PX2 included in the second pixel group PXG2_1. The fourth image signal IS4 can be output after the second image signal IS2. For example, image signals respectively generated from the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 can be added and output as the fourth image signal IS4. The third image signal IS3 and the fourth image signal IS4 can be output from a second sensing readout period included in the readout period. The second sensing readout period can be a period after the first sensing readout period. In an embodiment, AF data for phase difference calculation can be generated based on the second image signal IS2 and the fourth image signal IS4 to adjust focus in the left-right direction.

[0100] Figure 5A is a diagram illustrating a pixel array according to an embodiment. Figure 5A The pixel array 110b of FIG. 1B can correspond to Figure 2 the pixel array 110 of FIG. 1A. Compared to the pixel array 110a of FIG. 1A, Figure 3 two second microlenses ML2 can be disposed on the second pixel group PXG2 of the pixel array 110b of FIG. 1B. Details repeated from the above are omitted. Figure 5A

[0101] Referring to FIG. 1B, Figure 5A the pixel array 110b can include a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110b can include the first pixel group PXG1 and the second pixel group PXG2 in a structure in which rows and columns are alternately and repeatedly arranged.

[0102] ​In an embodiment, the second pixel group PXG2 may include a plurality of second pixels PX2, and the second pixel group PXG2 may include a sub-pixel group SPG including at least two adjacent second pixels PX2. A second microlens ML2 may be disposed on each sub-pixel group SPG. For example, the second pixel group PXG2_1 may include two sub-pixel groups SPG1 and SPG2, and each sub-pixel group SPG1 and SPG2 may include two second pixels PX2. The first sub-pixel group SPG1 may include a first red pixel R1 and a second red pixel R2, and the second sub-pixel group SPG2 may include a third red pixel R3 and a fourth red pixel R4. The second microlens ML2 corresponding to the first sub-pixel group SPG1 may be disposed on the first sub-pixel group SPG1, and the second microlens ML2 corresponding to the second sub-pixel group SPG2 may be disposed on the second sub-pixel group SPG2.

[0103] During the first sensing readout cycle, a first image signal may be output from the first pixel group PXG1_1, and a second image signal may be output from the second pixel group PXG2_1. For example, the second image signal IS2 may be output from the second pixel PX2 arranged in the same row and different column in the second pixel group PXG2_1. For example, the image signals generated from each of the first red pixel R1 and the second red pixel R2 may be summed and output as the second image signal IS2.

[0104] During the second sensing readout cycle, a third image signal may be output from the first pixel group PXG1_1, and a fourth image signal may be output from the second pixel group PXG2_1. For example, the image signals generated from each of the first green pixel G1, the second green pixel G2, the third green pixel G3, and the fourth green pixel G4 may be added together to form a third image signal IS3 to be output. For example, the image signals generated from each of the first red pixel R1, the second red pixel R2, the third red pixel R3, and the fourth red pixel R4 may be added together to form a fourth image signal IS4 to be output.

[0105] Figure 5B is a diagram showing a pixel array according to an embodiment. Figure 3 The pixel array 110c may correspond to Figure 2 The pixel array 110. Figure 3 Compared with the pixel array 110a, Figure 5B The pixel group PG of the pixel array 110c may include 16 pixels. Details repeated with the above contents are omitted.

[0106] refer to Figure 5BThe pixel array 110c can include a first pixel group PXG1 and a second pixel group PXG2. The pixel array 110c can include the first pixel group PXG1 and the second pixel group PXG2 in a structure in which rows and columns are alternately and repeatedly arranged. Referring to FIG. 1A, the pixel array 110c can include the first pixel group PXG1 and the second pixel group PXG2 in a structure in which rows and columns are alternately and repeatedly arranged. Figure 5B Each of the pixel groups PXG can include 16 pixels PX, but embodiments are not limited thereto.

[0107] The first pixel group PXG1 can include first pixels PX1. For example, the first pixel group PXG1 can include 16 first pixels PX1. For example, the first pixel group PXG1 can include 16 green first pixels PX1. First microlenses ML1 corresponding to the first pixels PX1, respectively, can be disposed on the first pixels PX1 included in the first pixel group PXG1.

[0108] In an embodiment, the second pixel group PXG2 can include a plurality of second pixels PX2, and the second pixel group PXG2 can include a sub-pixel group SPG including at least two adjacent second pixels PX2. Referring to FIG. 1A, the second pixel group PXG2 can include a plurality of second pixels PX2, and the second pixel group PXG2 can include a sub-pixel group SPG including at least two adjacent second pixels PX2. Figure 5B The second pixel group PXG2 can include four sub-pixel groups SPG, and each of the sub-pixel groups SPG can include four second pixels PX2.

[0109] The second microlenses ML2 can be disposed on the sub-pixel groups SPG. For example, the second pixel group PXG2 can include four sub-pixel groups SPG, and each of the sub-pixel groups SPG can include four second pixels PX2. The second microlenses ML2 can be disposed on each of the sub-pixel groups SPG.

[0110] In the first sensing readout period, a first image signal can be output from the first pixel group PXG1_1, and a second image signal can be output from the second pixel group PXG2_1. The first image signal obtained by adding image signals of 16 first pixels PX1 included in the first pixel group PXG1_1 can be output. The second image signal obtained by adding image signals of some of the second pixels PX2 included in the second pixel group PXG2 can be output. For example, the second image signal IS2 can be output from the second pixels PX2 arranged in the same column and different rows in the second pixel group PXG2_1. For example, image signals generated from each of the first red pixel R1, the third red pixel R3, the ninth red pixel R9, and the eleventh red pixel R11, and image signals generated from each of the fifth red pixel R5, the seventh red pixel R7, the thirteenth red pixel R13, and the fifteenth red pixel R15 can be added and output as the second image signal IS2.

[0111] In the second sensing and readout period, a third image signal can be output from the first pixel group PXG1_1, and a fourth image signal can be output from the second pixel group PXG2_1. The third image signal obtained by adding image signals of 16 first pixels PX1 included in the first pixel group PXG1_1 can be output. The fourth image signal obtained by adding image signals of 16 second pixels PX2 included in the second pixel group PXG2 can be output.

[0112] Figure 5C FIG. 1 is a diagram illustrating a pixel array according to an embodiment. Figure 5C The pixel array 110d of FIG. 1 can correspond to Figure 2 the pixel array 110. Compared to the pixel array 110a of FIG. 1, Figure 3 the pixel array 110d of FIG. 1 can include 16 pixels. Details repeated from the above are omitted. Figure 5C

[0113] Referring to Figure 5C the second pixel group PXG2 can include a plurality of second pixels PX2, and the second pixel group PXG2 can include a sub-pixel group SPG including at least two adjacent second pixels PX2. The second pixel group PXG2 can include eight sub-pixel groups SPG, and each sub-pixel group SPG can include two second pixels PX2.

[0114] The second microlens ML2 can be disposed on the sub-pixel group SPG. For example, the second pixel group PXG2 can include eight sub-pixel groups SPG, and each sub-pixel group SPG can include two second pixels PX2. The second microlens ML2 can be disposed on each sub-pixel group SPG. For example, the second microlens ML2 can be disposed on a sub-pixel group SPG including a first red pixel R1 and a second red pixel R2. In Figure 5C In FIG. 1, a sub-pixel group SPG including second pixels PX2 adjacent to each other in a first direction X included in the second pixel group PXG2 is illustrated, but is not limited thereto. The sub-pixel group SPG can also include second pixels PX2 adjacent to each other in a second direction Y.

[0115] In the first sensing and readout period, a first image signal can be output from the first pixel group PXG1_1, and a second image signal can be output from the second pixel group PXG2_1. In the second sensing and readout period, a third image signal can be output from the first pixel group PXG1_1, and a fourth image signal can be output from the second pixel group PXG2_1.

[0116] Figure 6 FIG. 1 is a circuit diagram of a pixel included in the pixel array of FIG. 1. Figure 2 Figure 6 ​​The pixels PX can be applied to a first pixel (e.g., the first pixel PX1) and a second pixel (e.g., the second pixel PX2) in the first pixel group and the second pixel group, respectively. For example, a plurality of pixels PX can be included in each of the first pixel group and the second pixel group, respectively. Figure 3 Figure 3 The pixels PX can be applied to a first pixel (e.g., the first pixel PX1) and a second pixel (e.g., the second pixel PX2) in the first pixel group and the second pixel group, respectively. For example, a plurality of pixels PX can be included in each of the first pixel group and the second pixel group, respectively.

[0117] Referring to Figure 6 , one pixel (e.g., one of the first pixel and the second pixel) can include a photoelectric conversion element PD, a transfer transistor TX, a selection transistor SX, a drive transistor DX, and a reset transistor RX. According to an embodiment, at least one of the transfer transistor TX, the selection transistor SX, the drive transistor DX, and the reset transistor RX can be omitted.

[0118] The photoelectric conversion element PD can generate photocharges that vary according to the intensity of light. For example, the photoelectric conversion element PD can include a PN junction diode and generate charges, i.e., negative electrons and positive holes, in proportion to the amount of incident light. Examples of the photoelectric conversion element PD can include at least one of a phototransistor, a photogate, a pin photodiode (PPD), and a combination thereof.

[0119] The transfer transistor TX can transfer the generated photocharges to a floating diffusion node FD according to one of the transfer control signals (e.g., the transfer control signals TS in Figure 4 ). When the transfer transistor TX is turned on, the photocharges generated in the photoelectric conversion element PD can be transferred to the floating diffusion node FD and accumulated and stored in the floating diffusion node FD.

[0120] The reset transistor RX can periodically reset the charges accumulated in the floating diffusion node FD. A first terminal of the reset transistor RX can be connected to the floating diffusion node FD, and a second terminal of the reset transistor RX can be connected to a power supply voltage VPIX. When the reset transistor RX is turned on according to a reset control signal RS, the power supply voltage VPIX connected to the reset transistor RX can be transferred to the floating diffusion node FD. When the reset transistor RX is turned on, the charges accumulated in the floating diffusion node FD can be discharged, and the floating diffusion node FD can be reset.

[0121] The drive transistor DX can be controlled according to the amount of photocharges accumulated in the floating diffusion node FD. The drive transistor DX can include a buffer amplifier and can buffer a signal according to the charges charged in the floating diffusion node FD. The drive transistor DX can amplify a change in potential at the floating diffusion node FD and output it as a pixel signal PXS to one of the column lines (e.g., the column lines CL in Figure 2 ).

[0122] ​The selection transistor SX may be connected to the drive transistor DX and may output the pixel signal PXS to a readout circuit (eg, a pixel signal PXS) through a column output line in response to a selection signal SELS. Figure 2 The control signals (reset control signal RS, transfer control signal TS and selection signal SELS) included in the pixel PX can be received from the row driver (eg, Figure 2 The row driver 140 in the generator generates the CMOS output.

[0123] Figure 7 is a circuit diagram of a pixel included in an image sensor according to an embodiment. According to an embodiment, a pixel group PXG may include a plurality of pixels, and the plurality of pixels PX may share a floating diffusion node FD. For example, a plurality of pixels PX included in one pixel group PXG may share a floating diffusion node FD. Figure 7 , a case where four pixels share one floating diffusion node FD is shown, but the embodiment is not limited thereto, and a different number of pixels PX may share the floating diffusion node FD.

[0124] Assumptions Figure 7 The pixel group PXG corresponds to Figure 4 Pixel group PXG. Figure 4 and Figure 7 In an embodiment, pixels formed with the same color filter and arranged adjacent to each other in the first direction X and the second direction Y (e.g., the first pixel PX1, the second pixel PX2, the third pixel PX3, and the fourth pixel PX4) may form a pixel group PG that shares a floating diffusion node FD. For example, when the pixel group PXG is the first pixel group PXG1_1, Figure 7 The first pixel PX1, the second pixel PX2, the third pixel PX3 and the fourth pixel PX4 may correspond to Figure 4 When the pixel group PXG is the second pixel group PXG2_1, Figure 7 The first pixel PX1, the second pixel PX2, the third pixel PX3 and the fourth pixel PX4 may correspond to Figure 4 The first red pixel R1, the second red pixel R2, the third red pixel R3 and the fourth red pixel R4.

[0125] The pixel group PXG may include a plurality of photoelectric conversion elements PD1 to PD4, a plurality of transfer transistors TX1 to TX4, a selection transistor SX, a drive transistor DX, and a reset transistor RX. In an embodiment, at least one of the selection transistor SX, the drive transistor DX, and the reset transistor RX may be omitted.

[0126] Each of the photoelectric conversion elements PD1 to PD4 can generate photocharges that vary in accordance with the intensity of light. Each of the transfer transistors TX1 to TX4 can transfer the generated photocharges to the floating diffusion node FD in accordance with a transfer control signal TS. The generated photocharges can be accumulated and stored in the floating diffusion node FD. For example, when the pixel group PXG is the first pixel group PXG1_1, Figure 7 The transfer control signals TS1 to TS4 can correspond to the first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4, respectively, when the pixel group PXG is the first pixel group PXG1_1. Figure 4 The transfer control signals TS1 to TS4 can correspond to the second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4, respectively, when the pixel group PXG is the second pixel group PXG2_1. Figure 7 The transfer control signals TS1 to TS4 can correspond to the second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4, respectively, when the pixel group PXG is the second pixel group PXG2_1. Figure 4 The transfer control signals TS1 to TS4 can correspond to the second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4, respectively, when the pixel group PXG is the second pixel group PXG2_1.

[0127] Each of the first to fourth pixels PX1 to PX4 that constitute the pixel group PXG can include a corresponding photoelectric conversion element (e.g., one of the photoelectric conversion elements PD1 to PD4) and a corresponding transfer transistor (e.g., one of the transfer transistors TX1 to TX4). For example, the first pixel PX1 that constitutes the pixel group PXG can include the first photoelectric conversion element PD1 and the first transfer transistor TX1, and the second pixel PX2 can include the second photoelectric conversion element PD2 and the second transfer transistor TX2, the third pixel PX3 can include the third photoelectric conversion element PD3 and the third transfer transistor TX3, and the fourth pixel PX4 can include the fourth photoelectric conversion element PD4 and the fourth transfer transistor TX4.

[0128] The first to fourth pixels PX1 to PX4 that constitute the pixel group PXG can share one floating diffusion node FD. The concept of sharing the pixel group PXG includes not only a plurality of photoelectric conversion elements (PD1 to PD4) sharing one floating diffusion node FD, but also sharing transistors (reset transistors RX, drive transistors DX, and selection transistors SX) (excluding the first to fourth transfer transistors TX1 to TX4). Thus, the photocharges generated from each of the first to fourth photoelectric conversion elements PD1 to PD4 can be accumulated in the shared floating diffusion node FD.

[0129] Figure 8 is a timing chart of an image sensor for reading out a pixel signal according to an embodiment. In Figure 8 In, it will be assumed that each of the first and second pixel groups includes four pixels PX to be described. However, this is for ease of description, and can be applicable even if each of the first and second pixel groups includes various numbers of pixels PX. Figure 8In addition, description will be made assuming that the pixels PX included in the pixel group PXG share the floating diffusion node FD. However, the embodiment is not limited thereto, and even if the pixels PX included in the pixel group PXG do not share the floating diffusion node FD, the same may be applied. Figure 8 The description of , or even if the number of pixels PX sharing the floating diffusion node FD is different, the pixels PX sharing the floating diffusion node FD can be similarly applied. Figure 4 、 Figure 7 and Figure 8 .

[0130] During the readout cycle, the pixel array ( Figure 4 In the readout period, pixel signals PXS may be output from the first pixel group PXG1_1, the second pixel group PXG2_1, and the pixel group PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1. Figure 2 Pixel signals PXS). Pixel signals can be output from the pixel group PXG and read out in a readout circuit (e.g., Figure 2 The analog-to-digital conversion is performed on the plurality of pixel signals in the readout circuit 130 in the CMOS process, and accordingly, pixel values ​​(eg, Figure 2 The pixel value pdt in .

[0131] refer to Figure 8 The readout period can be divided into a reset readout period rrp, a first sensing readout period srp1, and a second sensing readout period srp2 according to the signal output from the pixel PX and converted into an analog digital signal. The first sensing readout period srp1 may follow the reset readout period rrp, and the second sensing readout period srp2 may follow the first sensing readout period srp1.

[0132] In the reset readout period rrp, a reset signal rst (e.g., a reset voltage) corresponding to a reset level can be output as a pixel signal PXS. In the reset readout period rrp, the reset signal rst can be output from each of the first pixel group PXG1_1 and the second pixel group PXG2_1. In the first sensing readout period srp1, a first image signal IS1 generated from the first pixel group PXG1_1 and a second image signal IS2 generated from the second pixel group PXG2_1 can be output. In the first sensing readout period srp1, the first image signal IS1 can be output as a pixel signal PXS of the first pixel group PXG1_1, and the second image signal IS2 can be output as a pixel signal PXS of the second pixel group PXG2_1. In the second sensing readout period srp2, a third image signal IS3 generated from the first pixel group PXG1_1 and a fourth image signal IS4 generated from the second pixel group PXG2_1 can be output. In the second sensing readout period srp2, the third image signal IS3 can be output as a pixel signal PXS of the first pixel group PXG1_1, and the fourth image signal IS4 can be output as a pixel signal PXS of the second pixel group PXG2_1.

[0133] The reset levels of the plurality of pixels PX can be different from each other, and the reset level of one pixel PX can also vary with time. Accordingly, in the readout period, the reset signal rst can be first read out from the first pixel PX1, and then subtracted from or added to the subsequently readout image signal (e.g., the first image signal IS1 (or the third image signal IS3)). After the reset signal rst is first read out from the second pixel PX2, the reset signal rst can be subtracted from or added to the second image signal IS2 (or the fourth image signal IS4). Accordingly, the actual image signal can be read out, and signal deviation between the image signals output from the plurality of pixels PX can be reduced.

[0134] As described above, in the readout period, the reset signal rst, the first image signal IS1 (or the second image signal IS2), and the third image signal IS3 (or the fourth image signal IS4) generated in the pixels PX can be sequentially read out. This readout method can be referred to as a reset-signal-signal (RSS) readout method.

[0135] Figure 8 The operation of the transistors included in the first pixel group PXG1_1 and the second pixel group PXG2_1 is illustrated in one view. For example, when Figure 7the pixel group PXG is the first pixel group PXG1_1, Figure 7 the first to fourth transfer control signals TS1 to TS4 of the pixel group PXG can respectively correspond to Figure 8 the first to fourth transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4 of the pixel group PXG1_1, and Figure 7 the reset control signal RS in the pixel group PXG can correspond to Figure 8 the first reset control signal RS1 in the pixel group PXG1_1, and Figure 7 the selection signal SELS in the pixel group PXG can correspond to Figure 8 the first selection signal SELS1 in the pixel group PXG1_1. For example, when Figure 7 the pixel group PXG is the second pixel group PXG2_1, Figure 7 the transfer control signals TS1 to TS4, the reset control signal RS, and the selection signal SELS of the pixel group PXG can respectively correspond to Figure 8 the second to fourth transfer control signals TS2_1, TS2_2, TS2_3, TS2_4, the second reset control signal RS2, and the second selection signal SELS2 of the pixel group PXG2_1.

[0136] Referring to Figure 8 , Figure 4 and Figure 7 together, in the readout period, the first selection signal SELS1 can be at an active level (e.g., logic high), and the selection transistor SX of the first pixel group PXG1_1 can turn on in response to the first selection signal SELS1, and the first pixel PX1 can be connected to the column line CL.

[0137] In the readout period, the second selection signal SELS2 can be at an active level (e.g., logic high), and the selection transistor SX of the second pixel group PXG2_1 can turn on in response to the second selection signal SELS2, and the second pixel PX2 can be connected to the column line CL. Here, the active level of a signal refers to a level at which a transistor to which the signal is applied can turn on. As used herein, logic high is assumed to be the active level, and logic low is assumed to be the inactive level.

[0138] When the readout period starts, as the first reset control signal RS1 transitions from logic low to logic high, the reset transistor RX of the first pixel group PXG1_1 turns on, and the floating diffusion node FD resets. In the reset readout period rrp, the first reset signal rst1 corresponding to the reset level of the floating diffusion node FD of the first pixel group PXG1_1 can be output as a pixel signal PXS through the column line CL. The readout circuit (e.g., Figure 2The comparison circuit 130 (e.g., a comparator included in the readout circuit 130) can compare the ramp signal RAMP with the pixel signal PXS and output a comparison result as a comparison signal. The level of the ramp signal RAMP decreases at a predetermined slope, and when the level of the ramp signal RAMP becomes lower than the level of the pixel signal PXS, the level of the comparison signal can be converted. In the reset readout period rrp, a first reset signal rst1 for the first pixel PX1 included in the first pixel group PXG1_1 can be output.

[0139] With the second reset control signal RS2 of the second pixel group PXG2_1 being converted from logic low to logic high in the reset readout period rrp, the reset transistor RX of the second pixel group PXG2_1 can be turned on to reset the floating diffusion node FD. In the reset readout period rrp, a second reset signal rst2 corresponding to the reset level of the floating diffusion node FD of the second pixel group PXG2_1 can be output as the pixel signal PXS through the column line CL. In the reset readout period rrp, the second reset signal rst2 for the second pixel PX2 included in the second pixel group PXG2_1 can be output.

[0140] In the first sensing readout period srp1, the transfer transistor of all the first pixels PX1 included in the first pixel group PXG1_1 can be turned on. With the first transfer control signal TS1 being converted to an active level in the first sensing readout period srp1, the charge generated in the first pixel PX1 can be transferred to the floating diffusion node FD of the first pixel group PXG1_1 and stored. The signals generated from all the first pixels PX1 included in the first pixel group PXG1_1 can be added to generate a first image signal IS1. The first image signal IS1 can be output as the pixel signal PXS through the column line CL.

[0141] In the first sensing readout period srp1, the transfer transistor of all the first pixels PX1 included in the first pixel group PXG1_1 can be turned on. In an embodiment, each of the first transfer control signals TS1_1 to TS1_4 can be simultaneously converted to an active level. As an example, the first transfer control signal TS1_1 can be converted to an active level in the first sensing readout period srp1, and the charge generated in the first green pixel Gr1 can be transferred to the floating diffusion node FD. In the first sensing readout period srp1, the first transfer control signal TS1_2 can be converted to an active level, and the charge generated in the second green pixel Gr2 can be stored in the floating diffusion node FD. In the first sensing readout period srp1, the first transfer control signal TS1_3 can be converted to an active level, and the charge generated in the third green pixel Gr3 can be stored in the floating diffusion node FD. In the first sensing readout period srp1, the first transfer control signal TS1_4 can be converted to an active level, and the charge generated in the fourth green pixel Gr4 can be stored in the floating diffusion node FD. The charges generated from each of the first green pixel Gr1, the second green pixel Gr2, the third green pixel Gr3, and the fourth green pixel Gr4 of the first pixel group PXG1_1 can be added and output as a first image signal IS1.

[0142] In the first sensing readout period srp1, the transfer transistor of some of the second pixels PX21 included in the second pixel group PXG2_1 can be turned on, while the transfer transistor of other pixels of the second pixels PX21 included in the second pixel group PXG2_1 remains off. As some of the second transfer control signals TS2 are converted to an active level in the first sensing readout period srp1, the charge generated in some of the second pixels PX2 can be transferred to and stored in the floating diffusion node FD of the second pixel group PXG2_1. The signals generated from some of the second pixels PX2 included in the second pixel group PXG2_1 can be added to generate a second image signal IS2. The second image signal IS2 can be output as a pixel signal PXS through the column line CL.

[0143] For example, the second image signal IS2 can be output from the second pixels PX2 arranged in the same column and different rows in the second pixel group PXG2_1. In the first sensing readout period srp1, the transfer transistor of some of the second pixels PX2 included in the second pixel group PXG2_1 can be turned on. In an embodiment, some of the second transfer control signals TS1_1 to TS1_4 can be simultaneously converted to an active level in the first sensing readout period srp1.

[0144] For example, in the first sensing readout period srp1, the second transfer control signal TS2_1 can be switched to an active level, and the charge generated in the first red pixel R1 can be transferred to the floating diffusion node FD. In the first sensing readout period srp1, the second transfer control signal TS2_3 can be switched to an active level, and the charge generated in the third red pixel R3 can be stored in the floating diffusion node FD. The charge generated from each of the first red pixel R1 and the third red pixel R3 of the second pixel group PXG2_1 can be added and output as a second image signal IS2. In the first sensing readout period srp1, the second transfer control signal TS2_2 and the second transfer control signal TS2_4 can be maintained at an inactive level, and the charge generated in the second red pixel R2 and the fourth red pixel R4 can not be stored in the floating diffusion node FD. The left image signal of the second pixel group PXG2_1 can be the second image signal IS2. However, the second image signal IS2 is not limited thereto, and the second image signal IS2 can be output from the second pixels PX2 arranged in the same row and different columns.

[0145] In the first sensing readout period srp1, the first image signal IS1 and the second image signal IS2 can be output. For example, the first image signal IS1 and the second image signal IS2 can be simultaneously output in the first sensing readout period srp1. However, embodiments are not limited thereto.

[0146] In the second sensing readout period srp2, the transfer transistors of all the first pixels PX1 included in the first pixel group PXG1_1 can be turned off. In the first sensing readout period srp1, the transfer transistors of the first pixels PX1 included in the first pixel group PXG1_1 can be turned on and then turned off, whereas in the second sensing readout period srp2, the transfer transistors of all the first pixels PX1 included in the first pixel group PXG1_1 can be maintained in an off state. For example, in the second sensing readout period srp2, all the first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4 can be maintained at an inactive level. With the transfer transistors of the first pixel group PXG1_1 turned off, the image signal generated from all the first pixels PX1 included in the first pixel group PXG1_1 (i.e., the charge currently stored in the floating diffusion node FD of the first pixel group PXG1_1) can be read out again.

[0147] In the second sensing readout period srp2, an image signal generated based on the charge stored in the floating diffusion node FD of the first pixel group PXG1_1 in the first sensing readout period srp1 can be read out. Signals generated from all the first pixels PX1 included in the first pixel group PXG1_1 can be added and read out as a third image signal IS3. The third image signal IS3 can be output as a pixel signal PXS through the column line CL.

[0148] In the readout period, the first image signal IS1 and the third image signal IS3 can be sequentially output. For example, the first image signal IS1 and the third image signal IS3 can each include an image signal obtained by adding image signals of all the first pixels included in the first pixel group in one frame, but include different noise signals. SNR image data for generating an image having an improved SNR can be generated based on the first image signal IS1 and the third image signal IS3. For example, the SNR image data can be generated based on a difference between the first image signal IS1 and the third image signal IS3.

[0149] In the second sensing readout period srp2, the transfer transistors of all the second pixels PX2 included in the second pixel group PXG2_1 can be turned on. As the second transfer control signal TS2 is switched to an active level in the second sensing readout period srp2, the charge generated in the second pixels PX2 can be transferred to and stored in the floating diffusion node FD of the second pixel group PXG2_1. Signals generated from all the second pixels PX2 included in the second pixel group PXG2_1 can be added to generate a fourth image signal IS4. The fourth image signal IS4 can be output as a pixel signal PXS through the column line CL.

[0150] For example, in the second sensing readout period srp2, each of the second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4 can be switched to an active level, and the charges generated from the first and second red pixels R1 and R2, the third and fourth red pixels R3 and R4 can be stored in the floating diffusion node FD. The charges generated from each of the first, second, third, and fourth red pixels R1, R2, R3, and R4 of the second pixel group PXG2_1 can be added and output as the fourth image signal IS4.

[0151] In the readout period, the second image signal IS2 and the fourth image signal IS4 can be sequentially output. AF data for phase difference calculation of the AF function can be generated based on the second image signal IS2 and the fourth image signal IS4. For example, a right image signal of the second pixel group PXG2_1 can be acquired based on the second image signal IS2 and the fourth image signal IS4, and the AF function can be performed based on the second image signal IS2 and the right image signal. In addition, the fourth image signal can be used to generate an image frame by frame.

[0152] The image sensor (for example, Figure 2 ) can read out the first image signal IS1 and the second image signal IS2 in the first sensing readout period srp1, and read out the third image signal IS3 and the fourth image signal IS4 in the second sensing readout period srp2, thereby generating an image signal for an AF operation and an image with improved SNR. The image sensor can improve the SNR and improve the image quality when performing an auto focus detection operation.

[0153] Figure 9 is a flowchart of a method of operating an image sensor according to an embodiment. Details repeated from the above are omitted. Hereinafter, reference is also made to Figure 8 .

[0154] In operation S910, the image sensor (for example, Figure 2 the image sensor 100 of ) can output a first reset signal rst1 and a second reset signal rst2. The readout period can include a reset readout period rrp, and the first reset signal rst1 for the first pixels included in the first pixel group can be output in the reset readout period rrp. The second reset signal rst2 for the second pixels included in the second pixel group can be output in the reset readout period rrp.

[0155] In operation S920, the image sensor can output a first image signal IS1 and a second image signal IS2. The readout period can include a first sensing readout period srp1, and the first sensing readout period srp1 can be after the reset readout period rrp. In the first sensing readout period srp1, signals generated from all the first pixels included in the first pixel group can be added to generate the first image signal IS1.

[0156] In the first sensing readout period srp1, signals generated from some of the second pixels included in the second pixel group can be added to generate the second image signal IS2. For example, the second image signal IS2 can be output from the second pixels arranged in the same column and different rows in the second pixel group. For example, a left image signal of the second pixel group PXG2_1 can be the second image signal IS2. However, the second image signal IS2 is not limited thereto.

[0157] In operation S930, the image sensor can output a third image signal and a fourth image signal. The readout period can include a second sensing readout period srp2, and the second sensing readout period srp2 can follow the first sensing readout period srp1. In the second sensing readout period srp2, signals generated from all the first pixels included in the first pixel group can be added to generate the third image signal IS3. In the second sensing readout period srp2, the image signals generated from all the first pixels included in one pixel group can be read out again. In the second sensing readout period srp2, signals generated from all the second pixels included in the second pixel group can be added to generate the fourth image signal IS4.

[0158] Figure 10 is a circuit diagram illustrating an implementation example of a pixel according to an embodiment. Figure 10 The pixel PX' in FIG. 10 can operate through a double conversion gain operation. Figure 10 The pixel PX' of FIG. 10 can be applied to a first pixel (e.g., the first pixel PX1 in FIG. 10) and a second pixel (e.g., the second pixel PX2 in FIG. 10). For example, a plurality of pixels PX' can be included in each of the first pixel group and the second pixel group. Details repeated with reference to the above description of FIG. 9 are omitted. Figure 3 Figure 3 Figure 6

[0159] The pixel PX' can include a photodiode PD, a plurality of transistors, e.g., a transfer transistor TX, a reset transistor RX, a drive transistor DX, a selection transistor SX, and a gain control transistor CGX (or a conversion gain control transistor). A capacitor C H (e.g., a parasitic capacitor) can be constituted by a floating diffusion node FD.

[0160] The transfer transistor TX, the reset transistor RX, the drive transistor DX, the selection transistor SX, and the gain control transistor CGX can each operate in response to a control signal (e.g., a reset control signal RS, a transfer control signal TS, a selection signal SELS, and a gain control signal CGS) provided from the row driver 140.

[0161] The charge accumulated in the floating diffusion node FD can generate a voltage. In this regard, the charge accumulated in the floating diffusion node FD can be converted into a voltage. The conversion gain can depend on the capacitance of the floating diffusion node FD, and can be inversely proportional to the size of the capacitance. As the capacitance of the floating diffusion node FD increases, the conversion gain decreases; and as the capacitance decreases, the conversion gain increases.

[0162] ​​​The gain control transistor CGX can be turned on or off based on the gain control signal CGS received at its gate terminal. When the gain control transistor CGX is turned off, the capacitance can be reduced, while when the gain control transistor CGX is turned on, the capacitance can be increased. The conversion gain when the gain control transistor CGX is turned off can be higher than the conversion gain when the gain control transistor CGX is turned on. When the gain control transistor CGX is turned off, it can be referred to as an HCG mode, and when the gain control transistor CGX is turned on, it can be referred to as an LCG mode.

[0163] The pixel PX' can operate in the HCG mode or the LCG mode depending on whether the gain control transistor CGX is turned on or off. For example, the pixel PX' can operate in the HCG mode based on the gain control transistor CGX being turned off, while the pixel PX' can operate in the LCG mode based on the gain control transistor CGX being turned on. The pixel PX' can provide a dual conversion gain DCG to sense low amounts of light and high amounts of light, and can expand (or increase) the image sensor (e.g., Figure 2 The dynamic range of the image sensor 100).

[0164] In an embodiment, when the pixel PX' operates in the dual conversion gain mode, the timing controller (eg, Figure 2 The timing controller 120 of the embodiment may control the first image signal and the second image signal to be output in the first sensing readout period. The first pixel group may include a plurality of first pixels, and the first pixels may be Figure 10 However, Figure 10 The pixel PX′ in is an example, and the structure of the pixel PX′ is not limited thereto. The first image signal may be an image signal obtained by adding image signals generated from all first pixels in the first pixel group operating in the HCG mode.

[0165] The second pixel group may include a plurality of second pixels, and the second pixels may be Figure 10 However, the embodiment is not limited thereto. The second image signal may be an image signal obtained by adding image signals generated from some second pixels operating in the LCG mode among the second pixels included in the second pixel group.

[0166] In an embodiment, when the pixel PX' operates in the dual conversion gain mode, the timing controller 120 may control the third image signal and the fourth image signal to be output in the second sensing readout period. The second sensing readout period may be after the first sensing readout period. The third image signal may be an image signal obtained by adding the image signals generated from all first pixels included in the first pixel group operating in the LCG mode. The fourth image signal may be an image signal obtained by adding the image signals generated from all second pixels included in the second pixel group operating in the LCG mode.

[0167] Figure 11 is a timing diagram of an image sensor for reading out pixel signals according to an embodiment. Figure 11 In the description, it will be assumed that each of the first pixel group and the second pixel group includes four pixels PX. However, this is for convenience of description, and even if each of the first pixel group and the second pixel group includes a different number of pixels PX, Figure 11 The description may also apply. Figure 10 The pixel PX' in the pixel group may be applicable to each of the first pixel and the second pixel. In addition, even if the pixels included in the pixel group share the floating diffusion node FD, Figure 11 The description of can also be applied similarly. The details repeated with the above content are omitted. In the following, reference will be made to Figure 10 and Figure 11 .

[0168] When the pixel PX' is a first pixel, the reset transistor RX, the select transistor SX and the gain control transistor CGX of each first pixel can be controlled based on the first reset control signal RS1, the first select signal SELS1 and the first gain control signal CGS1. For ease of description, Figure 11 Although one first reset control signal RS1, one first selection signal SELS1, and one first gain control signal CGS1 are shown, transistors may be controlled individually based on the first reset control signal RS1, the first selection signal SELS1, and the first gain control signal CGS1 for each first pixel included in the first pixel group. The first pixel group may include four first pixels, and the transfer transistors TX of the four first pixels may be controlled based on each of the first transfer control signals TS1_1, TS1_2, TS1_3, and TS1_4.

[0169] When the pixel PX' is a second pixel, the reset transistor RX, the select transistor SX and the gain control transistor CGX of each second pixel can be controlled based on the second reset control signal RS2, the second selection signal SELS2 and the second gain control signal CGS2. Figure 11A second reset control signal RS2, a second selection signal SELS2, and a second gain control signal CGS2 are shown, but a transistor can be controlled based on a second reset control signal RS2, a second selection signal SELS2, and a second gain control signal CGS2 for each second pixel included in the second pixel group, respectively. The second pixel group can include four second pixels, and the transfer transistors TX of the four second pixels can be controlled based on second transfer control signals TS2_1, TS2_2, TS2_3, and TS2_4, respectively.

[0170] Referring to Figure 4 , Figure 10 and Figure 11 In the readout period, pixel signals (e.g., pixel signals PXS) can be output from the first pixel group PXG1_1, the second pixel group PXG2_1, and a pixel group PXG arranged in the same row as the first pixel group PXG1_1 and the second pixel group PXG2_1. Figure 2

[0171] The readout period can be divided into a reset readout period rrp, a first sensing readout period srpl, and a second sensing readout period srp2. The reset readout period rrp can include a first sub-reset readout period srrpl and a second sub-reset readout period srrp2. The second sub-reset readout period srrp2 can be after the first sub-reset readout period srrpl. In the readout period, a first sub-reset signal srst1_LCG (or a second sub-reset signal srst2_LCG), a third sub-reset signal srst3_HCG (or a fourth sub-reset signal srst4_HCG), a first image signal IS1_HCG (or a second image signal IS2_LCG), and a third image signal IS3_LCG (or a fourth image signal IS4_LCG) generated from the pixel PX' can be sequentially read out. Such a readout method can be referred to as a reset-reset-signal-signal (RRSS) readout method.

[0172] In the readout period, the second selection signal SELS2 and the first selection signal SEL1 can be at an active level (e.g., logic high). The first sub-reset signal srst1_LCG and the second sub-reset signal srst2_LCG can be output in the first sub-reset readout period srrpl. The first sub-reset signal srst1_LCG can be an LCG mode reset signal output from the first pixel group PXG1_1. The second sub-reset signal srst2_LCG can be an LCG mode reset signal output from the second pixel group PXG2_1.

[0173] ​In the first sub-reset readout period srrpl, the first reset control signal RS1 can transition from logic low to logic high, and the first gain control signal CGS1 can transition from logic low to logic high. In the first sub-reset readout period srrpl, a first sub-reset signal srstl_LCG in the LCG mode for the first pixel PX1 included in the first pixel group PXG1_1 can be output.

[0174] In the first sub-reset readout period srrpl, the second reset control signal RS2 can transition from logic low to logic high, and the second gain control signal CGS2 can transition from logic low to logic high. In the first sub-reset readout period srrpl, a second sub-reset signal srst2_LCG in the LCG mode for the second pixel PX2 included in the second pixel group PXG2_1 can be output.

[0175] In the second sub-reset readout period srrp2, a third sub-reset signal srst3_HCG and a fourth sub-reset signal srst4_HCG can be read out. The third sub-reset signal srst3_HCG can be a reset signal in the HCG mode output from the first pixel group PXG1_1. The fourth sub-reset signal srst4_HCG can be a reset signal in the HCG mode output from the second pixel group PXG2_1.

[0176] In the second sub-reset readout period srrp2, the first reset control signal RS1 and the first gain control signal CGS1 can be in a logic low state, and the second reset control signal RS21 and the second gain control signal CGS2 can be in a logic low state. In the second sub-reset readout period srrp2, the third sub-reset signal srst3_HCG in the HCG mode for the first pixel PX1 included in the first pixel group PXG1_1 can be output. Further, in the second sub-reset readout period srrp2, the fourth sub-reset signal srst4_HCG in the HCG mode for the second pixel PX2 included in the second pixel group PXG2_1 can be output.

[0177] In the first sensing readout period srp1, a first image signal IS1 HCG can be output from the first pixel group PXG1 1, and a second image signal IS2 LCG can be output from the second pixel group PXG2 1. In the first sensing readout period srp1, the transfer transistor of each of the first pixels PX1 included in the first pixel group PXG1 1 can be turned on. In the first sensing readout period srp1, the first transfer control signals TS1 1, TS1 2, TS1 3, and TS1 4 can be converted to an active level, and the first gain control signal CGS1 can be in a logic low state. In the first sensing readout period srp1, the first pixels can operate in an HCG mode. Signals generated from all the first pixels PX1 included in the first pixel group PXG1 1 can be added to generate the first image signal IS1 HCG.

[0178] In the first sensing readout period srp1, the transfer transistor of each of some of the second pixels PX2 included in the second pixel group PXG2 1 can be turned on. In the first sensing readout period srp1, some of the second transfer control signals TS2 1 and TS2 3 can be converted to an active level, and the second gain control signal CGS2 can be converted from a logic low to a logic high. In the first sensing readout period srp1, the second pixels PX2 can operate in an LCG mode. Signals generated from some of the second pixels PX2 included in the second pixel group PXG2 1 can be added and output as the second image signal IS2 LCG.

[0179] In the second sensing readout period srp2, a third image signal IS3 LCG can be output from the first pixel group PXG1 1, and a fourth image signal IS4 LCG can be output from the second pixel group PXG2 1. In the second sensing readout period srp2, the transfer transistor of all the first pixels PX1 included in the first pixel group PXG1 1 can remain in an off state. In the second sensing readout period srp2, the first transfer control signals TS1 1, TS1 2, TS1 3, and TS1 4 can be in a logic low state, while the first gain control signal CGS1 can be converted from a logic low to a logic high. Since the first gain control signal CGS1 is in an active level in the second sensing readout period srp2, the first pixels PX1 can operate in an LCG mode. Signals generated from all the first pixels PX1 included in the first pixel group PXG1 1 can be added to generate the third image signal IS3 LCG.

[0180] In the second sensing readout period srp2, the transfer transistor of all the second pixels PX2 included in the second pixel group PXG2_1 can be turned on. In the second sensing readout period srp2, the second transfer control signals TS2_1, TS2_2, TS2_3, TS2_4 can be converted from logic low to logic high, and the second gain control signal CGS2 can be maintained in a logic high state. Since the second gain control signal CGS2 is at an active level in the second sensing readout period srp2, the second pixels PX2 can operate in the LCG mode. Signals generated from all the second pixels PX2 included in the second pixel group PXG2_1 can be added to generate a fourth image signal IS4_LCG.

[0181] In the readout period, the first image signal IS1_HCG and the third image signal IS3_LCG can be sequentially output. The second image signal IS2_LCG and the fourth image signal IS4_LCG can be sequentially output. Image data for generating an HDR image for the first pixel group PXG1_1 can be generated based on the first image signal IS1_HCG and the third image signal IS3_LCG. In addition, image data for generating an HDR image for the second pixel group PXG2_1 can be generated based on the fourth image signal IS4_LCG.

[0182] An image sensor (for example, Figure 2 An image sensor in ) can read out the first image signal IS1_HCG and the second image signal IS2_LCG from the first sensing readout period srp1, and read out the third image signal IS3_LCG and the fourth image signal IS4_LCG from the second sensing readout period srp2, thereby generating an image signal for an AF operation together and generating an HDR image. The image sensor can perform an HDR operation and improve image quality when performing an auto focus detection operation.

[0183] Figure 12 is a graph for describing an image signal of a first pixel group according to an embodiment. Details repeated with the above description with reference to Figure 4 are omitted.

[0184] With reference to Figure 12 , the image signal can be read out from the first pixel group PXG1_1 once in a readout period.

[0185] In the first sensing readout period, the first pixel group PXG1_1 can output a first image signal IS1 generated from all the first pixels PX1 included in the first pixel group PXG1_1, and the second pixel group PXG2_1 can output a second image signal IS2 generated from some of the second pixels PX2 included in the second pixel group PXG2_1.

[0186] In the second sensing readout period, the image signal may not be read out from the first pixel group PXG1_1 , and the fourth image signal IS4 generated by all the second pixels PX2 included in the second pixel group PXG2_1 may be read out from the second pixel group PXG2_1 .

[0187] However, embodiments are not limited thereto, and in the first sensing readout period, image signals may not be read out from the first pixel group PXG1_1, and second image signals IS2 generated from some second pixels PX2 included in the second pixel group PXG2_1 may be read out from the second pixel group PXG2_1. In the second sensing readout period, first image signals IS1 generated from all first pixels PX1 included in the first pixel group PXG1_1 may be read out from the first pixel group PXG1_1, and fourth image signals IS4 generated from all second pixels PX2 included in the second pixel group PXG2_1 may be read out from the second pixel group PXG2_1.

[0188] Image sensors (e.g. Figure 2 Image sensor 10 in FIG. 1 can read out a first image signal IS1 from first pixel group PXG1_1 in one of a first sensing readout cycle and a second sensing readout cycle, read out a second image signal IS2 from second pixel group PXG2_1 in the first sensing readout cycle, and read out a fourth image signal IS4 from second pixel group PXG2_1 in the second sensing readout cycle. The image sensor can read out an image signal obtained by summing each first pixel included in first pixel group PXG1_1 once during the readout cycle, thereby reducing power consumption.

[0189] Figure 13 1 is a block diagram illustrating an electronic device according to an embodiment. For example, the electronic device 1000 may be a portable terminal. refer to Figure 13 , the electronic device 1000 according to the embodiment may include an application processor 1200, an image sensor 1100, a display 1300, a memory 1400, a storage device 1500, a user interface 1600, and a wireless transceiver 1700. Figures 1 to 12 The description of the image sensor and the method of operating the image sensor of the aforementioned embodiments may be applied to the image sensor 1100 .

[0190] The image sensor 1100 may generate image data based on the received optical signal and provide the image data to the application processor 1200. The image data may include AF data, SNR image data, HDR image data, and the like.

[0191] The image sensor 1100 can read out first image signals from all of the first pixels included in the first pixel group in a first sensing readout period of a frame and read out second image signals generated from some of the second pixels included in the second pixel group. In the first sensing readout period, the number of the first pixels whose transfer transistors are turned on and the number of the second pixels whose transfer transistors are turned on can be different. For example, in the first sensing readout period, the transfer transistor of each of the four first pixels can be turned on, and the transfer transistor of each of two of the four second pixels can be turned on, while the transfer transistors of the other two of the four second pixels can be turned off. In a second sensing readout period after the first sensing readout period, the image sensor 1100 can read out third image signals generated from all of the first pixels included in the first pixel group and fourth image signals generated from all of the second pixels included in the second pixel group. An AF operation can be performed based on the second image signals and the fourth image signals.

[0192] The application processor 1200 can control overall operations of the electronic device 1000 and can be provided as a system on chip (SoC) that runs an application program, an operating system, etc.

[0193] The application processor 1200 can receive output data from the image sensor 1100.

[0194] The memory 1400 can be implemented as a volatile memory such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or can be implemented as a non-volatile memory such as a ferroelectric random access memory (FeRAM), a resistive random access memory (RRAM), or a phase change random access memory (PRAM). The memory 1400 can store programs and / or data processed or executed by the application processor 1200.

[0195] The storage 1500 can be implemented as a non-volatile memory device such as a NAND flash or a resistive memory. For example, the storage 1500 can be provided as a memory card (a multimedia card (MMC), an embedded MMC (eMMC), a secure digital (SD), a micro (SD), etc.). The storage 1500 can store data and / or programs of an execution algorithm for controlling image processing operations of the image sensor 1100, and / or can load the data and / or programs into the memory 1400 when the image processing operations are executed. In an embodiment, the storage 1500 can store output image data generated by the image sensor 1100, for example, corrected image data or post-processed image data.

[0196] The user interface 1600 can be implemented through various means capable of receiving a user input, such as a keypad, a curtain key panel, a touch panel, a fingerprint sensor, and a microphone. The user interface 1600 can receive a user input and provide a signal corresponding to the received user input to the application processor 1200.

[0197] The wireless transceiver 1700 can include a transceiver 1720, a modem 1710, and an antenna 1730.

[0198] While various aspects of embodiments have been particularly shown and described, it will be understood that various changes in form and details can be made to the present disclosure without departing from the spirit and scope of the following claims.

Claims

1. An image sensor comprising: a first group of pixels including a plurality of first pixels, wherein a plurality of first microlenses are respectively located on the plurality of first pixels; a second group of pixels including a plurality of second pixels, wherein a second microlens is located on at least two of the plurality of second pixels; and a timing controller configured to: in a first sensing readout period of a readout period, control output of a first image signal generated from each of the plurality of first pixels and a second image signal generated from a first portion of the plurality of second pixels, and in a second sensing readout period of the readout period after the first sensing readout period, control output of a third image signal generated from each of the plurality of first pixels and a fourth image signal generated from each of the plurality of second pixels.

2. The image sensor of claim 1, wherein, each of the plurality of first pixels and each of the plurality of second pixels includes: a photoelectric conversion element configured to generate photocharge based on incident light; and a transfer transistor configured to send the photocharge generated by the photoelectric conversion element to a floating diffusion node, and wherein, in the first sensing readout period, the transfer transistor of each of the plurality of first pixels is turned on, and wherein the transfer transistor of each of a first portion of the plurality of second pixels is turned on, and the transfer transistor of each of a second portion of the plurality of second pixels is turned off.

3. The image sensor of claim 2, wherein, in the second sensing readout period, the transfer transistor of each of the plurality of first pixels is turned off, and the transfer transistor of each of the plurality of second pixels is turned on.

4. The image sensor of claim 1, wherein, the readout period further includes a reset readout period before the first sensing readout period, and wherein the timing controller is further configured to control output of a first reset signal for the plurality of first pixels in the reset readout period and control output of a second reset signal for the plurality of second pixels.

5. The image sensor of claim 1, wherein, the timing controller is further configured to generate phase detection data for autofocus based on the second image signal and the fourth image signal.

6. The image sensor of claim 1, wherein, the timing controller is further configured to generate image data for improved signal-to-noise ratio based on the first image signal and the third image signal.

7. The image sensor of claim 1, wherein, the timing controller is further configured to control output of the first image signal and the second image signal in the first sensing readout period, the first image signal being generated from each of the plurality of first pixels when operating in a high conversion gain mode, and the second image signal being generated from the first portion of the plurality of second pixels when operating in a low conversion gain mode.

8. The image sensor of claim 7, wherein, The timing controller is further configured to control the output of the third image signal and the fourth image signal in the second sensing readout cycle, the third image signal being generated from each first pixel of the plurality of first pixels when operating in the low conversion gain mode, and the fourth image signal being generated from all second pixels in the second pixel group when operating in the low conversion gain mode.

9. The image sensor of claim 8, wherein, The readout period further includes a first sub-reset readout period, and a second sub-reset readout period after the first sub-reset readout period and before the first sensing readout period, and Wherein, the timing controller is further configured to: In the first sub-reset readout period, controlling output of a first sub-reset signal for the plurality of first pixels operating in the low conversion gain mode and a second sub-reset signal for the plurality of second pixels operating in the low conversion gain mode, and In the second sub-reset readout period, output of a third sub-reset signal for the plurality of first pixels operating in the high conversion gain mode and a fourth sub-reset signal for the plurality of second pixels operating in the high conversion gain mode are controlled.

10. The image sensor of claim 8, wherein, The timing controller is further configured to generate image data of a high dynamic range image for the first pixel group based on the first image signal and the third image signal.

11. The image sensor of claim 1, wherein, The plurality of first pixels include four first pixels, and the plurality of first micro lenses include four first micro lenses, The first part of the second pixels in the plurality of second pixels includes two adjacent second pixels. wherein the plurality of second pixels include four second pixels, and the second microlens extends across the four second pixels, and Wherein, the timing controller is further configured to: In the first sensing readout period, controlling output of the first image signal obtained by adding the image signals of the four first pixels and the second image signal obtained by adding the image signals of the two adjacent second pixels, and In the second sensing readout period, the third image signal obtained by adding the respective image signals of the four first pixels and the fourth image signal obtained by adding the respective image signals of the four second pixels are controlled to be output.

12. The image sensor of claim 1, wherein, The plurality of first pixels include four first pixels, and the plurality of first micro lenses include four first micro lenses, wherein a first portion of the plurality of second pixels includes four second pixels divided into two sub-pixel groups, each of the two sub-pixel groups includes two adjacent second pixels, and the second microlens extends across each of the two sub-pixel groups, and Wherein, the timing controller is further configured to: In the first sensing readout period, control is performed to output the first image signal obtained by adding the image signals of the four first pixels and the second image signal obtained by adding the image signals of some second pixels in each of the two sub-pixel groups, and In the second sensing readout period, control outputs the third image signal obtained by adding the image signals of the four first pixels each other and the fourth image signal obtained by adding the image signals of the four second pixels each other.

13. An image sensor comprising: a first pixel group including a plurality of first pixels arranged in rows and columns; a second pixel group including a plurality of second pixels arranged in rows and columns; a plurality of first microlenses respectively located on the plurality of first pixels; a second microlens located on at least two of the plurality of second pixels, the second microlens having a diameter larger than a diameter of a first microlens of the plurality of first microlenses; and and a readout circuit configured to: in a readout period, sequentially output first pixel values generated based on each of the plurality of first pixels and third pixel values generated based on each of the plurality of first pixels, and in the readout period, sequentially output second pixel values generated based on a first portion of the plurality of second pixels and fourth pixel values generated based on each of the plurality of second pixels.

14. The image sensor of claim 13, wherein, the readout circuit is further configured to, in a first sensing readout period of the readout period, output the first pixel values and the second pixel values.

15. The image sensor of claim 13, wherein, each of the plurality of first pixels and each of the plurality of second pixels includes: a photoelectric conversion element configured to generate photocharges based on incident light; and a transfer transistor configured to send the photocharges generated by the photoelectric conversion element to a floating diffusion node, and wherein, in the readout period, the transfer transistor of each of the plurality of first pixels is turned on and then turned off, and the transfer transistor of each of the plurality of second pixels is turned on after the transfer transistor of each of the first portion of the plurality of second pixels is turned on.

16. The image sensor of claim 13, wherein, autofocus data is generated based on the second pixel values and the fourth pixel values.

17. The image sensor of claim 13, wherein, the first pixel values include pixel values generated based on the plurality of first pixels operating in a high conversion gain mode in the readout period, and wherein the third pixel values include pixel values generated based on the plurality of first pixels operating in a low conversion gain mode in the readout period.

18. The image sensor of claim 13, wherein, the second pixel values include pixel values generated based on the first portion of the plurality of second pixels operating in the low conversion gain mode in the readout period, and wherein the fourth pixel values include pixel values generated based on each of the plurality of second pixels operating in the low conversion gain mode in the readout period.

19. The image sensor of claim 13, wherein, the plurality of first pixels include four first pixels and the plurality of first microlenses include four first microlenses, and wherein the plurality of second pixels include four second pixels and the second microlens extends across the four second pixels. the first pixel values include pixel values generated based on the four first pixels operating in the high conversion gain mode in the readout period, and wherein the third pixel values include pixel values generated based on the four first pixels operating in the low conversion gain mode in the readout period. the second pixel values include pixel values generated based on the first portion of the four second pixels operating in the low conversion gain mode in the readout period, and wherein the fourth pixel values include pixel values generated based on each of the four second pixels operating in the low conversion gain mode in the readout period.

20. A method of operating an image sensor, the image sensor comprising: The operation method includes a first pixel group including first pixels, a second pixel group including second pixels, first microlenses respectively disposed on the first pixels, and second microlenses disposed on at least two of the second pixels, and the operation method includes: outputting a first reset signal for the first pixels and a second reset signal for the second pixels; outputting a first image signal generated from each of the first pixels and a second image signal generated from a first portion of the second pixels; and outputting a third image signal generated from each of the first pixels and a fourth image signal generated from each of the second pixels.

Images