LED display device and preparation method

Abstract

The invention relates to an LED display device and a preparation method thereof. The LED display device comprises a substrate, the substrate is a driving wafer, a pixel layer is a compound semiconductor layer, the pixel layer is located on the upper portion of the substrate, pixel units and interconnection conductive parts are arranged in the pixel layer, the tops of the pixel units are electrically connected with corresponding second-type electrode contacts through the interconnection conductive parts, and the second-type electrode contacts are electrically connected with the pixel units through the interconnection conductive parts. The bottoms of the pixel units are electrically connected with the corresponding first type of electrode contacts; wherein the compound semiconductor layer is provided with a second type of electrode filling hole, the second type of electrode filling hole is internally provided with an interconnection conductive piece, and the interconnection conductive piece is a metal piece. The invention further discloses a preparation method. According to the invention, the heat dissipation capability of the whole LED device is effectively improved, the preparation process is simplified, the production cost is reduced, and the production efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to an LED display device and a preparation method thereof. BACKGROUND

[0002] The LED display chip generally comprises a driving wafer and a plurality of pixel units (i.e. light emitting units), corresponding electrode contacts are arranged on the driving wafer, the pixel units need to be electrically connected with the corresponding electrode contacts through the interconnection conductive member to realize the conduction of cathode (or anode), but the existing interconnection conductive member is generally arranged in the insulating medium area, a backfill hole is formed on the insulating medium area, and the metal is filled in the backfill hole to form the above-mentioned interconnection conductive member, the above-mentioned insulating medium area is prepared by removing the raw material in a large area and filling the insulating medium, and the heat dissipation effect of the LED display device obtained in this way is poor, so that the LED chip is prone to reduce the light efficiency and shorten the service life due to the high temperature during the work, and the stability and reliability of the LED display device cannot be guaranteed, and the use requirement cannot be met. SUMMARY

[0003] Therefore, the technical problem to be solved by the present application is to improve the heat dissipation effect of the LED display device in the prior art, and improve the working stability and reliability.

[0004] To solve the above technical problems, the present application provides an LED display device, comprising,

[0005] a substrate, the substrate is a driving wafer, the driving wafer is provided with first type electrode contacts and second type electrode contacts, and the polarities of the first type electrode contacts and the second type electrode contacts are opposite;

[0006] a pixel layer, the pixel layer is a compound semiconductor layer, the pixel layer is located on the upper part of the substrate, the pixel layer is provided with pixel units and interconnection conductive members, the top of the pixel unit is electrically connected with the corresponding second type electrode contact through the interconnection conductive member, and the bottom of the pixel unit is electrically connected with the corresponding first type electrode contact;

[0007] wherein, the compound semiconductor layer is provided with second type electrode filling holes, the interconnection conductive members are arranged in the second type electrode filling holes, and the interconnection conductive members adopt metal members.

[0008] In an embodiment of the present application, the top of the pixel unit is connected with a first conductive layer, the upper part of the interconnection conductive member is electrically connected with the first conductive layer, and the lower part is electrically connected with the corresponding second type electrode contact.

[0009] In an embodiment of the present application, the bottom surface of the interconnection conductive member directly contacts with the corresponding second type electrode contact.

[0010] In one embodiment of the present application, the substrate and the pixel layer are connected through a bonding layer, and the bonding layer uses a non-metallic conductive layer.

[0011] In one embodiment of the present application, the substrate and the pixel layer are connected through a bonding layer, and the bonding layer uses a metallic conductive layer.

[0012] In one embodiment of the present application, a first peripheral fence is formed on the bonding layer, each of the second type of electrodes has the first peripheral fence in the filling hole, the inner cavity of the first peripheral fence penetrates through the bonding layer, the interconnecting conductive member is arranged in the inner cavity of the first peripheral fence, and a second insulating layer is arranged between the first peripheral fence and the interconnecting conductive member.

[0013] In one embodiment of the present application, the interconnecting conductive member is located at the periphery of the pixel unit, the pixel unit and the interconnecting conductive member at the periphery are separated by a non-light-emitting area, the non-light-emitting area is a compound semiconductor, the first peripheral fence at the periphery of each of the interconnecting conductive members directly contacts the side wall of the adjacent non-light-emitting area, or the first peripheral fence at the periphery of each of the interconnecting conductive members contacts the side wall of the adjacent non-light-emitting area through a first insulating isolation layer.

[0014] In one embodiment of the present application, the interconnecting conductive member is at least partially located inside the pixel unit, and each of the interconnecting conductive members is provided with a first insulating isolation layer at the contact surface with the pixel unit.

[0015] In one embodiment of the present application, a first dielectric layer is further arranged between the pixel layer and the bonding layer.

[0016] In one embodiment of the present application, the periphery of the pixel unit is at least surrounded by an annular isolation groove, the interconnecting conductive member is located at the periphery of the annular isolation groove at the outermost periphery of the pixel unit, or the interconnecting conductive member is at least partially located inside the pixel unit.

[0017] In one embodiment of the present application, the inner wall of the annular isolation groove is covered with a first insulating layer, the annular isolation groove has a filling area inside, the periphery of the filling area is surrounded by the first insulating layer on the inner wall of the annular isolation groove, and the filling area inside is filled with air to form an air isolation layer, or the filling area is filled with a first filler to form a solid structure.

[0018] The present application also discloses a preparation method of an LED display device, which comprises the following steps:

[0019] A driving wafer is selected as the substrate, the driving wafer is provided with first type of electrode contacts and second type of electrode contacts with opposite polarities, and a compound semiconductor layer is selected as the pixel layer.

[0020] connecting the compound semiconductor layer to the upper portion of the substrate;

[0021] etching the compound semiconductor layer to obtain pixel units and second electrode filling holes, and filling the second electrode filling holes with metal to obtain interconnection conductive members;

[0022] so that the top of the pixel unit is electrically connected through the interconnection conductive member and the corresponding second electrode contact, and the bottom of the pixel unit is electrically connected to the corresponding first electrode contact.

[0023] In an embodiment of the present application, when the compound semiconductor layer is connected to the upper portion of the substrate, the method comprises:

[0024] In an embodiment of the present application, when the compound semiconductor layer is etched to obtain second electrode filling holes, and the second electrode filling holes are filled with metal to obtain interconnection conductive members, the method comprises:

[0025] etching the compound semiconductor layer above the second electrode contact to obtain the second electrode filling hole, and making the second electrode filling hole penetrate through the bonding layer to expose the second electrode contact;

[0026] filling the second electrode filling hole with metal to form the interconnection conductive member, so that the bottom of the interconnection conductive member is directly in contact with the corresponding second electrode contact.

[0027] In an embodiment of the present application, when the second electrode filling hole penetrates through the bonding layer to expose the second electrode contact, the method comprises:

[0028] forming a first peripheral fence on the upper portion of the bonding layer, and the inner cavity of the first peripheral fence penetrates through the bonding layer, each of the second electrode filling holes is formed with the first peripheral fence, and the inner cavity of each of the first peripheral fences is used to accommodate the interconnection conductive member.

[0029] In an embodiment of the present application, after the first peripheral fence is formed on the upper portion of the bonding layer in the above method, a second insulating layer is deposited on the inner wall of the first peripheral fence.

[0030] In an embodiment of the present application, when the top of the pixel unit is electrically connected through the interconnection conductive member and the corresponding second electrode contact, the method comprises: depositing a first conductive layer on the top of the pixel layer, so that one end of the first conductive layer is electrically connected to the top of the pixel unit, the other end is electrically connected to the top of the interconnection conductive member, and the bottom of the interconnection conductive member is electrically connected to the corresponding second electrode contact.

[0031] The above technical solution of the present application has the following advantages compared with the prior art:

[0032] The LED display device described in the present application directly opens holes and fills metals on the original compound semiconductor layer to obtain interconnection conductive parts, which maximally retains the original compound semiconductor material, effectively improves the heat dissipation capacity of the overall device, simultaneously simplifies the preparation process, reduces the production cost, and improves the working stability and reliability. BRIEF DESCRIPTION OF DRAWINGS

[0033] In order to make the content of the present application more easily understood, the present application is further described in detail below according to specific embodiments of the present application and in combination with the drawings.

[0034] Figure 1 is a structural schematic diagram of an LED display device in the present application;

[0035] Figure 2 is a partial enlarged view of M1 in Figure 1

[0036] Figure 3 is a partial enlarged view of M2 in Figure 1

[0037] Figure 4 is a structural schematic diagram of another LED display device in the present application;

[0038] Figure 5 is a partial enlarged view of M3 in Figure 4

[0039] Figure 6 is a structural schematic diagram of a compound semiconductor layer in the present application;

[0040] Figure 7 is a bonding flow chart of a pixel layer and a driving wafer in the present application;

[0041] Figure 8 is a preparation flow chart of the LED display device shown in Figure 1

[0042] Figure 9 is a preparation flow chart of the LED display device shown in Figure 4

[0043] is a structural schematic diagram of an LED display device with a first dielectric layer in the present application; Figure 10 EXPLANATION OF REFERENCE NUMERALS IN THE DRAWINGS:

[0044]

[0045] ​​​​​100, pixel unit; 101, first semiconductor layer; 102, active layer; 103, second semiconductor layer;

[0046] 200, substrate; 201, first type of electrode contact; 202, second type of electrode contact;

[0047] 300, bonding layer; 301, first peripheral bar;

[0048] 400, pixel layer; 401, annular groove; 4011, filling area; 402, non-light-emitting area; 403, etching barrier layer; 404, first insulating layer; 405, thin film cover layer; 406, second type of electrode filling hole; 407, second insulating layer; 408, first insulating isolation layer;

[0049] 500, ohmic contact layer;

[0050] 600, interconnection conductive piece;

[0051] 700, first conductive layer;

[0052] 800, first dielectric layer; DETAILED DESCRIPTION

[0053] The present application will be further described with reference to the drawings and specific examples, so that those skilled in the art can better understand the present application and implement it. The examples are not intended to limit the present application.

[0054] The present application will be further described with reference to the drawings and specific examples, so that those skilled in the art can better understand the present application and implement it. The examples are not intended to limit the present application. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way limiting.

[0055] In the description of the present application, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features limited by "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, unless otherwise stated, the meaning of "a plurality of" is two or more.

[0056] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connecting" should be understood broadly, for example, it can be fixed connection, or detachable connection, or integrally connected; it can be mechanical connection, or electrical connection; it can be directly connected, or indirectly connected through intermediate medium, or internal communication of two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0057] The LED display device in the prior art has the problems of poor heat dissipation effect, poor use stability and reliability, etc. Therefore, the present application provides an LED display device to improve its heat dissipation capacity and better ensure the photoelectric performance and reliability of the LED display device.

[0058] It should be noted that the compound semiconductor layer in the present application refers to a layer structure with a certain thickness prepared from a compound semiconductor material. Compound semiconductors generally refer to compounds formed by two or more elements, including crystalline inorganic compounds (such as III-V, II-VI compound semiconductors) and oxide semiconductors, etc. The compound semiconductors involved in the present application are mainly light emitting diode epitaxial materials, such as InGaN ternary material system or AlGaInP quaternary material system, etc., which can cover the full wavelength range from ultraviolet, visible light and infrared, and the substrate materials can be GaN, Si, SiC, sapphire, GaAs, InP, etc.

[0059] Taking the field of Micro-LED as an example, some compound semiconductor materials involved in the present application are shown in Table 1. In some practical applications, the film layer of the compound semiconductor will be more complex, or there will be a situation of cross use of materials. Typical compound semiconductors mainly include P-type semiconductor material, N-type semiconductor material and MQW active quantum well sandwiched between them and other functional layers (barrier layer, confinement layer, waveguide layer, buffer layer, etc.):

[0060] Table 1: Compound semiconductor film layer material table

[0061]

[0062] The related structure of the LED display device of the present application will be further described below in combination with the following specific embodiments.

[0063] Embodiment one

[0064] Referring to Figures 1-3 The embodiment discloses an LED display device, which comprises a substrate 200 and a pixel layer 400,

[0065] The above-mentioned substrate 200 is a driving wafer, on which a first type of electrode contact 201 and a second type of electrode contact 202 are provided. The polarities of the first type of electrode contact 201 and the second type of electrode contact 202 are opposite, one of which is positive and the other is negative. It can be understood that the first type of electrode contact 202 and the second type of electrode contact 203 need to be insulated to prevent direct contact between the two and a short circuit.

[0066] The pixel layer 400 is a compound semiconductor layer. It can be understood that the compound semiconductor layer refers to a layer with a certain thickness made of a compound semiconductor material.

[0067] The pixel layer 400 is located on the upper portion of the substrate 200. The pixel layer 400 includes pixel units 100 and interconnecting conductive members 600. The top of each pixel unit 100 is electrically connected to the corresponding second-type electrode contact 202 via the interconnecting conductive member 600, and the bottom of the pixel unit 100 is electrically connected to the corresponding first-type electrode contact 201, thereby achieving electrical connection between the pixel unit 100 and the driver wafer.

[0068] It is understandable that the top and bottom of the pixel unit 100 are two ends of opposite polarity. For example, the top is the end where the N-type semiconductor is located (or the end where the P-type semiconductor is located), and the bottom is the end where the P-type semiconductor is located (or the end where the N-type semiconductor is located), and they need to be connected to electrode contacts of different polarities. Among them, the correspondence between the pixel unit and the electrode contact (first type electrode contact or second type electrode contact) can be one-to-one or one-to-many. For example, one second type electrode contact can correspond to one pixel unit, or multiple second type electrode contacts can correspond to one pixel unit. Similarly, the same applies to the first type electrode contact.

[0069] Further, such as Figure 8 As shown in stage c, a second type electrode filling hole 406 is provided on the compound semiconductor layer, and the second type electrode filling hole 406 is filled with a conductive material to form an interconnected conductive member 600;

[0070] The interconnection conductive member 600 is made of metal.

[0071] The above-mentioned driving wafer is an element with a driving circuit. The first type of electrode contact 201 and the second type of electrode contact 202 are the lead-out terminals of the driving circuit, which are used to electrically connect the driving circuit and the pixel unit. The pixel unit 100 is a light-emitting element. The pixel unit 100 can be controlled to emit light through the electrical connection between the driving wafer and the pixel unit 100.

[0072] The driving wafer includes, but is not limited to, a CMOS (Complementary Metal Oxide Semiconductor) driving backplane or a TFT glass substrate, etc.

[0073] The structure can electrically connect the driving wafer and the pixel unit through the first-type electrode contact and the second-type electrode contact, so that the driving wafer controls the light emission of each pixel unit.

[0074] In some preferred modes, each pixel unit 100 in the pixel layer 400 can emit light independently.

[0075] In the traditional mode, the original compound semiconductor material is removed and replaced with an insulating medium material, a second-type electrode filling hole is formed in the insulating medium material, and a corresponding material is filled in the filling hole to form an interconnection conductive part. This traditional structure mode fills the periphery of the interconnection conductive part and the entire pixel layer with a large amount of insulating medium material, and the thermal conductivity of the insulating medium material is lower than that of the original compound semiconductor, so that the heat generated by the device cannot be timely transmitted, resulting in an increase in the temperature of the device, thereby greatly reducing the photoelectric performance and reliability of the device.

[0076] Table 2: Comparison table of thermal conductivities of different materials

[0077]

[0078] As shown in Table 2, among the three materials of insulating medium, compound semiconductor and metal, the thermal conductivity of the metal material is higher than that of the compound semiconductor material, and the thermal conductivity of the compound semiconductor material is higher than that of the insulating medium material.

[0079] In the structure of the present embodiment, a second-type electrode filling hole 406 is arranged on the compound semiconductor layer, and an interconnection conductive part 600 is formed by filling a conductive material in the second-type electrode filling hole 406. This structure mode maximally retains the original compound semiconductor material, so that the periphery of the interconnection conductive part is surrounded by a large area of compound semiconductor material, that is, the periphery of the interconnection conductive part is surrounded by the compound semiconductor material, the interconnection conductive part and the pixel unit are separated by the compound semiconductor material, and the thermal conductivity of the compound semiconductor material is higher than that of the insulating medium material, thereby effectively improving the heat dissipation capacity of the overall device, greatly avoiding the problems of failure, malfunction, etc. caused by excessive temperature rise due to heat accumulation during the operation of the LED device, and improving the stability and reliability of the LED display device. At the same time, the above interconnection conductive part structure is also more convenient to prepare, thereby improving the production efficiency.

[0080] It should be noted that the "width" direction in the present application is the X direction, the "height" or "up-down" direction is the Z direction, and there is also a Y direction, wherein the X direction, the Y direction and the Z direction are perpendicular to each other. The pixel layer 400 includes the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103 arranged in sequence from top to bottom. The Z direction is the stacking direction of the first semiconductor layer 101, the active layer 102 and the second semiconductor layer 103.

[0081] In some embodiments, as shown in the c stage of Figure 8 The width L4 of the second-type electrode filling hole 406 can be 0.1 um to 10 um, as shown in the c stage of

[0082] In some embodiments, as shown in the c stage of Figures 1-2 The top of the pixel unit 100 is connected with the first conductive layer 700, the upper part of the interconnection conductive member 600 is electrically connected with the first conductive layer 700, and the lower part is electrically connected with the corresponding second-type electrode contact 202.

[0083] The first conductive layer 700 can be a transparent conductive layer.

[0084] For example, the transparent conductive layer can be one or more combinations of indium tin oxide (ITO), indium zinc oxide (IZO), Al-doped zinc oxide (AZO), Al-doped indium tin oxide, Ag-doped indium tin oxide or Au-doped indium tin oxide.

[0085] In some preferred modes, the bottom surface of the interconnection conductive member 600 directly contacts the corresponding second-type electrode contact 202, for example, the interconnection conductive member 600 is arranged directly above each second-type electrode contact 202, and the bottom surface of the second-type electrode contact 202 directly contacts the interconnection conductive member 600.

[0086] In the present embodiment, the substrate 200 and the pixel layer 400 are connected through the bonding layer 300, the bonding layer 300 is a conductive layer, and the bonding layer can be a non-metallic conductive layer or a metallic conductive layer.

[0087] Preferably, the bonding layer 300 can be a metallic conductive layer.

[0088] The metallic bonding layer 300 can be one or more combinations of Ni, Sn, Au, Sn, Cu, Sn, Au, In, Au, Au, Al, Al, Cu, Cu or ITO, ITO, and an adhesion layer (such as Cr, Ti, Ni, etc.) and a barrier depletion layer (such as Ni, Pt, Cu, etc.) can be arranged between the bonding layer 300 and the driving wafer.

[0089] In some preferred manners, the bonding layer 300 can be a multi-layer structure stacked in sequence along the height direction, and each layer from bottom to top is a Cr layer (adhesion layer), a Pt layer (barrier depletion layer), an Au layer, a Sn layer, and an Au layer, with thicknesses of 10 nm, 50 nm, 100 nm, 150 nm, and 50 nm, respectively.

[0090] In some embodiments, an ohmic contact layer 500 is further arranged between the bonding layer 300 and the pixel layer 400.

[0091] The pixel unit 100 in the embodiment includes a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103 arranged in sequence from top to bottom, the second electrode contact 202 is used to electrically connect the first semiconductor layer 101 in the corresponding pixel unit 100, and the first electrode contact 201 is used to electrically connect the second semiconductor layer 103 in the corresponding pixel unit 100.

[0092] One of the first semiconductor layer 101 and the second semiconductor layer 103 is a P-type semiconductor layer, and the other is an N-type semiconductor layer. The active layer 102 is used for light emission and can be an MQW active quantum well.

[0093] The ohmic contact layer 500 is located between the second semiconductor layer 103 and the bonding layer 300, and is used to better realize the ohmic contact between the second semiconductor layer 103 and the bonding layer 300.

[0094] For example, the ohmic contact layer 500 can be a transparent conductive film made of one or more of ITO, IZO, IGZO, or AZO, or can be a metal layer made of one or more of Ni, Cr, Au, Ag, Zn, Rh, Be, or Al, or can be an alloy layer, or can also be a stack of transparent metal oxides and metals.

[0095] The thickness of the ohmic contact layer 500 is 1 nm to 500 nm. If the thickness is too large, the material will be wasted, and if the thickness is too small, it will be difficult to achieve a better ohmic contact effect.

[0096] Further, as shown in Figure 2 The bonding layer 300 is formed with a first peripheral fence 301, each second electrode filling hole 406 has the first peripheral fence 301, the inner cavity of the first peripheral fence 301 penetrates the bonding layer 300, the inner cavity of the first peripheral fence 301 is provided with an interconnection conductive member 600, and the first peripheral fence 301 and the interconnection conductive member 600 are insulated and separated by a second insulating layer 407.

[0097] In addition, since the bonding layer 300 may be connected to a first electrode contact, the second type of electrode contact 202 is insulated and isolated from the first type of electrode contact 201 by the provision of the second insulating layer 407 to avoid short circuit.

[0098] Exemplarily, the second insulating layer 407 may be a single-layer structure or a stacked-layer structure composed of one or more dielectric layers such as silicon oxide, aluminum oxide, silicon nitride, titanium oxide, hafnium oxide, tantalum oxide, niobium oxide, aluminum nitride, and gallium nitride.

[0099] In some embodiments, as Figure 1 As shown, the interconnected conductive member 600 is located at the periphery of the pixel unit 100, and the pixel unit 100 and the peripheral interconnected conductive member 600 are separated by a non-luminous region 402, and the non-luminous region 402 is a compound semiconductor;

[0100] The first outer fence 301 around each interconnected conductive member 600 contacts the sidewall of the adjacent (closest) non-luminous region 402 through the first insulating isolation layer 408 to achieve better insulation isolation.

[0101] The first insulating isolation layer 408 may be a single-layer or multi-layer structure, for example, it may be composed of a first insulating layer 404 and a thin film covering layer 405 that are sequentially arranged.

[0102] It is understood that the "non-luminescent area 402" is an area that will not be used as a light-emitting unit, and only the "pixel unit 100" needs to be used as a light-emitting unit. The material of the "non-luminescent area 402" and the "pixel unit 100" is the same, both of which are compound semiconductor materials.

[0103] In other embodiments, the interconnecting conductive member 600 is at least partially located inside the pixel unit 100, and a first insulating isolation layer 408 is provided at the contact surface between each interconnecting conductive member 600 and the pixel unit 100 to achieve insulation isolation and avoid short circuiting of the pixel unit 100 itself.

[0104] In the above structure, the interconnected conductive member 600 may be completely located inside the pixel unit 100 , or only a portion thereof may be located inside the pixel unit 100 .

[0105] In some embodiments, the top surface of the non-luminous region 402 is provided with an etching stop layer 403 to serve as a mask during etching; the top surface of the pixel unit 100 may also be partially covered with the etching stop layer 403 .

[0106] For example, the etching stop layer 403 can be a mask layer made of silicon oxide, silicon nitride, or the like, a contact layer made of ITO, metal, or the like, or a stack layer on a medium layer under the contact layer. In addition to forming a contact (e.g., ohmic contact) with the first semiconductor layer 101, the etching stop layer 403 is mainly used as a mask layer for patterned etching.

[0107] The etching stop layer 403 can be a transparent material layer.

[0108] In some embodiments, as shown in FIGS. 1A and 1B, the pixel unit 100 is surrounded by at least one annular isolation groove 401, so that the pixel unit 100 is independent, and the original compound semiconductor material is retained as much as possible. The thermal conductivity of the compound semiconductor material is relatively high, thereby improving the heat dissipation effect of the device. Figure 1 and Figure 3 In some embodiments, as shown in FIGS. 1A and 1B, the pixel unit 100 is surrounded by at least one annular isolation groove 401, so that the pixel unit 100 is independent, and the original compound semiconductor material is retained as much as possible. The thermal conductivity of the compound semiconductor material is relatively high, thereby improving the heat dissipation effect of the device.

[0109] In some embodiments, the interconnection conductive member 600 is located outside the annular isolation groove 401 at the outermost periphery of the pixel unit, or the interconnection conductive member 600 is at least partially located inside the pixel unit 100, for example, a part of the interconnection conductive member 600 is located inside the pixel unit 100, and the other part of the interconnection conductive member 600 can extend at least to the adjacent annular isolation groove 401.

[0110] In some embodiments, the minimum size of the annular isolation groove 401 along the width direction (X direction) is greater than 0, and the maximum size of the annular isolation groove 401 along the width direction (X direction) is L2, and L2 is 0.02 um to 10 um. The width should not be too large, so as to retain the semiconductor material in the compound semiconductor layer to the greatest extent and improve the heat dissipation effect. The width should not be too small, otherwise it is not conducive to processing and ensuring the effective separation between the pixel units 100, and the light output effect will also be affected by the too small width.

[0111] In some embodiments, the inner wall of the annular isolation groove 401 is covered with a first insulating layer 404, and the annular isolation groove 401 has a filling area 4011 surrounded by the first insulating layer 404 on the inner wall of the annular isolation groove 401. The filling area 4011 contains an air isolation layer composed of air, or the filling area 4011 is filled with a first filler to form a solid structure.

[0112] The first filler can be an insulating medium or metal, etc.

[0113] In some embodiments, the inner wall of the annular isolation groove 401 is covered with a first insulating layer 404, which can better isolate the pixel unit 100 and prevent the phenomenon of electric leakage.

[0114] It should be noted that the inner wall of the annular isolation groove 401 includes a side wall and a bottom surface, both of which are covered with the first insulating layer 404. When the air isolation layer is filled in the filling area 4011, the bottom surface of the air isolation layer is not lower than the bottom surface of the annular isolation groove 401.

[0115] It can be understood that in some modes, the pixel unit 100 and the peripherally adjacent (the closest) annular isolation groove 401 share a side wall, and the first insulating layer 404 at the side wall is also shared by both.

[0116] Further, the upper part of the pixel layer 400 is also deposited with the first insulating layer 404, and the upper part of the pixel unit 100 is at least partially covered by the first insulating layer 404, and the area not covered by the first insulating layer 404 forms an electrical contact area for contacting the first conductive layer 700. At this time, the upper surface of the non-light-emitting area 402 is also covered by the first insulating layer 404 to cover the upper surface of the non-light-emitting area 402.

[0117] For example, the first insulating layer 404 can be one or more of a silicon oxide, an aluminum oxide, a silicon nitride, a titanium oxide, a hafnium oxide, a tantalum oxide, a niobium oxide, an aluminum nitride, a gallium nitride, etc. medium layer, constituting a single-layer structure or a stacked structure composed of multiple materials.

[0118] For example, the first insulating layer 404 can be a stacked structure of silicon oxide and titanium oxide, and a DBR (distributed Bragg reflector) Bragg reflection structure is constructed by using the refractive index difference of the two materials.

[0119] In some modes, a thin film cover layer 405 can also be deposited on the upper part of the pixel layer 400 to close the upper opening of the filling area 4011 with the thin film cover layer 405; so that the thin film cover layer 405 is located above the first insulating layer 404 on the upper part of the pixel layer 400. The first conductive layer 700 is arranged on the upper part of the thin film cover layer 405 above the pixel layer 400, so that a part of the first conductive layer 700 is in contact with the top of the pixel unit 100, and a part is connected to the top surface of the interconnection conductive member 600.

[0120] The above-mentioned thin film cover layer 405 can be an insulating material layer.

[0121] The above-mentioned etching stop layer 403, first insulating layer 404 and thin film cover layer 405 are all transparent material layers.

[0122] In some embodiments, a metal mesh can also be connected to the first conductive layer 700 to achieve better current spreading, and at the same time can further increase the heat conduction capacity and improve the reliability of the LED display device.

[0123] In some embodiments, the width of the pixel unit 100 is 0.2 um to 80 um. The width of the pixel unit 100 can be understood as the maximum size of the pixel unit 100 along the width direction (X direction).

[0124] The shape of the pixel unit 100 includes but is not limited to a circle, an ellipse, a polygon and other shapes, preferably a circle, a quadrilateral and a hexagon.

[0125] In some embodiments, a lens is further provided on the top of the pixel layer 400 , and the lens covers at least one pixel unit 100 , that is, the lens may correspond one-to-one to the pixel unit 100 , or multiple pixel units 100 may correspond to one lens.

[0126] The lens may be made of insulating material. For example, the lens may be made of silicon oxide, silicon nitride, aluminum oxide, silicate glass, PMMA, silicone rubber or SU8.

[0127] In some embodiments, a lens is further disposed on the top of the pixel layer 400 , and the lens covers at least one pixel unit 100 .

[0128] This embodiment also discloses a method for preparing an LED display device, comprising the following steps:

[0129] Step S1: selecting a driving wafer as the substrate 200, on which a first type of electrode contact 201 and a second type of electrode contact 202 with opposite polarities are provided; and selecting a compound semiconductor layer as the pixel layer 400;

[0130] Understandably, Figure 6 As shown, the compound semiconductor layer includes a first semiconductor layer 101, an active layer 102 and a second semiconductor layer 103 arranged in sequence from top to bottom;

[0131] Step S2: Figure 7 As shown, the compound semiconductor layer is connected to the upper portion of the substrate 200;

[0132] Step S3: Figure 8 As shown, the compound semiconductor layer is etched to obtain the pixel unit 100 and the second type electrode filling hole 406, and the second type electrode filling hole 406 is filled with metal to obtain the interconnected conductive member 600;

[0133] The top of the pixel unit 100 is electrically connected to the corresponding second-type electrode contact 202 through the interconnected conductive member 600 , and the bottom of the pixel unit 100 is electrically connected to the corresponding first-type electrode contact 201 .

[0134] In step S2, the pixel layer 400 is connected to the upper part of the substrate 200, and the pixel layer 400 is connected to the substrate 200 through the bonding layer 300. The bonding layer 300 is preferably a metal conductive layer.

[0135] When the pixel layer 400 and the substrate 200 are connected through the bonding layer 300, a hot-press bonding method can be used.

[0136] In some embodiments, step S3 can specifically include the following steps:

[0137] Step S31: as Figure 8 stage c in the compound semiconductor layer is etched to obtain at least one pixel unit 100, and the compound semiconductor layer above the second type of electrode contact 202 is etched to obtain a second type of electrode filling hole 406;

[0138] Step S32: as Figure 8 stage d, a first insulating layer 404 is deposited on the surface of the pixel layer 400, for example, the first insulating layer 404 can cover the sidewall of the pixel unit 100 and the inner wall of the second type of electrode filling hole, wherein the first insulating layer 404 covering the sidewall of the pixel unit 100 can better avoid the short circuit phenomenon of the pixel unit 100;

[0139] At this time, the etching stop surface of the second filling hole does not exceed the upper surface of the bonding layer 300, and if an ohmic contact layer 500 is further arranged between the pixel layer 400 and the bonding layer 300, the etching stop surface can also not exceed the lower surface of the ohmic contact layer 500.

[0140] For example, the angle a of the pixel unit 100 obtained by etching can be 90°±45°, and preferably, the angle a of the pixel unit 100 can be 90°±20°. Wherein, the angle a of the pixel unit 100 is the maximum angle between the sidewall of the pixel unit 100 and the upper surface of the substrate 200.

[0141] Step S33: as Figure 8 stage e, continue to etch the second type of electrode filling hole 406, so that the second type of electrode filling hole 406 penetrates through the bonding layer 300 and exposes the second type of electrode contact 202;

[0142] Further, when the bonding layer is a metal conductive layer, the upper part of the bonding layer 300 will be sputtered to form a first peripheral fence 301 when the second type of electrode filling hole 406 penetrates through the bonding layer 300;

[0143] It can be understood that the inner cavity of the first peripheral fence 301 is through the bonding layer 300, and each second type of electrode filling hole 406 will form a first peripheral fence 301 inside, and the inner cavity of each first peripheral fence 301 is used to accommodate the subsequent interconnection conductive member 600.

[0144] Step S34: As shown in FIG. 4D, a first peripheral fence 301 is formed on the upper portion of the bonding layer 300. Figure 8 In the f stage, after the first peripheral fence 301 is formed on the upper portion of the bonding layer 300, a second insulating layer 407 is deposited on the inner wall of the first peripheral fence 301, so that the first peripheral fence 301 and the subsequently formed interconnection conductive member 600 inside the first peripheral fence 301 can be insulated from each other.

[0145] Step S35: As shown in FIG. 4E, the g stage, the interconnection conductive member 600 is formed by filling metal inside the first peripheral fence 301, at this time, the interconnection conductive member 600 and the first peripheral fence 301 are separated by the second insulating layer 407, and the bottom of the interconnection conductive member 600 is directly in contact with the corresponding second electrode contact 202 to achieve electrical connection. Figure 8

[0146] Step S36: As shown in FIG. 4F, the h stage, the top surface of the pixel unit 100 is partially exposed, and the first conductive layer 700 is deposited on the top of the pixel layer 400, so that one end of the first conductive layer 700 is in contact with the top of the pixel unit 100 to achieve electrical connection, and the other end is in contact with the top of the interconnection conductive member 600 to achieve electrical connection. Figure 8

[0147] It can be understood that the method of partially exposing the top surface of the pixel unit 100 can be to remove the upper material by etching.

[0148] The first peripheral fence 301 and the peripheral compound semiconductor prepared by the above steps have a first insulating layer 404 as a first insulating separation layer 408 to achieve the insulation separation of the two.

[0149] Before the above step S31, an etching stop layer 403 can be provided on the upper surface of the pixel layer 400, and the etching stop layer 403 is etched to obtain a patterned mask layer, and then the pixel layer 400 is etched with the mask layer to obtain at least one pixel unit 100 and a second electrode filling hole 406.

[0150] After step S36, the following steps are also performed: a lens is prepared on the top of the pixel layer 400, the lens corresponds to one pixel unit 100, or a plurality of pixel units 100 correspond to one lens.

[0151] In some ways, when the pixel layer 400 is etched to obtain at least one pixel unit 100, the periphery of each pixel unit 100 forms at least one annular separation groove 401, that is, the independence of the pixel unit 100 is achieved by the annular separation groove 401.

[0152] ​​Further, in step S32, after the surface of the pixel layer 400 is deposited with the first insulating layer 404, the inner wall of the annular isolation groove 401 is also covered with the first insulating layer 404, and the annular isolation groove 401 has a filling area 4011 inside, which is surrounded by the first insulating layer 404 on the inner wall of the annular isolation groove 401, so that the filling area 4011 can be filled with air to form an air isolation layer, or the filling area 4011 can be filled with a first filler to form a solid structure; and a thin film cover layer 405 can also be deposited on the surface of the pixel layer 400 according to needs, and the thin film cover layer 405 can be made of insulating material.

[0153] The LED display device obtained by the preparation method described above directly opens holes and fills metals in the original compound semiconductor layer to obtain interconnection conductive parts, thereby maximizing the retention of the original compound semiconductor material, effectively improving the heat dissipation capacity of the overall device, simplifying the preparation process, reducing production costs, and improving production efficiency.

[0154] Embodiment Two

[0155] Referring to Figure 4-5 The main difference between this embodiment and Embodiment One is that the first peripheral fence 301 at the periphery of each interconnection conductive part 600 directly contacts the side wall of the adjacent non-light-emitting area 402 without the need to set a first insulating isolation layer 408, and at this time, the interconnection conductive part 600 is located at the periphery of the pixel unit 100 and is separated by the non-light-emitting area 402.

[0156] In the preparation of the LED display device of this embodiment, the preparation of the second-type electrode filling hole 406 can be not performed in step S31, but can be performed after the surface of the pixel layer 400 is deposited with the first insulating layer 404 in step S32.

[0157] Referring to Figure 9 The specific method of step S3 includes:

[0158] performing etching treatment on the compound semiconductor layer to obtain at least one pixel unit 100;

[0159] depositing a first insulating layer 404 on the surface of the pixel layer 400, for example, the first insulating layer 404 can cover the side wall of the pixel unit 100;

[0160] performing etching treatment on the compound semiconductor layer above the second-type electrode contact 202 to obtain a second-type electrode filling hole 406, and the second-type electrode filling hole 406 can directly penetrate the bonding layer 300 to expose the second-type electrode contact 202, and at this time, the upper part of the bonding layer 300 can be sputtered to form a first peripheral fence 301;

[0161] Then the steps S34-S36 in the embodiment one are performed again.

[0162] The LED display device prepared in this way is that the first peripheral fence and the peripheral compound semiconductor-non-emitting are directly contacted, in this case, the compound semiconductor region directly contacted with the first peripheral fence is not able to emit light, that is, the compound semiconductor in this region cannot be a pixel unit, but only as a non-emitting area, at this time, the interconnection conductive member can only be located in the periphery of the pixel unit, and the interconnection conductive member and the pixel unit are separated by the non-emitting area.

[0163] Embodiment three

[0164] This embodiment will further describe the related structure of the LED display device of the present application. Figure 10 , at this time, the interconnection conductive member can only be located in the periphery of the pixel unit, and the interconnection conductive member and the pixel unit are separated by the non-emitting area.

[0165] In this embodiment, a first dielectric layer 800 is further arranged between the pixel layer 400 and the bonding layer 300, the first dielectric layer 800 is a film layer with low refractive index, and the bonding layer 300 is a conductive metal layer, which can be a metal layer with high reflectivity, so as to form a light ODR (omnidirectional reflector) structure, thereby better improving the brightness of the device.

[0166] For example, the first dielectric layer 800 can include one or more of silicon oxide, silicon nitride, aluminum oxide or magnesium fluoride, which all have low refractive index, and other materials with low refractive index can also be used.

[0167] In some modes, the thickness of the first dielectric layer 800 is 0.01um-0.5um.

[0168] In some modes, the thickness of the bonding layer 300 is 0.01um-0.5um.

[0169] For example, the bonding layer 300 can include one or more of Al, Rh, Ag or Au, which all have high reflectivity, and other film layers with high reflectivity can also be used.

[0170] All the optional technical solutions described above can be combined to form optional embodiments of the present application, that is, any number of embodiments can be combined to meet the needs of different application scenarios, which are all within the protection scope of the present application, and will not be described one by one here.

[0171] It should be noted that the above-mentioned embodiments are only examples for clearly illustrating the present application and are not intended to limit the present application. Based on the above-mentioned embodiments, other different forms of changes or modifications can be made by those skilled in the art. Here, all the embodiments are not required to be enumerated. The obvious changes or modifications derived from the above-mentioned embodiments are still within the scope of the present application.

Claims

1. An LED display device, characterized by: The application relates to a compound semiconductor pixel array substrate, which comprises the following parts: a substrate, which is a driving wafer, wherein a first type of electrode contact and a second type of electrode contact are arranged on the driving wafer, and the polarities of the first type of electrode contact and the second type of electrode contact are opposite; a pixel layer, which is a compound semiconductor layer, wherein the pixel layer is arranged on the upper part of the substrate, and a pixel unit and an interconnection conductive member are arranged in the pixel layer, the top of the pixel unit is electrically connected to the corresponding second type of electrode contact through the interconnection conductive member, and the bottom of the pixel unit is electrically connected to the corresponding first type of electrode contact; wherein a second type of electrode filling hole is arranged on the compound semiconductor layer, and the interconnection conductive member is arranged in the second type of electrode filling hole, and the interconnection conductive member is a metal member.

2. The LED display device of claim 1, wherein: The top of the pixel unit is connected to a first conductive layer, the upper part of the interconnection conductive member is electrically connected to the first conductive layer, and the lower part is electrically connected to the corresponding second type of electrode contact.

3. The LED display device of claim 3, wherein: The bottom surface of the interconnection conductive member is directly in contact with the corresponding second type of electrode contact.

4. The LED display device of claim 1, wherein: The substrate and the pixel layer are connected through a bonding layer, and the bonding layer is a non-metal conductive layer.

5. The LED display device of claim 1, wherein: The substrate and the pixel layer are connected through a bonding layer, and the bonding layer is a metal conductive layer.

6. The LED display device of claim 5, wherein: The bonding layer is formed with a first peripheral fence, each second type of electrode filling hole is provided with the first peripheral fence, the inner cavity of the first peripheral fence penetrates through the bonding layer, the interconnection conductive member is arranged in the inner cavity of the first peripheral fence, and a second insulating layer is arranged between the first peripheral fence and the interconnection conductive member.

7. The LED display device of claim 6, wherein: The interconnection conductive member is located in the periphery of the pixel unit, the pixel unit and the interconnection conductive member in the periphery are separated through a non-light-emitting area, the non-light-emitting area is a compound semiconductor, the first peripheral fence in the periphery of each interconnection conductive member is directly in contact with the side wall of the adjacent non-light-emitting area, or the first peripheral fence in the periphery of each interconnection conductive member is in contact with the side wall of the adjacent non-light-emitting area through a first insulating isolation layer.

8. The LED display device of claim 6, wherein: The interconnection conductive member is at least partially located in the interior of the pixel unit, and a first insulating isolation layer is arranged on the contact surface between each interconnection conductive member and the pixel unit.

9. The LED display device of claim 5, wherein: A first dielectric layer is further arranged between the pixel layer and the bonding layer.

10. The LED display device of claim 1, wherein: The periphery of the pixel unit is surrounded by at least one annular isolation groove, the interconnection conductive member is located in the periphery of the annular isolation groove in the outermost periphery of the pixel unit, or the interconnection conductive member is at least partially located in the interior of the pixel unit.

11. The LED display device of claim 10, wherein: The inner wall of the annular isolation groove is covered with a first insulating layer, the annular isolation groove has a filling area in the interior, the periphery of the filling area is surrounded by the first insulating layer on the inner wall of the annular isolation groove, and the filling area contains an air isolation layer formed by air, or the filling area is filled with a first filler to form a solid structure.

12. A method for manufacturing an LED display device, characterized by: The application further relates to a manufacturing method of the compound semiconductor pixel array substrate, which comprises the following steps: selecting a driving wafer as a substrate, wherein a first type of electrode contact and a second type of electrode contact with opposite polarities are arranged on the driving wafer; and selecting a compound semiconductor layer as a pixel layer; connecting the compound semiconductor layer to the upper part of the substrate; etching the compound semiconductor layer to obtain a pixel unit and a second electrode filling hole, and filling the second electrode filling hole with metal to obtain an interconnection conductive member; so that the top of the pixel unit is electrically connected through the interconnection conductive member and the corresponding second electrode contact, and the bottom of the pixel unit is electrically connected to the corresponding first electrode contact.

13. The method of claim 12, wherein: When the compound semiconductor layer is connected to the upper part of the substrate, the method comprises: connecting the pixel layer to the substrate through a bonding layer.

14. The method of claim 13, wherein: When the compound semiconductor layer is etched to obtain a second electrode filling hole, and the second electrode filling hole is filled with metal to obtain an interconnection conductive member, the method comprises: etching the compound semiconductor layer above the second electrode contact to obtain a second electrode filling hole, and making the second electrode filling hole penetrate through the bonding layer to expose the second electrode contact; filling the second electrode filling hole with metal to form an interconnection conductive member, so that the bottom of the interconnection conductive member is directly in contact with the corresponding second electrode contact.

15. The method of claim 14, wherein: When the second electrode filling hole penetrates through the bonding layer to expose the second electrode contact, the method comprises, forming a first peripheral fence on the upper part of the bonding layer, and the inner cavity of the first peripheral fence penetrates through the bonding layer, and each second electrode filling hole is formed with the first peripheral fence, and the inner cavity of each first peripheral fence is used to accommodate the interconnection conductive member.

16. The method of claim 15, wherein: After forming the first peripheral fence on the upper part of the bonding layer, depositing a second insulating layer on the inner wall of the first peripheral fence.

17. The method of claim 12, wherein: When the top of the pixel unit is electrically connected through the interconnection conductive member and the corresponding second electrode contact, the method comprises: depositing a first conductive layer on the top of the pixel layer, so that one end of the first conductive layer is electrically connected to the top of the pixel unit, and the other end is electrically connected to the top of the interconnection conductive member, and the bottom of the interconnection conductive member is electrically connected to the corresponding second electrode contact.

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