Display device and electronic device

Abstract

The invention relates to a display device and an electronic device. The display device includes: a protection pattern disposed on a pixel electrode and defining a first opening exposing the pixel electrode; a first protruding pattern disposed on the protection pattern and defining a second opening exposing the pixel electrode; a second protruding pattern disposed on the first protruding pattern, defining a third opening exposing the pixel electrode, and protruding further toward a center of the pixel electrode than the first protruding pattern; and a common electrode disposed on the second protruding pattern.

Description

TECHNICAL FIELD

[0001] The present application relates to a display device, and more particularly, to a display device providing visual information and an electronic device including the same. BACKGROUND

[0002] A display device can be formed by stacking a plurality of layers such as a metal layer, an insulating layer, a light emitting layer, etc., together, wherein some of the plurality of layers can be commonly provided throughout a plurality of pixels. When some of the layers are used as a charge transport path, a current supplied to one pixel can also be supplied to an adjacent pixel, thereby causing a leakage current. Due to the leakage current, different color pixels disposed adjacent to each other can be driven to cause color mixing. SUMMARY

[0003] Embodiments provide a display device having improved display quality.

[0004] Embodiments provide an electronic device including the display device.

[0005] A display device according to an embodiment includes a protection pattern disposed on a pixel electrode and defining a first opening exposing the pixel electrode, a first protrusion pattern disposed on the protection pattern and defining a second opening exposing the pixel electrode, a second protrusion pattern disposed on the first protrusion pattern, defining a third opening exposing the pixel electrode, and protruding further toward a center of the pixel electrode than the first protrusion pattern, and a common electrode disposed on the second protrusion pattern.

[0006] In an embodiment, the first protrusion pattern and the second protrusion pattern can include different inorganic materials.

[0007] In an embodiment, the first protrusion pattern can include silicon nitride, and the second protrusion pattern can include silicon oxide.

[0008] In an embodiment, the protection pattern can include at least one selected from the group consisting of a metal, an alloy, and a transparent conductive material.

[0009] In an embodiment, the first protrusion pattern can protrude further toward a center of the pixel electrode than the protection pattern.

[0010] In an embodiment, in a plan view, the protection pattern, the first protrusion pattern, and the second protrusion pattern can be disposed along edges of the pixel electrode.

[0011] In an embodiment, in a plan view, the protection pattern, the first protrusion pattern, and the second protrusion pattern can not overlap with a portion of edges of the pixel electrode.

[0012] In an embodiment, the display device can further include a pixel definition layer disposed between the second protrusion pattern and the common electrode, wherein the pixel definition layer defines a fourth opening exposing the pixel electrode, and includes an organic material.

[0013] In an embodiment, the thickness of the protective pattern can be in a range of about to about .

[0014] In an embodiment, the thickness of the first protrusion pattern can be in a range of about to about .

[0015] In an embodiment, the thickness of the second protrusion pattern can be in a range of about to about .

[0016] In an embodiment, the display device can further include an intermediate layer disposed between the second protrusion pattern and the common electrode, wherein the intermediate layer includes a charge generation layer.

[0017] In an embodiment, the charge generation layer can be disconnected by the first protrusion pattern and the second protrusion pattern.

[0018] In an embodiment, the intermediate layer can further include a first light emitting layer disposed below the charge generation layer and a second light emitting layer disposed on the charge generation layer.

[0019] A display device according to an embodiment includes a protective pattern; a first opening disposed on a pixel electrode and defining a second opening exposing the pixel electrode; a protrusion pattern disposed on the protective pattern, defining a second opening exposing the pixel electrode, and further protruding toward a center of the pixel electrode than the protective pattern; a pixel definition layer disposed on the protrusion pattern and defining a third opening exposing the pixel electrode; and a common electrode disposed on the pixel definition layer.

[0020] In an embodiment, the protrusion pattern can include an inorganic material.

[0021] In an embodiment, the protective pattern can include at least one selected from the group consisting of a metal, an alloy, and a transparent conductive material.

[0022] In an embodiment, in a plan view, the protective pattern and the protrusion pattern can be disposed along edges of the pixel electrode.

[0023] In an embodiment, in a plan view, the protective pattern and the protrusion pattern can not overlap with a portion of edges of the pixel electrode.

[0024] In an embodiment, the thickness of the protective pattern can be in a range of about to about within a range of about 1 nm to about 10 nm.

[0025] In an embodiment, the thickness of the protrusion pattern can be within a range of about 1 nm to about 10 nm.

[0026] In an embodiment, the pixel definition layer can include an organic material.

[0027] In an embodiment, the display device can further include an intermediate layer disposed between the protrusion pattern and the common electrode, and including a charge generation layer.

[0028] In an embodiment, the charge generation layer can be disconnected by the protection pattern and the protrusion pattern.

[0029] In an embodiment, the intermediate layer can further include a first light emitting layer disposed under the charge generation layer and a second light emitting layer disposed on the charge generation layer.

[0030] An electronic device according to an embodiment includes a display device and a power module configured to supply power to the display device. The display device includes a protection pattern disposed on a pixel electrode and defining a first opening exposing the pixel electrode, a first protrusion pattern disposed on the protection pattern and defining a second opening exposing the pixel electrode, a second protrusion pattern disposed on the first protrusion pattern, defining a third opening exposing the pixel electrode, and further protruding toward a center of the pixel electrode than the first protrusion pattern, and a common electrode disposed on the second protrusion pattern.

[0031] In a display device according to an embodiment, the display device can include a protection pattern and at least one protrusion pattern each exposing at least a portion of a pixel electrode. The protrusion pattern can further protrude toward a center of the pixel electrode than the protection pattern, and an intermediate layer can be disconnected by a shape of the protection pattern and / or the protrusion pattern. Accordingly, a leakage current that can occur between pixels disposed adjacent to each other can be minimized, thereby minimizing color mixing between the pixels. In addition, since the protrusion pattern includes an inorganic material, a path through which a gas generated from an organic material included in a lower insulating layer flows into the intermediate layer can be blocked. Accordingly, degradation of a light emitting element and pixel shrinkage can be prevented. BRIEF DESCRIPTION OF DRAWINGS

[0032] Figure 1 is a plan view to illustrate a display device according to an embodiment.

[0033] Figure 2 is a plan view to illustrate a display device according to an embodiment. Figure 1

[0034] Figure 3 is a plan view to illustrate a display device according to an embodiment. Figure 2 ​​​A cross-sectional view of the display device taken along line I-I' thereof.

[0035] Figure 4 A cross-sectional view of the display device taken along line I-I' thereof. Figure 1 A cross-sectional view of the display device taken along line I-I' thereof.

[0036] Figure 5 A cross-sectional view of the display device taken along line I-I' thereof.

[0037] Figure 6 A cross-sectional view of the display device taken along line I-I' thereof.

[0038] Figure 7 A cross-sectional view of the display device taken along line I-I' thereof.

[0039] Figure 8 A cross-sectional view of the display device taken along line I-I' thereof.

[0040] Figure 9 A cross-sectional view of the display device taken along line I-I' thereof.

[0041] Figure 10 A cross-sectional view of the display device taken along line I-I' thereof.

[0042] Figure 11 A cross-sectional view of the display device taken along line I-I' thereof.

[0043] Figure 12 A cross-sectional view of the display device taken along line I-I' thereof.

[0044] Figure 13 A cross-sectional view of the display device taken along line I-I' thereof. Figure 12 A cross-sectional view of the display device taken along line II-II' thereof.

[0045] Figure 14 A cross-sectional view of the display device taken along line III-III' thereof. Figure 12 A cross-sectional view of the display device taken along line III-III' thereof.

[0046] Figure 15 A cross-sectional view of the display device taken along line III-III' thereof.

[0047] Figure 16 A cross-sectional view of the display device taken along line IV-IV' thereof. Figure 15 A cross-sectional view of the display device taken along line IV-IV' thereof.

[0048] Figure 17 A cross-sectional view of the display device taken along line IV-IV' thereof.

[0049] Figure 18is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0050] Figure 19 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0051] Figure 20 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0052] Figure 21 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0053] Figure 22 is a plan view illustrating a display device according to an embodiment.

[0054] Figure 23 According to the embodiment Figure 22 sectional view of the display device taken along line V-V'.

[0055] Figure 24 According to the embodiment Figure 22 VI-VI' is a cross-sectional view of the display device.

[0056] Figure 25 is a block diagram illustrating an electronic device according to an embodiment.

[0057] Figure 26 is a schematic diagram illustrating an electronic device according to an embodiment. DETAILED DESCRIPTION

[0058] Hereinafter, embodiments of the present invention will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and redundant descriptions of the same components will be omitted.

[0059] It will be understood that when an element (or region, layer, portion, etc.) is referred to as being associated with another element (such as being "on," "connected to," or "coupled to" another element), it can be directly disposed on, directly connected to, or coupled to the other element, or intervening elements may be disposed therebetween.

[0060] The same reference numerals or symbols always refer to the same elements. In the accompanying drawings, the thickness, proportions and sizes of the elements are exaggerated for the effective description of the technical content. As used in this article, the term "and / or" includes any and all combinations of one or more associated listed items.

[0061] The term "and / or" may include all combinations of one or more of the associated configurations that may be defined.

[0062] It will also be understood that, although the terms first, second, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the scope of the present inventive concept. Similarly, a second element, component, region, layer or section could be termed a first element, component, region, layer or section. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0063] Furthermore, the terms "under", "below", "above", "on", and the like, can be used in relation to the illustrated elements in the drawings. These terms have a relative concept and are described based on the direction indicated in the drawings.

[0064] It will be further understood that the terms "comprises", "comprising", and / or "has", "having", when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. As used herein, "directly disposed on" can mean that there are no additional layers, films, regions, plates, etc. between a portion, such as a layer, a film, a region, a plate, etc. and another portion, such as another layer, another film, another region, another plate, etc. For example, "directly disposed on" can mean that two layers or two members are disposed without using an additional member such as an adhesive member therebetween.

[0065] "About" or "approximately", as used herein, includes the recited value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art to be within the scope of the value set forth. For example, "about" can mean within one or more standard deviations, or within ±30%, 20%, 10%, or 5% of the stated value.

[0066] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0067] Figure 1is a plan view illustrating a display device 10 according to an embodiment of the present invention.

[0068] In one embodiment, and with reference to Figure 1 , the display device 10 may include a display area DA and a non-display area NDA.

[0069] The display area DA may be an area for displaying an image, wherein a plurality of pixels PX may be disposed in the display area DA. In a plan view, the pixels PX may be repeatedly arranged along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the second direction DR2 may be perpendicular to the first direction DR1. Each pixel PX may emit light.

[0070] In one embodiment, signal lines such as gate lines and data lines may be provided in the display area DA. The signal lines may be connected to each of the pixels PX that may receive gate signals, data signals, and the like from the signal lines. Accordingly, for example, an image may be displayed in the display area DA in a direction that intersects with each of the first direction DR1 and the second direction DR2. For example, the third direction DR3 may be a direction perpendicular to each of the first direction DR1 and the second direction DR2.

[0071] The non-display area NDA may be an area that does not display an image and may be disposed around the display area DA. For example, in a plan view, the non-display area NDA may surround the display area DA. A driver for supplying electrical signals or power to the display area DA may be disposed in the non-display area NDA.

[0072] Figure 2 According to the embodiment Figure 1 FIG. 1 is an enlarged plan view of a portion of the display area DA of the display device 10. For example, Figure 2 It may be a plan view schematically illustrating one of the pixels PX provided in the display area DA of the display device 10 .

[0073] Figure 3 According to the embodiment Figure 2 A cross-sectional view taken along line II'. Figure 4 As an example according to the embodiment Figure 1 1 is a cross-sectional view of an example of the middle layer ML included in the display device 10 .

[0074] In one embodiment, and with reference to Figure 1 、 Figure 2 、 Figure 3 and Figure 4The display device 10 can include a substrate SUB, a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a via insulating layer VIA, a light emitting element LE, a protection pattern PP, a first protrusion pattern TP1, a second protrusion pattern TP2, a pixel definition layer PDL, and an encapsulation layer TFE.

[0075] In an embodiment, the transistor TR can include an active pattern ACT, a gate electrode GE, a first electrode SE, and a second electrode DE, and the light emitting element LE can include a pixel electrode PE, an intermediate layer ML, and a common electrode CE.

[0076] In an embodiment, the substrate SUB can include a transparent material or an opaque material. Examples of materials that can be used as the substrate SUB can include polyimide, quartz, glass, and the like. These materials can be used alone or in combination with each other.

[0077] In an embodiment, the buffer layer BFR can be provided on the substrate SUB, where the buffer layer BFR can prevent diffusion of metal atoms, impurities, and the like into the transistor TR. In addition, when the surface of the substrate SUB is not uniform, the buffer layer BFR can improve the flatness of the surface of the substrate SUB. The buffer layer BFR can include an inorganic material such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), and the like. These materials can be used alone or in combination with each other.

[0078] In an embodiment, the active pattern ACT can be provided on the buffer layer BFR and can include a source region, a drain region, and a channel region between the source region and the drain region. The active pattern ACT can include a silicon semiconductor material or an oxide semiconductor material. Examples of the silicon semiconductor material can include amorphous silicon, polysilicon, and the like. Examples of the oxide semiconductor material can include indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), and the like. These materials can be used alone or in combination with each other.

[0079] In an embodiment, the gate insulating layer GI can be provided on the active pattern ACT and can cover the active pattern ACT. The gate insulating layer GI can include an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, and the like. These materials can be used alone or in combination with each other.

[0080] In an embodiment, the gate electrode GE can be provided on the gate insulating layer GI and can overlap the channel region of the active pattern ACT in a plan view. The gate electrode GE can include a metal, an alloy, a conductive metal nitride, a conductive metal oxide, a transparent conductive material, and the like. These materials can be used alone or in combination with each other.

[0081] In an embodiment, an interlayer insulating layer ILD can be disposed on the gate electrode GE, and can cover the gate electrode GE. The interlayer insulating layer ILD can include an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride, etc. These materials can be used alone or in combination with each other.

[0082] In an embodiment, the first electrode SE and the second electrode DE can be disposed on the interlayer insulating layer ILD. The first electrode SE can be connected to the source region of the active pattern ACT through a first contact hole that penetrates the gate insulating layer GI and the interlayer insulating layer ILD. Also, the second electrode DE can be connected to the drain region of the active pattern ACT through a second contact hole that penetrates the gate insulating layer GI and the interlayer insulating layer ILD. Each of the first electrode SE and the second electrode DE can include a metal, an alloy, a conductive metal nitride, a conductive metal oxide, a transparent conductive material, etc. These materials can be used alone or in combination with each other.

[0083] Accordingly, a transistor TR including the active pattern ACT, the gate electrode GE, the first electrode SE, and the second electrode DE can be disposed on the substrate SUB.

[0084] In an embodiment, a via insulating layer VIA can be disposed on the interlayer insulating layer ILD, and can cover the first electrode SE and the second electrode DE. The via insulating layer VIA can include an organic material such as a phenol resin, an acrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, an epoxy resin, etc. These materials can be used alone or in combination with each other.

[0085] In an embodiment, a pixel electrode PE can be disposed on the via insulating layer VIA, and can be electrically connected to the transistor TR. For example, the pixel electrode PE can be connected to the second electrode DE (or the first electrode SE) through a contact hole that penetrates the via insulating layer VIA. The pixel electrode PE can include a metal, an alloy, a conductive metal oxide, a conductive metal nitride, a transparent conductive material, etc. These materials can be used alone or in combination with each other.

[0086] In an embodiment, a protection pattern PP can be disposed on the pixel electrode PE, and can define a first opening OP1 that exposes at least a portion of the pixel electrode PE. In a plan view, the protection pattern PP can be disposed along an edge of the pixel electrode PE. For example, the protection pattern PP can cover at least a portion of a side portion of the pixel electrode PE, and can serve to minimize damage to the pixel electrode PE during a manufacturing process of the display device 10.

[0087] In an embodiment, the protection pattern PP can include a transparent conductive material. For example, the protection pattern PP can include indium gallium zinc oxide (IGZO), indium tin oxide (ITO), indium zinc oxide (IZO), etc.

[0088] In an embodiment, the protection pattern PP can include a material having an etching selectivity different from that of the pixel electrode PE. The protection pattern PP can include a metal, an alloy, etc. having an etching selectivity different from that of the pixel electrode PE. For example, the protection pattern PP can include a material having a higher etching selectivity than that of the pixel electrode PE with respect to an etchant that can be used when the protection pattern PP is formed (i.e., when the protection pattern PP is patterned). For example, the protection pattern PP can include aluminum (Al), molybdenum (Mo), an alloy including aluminum, an alloy including molybdenum, etc.

[0089] In an embodiment, the protection pattern PP can include aluminum, and the pixel electrode PE can include a material (e.g., indium tin oxide, etc.) having a lower etching selectivity than that of the protection pattern PP with respect to an etchant (e.g., an alkaline etchant such as an etchant including potassium hydroxide (KOH), etc.) that can be used when the protection pattern PP is formed.

[0090] In another embodiment, the protection pattern PP can include molybdenum, and the pixel electrode PE can include a material (e.g., indium tin oxide, etc.) having a lower etching selectivity than that of the protection pattern PP with respect to an etchant (e.g., a phosphoric acid-based etchant, etc.) that can be used when the protection pattern PP is formed.

[0091] However, the present application is not limited thereto, and the protection pattern PP can include various materials that can be easily formed while preventing damage to the pixel electrode PE during a manufacturing process of the display device 10.

[0092] The protection pattern PP can be relatively thin. In an embodiment, a first thickness TH1 of the protection pattern PP can be about 100 nm or less. Here, the first thickness TH1 of the protection pattern PP can be a length of the protection pattern PP in a third direction DR3. Preferably, the first thickness TH1 of the protection pattern PP can be in a range of about 50 nm to about 100 nm. or less. Here, the first thickness TH1 of the protection pattern PP can be a length of the protection pattern PP in a third direction DR3. Preferably, the first thickness TH1 of the protection pattern PP can be in a range of about 50 nm to about 100 nm. or less. Here, the first thickness TH1 of the protection pattern PP can be a length of the protection pattern PP in a third direction DR3. Preferably, the first thickness TH1 of the protection pattern PP can be in a range of about 50 nm to about 100 nm. For example, when the first thickness TH1 of the protection pattern PP is greater than about 100 nm, damage to a surface of the pixel electrode PE can occur during formation of the protection pattern PP. For example, when the first thickness TH1 of the protection pattern PP is less than about 50 nm, damage to the pixel electrode PE can occur during formation of upper parts (e.g., the first protrusion pattern TP1 and the second protrusion pattern TP2) of the protection pattern PP. For example, when the first thickness TH1 of the protection pattern PP is greater than about 100 nm, damage to a surface of the pixel electrode PE can occur during formation of the protection pattern PP. For example, when the first thickness TH1 of the protection pattern PP is less than about 50 nm, damage to the pixel electrode PE can occur during formation of upper parts (e.g., the first protrusion pattern TP1 and the second protrusion pattern TP2) of the protection pattern PP.

[0093] ​However, the present application is not limited thereto, and the first thickness TH1 of the protection pattern PP can be variously modified within a range of preventing damage to the pixel electrode PE during a manufacturing process of the display device 10.

[0094] Although Figure 2 and Figure 3 Embodiments in which the protection pattern PP covers a portion of the upper surface (e.g., an edge of the upper surface) and the side surface of the pixel electrode PE are illustrated, but the present application is not limited thereto. For example, in another embodiment, the protection pattern PP can cover only a portion of the upper surface of the pixel electrode PE.

[0095] In an embodiment, a first protruding pattern TP1 can be disposed on the protection pattern PP and can define a second opening OP2 exposing at least a portion of the pixel electrode PE. The second opening OP2 can be connected to the first opening OP1. In a plan view, the first protruding pattern TP1 can be disposed along an edge of the pixel electrode PE.

[0096] In an embodiment, the first protruding pattern TP1 can be further protruded toward the center of the pixel electrode PE than the protection pattern PP. A side surface of the first protruding pattern TP1 defining the second opening OP2 can be further protruded toward the center of the pixel electrode PE than a side surface of the protection pattern PP defining the first opening OP1. A planar area of the second opening OP2 can be smaller than a planar area of the first opening OP1. For example, the first protruding pattern TP1 can cover the upper surface of the protection pattern PP.

[0097] In an embodiment, the first protruding pattern TP1 can include an inorganic material. For example, the first protruding pattern TP1 can include silicon nitride (SiN x ), but the present application is not limited thereto.

[0098] In an embodiment, a second thickness TH2 of the first protruding pattern TP1 can be in a range of about to about Here, the second thickness TH2 of the first protruding pattern TP1 can be a length of the first protruding pattern TP1 in the third direction DR3. However, the present application is not limited thereto, and the second thickness TH2 of the first protruding pattern TP1 can be adjusted depending on a material included in the intermediate layer ML, a structure of the intermediate layer ML, etc. For example, when the thickness of the intermediate layer ML increases (e.g., when the number of layers included in the intermediate layer ML increases), the second thickness TH2 of the first protruding pattern TP1 can exceed about

[0099] In an embodiment, the second protruding pattern TP2 can be disposed on the first protruding pattern TP1, and can define a third opening OP3 exposing at least a portion of the pixel electrode PE. The third opening OP3 can be connected to the first opening OP1 and the second opening OP2. In a plan view, the second protruding pattern TP2 can be disposed along an edge of the pixel electrode PE.

[0100] In an embodiment, the second protruding pattern TP2 can be further protruded toward the center of the pixel electrode PE than the first protruding pattern TP1. A side surface of the second protruding pattern TP2 defining the third opening OP3 can be further protruded toward the center of the pixel electrode PE than a side surface of the first protruding pattern TP1 defining the second opening OP2. The side surface of the second protruding pattern TP2 and the side surface of the first protruding pattern TP1 can have a step difference. A planar area of the third opening OP3 can be smaller than a planar area of the second opening OP2. For example, the second protruding pattern TP2 can cover an upper surface of the first protruding pattern TP1. Accordingly, the first protruding pattern TP1 and the second protruding pattern TP2 can form a sharp (or a gable) shape in a cross-sectional view.

[0101] In an embodiment, the second protruding pattern TP2 can include an inorganic material. The second protruding pattern TP2 can include a material different from a material of the first protruding pattern TP1. The second protruding pattern TP2 can include a material having an etching selectivity different from an etching selectivity of the first protruding pattern TP1. For example, the second protruding pattern TP2 can include a material having a lower etching selectivity than the etching selectivity of the first protruding pattern TP1, with respect to an etching gas that can be used when forming the first protruding pattern TP1 and the second protruding pattern TP2 (i.e., when patterning the first protruding pattern TP1 and the second protruding pattern TP2). For example, the second protruding pattern TP2 can include silicon oxide (SiO x ), but the present application is not limited thereto.

[0102] In an embodiment, a third thickness TH3 of the second protruding pattern TP2 can be in a range of about to about , but the present application is not limited thereto. Here, the third thickness TH3 of the second protruding pattern TP2 can be a length of the second protruding pattern TP2 in a third direction DR3. For example, when the third thickness TH3 of the second protruding pattern TP2 is greater than about , a profile of the second protruding pattern TP2 can affect the upper member.

[0103] In an embodiment, a pixel definition layer PDL can be disposed on the second protruding pattern TP2 and can define a fourth opening OP4 exposing at least a portion of the pixel electrode PE. The fourth opening OP4 can be connected to the first opening OP1, the second opening OP2, and the third opening OP3. In a plan view, the pixel definition layer PDL can be disposed along edges of the pixel electrode PE. The pixel definition layer PDL can cover a side portion of the pixel electrode PE and can include an organic material such as a polyimide resin, an epoxy resin, a siloxane resin, or the like. These materials can be used alone or in combination with each other.

[0104] In an embodiment, the fourth opening OP4 can further expose at least a portion of the second protruding pattern TP2, wherein the second protruding pattern TP2 can be further protruded toward a center of the pixel electrode PE than the pixel definition layer PDL. A side surface of the second protruding pattern TP2 defining the third opening OP3 can be further protruded toward the center of the pixel electrode PE than a side surface of the pixel definition layer PDL defining the fourth opening OP4. A planar area of the fourth opening OP4 can be greater than a planar area of the third opening OP3. In addition, the planar area of the fourth opening OP4 can be greater than a planar area of each of the first opening OP1 and the second opening OP2.

[0105] In an embodiment, an intermediate layer ML can be disposed on the pixel electrode PE, the second protruding pattern TP2, and the pixel definition layer PDL. The intermediate layer ML can be disposed on the pixel electrode PE exposed by the first opening OP1, the second opening OP2, the third opening OP3, and the fourth opening OP4, the second protruding pattern TP2 exposed by the fourth opening OP4, and the pixel definition layer PDL.

[0106] The intermediate layer ML can have a multi-layer structure. For example, the intermediate layer ML can include a first common layer CL1, a first emitting layer EL1, a second common layer CL2, a charge generation layer CGL, a third common layer CL3, a second emitting layer EL2, and a fourth common layer CL4.

[0107] In an embodiment, the first common layer CL1 can have a single-layer structure or a multi-layer structure. For example, the first common layer CL1 can include at least one of a hole injection layer (HIL) and a hole transport layer (HTL).

[0108] In an embodiment, the first emitting layer EL1 can be disposed on the first common layer CL1. The first emitting layer EL1 can be disposed on the pixel electrode PE exposed by the protection pattern PP, the first protruding pattern TP1 and the second protruding pattern TP2, and the pixel definition layer PDL. The first emitting layer EL1 can emit light of a specific wavelength band and can include a material emitting light.

[0109] In an embodiment, a second common layer CL2 can be disposed on the first common layer CL1 and the first light emitting layer EL1. The second common layer CL2 can have a single layer structure or a multi-layer structure. For example, the second common layer CL2 can include an electron transport layer (ETL).

[0110] In an embodiment, a charge generation layer CGL can be disposed on the second common layer CL2 and can have a single layer structure or a multi-layer structure. The charge generation layer CGL can control charge balance between the first light emitting layer EL1 and the second light emitting layer EL2. For example, the charge generation layer CGL can include an n-type charge generation layer that provides electrons to the first light emitting layer EL1 and a p-type charge generation layer that provides holes to the second light emitting layer EL2.

[0111] In an embodiment, a third common layer CL3 can be disposed on the charge generation layer CGL and can have a single layer structure or a multi-layer structure. For example, the third common layer CL3 can include a hole transport layer.

[0112] In an embodiment, the second light emitting layer EL2 can be disposed on the third common layer CL3 and can overlap the first light emitting layer EL1 in a plan view. That is, the second light emitting layer EL2 can be disposed on the pixel electrode PE exposed by the protection pattern PP, the first and second protruding patterns TP1 and TP2, and the pixel definition layer PDL. The second light emitting layer EL2 can emit light of a specific wavelength band and can include a material that emits light.

[0113] In an embodiment, a fourth common layer CL4 can be disposed on the third common layer CL3 and the second light emitting layer EL2. The fourth common layer CL4 can have a single layer structure or a multi-layer structure. For example, the fourth common layer CL4 can include at least one of an electron injection layer (EIL) and an electron transport layer.

[0114] In an embodiment, the intermediate layer ML can be disconnected by the first and second protruding patterns TP1 and TP2. The intermediate layer ML can be disconnected by the shape of the first and second protruding patterns TP1 and TP2. The intermediate layer ML can include a first portion disposed on the second protruding pattern TP2 and the pixel definition layer PDL and a second portion disposed on the pixel electrode PE, where the first and second portions can be spaced apart from each other. Accordingly, the intermediate layer ML can be disconnected between the pixels PX disposed adjacent to each other.

[0115] For example, the charge generation layer CGL included in the intermediate layer ML can be disconnected by the protrusion patterns TP1 and TP2. The charge generation layer CGL can include a first portion disposed on the second protrusion pattern TP2 and the pixel definition layer PDL and a second portion disposed on the pixel electrode PE, where the first portion and the second portion can be spaced apart from each other. When the charge generation layer CGL extends between the pixels PX without being disconnected, a leakage current (i.e., a side leakage current) can occur between the pixels PX disposed adjacent to each other. Accordingly, since the charge generation layer CGL is disconnected by the protrusion patterns TP1 and TP2, the leakage current that can occur between the pixels PX disposed adjacent to each other can be minimized.

[0116] For another example, the first common layer CL1 included in the intermediate layer ML can be disconnected by the protrusion patterns TP1 and TP2. The first common layer CL1 can include a first portion disposed on the second protrusion pattern TP2 and the pixel definition layer PDL and a second portion disposed on the pixel electrode PE, where the first portion and the second portion can be spaced apart from each other. When the first common layer CL1 extends between the pixels PX without being disconnected, a leakage current (i.e., a side leakage current) can occur between the pixels PX disposed adjacent to each other. Accordingly, since the first common layer CL1 is disconnected by the protrusion patterns TP1 and TP2, the leakage current that can occur between the pixels PX disposed adjacent to each other can be minimized.

[0117] Although Figure 4 The intermediate layer ML has a structure in which two light emitting layers and one charge generation layer are stacked, but the present application is not limited thereto. For example, the intermediate layer ML can have a structure in which one or three or more light emitting layers or two or more charge generation layers are stacked.

[0118] In an embodiment, the common electrode CE can be disposed on the intermediate layer ML, where the common electrode CE can continuously extend in the display area DA. The common electrode CE can include a metal, an alloy, a conductive metal oxide, a conductive metal nitride, a transparent conductive material, or the like. These materials can be used alone or in combination with each other.

[0119] Accordingly, in an embodiment, the light emitting element LE including the pixel electrode PE, the intermediate layer ML, and the common electrode CE can be disposed on the substrate SUB.

[0120] In an embodiment, the encapsulation layer TFE can be disposed on the common electrode CE and can prevent impurities, moisture, external air, or the like from penetrating into the light emitting element LE from the outside. The encapsulation layer TFE can include at least one inorganic encapsulation layer and at least one organic encapsulation layer.

[0121] The display device 10 according to an embodiment can include the protective pattern PP and the protruding patterns TP1 and TP2 each exposing a portion of the pixel electrode PE. The second protruding pattern TP2 can protrude further toward the center of the pixel electrode PE than the first protruding pattern TP1, and the intermediate layer ML can be disconnected by the shape of the protruding patterns TP1 and TP2. Accordingly, a leakage current that can occur between the pixels PX disposed adjacent to each other can be minimized, thereby minimizing color mixing between the pixels PX.

[0122] In addition, in an embodiment, since the protective pattern PP can be relatively thin, damage to the pixel electrode PE can be prevented while the protective pattern PP is formed, thereby improving the display quality of the display device 10. In addition, since each of the protruding patterns TP1 and TP2 includes an inorganic material, a path through which a gas generated from an organic material included in the via insulation layer VIA flows into the intermediate layer ML can be blocked. Accordingly, deterioration of the light emitting element LE can be prevented, and pixel shrinkage can be prevented.

[0123] Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 FIGS. 1 to 8 are cross-sectional views illustrating a method of manufacturing a display device according to an embodiment.

[0124] In an embodiment, the method of manufacturing a display device described with reference to Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 The method of manufacturing a display device described with reference to Figure 1 Figure 2 Figure 3 Figure 4 Hereinafter, redundant descriptions will be omitted or simplified.

[0125] In an embodiment and with reference to Figure 5 The buffer layer BFR, the active pattern ACT, the gate insulation layer GI, the gate electrode GE, the interlayer insulation layer ILD, the first electrode SE, the second electrode DE, the via insulation layer VIA, and the pixel electrode PE can be sequentially formed on the substrate SUB. The preliminary protective pattern P_PP can be formed on the pixel electrode PE.

[0126] ​​​​​​​​​​​​​In an embodiment, the preliminary protection pattern P PP can be formed to cover the pixel electrode PE. For example, the preliminary protection pattern P PP can be formed to cover the upper surface and the side surface of the pixel electrode PE. The preliminary protection pattern P PP and the pixel electrode PE can be formed through different patterning processes. In another embodiment, the preliminary protection pattern P PP can be formed to cover the upper surface of the pixel electrode PE. The preliminary protection pattern P PP and the pixel electrode PE can be formed through the same patterning process.

[0127] In an embodiment, the preliminary protection pattern P PP can include a transparent conductive material. For example, the preliminary protection pattern P PP can include indium gallium zinc oxide, indium tin oxide, indium zinc oxide, etc.

[0128] In an embodiment, the preliminary protection pattern P PP can include a material having an etching selectivity different from that of the pixel electrode PE. The preliminary protection pattern P PP can include a metal, an alloy, etc. having an etching selectivity different from that of the pixel electrode PE. For example, the preliminary protection pattern P PP can include a material having a higher etching selectivity than that of the pixel electrode PE with respect to an etchant that can be used when the preliminary protection pattern P PP is patterned. For example, the preliminary protection pattern P PP can include aluminum, molybdenum, an alloy including aluminum, an alloy including molybdenum, etc.

[0129] However, the present application is not limited thereto, and the preliminary protection pattern P PP can include various materials that can be easily patterned while preventing damage to the pixel electrode PE.

[0130] In an embodiment and with reference to FIG. 1A, Figure 6 The preliminary first protrusion pattern P TP1 can be formed to cover the preliminary protection pattern P PP, and the preliminary second protrusion pattern P TP2 can be formed to cover the preliminary first protrusion pattern P TP1.

[0131] The preliminary first protruding pattern P_TP1 and the preliminary second protruding pattern P_TP2 can include an inorganic material. In an embodiment, the preliminary first protruding pattern P_TP1 and the preliminary second protruding pattern P_TP2 can include different materials. The preliminary first protruding pattern P_TP1 and the preliminary second protruding pattern P_TP2 can include materials having different etching selectivities. For example, the preliminary first protruding pattern P_TP1 can include a material having a higher etching selectivity than the preliminary second protruding pattern P_TP2 with respect to an etching gas used when patterning the preliminary first protruding pattern P_TP1 and the preliminary second protruding pattern P_TP2. For example, the preliminary first protruding pattern P_TP1 can include silicon nitride and the preliminary second protruding pattern P_TP2 can include silicon oxide, but the present application is not limited thereto.

[0132] In an embodiment and with reference to Figure 6 and Figure 7 A portion of the preliminary second protruding pattern P_TP2 and a portion of the preliminary first protruding pattern P_TP1 can be removed to form a third opening OP3 and a preliminary second opening P_OP2, respectively. That is, a second protruding pattern TP2 defining the third opening OP3 and a preliminary first protruding pattern P_TP1 defining the preliminary second opening P_OP2 can be formed. For example, the third opening OP3 and the preliminary second opening P_OP2 can be formed by dry etching. The third opening OP3 and the preliminary second opening P_OP2 can be connected. The third opening OP3 and the preliminary second opening P_OP2 can expose at least a portion of the preliminary protection pattern P_PP.

[0133] Although Figure 7 The preliminary second opening P_OP2 is exemplarily formed to expose the preliminary protection pattern P_PP, but the present application is not limited thereto. For example, the preliminary second opening P_OP2 can be formed by leaving a portion of the preliminary first protruding pattern P_TP1 on an upper surface of the preliminary protection pattern P_PP so as not to expose the preliminary protection pattern P_PP. In this case, the portion of the preliminary first protruding pattern P_TP1 left on the upper surface of the preliminary protection pattern P_PP can minimize damage to the preliminary protection pattern P_PP protecting the pixel electrode PE.

[0134] In an embodiment and with reference to Figure 7 and Figure 8 A portion of the preliminary first protruding pattern P_TP1 can be removed to form a second opening OP2. That is, a first protruding pattern TP1 defining the second opening OP2 can be formed. For example, the second opening OP2 can be formed by dry etching.

[0135] In this embodiment, since the etching selectivity between the second protrusion pattern TP2 and the preliminary first protrusion pattern P_TP1 is different, the etching rate of the preliminary first protrusion pattern P_TP1 can be relatively greater than the etching rate of the second protrusion pattern TP2. Accordingly, a portion of the preliminary first protrusion pattern P_TP1 disposed under the second protrusion pattern TP2 can be etched to form the first protrusion pattern TP1, and the second protrusion pattern TP2 can be formed to protrude further toward the center of the pixel electrode PE than the first protrusion pattern TP1. The degree to which the second protrusion pattern TP2 protrudes further toward the center of the pixel electrode PE than the first protrusion pattern TP1 can be controlled by the time at which the etching process is performed. The second opening OP2 can be connected to the third opening OP3, and can expose at least a portion of the preliminary protection pattern P_PP.

[0136] While the protrusion patterns TP1 and TP2 are formed (i.e., while the preliminary first protrusion pattern P_TP1 and the preliminary second protrusion pattern P_TP2 are etched), damage to the pixel electrode PE can be prevented by the preliminary protection pattern P_PP disposed on the pixel electrode PE.

[0137] In an embodiment and with reference to Figure 8 and Figure 9 A portion of the preliminary protection pattern P_PP can be removed to form the first opening OP1. That is, a protection pattern PP defining the first opening OP1 can be formed. For example, the first opening OP1 can be formed by wet etching.

[0138] The protection pattern PP can be formed by etching the portion of the preliminary protection pattern P_PP exposed by the second opening OP2 and a portion of the preliminary protection pattern P_PP disposed under the first protrusion pattern TP1, and the first protrusion pattern TP1 can be formed to protrude further toward the center of the pixel electrode PE than the protection pattern PP. The first opening OP1 can be connected to the openings OP2 and OP3, and can expose at least a portion of the pixel electrode PE.

[0139] In an embodiment, when the preliminary protection pattern P_PP and the pixel electrode PE include materials having different etching selectivities, due to the difference in etching selectivity between the preliminary protection pattern P_PP and the pixel electrode PE, the etching rate of the preliminary protection pattern P_PP can be relatively greater than the etching rate of the pixel electrode PE. Accordingly, the protection pattern PP can be easily formed while minimizing damage to the pixel electrode PE.

[0140] In an embodiment and with reference to Figure 10A pixel definition layer PDL defining a fourth opening OP4 can be formed on the second protruding pattern TP2. The fourth opening OP4 can be connected to the openings OP1, OP2, and OP3, and can expose at least a portion of the pixel electrode PE and at least a portion of the second protruding pattern TP2.

[0141] Referring back to Figure 3 , the intermediate layer ML, the common electrode CE, and the encapsulation layer TFE can be sequentially formed on the pixel definition layer PDL. The intermediate layer ML can be formed to be disconnected by the protruding patterns TP1 and TP2. Accordingly, the display device 10 Figure 3 illustrated in an embodiment.

[0142] Figure 11 is a cross-sectional view of a display device 11 according to an embodiment. Figure 11 may correspond to Figure 3 a cross-sectional view.

[0143] In an embodiment, the display device 11 described with reference to Figure 11 may be substantially the same as or similar to the display device 10 described with reference to Figure 1 , Figure 2 , Figure 3 and Figure 4 , except for the pixel definition layer PDL. Hereinafter, redundant descriptions will be omitted or simplified.

[0144] In an embodiment and with reference to Figure 11 , the display device 11 can include a substrate SUB, a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a via insulating layer VIA, a light emitting element LE, a protection pattern PP, a first protruding pattern TP1, a second protruding pattern TP2, and an encapsulation layer TFE.

[0145] The buffer layer BFR, the transistor TR, the gate insulating layer GI, the interlayer insulating layer ILD, the via insulating layer VIA, the light emitting element LE, the protection pattern PP, the first protruding pattern TP1, and the second protruding pattern TP2 can be disposed on the substrate SUB.

[0146] The first protruding pattern TP1 can be disposed on the protection pattern PP, and the second protruding pattern TP2 can be disposed on the first protruding pattern TP1. The first protruding pattern TP1 and the second protruding pattern TP2 can define second and third openings OP2 and OP3, respectively, each exposing at least a portion of the pixel electrode PE. In a plan view, the protruding patterns TP1 and TP2 can be disposed along edges of the pixel electrode PE.

[0147] In an embodiment, the second thickness TH2 of the first protruding pattern TP1 can be about to about and the third thickness TH3 of the second protruding pattern TP2 can be in a range of about to about .

[0148] In an embodiment, the protruding patterns TP1 and TP2 can cover the side portions of the pixel electrode PE. For example, as the thickness of the intermediate layer ML increases (e.g., as the number of layers included in the intermediate layer ML increases), the second thickness TH2 of the first protruding pattern TP2 can be relatively thick. The sum of the second thickness TH2 of the first protruding pattern TP1 and the third thickness TH3 of the second protruding pattern TP2 can exceed about However, the present application is not limited thereto. Accordingly, the protruding patterns TP1 and TP2 can cover the side portions of the pixel electrode PE, and a separate pixel defining layer (e.g., the pixel defining layer PDL of Figure 3 ) that covers the side portions of the pixel electrode PE can not be needed.

[0149] The intermediate layer ML can be disposed on the second protruding pattern TP2, and can be broken by the protruding patterns TP1 and TP2. The common electrode CE and the encapsulation layer TFE can be disposed on the intermediate layer ML.

[0150] Figure 12 is a plan view of the display apparatus 12 according to an embodiment. Figure 12 may correspond to Figure 2 . Figure 13 is a cross-sectional view taken along line II-II’ of Figure 12 according to an embodiment. Figure 14 is a cross-sectional view taken along line III-III’ of Figure 12 according to an embodiment.

[0151] The display apparatus 12 described with reference to Figure 12 , Figure 13 and Figure 14 may be substantially the same as or similar to the display apparatus 10 described with reference to Figure 1 , Figure 2 , Figure 3 and Figure 4 . Hereinafter, redundant descriptions will be omitted or simplified.

[0152] In an embodiment and with reference to Figure 12 , Figure 13 and Figure 14 , the display apparatus 12 can include the substrate SUB, the buffer layer BFR, the transistor TR, the gate insulating layer GI, the interlayer insulating layer ILD, the via insulating layer VIA, the light emitting element LE, the protection pattern PP, the first protruding pattern TP1, the second protruding pattern TP2, the pixel defining layer PDL, and the encapsulation layer TFE.

[0153] The transistor TR can include the active pattern ACT, the gate electrode GE, the first electrode SE, and the second electrode DE, and the light emitting element LE can include the pixel electrode PE, the intermediate layer ML, and the common electrode CE.

[0154] The buffer layer BFR, the transistor TR, the gate insulating layer GI, the interlayer insulating layer ILD, the via insulating layer VIA, and the pixel electrode PE can be disposed on the substrate SUB.

[0155] The protection pattern PP can be disposed on the pixel electrode PE. In an embodiment, the protection pattern PP can define a first opening OP1 exposing at least a portion of the pixel electrode PE. For example, the protection pattern PP can include a metal, an alloy, a transparent conductive material, or the like, and a first thickness TH1 of the protection pattern PP can be about or less.

[0156] In a plan view, the protection pattern PP can be disposed along an edge of the pixel electrode PE. In an embodiment, in a plan view, the protection pattern PP can not overlap a partial area of the edge of the pixel electrode PE. The protection pattern PP can define the first opening OP1 overlapping the partial area of the pixel electrode PE, and can not cover a portion of a side portion of the pixel electrode PE.

[0157] The first protrusion pattern TP1 can be disposed on the protection pattern PP. In an embodiment, the first protrusion pattern TP1 can define a second opening OP2 exposing at least a portion of the pixel electrode PE. For example, the first protrusion pattern TP1 can include silicon nitride, and a second thickness TH2 of the first protrusion pattern TP1 can be in a range of about to about .

[0158] The first protrusion pattern TP1 can be further protruded toward a center of the pixel electrode PE than the protection pattern PP. A planar area of the second opening OP2 can be smaller than a planar area of the first opening OP1.

[0159] In a plan view, the first protrusion pattern TP1 can be disposed along an edge of the pixel electrode PE. In an embodiment, in a plan view, the first protrusion pattern TP1 can not overlap a partial area of the edge of the pixel electrode PE. The first protrusion pattern TP1 can define the second opening OP2 overlapping the partial area of the pixel electrode PE, and can not cover a portion of a side portion of the pixel electrode PE.

[0160] The second protruding pattern TP2 can be disposed on the first protruding pattern TP1. In an embodiment, the second protruding pattern TP2 can define a third opening OP3 exposing at least a portion of the pixel electrode PE. For example, the second protruding pattern TP2 can include silicon oxide, and a third thickness TH3 of the second protruding pattern TP2 can be in a range of about to about .

[0161] The second protruding pattern TP2 can be further protruded toward a center of the pixel electrode PE than the first protruding pattern TP1. A planar area of the third opening OP3 can be smaller than a planar area of the second opening OP2.

[0162] In a plan view, the second protruding pattern TP2 can be disposed along an edge of the pixel electrode PE. In an embodiment, in the plan view, the second protruding pattern TP2 can not overlap with a portion area of the edge of the pixel electrode PE. The second protruding pattern TP2 can define the third opening OP3 overlapping with the portion area of the pixel electrode PE, and can not cover a portion of the side portion of the pixel electrode PE.

[0163] The pixel defining layer PDL can be disposed on the via insulating layer VIA and the second protruding pattern TP2. In an embodiment, the pixel defining layer PDL can define a fourth opening OP4 exposing at least a portion of the pixel electrode PE and at least a portion of the second protruding pattern TP2.

[0164] In a plan view, the pixel defining layer PDL can be disposed along the edge of the pixel electrode PE, and can cover a portion of the side portion of the pixel electrode PE. The pixel defining layer PDL can cover the side portion of the pixel electrode PE as a whole, and in the plan view, the pixel defining layer PDL can overlap with a portion area of the edge of the pixel electrode PE not overlapping with the protection pattern PP and the protruding patterns TP1 and TP2.

[0165] That is, in an embodiment, the protection pattern PP and each of the protruding patterns TP1 and TP2 can partially cover the edge of the pixel electrode PE, and the pixel defining layer PDL can completely cover the edge of the pixel electrode PE.

[0166] The intermediate layer ML can be disposed on the pixel electrode PE, the second protruding pattern TP2, and the pixel defining layer PDL. The intermediate layer ML can be disposed on the pixel electrode PE exposed by the openings OP1, OP2, OP3, and OP4, and the second protruding pattern TP2 exposed by the fourth opening OP4, and the pixel defining layer PDL.

[0167] In an embodiment, the intermediate layer ML can be partially disconnected by the protruding patterns TP1 and TP2, and can include a first portion disposed on the second protruding pattern TP2 and a second portion disposed on the pixel electrode PE. The first portion and the second portion can be spaced apart from each other. In a plan view, the second portion can overlap with a portion of the edge of the pixel electrode PE which does not overlap with the protective pattern PP and the protruding patterns TP1 and TP2. The second portion can extend from an upper surface of the pixel electrode PE to a portion of an upper surface of the pixel definition layer PDL which overlaps with the portion. That is, the intermediate layer ML can be disconnected in a region which overlaps with the protruding patterns TP1 and TP2 in a plan view, and can not be disconnected in a region which does not overlap with the protruding patterns TP1 and TP2 in a plan view.

[0168] The common electrode CE can be disposed on the intermediate layer ML. In an embodiment, the common electrode CE can be partially disconnected by the protruding patterns TP1 and TP2, and can include a third portion disposed on the second protruding pattern TP2 and a fourth portion disposed on the pixel electrode PE. The third portion and the fourth portion can be spaced apart from each other. In a plan view, the fourth portion can overlap with a portion of the edge of the pixel electrode PE which does not overlap with the protective pattern PP and the protruding patterns TP1 and TP2. That is, the common electrode CE can be disconnected in a region which overlaps with the protruding patterns TP1 and TP2 in a plan view, and can not be disconnected in a region which does not overlap with the protruding patterns TP1 and TP2 in a plan view.

[0169] When the first protruding pattern TP1 is relatively thick, the intermediate layer ML and the common electrode CE can be disconnected together by the protruding patterns TP1 and TP2. When the common electrode CE is disconnected, a voltage supplied to the common electrode CE can decrease. Accordingly, by forming the protective pattern PP and the protruding patterns TP1 and TP2 not to cover the portion of the edge of the pixel electrode PE, a region in which the common electrode CE is not disconnected can be formed. Accordingly, the common electrode CE can continuously extend in a display region (e.g., a display region DA of Figure 1 ).

[0170] Figure 15 A plan view of a display apparatus 20 according to an embodiment is illustrated. Figure 15 may correspond to Figure 2 a plan view. Figure 16 A cross-sectional view taken along line IV-IV’ of Figure 15 according to an embodiment.

[0171] Hereinafter, a description repeated with the display apparatus 10 described with reference to Figure 1 , Figure 2 , Figure 3 and Figure 4 will be omitted or simplified.

[0172] In an embodiment and with reference to Figure 15 and Figure 16 The display device 20 can include a substrate SUB, a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a via insulating layer VIA, a light emitting element LE, a protection pattern PP, a protrusion pattern TP, a pixel definition layer PDL, and an encapsulation layer TFE.

[0173] The transistor TR can include an active pattern ACT, a gate electrode GE, a first electrode SE, and a second electrode DE, and the light emitting element LE can include a pixel electrode PE, an intermediate layer ML, and a common electrode CE.

[0174] The buffer layer BFR, the transistor TR, the gate insulating layer GI, the interlayer insulating layer ILD, the via insulating layer VIA, and the pixel electrode PE can be disposed on the substrate SUB.

[0175] The protection pattern PP can be disposed on the pixel electrode PE. In an embodiment, the protection pattern PP can define a first opening OP1 exposing at least a portion of the pixel electrode PE. In a plan view, the protection pattern PP can be disposed along an edge of the pixel electrode PE. In an embodiment, the protection pattern PP can cover a portion of an upper surface (e.g., an edge of the upper surface) and a side surface of the pixel electrode PE. In another embodiment, the protection pattern PP can cover only a portion of the upper surface of the pixel electrode PE.

[0176] In an embodiment, the protection pattern PP can include a transparent conductive material. For example, the protection pattern PP can include indium gallium zinc oxide, indium tin oxide, indium zinc oxide, etc.

[0177] In an embodiment, the protection pattern PP can include a material having an etching selectivity different from that of the pixel electrode PE. The protection pattern PP can include a metal, an alloy, etc. having an etching selectivity different from that of the pixel electrode PE. For example, the protection pattern PP can include a material having a higher etching selectivity than that of the pixel electrode PE with respect to an etchant that can be used when the protection pattern PP is formed. For example, the protection pattern PP can include aluminum, molybdenum, an alloy including aluminum, an alloy including molybdenum, etc.

[0178] However, the present application is not limited thereto, and the protection pattern PP can include various materials that can be easily formed while preventing damage to the pixel electrode PE during a manufacturing process of the display device 20.

[0179] In an embodiment, a first thickness TH1 of the protection pattern PP can be in a range of about 100 nm to about 500 nm. to about 500 nm. The first thickness TH1 of the protection pattern PP can be a length of the protection pattern PP in the third direction DR3. However, the present application is not limited thereto, and the first thickness TH1 of the protection pattern PP can be adjusted depending on a material included in the intermediate layer ML, a structure of the intermediate layer ML, etc. For example, when the thickness of the intermediate layer ML increases (e.g., when the number of layers included in the intermediate layer ML increases), the first thickness TH1 of the protection pattern PP can exceed about 1 µm.

[0180] The protrusion pattern TP can be disposed on the protection pattern PP. In an embodiment, the protrusion pattern TP can define a second opening OP2 exposing at least a portion of the pixel electrode PE, wherein the second opening OP2 can be connected to the first opening OP1. In a plan view, the protrusion pattern TP can be disposed along an edge of the pixel electrode PE.

[0181] In an embodiment, the protrusion pattern TP can be further protruded toward the center of the pixel electrode PE than the protection pattern PP. A side surface of the protrusion pattern TP defining the second opening OP2 can be further protruded toward the center of the pixel electrode PE than a side surface of the protection pattern PP defining the first opening OP1. The side surface of the protrusion pattern TP and the side surface of the protection pattern PP can have a step difference. A planar area of the second opening OP2 can be smaller than a planar area of the first opening OP1. For example, the protrusion pattern TP can cover an upper surface of the protection pattern PP. Accordingly, in a cross-sectional view, the protection pattern PP and the protrusion pattern TP can form a sharp end shape (or a roof shape).

[0182] In an embodiment, the protrusion pattern TP can include an inorganic material. For example, the protrusion pattern TP can include silicon nitride, silicon oxide, etc., but the present application is not limited thereto. The protrusion pattern TP can have a single layer structure or a multi-layer structure.

[0183] In an embodiment, the second thickness TH2 of the protrusion pattern TP can be in a range of about 0.1 µm to about 1 µm, but the present application is not limited thereto. Here, the second thickness TH2 of the protrusion pattern TP can be a length of the protrusion pattern TP in the third direction DR3. For example, when the third thickness TH3 of the protrusion pattern TP is greater than about 1 µm, a profile of the protrusion pattern TP can affect the upper member. In an embodiment, the second thickness TH2 of the protrusion pattern TP can be in a range of about 0.1 µm to about 1 µm, but the present application is not limited thereto. Here, the second thickness TH2 of the protrusion pattern TP can be a length of the protrusion pattern TP in the third direction DR3. For example, when the third thickness TH3 of the protrusion pattern TP is greater than about 1 µm, a profile of the protrusion pattern TP can affect the upper member.

[0184] ​​A pixel definition layer PDL can be disposed on the protrusion pattern TP. In an embodiment, the pixel definition layer PDL can define a third opening OP3 exposing at least a portion of the pixel electrode PE, wherein the third opening OP3 can be connected to the first opening OPl and the second opening OP2. In a plan view, the pixel definition layer PDL can be disposed along edges of the pixel electrode PE. The pixel definition layer PDL can cover side portions of the pixel electrode PE, and can include an organic material such as a polyimide resin, an epoxy resin, a siloxane resin, etc. These materials can be used alone or in combination with each other.

[0185] In an embodiment, the third opening OP3 can further expose at least a portion of the protrusion pattern TP, wherein the protrusion pattern TP can be further protruded toward a center of the pixel electrode PE than the pixel definition layer PDL. A side surface of the protrusion pattern TP defining the second opening OP2 can be further protruded toward the center of the pixel electrode PE than a side surface of the pixel definition layer PDL defining the third opening OP3. A planar area of the third opening OP3 can be greater than a planar area of the second opening OP2. In addition, the planar area of the third opening OP3 can be greater than a planar area of the first opening OPl.

[0186] In an embodiment, an intermediate layer ML can be disposed on the pixel electrode PE, the protrusion pattern TP, and the pixel definition layer PDL. The intermediate layer ML can be disposed on the pixel electrode PE exposed by the openings OPl, OP2, and OP3, the protrusion pattern TP exposed by the third opening OP3, and the pixel definition layer PDL.

[0187] In an embodiment, the intermediate layer ML can have a multi-layer structure. For example, the intermediate layer ML can include a common layer, a light emitting layer, a charge generation layer, etc.

[0188] In an embodiment, the intermediate layer ML can be disconnected by the protection pattern PP and the protrusion pattern TP. The intermediate layer ML can be disconnected by shapes of the protection pattern PP and the protrusion pattern TP. The intermediate layer ML can include a first portion disposed on the protrusion pattern TP and the pixel definition layer PDL, and a second portion disposed on the pixel electrode PE, wherein the first portion and the second portion can be spaced apart from each other. Since the intermediate layer ML is disconnected between pixels disposed adjacent to each other, a leakage current that can occur between the pixels adjacent to each other can be minimized.

[0189] In an embodiment, the common electrode CE can be disposed on the intermediate layer ML, and can continuously extend in the display area. The encapsulation layer TFE can be disposed on the common electrode CE.

[0190] The display device 20 according to the embodiment can include a protection pattern PP and a protrusion pattern TP each exposing a portion of the pixel electrode PE. The protrusion pattern TP can be further protruded toward the center of the pixel electrode PE than the protection pattern PP, and the intermediate layer ML can be disconnected by the shape of the protection pattern PP and the protrusion pattern TP. Accordingly, a leakage current that can occur between pixels disposed adjacent to each other can be minimized, thereby minimizing color mixing between the pixels. In addition, since the protrusion pattern TP includes an inorganic material, a path through which a gas generated from an organic material included in the via insulation layer VIA flows into the intermediate layer ML can be blocked. Accordingly, degradation of the light emitting element LE can be prevented, and pixel shrinkage can be prevented.

[0191] Figure 17 , Figure 18 , Figure 19 , Figure 20 and Figure 21 is a cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0192] The method of manufacturing a display device described with reference to Figure 17 , Figure 18 , Figure 19 , Figure 20 and Figure 21 may be a method of manufacturing the display device 20 described with reference to Figure 15 and Figure 16 . Hereinafter, redundant descriptions will be omitted or simplified.

[0193] In an embodiment and with reference to Figure 17 , the buffer layer BFR, the active pattern ACT, the gate insulation layer GI, the gate electrode GE, the interlayer insulation layer ILD, the first electrode SE, the second electrode DE, the via insulation layer VIA, and the pixel electrode PE can be sequentially formed on the substrate SUB. The preliminary protection pattern P_PP can be formed on the pixel electrode PE.

[0194] In an embodiment, the preliminary protection pattern P_PP can be formed to cover the pixel electrode PE. For example, the preliminary protection pattern P_PP can be formed to cover the upper surface and the side surface of the pixel electrode PE, wherein the preliminary protection pattern P_PP and the pixel electrode PE can be formed by different patterning processes. For another example, the preliminary protection pattern P_PP can be formed to cover the upper surface of the pixel electrode PE, wherein the preliminary protection pattern P_PP and the pixel electrode PE can be formed by the same patterning process.

[0195] In an embodiment, the preliminary protection pattern P_PP can include a transparent conductive material. For example, the preliminary protection pattern P_PP can include indium gallium zinc oxide, indium tin oxide, indium zinc oxide, etc.

[0196] In an embodiment, the preliminary protection pattern P PP can include a material having an etching selectivity different from that of the pixel electrode PE. The preliminary protection pattern P PP can include a metal, an alloy, or the like, having an etching selectivity different from that of the pixel electrode PE. For example, the preliminary protection pattern P PP can include a material having a higher etching selectivity than that of the pixel electrode PE with respect to an etchant that can be used when the preliminary protection pattern P PP is patterned. For example, the preliminary protection pattern P PP can include aluminum, molybdenum, an alloy including aluminum, an alloy including molybdenum, or the like.

[0197] However, the present application is not limited thereto, and the preliminary protection pattern P PP can include various materials that can be easily patterned while preventing damage to the pixel electrode PE.

[0198] In an embodiment and with reference to Figure 18 , a preliminary protrusion pattern P TP can be formed on the preliminary protection pattern P PP. The preliminary protrusion pattern P TP can be formed to cover the preliminary protection pattern P PP.

[0199] The preliminary protrusion pattern P TP can include an inorganic material. For example, the preliminary protrusion pattern P TP can include silicon nitride, silicon oxide, or the like, but the present application is not limited thereto.

[0200] In an embodiment and with reference to Figure 18 and Figure 19 A portion of the preliminary protrusion pattern P TP can be removed to form a second opening OP2. That is, a protrusion pattern TP defining the second opening OP2 can be formed. For example, the second opening OP2 can be formed by dry etching. The second opening OP2 can expose at least a portion of the preliminary protection pattern P PP.

[0201] In an embodiment and with reference to Figure 19 and Figure 20 A portion of the preliminary protection pattern P PP can be removed to form a first opening OP1. That is, a protection pattern PP defining the first opening OP1 can be formed. For example, the first opening OP1 can be formed by wet etching.

[0202] The portion of the preliminary protection pattern P PP exposed by the second opening OP2 and a portion of the preliminary protection pattern P PP disposed under the protrusion pattern TP can be etched to form a protection pattern PP, and the protrusion pattern TP can be formed to protrude further toward a center of the pixel electrode PE than the protection pattern PP. The first opening OP1 can be connected to the second opening OP2, and can expose at least a portion of the pixel electrode PE.

[0203] In an embodiment, when the preliminary protection pattern P_PP and the pixel electrode PE include materials having different etching selectivities, the etching rate of the preliminary protection pattern P_PP can be relatively greater than the etching rate of the pixel electrode PE due to the difference in etching selectivity between the preliminary protection pattern P_PP and the pixel electrode PE. Accordingly, the protection pattern PP can be easily formed while minimizing damage to the pixel electrode PE.

[0204] In an embodiment and with reference to Figure 21 , the pixel defining layer PDL defining the third opening OP3 can be formed on the protrusion pattern TP, wherein the third opening OP3 can be connected to the openings OP1 and OP2 and can expose at least a portion of the pixel electrode PE and at least a portion of the protrusion pattern TP.

[0205] With reference back to Figure 16 , the intermediate layer ML, the common electrode CE, and the encapsulation layer TFE can be sequentially formed on the pixel defining layer PDL. The intermediate layer ML can be formed to be disconnected by the protection pattern PP and the protrusion pattern TP. Accordingly, the display apparatus 20 exemplified in Figure 16 can be manufactured.

[0206] Figure 22 is a plan view of a display apparatus 21 according to an embodiment. Figure 22 may correspond to the plan view of Figure 2 . Figure 23 is a cross-sectional view taken along the line V-V’ of Figure 22 according to an embodiment. Figure 24 is a cross-sectional view taken along the line VI-VI’ of Figure 22 according to an embodiment.

[0207] The display apparatus 21 described with reference to Figure 22 , Figure 23 and Figure 24 may be substantially the same as or similar to the display apparatus 20 described with reference to Figure 15 , Figure 16 , Figure 17 , Figure 18 , Figure 19 , Figure 20 and Figure 21 except for the shape of the openings OP1 and OP2. Hereinafter, redundant descriptions will be omitted or simplified.

[0208] In an embodiment and with reference to Figure 22 , Figure 23 and Figure 24The display device 21 can include a substrate SUB, a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a via insulating layer VIA, a light emitting element LE, a protection pattern PP, a protrusion pattern TP, a pixel definition layer PDL, and an encapsulation layer TFE.

[0209] The transistor TR can include an active pattern ACT, a gate electrode GE, a first electrode SE, and a second electrode DE, and the light emitting element LE can include a pixel electrode PE, an intermediate layer ML, and a common electrode CE.

[0210] The buffer layer BFR, the transistor TR, the gate insulating layer GI, the interlayer insulating layer ILD, the via insulating layer VIA, and the pixel electrode PE can be disposed on the substrate SUB.

[0211] The protection pattern PP can be disposed on the pixel electrode PE. In an embodiment, the protection pattern PP can define a first opening OP1 exposing at least a portion of the pixel electrode PE. For example, the protection pattern PP can include a metal, an alloy, a transparent conductive material, or the like, and a first thickness TH1 of the protection pattern PP can be in a range of about to about .

[0212] In a plan view, the protection pattern PP can be disposed along an edge of the pixel electrode PE. In an embodiment, in the plan view, the protection pattern PP can not overlap with a portion of the edge of the pixel electrode PE. The protection pattern PP can define the first opening OP1 overlapping with the portion of the pixel electrode PE, and can not cover a portion of a side portion of the pixel electrode PE.

[0213] The protrusion pattern TP can be disposed on the protection pattern PP. In an embodiment, the protrusion pattern TP can define a second opening OP2 exposing at least a portion of the pixel electrode PE. For example, the protrusion pattern TP2 can include an inorganic material such as silicon nitride, silicon oxide, or the like, and a second thickness TH2 of the protrusion pattern TP can be in a range of about to about .

[0214] The protrusion pattern TP can be further protruded toward a center of the pixel electrode PE than the protection pattern PP, and a planar area of the second opening OP2 can be smaller than a planar area of the first opening OP1.

[0215] In a plan view, the protrusion pattern TP can be disposed along an edge of the pixel electrode PE. In an embodiment, in the plan view, the protrusion pattern TP can not overlap with a portion of the edge of the pixel electrode PE. The protrusion pattern TP can define the second opening OP2 overlapping with the portion of the pixel electrode PE, wherein the protrusion pattern TP can not cover a portion of a side portion of the pixel electrode PE.

[0216] The pixel definition layer PDL can be disposed on the via insulating layer VIA and the protruding pattern TP. In an embodiment, the pixel definition layer PDL can define a third opening OP3 exposing at least a portion of the pixel electrode PE and at least a portion of the protruding pattern TP.

[0217] In a plan view, the pixel definition layer PDL can be disposed along edges of the pixel electrode PE and can cover a portion of the side portion of the pixel electrode PE. The pixel definition layer PDL can entirely cover the side portion of the pixel electrode PE and can overlap, in a plan view, a portion of the edges of the pixel electrode PE that does not overlap with the protective pattern PP and the protruding pattern TP.

[0218] That is, each of the protective pattern PP and the protruding pattern TP can partially cover the edges of the pixel electrode PE, and the pixel definition layer PDL can entirely cover the edges of the pixel electrode PE.

[0219] The intermediate layer ML can be disposed on the pixel electrode PE, the protruding pattern TP, and the pixel definition layer PDL. The intermediate layer ML can be disposed on the pixel electrode PE exposed by the openings OP1, OP2, and OP3, the protruding pattern TP exposed by the third opening OP3, and the pixel definition layer PDL.

[0220] In an embodiment, the intermediate layer ML can be partially disconnected by the protruding pattern TP and can include a first portion disposed on the protruding pattern TP and a second portion disposed on the pixel electrode PE. The first portion and the second portion can be spaced apart from each other. In a plan view, the second portion can overlap a portion of the edges of the pixel electrode PE that does not overlap with the protective pattern PP and the protruding pattern TP. The second portion can extend from an upper surface of the pixel electrode PE to a portion of an upper surface of the pixel definition layer PDL that overlaps with the portion. That is, the intermediate layer ML can be disconnected in a region overlapping with the protruding pattern TP in a plan view and can not be disconnected in a region not overlapping with the protruding pattern TP in a plan view.

[0221] The common electrode CE can be disposed on the intermediate layer ML. In an embodiment, the common electrode CE can be partially disconnected by the protruding pattern TP and can include a third portion disposed on the protruding pattern TP and a fourth portion disposed on the pixel electrode PE. The third portion and the fourth portion can be spaced apart from each other. In a plan view, the fourth portion can overlap a portion of the edges of the pixel electrode PE that does not overlap with the protective pattern PP and the protruding pattern TP. That is, the common electrode CE can be disconnected in a region overlapping with the protruding pattern TP in a plan view and can not be disconnected in a region not overlapping with the protruding pattern TP in a plan view.

[0222] In an embodiment, when the protective pattern PP is relatively thick, the middle layer ML and the common electrode CE can be disconnected together with the protective pattern PP and the protruding pattern TP. When the common electrode CE is disconnected, a voltage supplied to the common electrode CE can drop. Accordingly, by forming the protective pattern PP and the protruding pattern TP as a partial area not covering the edge of the pixel electrode PE, an area in which the common electrode CE is not disconnected can be formed. Accordingly, the common electrode CE can continuously extend in a display area (e.g., the display area DA) of the display device 10. Figure 1

[0223] The display devices 10, 11, 12, 20, and 21 according to the embodiments can be applied to various electronic devices. The electronic device according to the embodiments can include the above-described display device, and can further include a module or a device having an additional function other than the display device.

[0224] Figure 25 A block diagram of an electronic device according to an embodiment is illustrated.

[0225] Reference Figure 25 The electronic device 100 can include a display module 110, a processor 120, a memory 130, and a power module 140.

[0226] The processor 120 can include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0227] The memory 130 can store data information required for the operation of the processor 120 or the display module 110. When the processor 120 executes an application program stored in the memory 130, an image data signal and / or an input control signal can be transmitted to the display module 110, and the display module 110 can process the received signal and output image information through a display screen.

[0228] The power module 140 can include a power supply module such as a power adapter, a battery device, etc., and a power conversion module that converts power supplied by the power supply module to generate power required for the operation of the electronic device 100.

[0229] At least one of the components of the above-described electronic device 100 can be included in the above-described display device according to the embodiments. In addition, some of the individual modules functionally included in one module can be included in the display device, and other modules can be provided separately from the display device. For example, the display device can include the display module 110, and the processor 120, the memory 130, and the power module 140 can be provided in the form of other devices than the display device in the electronic device 100.

[0230] ​ Figure 26 To illustrate a schematic diagram of an electronic device according to an embodiment.

[0231] Reference Figure 26 The various electronic devices to which the display device according to the embodiment is applied can include not only image display electronic devices, but also wearable electronic devices including display modules, vehicle electronic devices 100_3 including display modules, etc. The image display electronic devices can be a smart phone 100_1a, a tablet personal computer 100_1b, a laptop computer 100_1c, a television 100_1d, a desktop monitor 100_1e, etc. The wearable electronic devices can be smart glasses 100_2a, a head-mounted display 100_2b, a smart watch 100_2c, etc. The vehicle electronic devices 100_3 can be a central information display (CID) provided on a dashboard and a center console of a vehicle, an indoor mirror display, etc.

[0232] The present application can be applied to various display devices and electronic devices. For example, the present application is applicable to various display devices such as display devices for vehicles, ships, and aircraft, portable communication devices, display devices for exhibition or information transmission, medical display devices, etc.

[0233] The foregoing is illustrative of the present application, and is not to be construed as limiting thereof. While embodiments have been described, those skilled in the art will readily understand that many modifications can be made thereto without departing from the scope of the present application. Accordingly, all such modifications are intended to be included within the scope of the present application. Therefore, it is to be understood that the foregoing is illustrative of various embodiments and is not to be construed as limited to the specific embodiments disclosed, and that modifications to these embodiments can be resorted to by those skilled in the art without departing from the scope of the application. Moreover, the application or portions thereof can be combined with other applications or portions thereof.

Claims

1. A display device, comprising: a protective pattern provided over a pixel electrode and defining a first opening exposing the pixel electrode; a first protruding pattern provided over the protective pattern and defining a second opening exposing the pixel electrode; a second protruding pattern provided over the first protruding pattern, defining a third opening exposing the pixel electrode, and further protruding toward a center of the pixel electrode than the first protruding pattern; and a common electrode provided over the second protruding pattern.

2. The display device according to claim 1, wherein the first protruding pattern and the second protruding pattern comprise different inorganic materials.

3. The display device according to claim 2, wherein the first protruding pattern comprises silicon nitride, and the second protruding pattern comprises silicon oxide.

4. The display device according to claim 1, wherein the protective pattern comprises at least one selected from the group consisting of a metal, an alloy, and a transparent conductive material.

5. The display device according to claim 1, wherein the first protruding pattern further protrudes toward the center of the pixel electrode than the protective pattern. In a plan view, the protective pattern, the first protruding pattern, and the second protruding pattern are provided along edges of the pixel electrode.

6. The display device according to claim 1, wherein 7. The display device according to claim 6, wherein in the plan view, the protective pattern, the first protruding pattern, and the second protruding pattern do not overlap with a portion of the edges of the pixel electrode.

8. The display device according to any one of claims 1 to 7, further comprising: a pixel-defining layer provided between the second protruding pattern and the common electrode, wherein the pixel-defining layer defines a fourth opening exposing the pixel electrode, and comprises an organic material.

12. The display device according to any one of claims 1 to 7, further comprising:

9. The display device according to any one of claims 1 to 7, wherein a thickness of the protective pattern is in a range of 0.1 to 1.0 μm. to 0.1 to 1.0 μm.

10. The display device according to any one of claims 1 to 7, wherein a thickness of the first protruding pattern is in a range of 10 to 100 nm. to nm.

11. The display device of any one of claims 1-7, wherein a thickness of the second protruding pattern is in a range of 1 nm to 100 nm. to nm. an intermediate layer provided between the second protruding pattern and the common electrode, and comprising a charge generation layer.

13. The display device according to claim 12, wherein the charge generation layer is broken by the first protruding pattern and the second protruding pattern.

14. The display device according to claim 12, wherein the intermediate layer further comprises: a first light-emitting layer provided below the charge generation layer; and a second light-emitting layer provided over the charge generation layer.

15. A display device, comprising: a protective pattern provided over a pixel electrode and defining a first opening exposing the pixel electrode; a protruding pattern provided over the protective pattern, defining a second opening exposing the pixel electrode, and further protruding toward a center of the pixel electrode than the protective pattern; a pixel-defining layer provided over the protruding pattern and defining a third opening exposing the pixel electrode; and a common electrode provided over the pixel-defining layer.

16. The display device according to claim 15, wherein the protruding pattern comprises an inorganic material. ​ ​ ​ 17. The display device of claim 15, wherein the protective pattern comprises at least one selected from the group consisting of a metal, an alloy, and a transparent conductive material.

18. The display device of claim 15, wherein the protective pattern and the protruding pattern are disposed along edges of the pixel electrode in a plan view.

19. The display device of claim 18, wherein the protective pattern and the protruding pattern do not overlap with a portion area of the edges of the pixel electrode in the plan view.

20. A display device according to any one of claims 15 to 19, wherein the thickness of the protective pattern is in the range of to .

21. A display device according to any one of claims 15 to 19, wherein the thickness of the protrusion pattern is in the range of to .

22. The display device of any one of claims 15 to 19, wherein the pixel defining layer comprises an organic material.

23. The display device of any one of claims 15 to 19, further comprising: an intermediate layer disposed between the protruding pattern and the common electrode, and comprising a charge generation layer.

24. The display device of claim 23, wherein the charge generation layer is broken by the protective pattern and the protruding pattern.

25. The display device of claim 23, wherein the intermediate layer further comprises: a first light emitting layer disposed below the charge generation layer; and a second light emitting layer disposed on the charge generation layer.

26. An electronic device comprising: a display device; and a power module configured to supply power to the display device, wherein the display device is the display device of any one of claims 1 to 25. ​ ​

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