Display device and electronic device including the same

Abstract

The invention relates to a display device and an electronic device. The display device includes a substrate including a display area and a dam area surrounding the display area; a light emitting layer disposed on the substrate in the display area; a dam portion disposed on the substrate in the dam region; an encapsulation layer disposed on the light emitting layer in the display area and disposed on the dam portion in the dam area; an organic protective layer disposed on the encapsulation layer in the display area, directly contacting the encapsulation layer in the display area, not overlapping the encapsulation layer in the dam area in plan view, and including an organic material; and a color filter layer disposed on the organic protective layer in the display area, directly contacting the organic protective layer in the display area, and not overlapping the encapsulation layer in the dam area in a plan view.

Description

TECHNICAL FIELD

[0001] Embodiments of the disclosure relate generally to a display apparatus. More particularly, embodiments of the disclosure relate to a display apparatus providing visual information and an electronic apparatus including the same. BACKGROUND

[0002] With the development of information technology, the importance of a display apparatus, which is a medium of connection between a user and information, has been highlighted. For example, the use of display apparatuses such as liquid crystal display ("LCD") apparatuses, organic light emitting diode ("OLED") display apparatuses, plasma display panel ("PDP") apparatuses, quantum dot display apparatuses, etc. is increasing.

[0003] Recently, a head-mounted display ("HMD") including a display apparatus has been developed. The head-mounted display is a glasses-type display apparatus for virtual reality ("VR") or augmented reality ("AR") that is worn in the form of glasses, a helmet, etc. and focused on a close distance in front of a user's eyes. The head-mounted display can provide an image displayed on the display apparatus to the user's eyes through a lens. The head-mounted display can include a high-resolution micro OLED, which can be an organic light emitting diode on silicon ("OLEDoS") formed on a silicon wafer substrate using a semiconductor process. SUMMARY

[0004] Embodiments provide a display apparatus having improved display quality and improved reliability of an encapsulation layer.

[0005] Embodiments provide an electronic apparatus including the display apparatus.

[0006] A display apparatus according to an embodiment of the disclosure includes a substrate including a display area, a dam area surrounding the display area, and a pad area spaced apart from the dam area in one direction; a light emitting layer disposed on the substrate in the display area; a dam portion disposed on the substrate in the dam area; an encapsulation layer disposed on the light emitting layer in the display area and on the dam portion in the dam area; an organic protection layer disposed on the encapsulation layer in the display area and including an organic material, wherein the organic protection layer directly contacts an upper surface of the encapsulation layer in the display area and does not overlap the encapsulation layer in the dam area in a plan view; and a color filter layer disposed on the organic protection layer in the display area, wherein the color filter layer directly contacts an upper surface of the organic protection layer in the display area and does not overlap the encapsulation layer in the dam area in the plan view.

[0007] In an embodiment, the color filter layer can be spaced apart from the encapsulation layer, and the organic protection layer is interposed between the color filter layer and the encapsulation layer.

[0008] In an embodiment, the display apparatus can further include a pad electrode disposed on the substrate in the pad area. In such an embodiment, the organic protective layer can cover the pad electrode in the pad area.

[0009] In an embodiment, the display apparatus can further include a planarization layer disposed on the color filter layer in the display area, and a lens layer disposed on the planarization layer in the display area.

[0010] In an embodiment, the planarization layer can be further disposed on the encapsulation layer in the dam area. In such an embodiment, the lens layer can be further disposed on the planarization layer in the dam area.

[0011] In an embodiment, a height of an upper surface of the planarization layer in the display area can be different from a height of an upper surface of the planarization layer in the dam area.

[0012] In an embodiment, the lens layer can include a plurality of microlenses overlapping the display area in a plan view. In such an embodiment, the plurality of microlenses can be spaced apart from the dam area in the plan view.

[0013] In an embodiment, the encapsulation layer can include a first inorganic encapsulation layer disposed on and covering the dam portion, an organic encapsulation layer disposed on the first inorganic encapsulation layer, wherein the organic encapsulation layer does not overlap at least a portion of the dam portion in a plan view, and a second inorganic encapsulation layer disposed on and covering the dam portion and the first inorganic encapsulation layer. In such an embodiment, the planarization layer can directly contact an upper surface of the second inorganic encapsulation layer in the dam area.

[0014] In an embodiment, the color filter layer can include a first color filter, a second color filter, and a third color filter that respectively transmit light of different colors.

[0015] In an embodiment, the substrate can include a silicon wafer.

[0016] A display device according to another embodiment of the disclosure includes a substrate including a display area, a dummy pixel area surrounding the display area, a dam area surrounding the dummy pixel area, and a pad area spaced apart from the dam area in one direction; a light emitting layer disposed on the substrate in the display area; a dummy electrode disposed on the substrate in the dummy pixel area; a dam portion disposed on the substrate in the dam area; an encapsulation layer disposed on the light emitting layer in the display area, disposed on the dummy electrode in the dummy pixel area, and disposed on the dam portion in the dam area; an organic protection layer disposed on the encapsulation layer in the display area and the dummy pixel area and including an organic material, wherein the organic protection layer directly contacts an upper surface of the encapsulation layer in the display area and the dummy pixel area, and does not overlap the encapsulation layer in the dam area in a plan view; and a color filter layer disposed on the organic protection layer in the display area and the dummy pixel area, wherein the color filter layer directly contacts an upper surface of the organic protection layer in the display area and the dummy pixel area, and does not overlap the encapsulation layer in the dam area in the plan view.

[0017] In an embodiment, the color filter layer can be spaced apart from the encapsulation layer, and the organic protection layer is interposed between the color filter layer and the encapsulation layer.

[0018] In an embodiment, the display device can further include a pad electrode disposed on the substrate in the pad area. In such an embodiment, the organic protection layer can cover the pad electrode in the pad area.

[0019] In an embodiment, the display device can further include a planarization layer disposed on the color filter layer in the display area and the dummy pixel area; and a lens layer disposed on the planarization layer in the display area and the dummy pixel area.

[0020] In an embodiment, a height of an upper surface of the planarization layer in the display area can be equal to a height of an upper surface of the planarization layer in the dummy pixel area.

[0021] In an embodiment, the planarization layer can be further disposed on the encapsulation layer in the dam area. In such an embodiment, the lens layer can be further disposed on the planarization layer in the dam area.

[0022] In an embodiment, a height of an upper surface of the planarization layer in the display area can be different from a height of an upper surface of the planarization layer in the dam area.

[0023] In an embodiment, the encapsulation layer can include a first inorganic encapsulation layer disposed on and covering the dam portion, an organic encapsulation layer disposed on the first inorganic encapsulation layer, wherein the organic encapsulation layer does not overlap at least a portion of the dam portion in a plan view, and a second inorganic encapsulation layer disposed on the first inorganic encapsulation layer and covering the dam portion and the first inorganic encapsulation layer. In such an embodiment, the planarization layer can directly contact an upper surface of the second inorganic encapsulation layer in the dam region.

[0024] In an embodiment, the lens layer can include a plurality of microlenses overlapping the display area in a plan view. In such an embodiment, the plurality of microlenses can be spaced apart from the dummy pixel area and the dam region in a plan view.

[0025] In an embodiment, the light emitting layer can be spaced apart from the dummy pixel area in a plan view.

[0026] An electronic device according to an embodiment of the disclosure includes a display device; and a power supply configured to provide power to the display device. The display device includes a substrate including a display area, a dam area surrounding the display area, and a pad area spaced apart from the dam area in one direction; a light emitting layer disposed on the substrate in the display area; a dam portion disposed on the substrate in the dam area; an encapsulation layer disposed on the light emitting layer in the display area and on the dam portion in the dam area; an organic protection layer disposed on the encapsulation layer in the display area and including an organic material, wherein the organic protection layer directly contacts an upper surface of the encapsulation layer in the display area, and does not overlap the encapsulation layer in the dam area in a plan view; and a color filter layer disposed on the organic protection layer in the display area, wherein the color filter layer directly contacts an upper surface of the organic protection layer in the display area, and does not overlap the encapsulation layer in the dam area in a plan view.

[0027] A display device according to an embodiment of the disclosure can include an organic protection layer disposed between the encapsulation layer and the color filter layer in the display area. In such an embodiment, the color filter layer can be spaced apart from the encapsulation layer with the organic protection layer interposed therebetween. In such an embodiment, the color filter layer can directly contact an upper surface of the organic protection layer. In such an embodiment, because the organic protection layer includes an organic material, when the color filter layer is formed on the upper surface of the organic protection layer, a problem of a color filter included in the color filter layer being peeled off can be effectively prevented. Accordingly, display quality of the display device can be improved.

[0028] A display device according to an embodiment of the present disclosure may include a dam portion disposed in a dam region surrounding a display region, an encapsulation layer disposed on the dam portion in the dam region, and an organic protective layer that does not overlap with the encapsulation layer in the dam region in a plan view. In such an embodiment, the organic protective layer may not be disposed on the encapsulation layer in the dam region. Therefore, crack defects in the encapsulation layer that may occur during the process of forming the organic protective layer on the upper surface of the encapsulation layer in the dam region can be effectively prevented. Consequently, the reliability of the encapsulation layer can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0030] Figure 1 is a plan view illustrating a display device according to an embodiment of the present disclosure.

[0031] Figure 2 yes Figure 1 An enlarged plan view of area A.

[0032] Figure 3 It is along Figure 2 A sectional view taken along line II-II'.

[0033] Figure 4 It is along Figure 1 A cross-sectional view taken along line II'.

[0034] Figure 5 The settings shown are included in Figure 3 A plan view of a region of an organic protective layer in a display device.

[0035] Figure 6 It is along Figure 5 A cross-sectional view taken along line III-III'.

[0036] Figure 7 It is along Figure 5 A sectional view taken along line IV-IV'.

[0037] Figure 8 is a block diagram illustrating an electronic device according to an embodiment of the present disclosure.

[0038] Figure 9 It shows that Figure 8 FIG. 1 is a diagram of an example in which the electronic device is implemented as a smart phone.

[0039] Figure 10 It shows that Figure 8 FIG. 1 is a diagram illustrating an example in which the electronic device is implemented as a head-mounted display device. DETAILED DESCRIPTION

[0040] The present application will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments are shown. The present application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. Like reference numerals refer to like elements throughout.

[0041] It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or intervening elements can be present therebetween. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.

[0042] It will be understood that, although the terms "first", "second", "third", etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, "a first element", "a first component", "a first region", "a first layer" or "a first section" discussed below could be termed a second element, a second component, a second region, a second layer or a second section.

[0043] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the terms "a", "an", "the", and "at least one" are not intended to refer to a limitation on quantity, and are intended to cover both the singular and the plural, unless the context clearly indicates otherwise. Thus, for example, reference to "a" element is a reference to one or more elements. As used herein, "or" means "and / or" unless the context clearly indicates otherwise. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and / or "comprising", or "includes" and / or "including" when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and / or groups thereof.

[0044] Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" can be used herein to describe one element's relationship to another element as the device is oriented in the figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. The term "lower" can, therefore, encompass both an orientation of "lower" and "upper," depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. The terms "below" or "beneath" can, therefore, encompass both an orientation of above and below. The devices can be oriented in any direction, and the expression "below" can be understood to encompass both an upward and a downward orientation.

[0045] In view of the measurements discussed and the errors associated with measurements of particular quantities (i.e., limitations of the measurement system), "about" or "approximately," as used herein, includes the recited value and means within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art. For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the recited value.

[0046] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0047] Embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, embodiments described herein are not to be construed as being limited to the particular shapes illustrated herein but are to include deviations in shapes that result from, for example, manufacturing. For example, a region illustrated or described as flat can often have rough and / or nonlinear features. Moreover, the illustrated corners can typically be rounded. Thus, the regions illustrated in the figures are schematic and are not intended to illustrate the precise shape of a region but are intended to show the general position of the region. It is intended that the specification and figures be considered as examples only, with the scope of the claims being what they would be otherwise.

[0048] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used for the same components, and any repetitive detailed description of the same components will be omitted or simplified.

[0049] Figure 1is a plan view illustrating a display apparatus according to an embodiment of the disclosure.

[0050] In the disclosure, a plane can be defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the first direction DR1 and the second direction DR2 can be perpendicular to each other. A direction perpendicular to the plane (i.e., a thickness direction of the display apparatus DD) can be a third direction DR3. In other words, the third direction DR3 can be perpendicular to each of the first direction DR1 and the second direction DR2. As used herein, a "plan view" is a view in the third direction DR3.

[0051] Referring to Figure 1 A display apparatus DD according to an embodiment of the disclosure can include a substrate SUB, a plurality of pixels PX, a plurality of dummy pixels DPX, and a plurality of pad electrodes PDE.

[0052] The substrate SUB can include (or be divided into) a display area DA and a non-display area NDA. The display area DA can be defined as an area in which an image is displayed by generating light or adjusting the transmittance of light provided from an external light source. The pixels PX can be disposed in the display area DA. Each of the pixels PX can generate light in response to a driving signal. In an embodiment, for example, the pixels PX can be disposed in a matrix form along the first direction DR1 and the second direction DR2.

[0053] The non-display area NDA can be defined as an area in which an image is not displayed. A driver for displaying an image in the display area DA can be disposed in the non-display area NDA. The non-display area NDA can include a peripheral area PA and a pad area PDA.

[0054] The peripheral area PA can be located around a periphery of the display area DA. The peripheral area PA can surround at least a portion of the display area DA. In an embodiment, for example, the peripheral area PA can completely surround the display area DA in a plan view (or when viewed in the third direction DR3). The peripheral area PA can include a dummy pixel area DUMA and a dam area DAMA.

[0055] The dummy pixel area DUMA may surround the display area DA. In an embodiment, for example, the dummy pixel area DUMA may completely surround the display area DA. The dummy pixel area DUMA may be formed in consideration of process deviations that may occur in the manufacturing process of the display device DD. In other words, the dummy pixel area DUMA may be formed to completely surround the pixel PX and may be used as a buffer area. The dummy pixel DPX may be disposed in the dummy pixel area DUMA. The dummy pixel DPX may be repeatedly disposed along the boundary of the dummy pixel area DUMA. The dummy pixel DPX may include a pattern that is substantially the same as or similar to the contact hole and electrode included in the pixel PX. Reference will be made below to Figure 4 Describe its detailed characteristics.

[0056] The dam area DAMA may surround the display area DA and the dummy pixel area DUMA. In an embodiment, for example, the dam area DAMA may completely surround the display area DA and the dummy pixel area DUMA. In addition, the dam area DAMA may be disposed between the dummy pixel area DUMA and the pad area PDA. The dam portion (DAP, referring to FIG. Figure 6 ) can be provided in the dam area DAMA on the substrate SUB. The dam portion can effectively prevent the organic encapsulation layer (TFE2, reference Figure 6 ) overflows onto the circuit elements located on the outer portion of the dam portion adjacent to the edge of the substrate SUB.

[0057] The package substrate area ENCA may be defined as an area where the package substrate (ENC, reference Figure 3 In a plan view, the encapsulation substrate area ENCA may completely overlap with the display area DA, the dummy pixel area DUMA, and the dam area DAMA.

[0058] The pad area PDA may be spaced apart from the dam area DAMA in one direction (eg, in the second direction DR2). In an embodiment, for example, the pad area PDA may be spaced apart from the dam area DAMA in the second direction DR2. The pad electrode PDE may be provided in the pad area PDA on the substrate SUB. Although not in FIG. Figure 1 , but the printed circuit board may be provided in the pad area PDA on the substrate SUB. The printed circuit board may be connected to the pad electrode PDE through an anisotropic conductive film. In an embodiment, for example, the printed circuit board may be a flexible printed circuit board.

[0059] The display device DD according to an embodiment of the disclosure can be a display device that displays an image. In an embodiment, for example, the display device DD can be an organic light emitting diode display device, a liquid crystal display device, or a display device including an organic light emitting diode on silicon ("OLEDoS"), liquid crystal on silicon ("LCoS"), or light emitting diode on silicon ("LEDoS"). In an embodiment, the display device DD can be a display device including an OLEDoS, i.e., an OLEDoS display device.

[0060] In an embodiment, for example, in a case where the display device DD is a display device including an OLEDoS, the display device DD can configure a head-mounted display, which is a glasses-type display device for virtual reality or augmented reality that is worn in the form of glasses, a helmet, or the like and focused on a close distance in front of a user's eyes. However, the disclosure is not limited thereto, and the display device DD can configure various displays.

[0061] Figure 2 is Figure 1 a magnified plan view of the area A.

[0062] Referring to Figure 2 In an embodiment, the substrate SUB can include a display area DA, and the display area DA can include a first light emitting area EA1, a second light emitting area EA2, a third light emitting area EA3, and a light blocking area BA. Each of the pixels PX can include the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 that emit light. Although Figure 2 An embodiment in which each of the pixels PX includes three light emitting areas EA1, EA2, EA3 is illustrated, but the disclosure is not limited thereto. In another embodiment, for example, each of the pixels PX can include four or more light emitting areas.

[0063] In an embodiment, for example, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can have a triangular planar shape, a rectangular planar shape, a circular planar shape, an elliptical planar shape, or the like. In an embodiment, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can have a rectangular planar shape. Each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can have the same size and / or shape as each other. However, the disclosure is not limited thereto, and each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can have different planar shapes. In an embodiment, for example, each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can have different sizes and / or shapes.

[0064] Each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can include a light emitting element LD that emits first light. In an embodiment, for example, the first light can be white light. However, the disclosure is not limited thereto, and the light emitting element LD included in the first light emitting area EA1 can emit blue light, the light emitting element LD included in the second light emitting area EA2 can emit green light, and the light emitting element LD included in the third light emitting area EA3 can emit red light. In an embodiment, the light emitting element LD can be a micro organic light emitting diode. However, the disclosure is not limited thereto.

[0065] The first light emitting area EA1 can emit second light. The first light emitting area EA1 can convert the first light emitted from the light emitting element LD into the second light, and can emit the second light. In an embodiment, for example, the second light can be blue light, but the disclosure is not limited thereto.

[0066] The second light emitting area EA2 can emit third light. The second light emitting area EA2 can convert the first light emitted from the light emitting element LD into the third light, and can emit the third light. In an embodiment, for example, the third light can be green light, but the disclosure is not limited thereto.

[0067] The third light emitting area EA3 can emit fourth light. The third light emitting area EA3 can convert the first light emitted from the light emitting element LD into the fourth light, and can emit the fourth light. In an embodiment, for example, the fourth light can be red light, but the disclosure is not limited thereto.

[0068] The first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can be arranged along the second direction DR2. In an embodiment, for example, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can be arranged along the second direction DR2 in the order of the third light emitting area EA3, the second light emitting area EA2, and the first light emitting area EA1. Also, the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 can be arranged along the first direction DR1. However, the arrangement structure of the first light emitting area EA1, the second light emitting area EA2, the third light emitting area EA3 is not limited thereto.

[0069] A light blocking area BA can be disposed between the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. In an embodiment, for example, in a plan view, the light blocking area BA can surround the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. In an embodiment, for example, in a plan view, the light blocking area BA can have a mesh shape, a net shape, a lattice shape, or the like. The light blocking area BA can be defined as an area that blocks light.

[0070] Figure 3 is a cross-sectional view taken along Figure 2 line II-II' of Figure 3 . Specifically, Figure 1 is a cross-sectional view of a display area DA of

[0071] Referring to Figure 3 , a display device DD according to an embodiment of the disclosure can include a substrate SUB, a display layer PXL, and an encapsulation substrate ENC in a display area DA.

[0072] The substrate SUB can include a base substrate BS and a plurality of circuit portions CP. In an embodiment, the substrate SUB can be a semiconductor circuit board. The substrate SUB can include a silicon wafer.

[0073] The base substrate BS can define a plurality of grooves GRV. The circuit portions CP can be respectively accommodated in the grooves GRV. Each of the circuit portions CP can include at least one transistor and at least one capacitor.

[0074] The display layer PXL can be disposed on the substrate SUB. The display layer PXL can include a first insulating layer IL1, a connection electrode CNE, a second insulating layer IL2, a light emitting element LD, an encapsulation layer TFE, an organic protective layer APL, a color filter layer CFL, a planarization layer OVC, a lens layer LL, and a filling layer FIL. Each of the light emitting elements LD can include a pixel electrode PE, a light emitting layer EML, and a common electrode CE.

[0075] The first insulating layer IL1 can be disposed on the substrate SUB. A contact hole can be defined in the first insulating layer IL1. The contact hole can expose a portion of the circuit portion CP. The first insulating layer IL1 can include an inorganic insulating material and / or an organic insulating material. Examples of the inorganic insulating material that can be used as the first insulating layer IL1 can include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), etc. These can be used alone or in combination with each other. Examples of the organic insulating material that can be used as the first insulating layer IL1 can include a photoresist, a polyacrylic-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acrylic-based resin, an epoxy-based resin, etc. They can be used alone or in combination with each other.

[0076] The connection electrode CNE can be disposed on the substrate SUB. In an embodiment, for example, the connection electrode CNE can be disposed in a contact hole defined by the first insulating layer IL1. The connection electrode CNE can be connected to the circuit portion CP. The connection electrode CNE can electrically connect the circuit portion CP and the pixel electrode PE to each other. The connection electrode CNE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. Examples of materials that can be used as the connection electrode CNE can include silver (Ag), an alloy including silver, molybdenum (Mo), an alloy including molybdenum, aluminum (Al), an alloy including aluminum, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), indium zinc oxide (IZO), or the like. These can be used alone or in combination with each other.

[0077] The pixel electrode PE can be disposed on the first insulating layer IL1 and the connection electrode CNE. In a plan view, the pixel electrode PE can overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The pixel electrode PE can be connected to the circuit portion CP through the connection electrode CNE. The pixel electrode PE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. They can be used alone or in combination with each other. In an embodiment, for example, the pixel electrode PE can be used as an anode electrode.

[0078] The second insulating layer IL2 can be disposed on the first insulating layer IL1 and the pixel electrode PE. The second insulating layer IL2 can cover edges of the pixel electrode PE and define an opening that exposes an upper surface of the pixel electrode PE. The second insulating layer IL2 can include an organic insulating material. Examples of the organic insulating material that can be used as the second insulating layer IL2 can include a photoresist, a polyacrylic-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acrylic-based resin, an epoxy-based resin, or the like. They can be used alone or in combination with each other.

[0079] The light emitting layer EML can be disposed on the pixel electrode PE and the second insulating layer IL2. In an embodiment, the light emitting layer EML can continuously extend along the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. However, the disclosure is not limited thereto, and the light emitting layer EML can be independently disposed in each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. The light emitting layer EML can include an organic material that emits light of a predetermined color. In an embodiment, the light emitting layer EML can include an organic light emitting material that emits white light.

[0080] The common electrode CE can be disposed on the light emitting layer EML. The common electrode CE can continuously extend along the first light emitting area EA1, the second light emitting area EA2, the third light emitting area EA3. The common electrode CE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These can be used alone or in combination with each other. In an embodiment, for example, the common electrode CE can be used as a cathode electrode.

[0081] Accordingly, the light emitting elements LD each including the pixel electrode PE, the light emitting layer EML, and the common electrode CE can be disposed in the display layer PXL.

[0082] The encapsulation layer TFE can be disposed on the light emitting layer EML in the display area DA. In an embodiment, for example, the encapsulation layer TFE can be disposed on the common electrode CE. The encapsulation layer TFE can effectively prevent impurities, moisture, etc. from penetrating into the light emitting element LD from the outside. The encapsulation layer TFE can include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In an embodiment, for example, the inorganic encapsulation layer can include silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), etc. These can be used alone or in combination with each other. In an embodiment, for example, the organic encapsulation layer can include a polymer curing material such as polyacrylate. In an embodiment, the encapsulation layer TFE can include a first inorganic encapsulation layer TFE1, an organic encapsulation layer TFE2, and a second inorganic encapsulation layer TFE3. The first inorganic encapsulation layer TFE1, the organic encapsulation layer TFE2, and the second inorganic encapsulation layer TFE3 can be sequentially stacked along the third direction DR3.

[0083] The first inorganic encapsulation layer TFE1 can be disposed on the common electrode CE. The first inorganic encapsulation layer TFE1 can cover the common electrode CE and can be disposed with a uniform thickness along the contour of the common electrode CE. The first inorganic encapsulation layer TFE1 can effectively prevent the light emitting element LD from being deteriorated due to the penetration of impurities, moisture, etc. In addition, the first inorganic encapsulation layer TFE1 can protect the light emitting element LD from external impact. In an embodiment, for example, the first inorganic encapsulation layer TFE1 can include a flexible inorganic insulating material.

[0084] The organic encapsulation layer TFE2 may be disposed on the first inorganic encapsulation layer TFE1. The organic encapsulation layer TFE2 may compensate for the step difference of the first inorganic encapsulation layer TFE1 (or provide a flat surface on the first inorganic encapsulation layer TFE1). Thus, the organic encapsulation layer TFE2 may have a substantially flat upper surface in the display area DA. The organic encapsulation layer TFE2 may protect the light-emitting element LD together with the first inorganic encapsulation layer TFE1. In an embodiment, for example, the organic encapsulation layer TFE2 may include a flexible organic material.

[0085] The second inorganic encapsulation layer TFE3 may be provided on the organic encapsulation layer TFE2. The second inorganic encapsulation layer TFE3, together with the first inorganic encapsulation layer TFE1, may prevent the light-emitting element LD from deteriorating due to the penetration of impurities, moisture, etc. In addition, the second inorganic encapsulation layer TFE3, together with the first inorganic encapsulation layer TFE1 and the organic encapsulation layer TFE2, may protect the light-emitting element LD from external impact. In an embodiment, for example, the second inorganic encapsulation layer TFE3 may include a flexible inorganic insulating material.

[0086] In an alternative embodiment, the encapsulation layer TFE may have a five-layer structure including a first inorganic encapsulation layer, a first organic encapsulation layer, a second inorganic encapsulation layer, a second organic encapsulation layer, and a third inorganic encapsulation layer stacked sequentially along the third direction DR3. In an alternative embodiment, the encapsulation layer TFE may have a seven-layer structure including a first inorganic encapsulation layer, a first organic encapsulation layer, a second inorganic encapsulation layer, a second organic encapsulation layer, a third inorganic encapsulation layer, a third organic encapsulation layer, and a fourth inorganic encapsulation layer stacked sequentially along the third direction DR3.

[0087] The organic protective layer APL may be disposed on the encapsulation layer TFE in the display area DA. In an embodiment, for example, the organic protective layer APL may be disposed between the encapsulation layer TFE and the color filter layer CFL. The organic protective layer APL may directly contact the upper surface of the encapsulation layer TFE in the display area DA, and the color filter layer CFL may directly contact the upper surface of the organic protective layer APL. Therefore, the color filter layer CFL may be spaced apart from the encapsulation layer TFE with the organic protective layer APL interposed therebetween. The organic protective layer APL may include an organic material. Examples of organic materials that may be used as the organic protective layer APL may include photoresist, polyacrylic acid-based resins, polyimide-based resins, polyamide-based resins, siloxane-based resins, acrylic acid-based resins, epoxy-based resins, and the like. These may be used alone or in combination. In an embodiment, for example, the thickness (or length in the third direction DR3) of the organic protective layer APL may be approximately 40 microns, but the present disclosure is not limited thereto.

[0088] In a conventional display apparatus, when a color filter layer CFL is formed on an upper surface of an encapsulation layer TFE without an organic protective layer APL, a problem of color filter peeling included in the color filter layer CFL can occur. Specifically, in a case where the color filter layer CFL is formed on a second inorganic encapsulation layer TFE3 including an inorganic insulating material, a color filter including an organic material can peel off.

[0089] The display apparatus DD according to embodiments of the disclosure can include an organic protective layer APL disposed between the encapsulation layer TFE and the color filter layer CFL in the display area DA. In such embodiments, the organic protective layer APL can directly contact an upper surface of the encapsulation layer TFE, and the color filter layer CFL can directly contact an upper surface of the organic protective layer APL. In such embodiments in which the organic protective layer APL includes an organic material, when the color filter layer CFL is formed on the upper surface of the organic protective layer APL, a problem of color filter peeling can be effectively prevented. Accordingly, display quality of the display apparatus DD can be improved.

[0090] The color filter layer CFL can be disposed on the organic protective layer APL. Also, the color filter layer CFL can directly contact an upper surface of the organic protective layer APL. The color filter layer CFL can include a first color filter CF1, a second color filter CF2, and a third color filter CF3 that transmit light of different colors.

[0091] The first color filter CF1 can be disposed in the first light emitting area EA1 on the organic protective layer APL. The first color filter CF1 can transmit the second light among the first light emitted from the light emitting layer EML and can absorb or block the third light and the fourth light. In embodiments, for example, the first color filter CF1 can transmit blue light and can absorb or block green light and red light. However, the disclosure is not limited thereto.

[0092] The second color filter CF2 can be disposed in the second light emitting area EA2 on the organic protective layer APL. The second color filter CF2 can transmit the third light among the first light emitted from the light emitting layer EML and can absorb or block the second light and the fourth light. In embodiments, for example, the second color filter CF2 can transmit green light and can absorb or block red light and blue light. However, the disclosure is not limited thereto.

[0093] The third color filter CF3 can be disposed in the third light emitting area EA3 on the organic protective layer APL. The third color filter CF3 can transmit the fourth light among the first light emitted from the light emitting layer EML and can absorb or block the second light and the third light. In embodiments, for example, the third color filter CF3 can transmit red light and can absorb or block green light and blue light. However, the disclosure is not limited thereto.

[0094] The first color filter CF1 and the second color filter CF2 can overlap each other in the light-blocking area BA located between the first light emitting area EA1 and the second light emitting area EA2. Also, the second color filter CF2 and the third color filter CF3 can overlap each other in the light-blocking area BA located between the second light emitting area EA2 and the third light emitting area EA3. Also, although not shown in FIG. 1A, the first color filter CF1 and the third color filter CF3 can overlap each other in the light-blocking area BA located between the first light emitting area EA1 and the third light emitting area EA3. That is, the portions where different color filters overlap each other can overlap the light-blocking area BA in a plan view or in the third direction DR3. The portions where different color filters overlap each other can function as a light-blocking pattern that blocks light. In alternative embodiments, the color filter layer CFL can include a black matrix pattern that overlaps the light-blocking area BA in a plan view and includes an organic material including a light-blocking material. In embodiments, for example, the light-blocking material can include a black pigment, a black dye, carbon black, etc. Figure 3

[0095] The planarization layer OVC can be disposed on the color filter layer CFL in the display area DA. The planarization layer OVC can be disposed entirely across the first light emitting area EA1, the second light emitting area EA2, the third light emitting area EA3, and the light-blocking area BA. The planarization layer OVC can planarize the step difference of the color filter layer CFL. The planarization layer OVC can include an organic insulating material.

[0096] The lens layer LL can be disposed on the planarization layer OVC in the display area DA. The lens layer LL can include a plurality of microlenses ML in the display area DA. In a plan view, the microlenses ML can overlap each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3. Also, in a plan view, the microlenses ML can overlap each of the first color filter CF1, the second color filter CF2, and the third color filter CF3. The microlenses ML can improve light extraction efficiency. The microlenses ML can have a predetermined refractive index. In embodiments, for example, the microlenses ML can have a refractive index greater than or equal to about 1.5 and less than or equal to about 1.7, but the present disclosure is not limited thereto.

[0097] The filling layer FIL can be disposed on the lens layer LL. The filling layer FIL can planarize the step difference of the lens layer LL. The filling layer FIL can include an inorganic insulating material or an organic insulating material.

[0098] The encapsulation substrate ENC can be disposed on the filling layer FIL. The encapsulation substrate ENC can function to cover and protect the display layer PXL. The encapsulation substrate ENC can include a transparent material. In embodiments, for example, the encapsulation substrate ENC can include glass or plastic. ​

[0099] Figure 4 is a cross-sectional view taken along Figure 1 line I-I'. Specifically, Figure 4 is a cross-sectional view showing a display area DA and a dummy pixel area DUMA of Figure 1 In the following, any repeated detailed description of elements identical or similar to elements in the display area DA described above with reference to Figure 3 may be omitted or simplified.

[0100] Referring to Figure 4 , the display device DD according to embodiments of the disclosure can include a substrate SUB, a dummy layer DML, and an encapsulation substrate ENC in the dummy pixel area DUMA.

[0101] The dummy layer DML can be disposed on the substrate SUB in the dummy pixel area DUMA. The dummy layer DML can include a first insulating layer IL1, a dummy connection electrode DCE, a second insulating layer IL2, a dummy electrode DME, a common electrode CE, a passivation layer TFE, an organic protective layer APL, a color filter layer CFL, a planarization layer OVC, a lens layer LL, and a filling layer FIL.

[0102] The first insulating layer IL1 can be disposed on the substrate SUB. A contact hole exposing a portion of the circuit portion CP can be defined in the first insulating layer IL1.

[0103] The dummy connection electrode DCE can be disposed on the substrate SUB. In embodiments, the dummy connection electrode DCE can be disposed in the contact hole defined by the first insulating layer IL1. The dummy connection electrode DCE can be connected to the circuit portion CP. The dummy connection electrode DCE disposed in the dummy pixel area DUMA and the connection electrode (CNE, refer to Figure 3 ) disposed in the display area DA can receive different signals, respectively. The dummy connection electrode DCE can electrically connect the circuit portion CP and the dummy electrode DME to each other. The dummy connection electrode DCE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. They can be used alone or in combination with each other. The dummy connection electrode DCE can be formed by the same process as the connection electrode disposed in the display area DA and can include the same material as the connection electrode disposed in the display area DA.

[0104] The dummy electrode DME can be disposed on the substrate SUB in the dummy pixel area DUMA. In an embodiment, the dummy electrode DME can be disposed on the first insulating layer IL1 and the dummy connection electrode DCE. The dummy electrode DME can be connected to the circuit portion CP through the dummy connection electrode DCE. The dummy electrode DME can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. They can be used alone or in combination with each other. The dummy electrode DME can be formed by the same process as the pixel electrode (PE, refer to Figure 3 ) disposed in the display area DA, and can include the same material as the pixel electrode (PE, refer to Figure 3 ) disposed in the display area DA.

[0105] The second insulating layer IL2 can be disposed on the first insulating layer IL1 and the dummy electrode DME. The second insulating layer IL2 can cover the edge of the dummy electrode DME, and define (or be provided with) an opening exposing the upper surface of the dummy electrode DME.

[0106] The light emitting layer (EML, refer to Figure 3 ) can be spaced apart from the dummy pixel area DUMA in a plan view. In such an embodiment, the light emitting layer can not be disposed in the dummy pixel area DUMA. Accordingly, the dummy pixel area DUMA can not display an image.

[0107] The common electrode CE can be disposed on the second insulating layer IL2 and the dummy electrode DME in the dummy pixel area DUMA. The common electrode CE can continuously extend along the display area DA and the dummy pixel area DUMA.

[0108] The encapsulation layer TFE can be disposed on the dummy electrode DME in the dummy pixel area DUMA. In an embodiment, the encapsulation layer TFE can be disposed on the common electrode CE in the display area DA and the dummy pixel area DUMA. The encapsulation layer TFE can include a first inorganic encapsulation layer TFE1, an organic encapsulation layer TFE2, and a second inorganic encapsulation layer TFE3.

[0109] The first inorganic encapsulation layer TFE1 can be disposed on the common electrode CE. The first inorganic encapsulation layer TFE1 can continuously extend along the display area DA and the dummy pixel area DUMA. The height of the upper surface of the first inorganic encapsulation layer TFE1 in the display area DA can be different from the height of the upper surface of the first inorganic encapsulation layer TFE1 in the dummy pixel area DUMA. In an embodiment, for example, the height of the upper surface of the first inorganic encapsulation layer TFE1 in the display area DA (i.e., the distance from the substrate SUB in the third direction DR3) can be greater than the height of the upper surface of the first inorganic encapsulation layer TFE1 in the dummy pixel area DUMA.

[0110] The organic encapsulation layer TFE2 can be disposed on the first inorganic encapsulation layer TFE1. The organic encapsulation layer TFE2 can compensate for a step difference of the first inorganic encapsulation layer TFE1. In addition, the organic encapsulation layer TFE2 can compensate for a height difference between an upper surface of the first inorganic encapsulation layer TFE1 in the display area DA and an upper surface of the first inorganic encapsulation layer TFE1 in the dummy pixel area DUMA.

[0111] The second inorganic encapsulation layer TFE3 can be disposed on the organic encapsulation layer TFE2. A height of an upper surface of the second inorganic encapsulation layer TFE3 in the display area DA can be substantially the same as a height of an upper surface of the second inorganic encapsulation layer TFE3 in the dummy pixel area DUMA.

[0112] The organic protection layer APL can be disposed on the encapsulation layer TFE in the display area DA and the dummy pixel area DUMA. In an embodiment, the organic protection layer APL can be disposed between the encapsulation layer TFE and the color filter layer CFL in the display area DA and the dummy pixel area DUMA. The organic protection layer APL can directly contact an upper surface of the encapsulation layer TFE in the display area DA and the dummy pixel area DUMA. The dummy pixel area DUMA can be formed in consideration of a process deviation that can occur in a manufacturing process of the display device DD. In such an embodiment, the dummy pixel area DUMA can function as a buffer area. In order to function as the buffer area, the organic protection layer APL can also be disposed in the dummy pixel area DUMA. A thickness (or a length in the third direction DR3) of the organic protection layer APL can be substantially the same in the display area DA and the dummy pixel area DUMA. In an alternative embodiment, the organic protection layer APL can be disposed only in the display area DA and can not be disposed in the dummy pixel area DUMA.

[0113] The color filter layer CFL can be disposed on the organic protection layer APL in the display area DA and the dummy pixel area DUMA. The color filter layer CFL can directly contact an upper surface of the organic protection layer APL in the display area DA and the dummy pixel area DUMA. The planarization layer OVC can be disposed on the color filter layer CFL in the display area DA and the dummy pixel area DUMA. In an embodiment, a height of an upper surface of the planarization layer OVC in the display area DA can be substantially the same as a height of an upper surface of the planarization layer OVC in the dummy pixel area DUMA.

[0114] The lens layer LL can be disposed on the planarization layer OVC in the display area DA and the dummy pixel area DUMA. The lens layer LL can include a microlens (ML, refer to FIG. 2) in the display area DA. Figure 3). In an embodiment, the microlens ML can be spaced apart from the dummy pixel area DUMA in a plan view. In such an embodiment, the microlens ML can not be formed in the dummy pixel area DUMA.

[0115] The filling layer FIL can be provided on the lens layer LL in the display area DA and the dummy pixel area DUMA. The encapsulation substrate ENC can be provided on the filling layer FIL in the display area DA and the dummy pixel area DUMA.

[0116] Figure 5 is a plan view showing an area in which an organic protective layer is provided in the display device of Figure 3 .

[0117] Referring to Figure 5 , the display device DD according to an embodiment of the disclosure can include a substrate SUB, a pixel PX, a dummy pixel DPX, a pad electrode PDE, and an organic protective layer (APL, refer to Figure 3 ). The substrate SUB can include a display area DA and a non-display area NDA. The non-display area NDA can include a peripheral area PA and a pad area PDA. The peripheral area PA can include a dummy pixel area DUMA and a dam area DAMA.

[0118] In a plan view (or when viewed in the third direction DR3), the organic protective layer APL can be provided in the display area DA, the dummy pixel area DUMA, and the pad area PDA, and the organic protective layer APL can not be provided in the dam area DAMA. In an embodiment, the organic protective layer APL can be provided in the entire area of the substrate SUB except for the dam area DAMA. In such an embodiment, the organic protective layer APL can be provided in the shadow area of Figure 5 .

[0119] Figure 6 is a cross-sectional view taken along line III-III' of Figure 5 . Specifically, Figure 6 is a cross-sectional view showing the display area DA, the dummy pixel area DUMA, and the dam area DAMA of Figure 5 . Hereinafter, any repetitive detailed description of elements identical or similar to elements in the display area DA and the dummy pixel area DUMA described above with reference to Figure 3 and Figure 4 may be omitted or simplified.

[0120] Referring to Figure 6The display device DD according to the embodiment of the disclosure can include, in the dam area DAMA, a substrate SUB, a first insulating layer IL1, a second insulating layer IL2, a dam portion DAP, a common electrode CE, a packaging layer TFE, a planarization layer OVC, a lens layer LL, a sealing member SL, and a filling layer FIL. The packaging layer TFE can include a first inorganic packaging layer TFE1, an organic packaging layer TFE2, and a second inorganic packaging layer TFE3. A boundary of the dam area DAMA with an outer portion of the dam portion DAP adjacent to an edge of the substrate SUB can be defined as an end of the packaging layer TFE extending toward the edge of the substrate SUB. In an embodiment, the boundary of the dam area DAMA can be defined as an end of the second inorganic packaging layer TFE3 extending toward the edge of the substrate SUB.

[0121] The dam portion DAP can be disposed on the substrate SUB in the dam area DAMA. The dam portion DAP can include an inorganic insulating material and / or an organic insulating material. The dam portion DAP can effectively prevent the organic packaging layer TFE2 from overflowing onto the circuit elements located on an outer portion of the dam portion DAP adjacent to the edge of the substrate SUB.

[0122] The dam portion DAP can include a plurality of dams. Each of the plurality of dams can have a single-layer structure or a multi-layer structure. In an embodiment, for example, the dam portion DAP can include a first dam DA1 having a single-layer structure and a second dam DA2 spaced apart from the first dam DA1 and having a multi-layer structure. However, the structure of the dam portion DAP is not limited thereto.

[0123] The first dam DA1 can have a single-layer structure. The first dam DA1 can be formed by the same process as the first insulating layer IL1 and can include the same material as the first insulating layer IL1. The second dam DA2 can have a multi-layer structure. In an embodiment, for example, the second dam DA2 can include a first dam layer and a second dam layer disposed on the first dam layer. The first dam layer can be formed by the same process as the first insulating layer IL1 and can include the same material as the first insulating layer IL1. The second dam layer can be formed by the same process as the second insulating layer IL2 and can include the same material as the second insulating layer IL2.

[0124] The common electrode CE can be disposed along the contours of the substrate SUB, the first dam DA1, and the second dam DA2 in the dam area DAMA. The common electrode CE can continuously extend along the display area DA, the dummy pixel area DUMA, and the dam area DAMA.

[0125] The first inorganic encapsulation layer TFE1 can be disposed on the dam portion DAP in the dam area DAM and can cover the dam portion DAP. The first inorganic encapsulation layer TFE1 can be disposed on the common electrode CE. The first inorganic encapsulation layer TFE1 can be disposed along the contour of the common electrode CE. The first inorganic encapsulation layer TFE1 can continuously extend along the display area DA, the dummy pixel area DUMA, and the dam area DAM.

[0126] The organic encapsulation layer TFE2 can be disposed on the first inorganic encapsulation layer TFE1. In a plan view, the organic encapsulation layer TFE2 can not overlap at least a portion of the dam portion DAP (e.g., the second dam DA2). In such an embodiment, the organic encapsulation layer TFE2 can not extend beyond the outer portion of the dam portion DAP. In an embodiment, for example, as shown in FIG. 1B, the organic encapsulation layer TFE2 can not extend beyond the outer portion of the first dam DA1. Figure 6

[0127] The second inorganic encapsulation layer TFE3 can be disposed on the first inorganic encapsulation layer TFE1. The second inorganic encapsulation layer TFE3 can cover the dam portion DAP and the first inorganic encapsulation layer TFE1. The second inorganic encapsulation layer TFE3 can be disposed along the contour of the first inorganic encapsulation layer TFE1 and the organic encapsulation layer TFE2. The second inorganic encapsulation layer TFE3 can continuously extend along the display area DA, the dummy pixel area DUMA, and the dam area DAM.

[0128] In an embodiment, in a plan view, the organic protective layer APL can be spaced apart from the dam area DAM. In such an embodiment, in a plan view, the organic protective layer APL can not overlap the encapsulation layer TFE in the dam area DAM. The organic protective layer APL can not be disposed on the encapsulation layer TFE in the dam area DAM.

[0129] In a case where the organic protective layer APL is formed to cover the entire area of the substrate SUB, a crack defect can occur in the encapsulation layer TFE in the dam area DAM. In this case, the second inorganic encapsulation layer TFE3 disposed along the contour of the lower structure can have a step difference in the dam area DAM, and in a process of forming the organic protective layer APL on the upper surface of the second inorganic encapsulation layer TFE3 forming the step difference, a crack can occur in the second inorganic encapsulation layer TFE3. In an embodiment, the organic protective layer APL can not be formed in the dam area DAM to prevent such a crack defect. Accordingly, the reliability of the encapsulation layer TFE can be improved.

[0130] In an embodiment, in a plan view, the color filter layer (CFL, refer to FIG. 1A) can be spaced apart from the dam area DAM. In such an embodiment, in a plan view, the color filter layer (CFL, refer to FIG. 1A) can not overlap the encapsulation layer TFE in the dam area DAM. The color filter layer (CFL, refer to FIG. 1A) can not be disposed on the encapsulation layer TFE in the dam area DAM. Figure 4 ​The color filter layer CFL can be spaced apart from the dam region DAMA. In such an embodiment, in a plan view, the color filter layer CFL can not overlap the encapsulation layer TFE in the dam region DAMA. The color filter layer CFL can not be disposed on the encapsulation layer TFE in the dam region DAMA.

[0131] The planarization layer OVC can be disposed on the dam portion DAP in the dam region DAMA. In an embodiment, the planarization layer OVC can be disposed on the encapsulation layer TFE in the dam region DAMA. In an embodiment, the planarization layer OVC can directly contact an upper surface of the second inorganic encapsulation layer TFE3 in the dam region DAMA. The planarization layer OVC can cover the second inorganic encapsulation layer TFE3 in the dam region DAMA. In an embodiment, for example, the planarization layer OVC can extend beyond the dam region DAMA toward an edge of the substrate SUB, and can not extend to an end of the encapsulation substrate region ENCA.

[0132] In an embodiment, a height of an upper surface of the planarization layer OVC in the display region DA can be different from a height of an upper surface of the planarization layer OVC in the dam region DAMA. In an embodiment, for example, the height of the upper surface of the planarization layer OVC in the display region DA can be greater than the height of the upper surface of the planarization layer OVC in the dam region DAMA.

[0133] The lens layer LL can be disposed on the planarization layer OVC in the dam region DAMA. The lens layer LL can cover the planarization layer OVC in the dam region DAMA. The lens layer LL can extend beyond the dam region DAMA toward an edge of the substrate SUB. In such an embodiment, the lens layer LL can extend to an end of the encapsulation substrate region ENCA adjacent to the edge of the substrate SUB.

[0134] The lens layer LL can include microlenses (ML, refer to Figure 3 ) in the display region DA, and in a plan view, the microlenses ML can be spaced apart from the dam region DAMA. In such an embodiment, the microlenses ML can not be formed in the dam region DAMA.

[0135] The fill layer FIL can be disposed on the lens layer LL in the dam region DAMA. The sealing member SL can be disposed on an edge portion of the substrate SUB. The sealing member SL can seal a side surface of the display device DD. The sealing member SL can include an inorganic material. In an embodiment, for example, the sealing member SL can include a glass frit. The encapsulation substrate ENC can be disposed on the fill layer FIL and the sealing member SL.

[0136] Figure 7 is a cross-sectional view taken along the line IV-IV' of Figure 5 is a cross-sectional view taken along the line IV-IV' of Figure 7 is a cross-sectional view taken along the line IV-IV' ofFigure 5 FIG. 1 is a cross-sectional view of a display area DA, a dummy pixel area DUMA, a dam area DAMA, and a pad area PDA according to an embodiment of the disclosure. In the following, any repetitive detailed description of elements identical or similar to elements described above with reference to FIG. 1 can be omitted or simplified. Figure 3 Figure 4 Figure 6

[0137] Referring to Figure 7 The display device DD according to the embodiment of the disclosure can include, in the pad area PDA, a substrate SUB, a first insulating layer IL1, a pad connection electrode PCE, a pad electrode PDE, an organic protection layer APL, and a lens layer LL.

[0138] The first insulating layer IL1 can be disposed on the substrate SUB in the pad area PDA. A contact hole exposing a portion of the circuit portion CP can be defined in the first insulating layer IL1 in the pad area PDA.

[0139] The pad connection electrode PCE can be disposed in the contact hole defined by the first insulating layer IL1 in the pad area PDA. The pad connection electrode PCE can be connected to the circuit portion CP. The pad connection electrode PCE can electrically connect the circuit portion CP and the pad electrode PDE to each other. The pad connection electrode PCE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. They can be used alone or in combination with each other. The pad connection electrode PCE can be formed by the same process as the connection electrode disposed in the display area DA and the dummy connection electrode disposed in the dummy pixel area DUMA, and can include the same material as the connection electrode disposed in the display area DA and the dummy connection electrode disposed in the dummy pixel area DUMA.

[0140] The pad electrode PDE can be disposed on the substrate SUB in the pad area PDA. In an embodiment, the pad electrode PDE can be disposed on the first insulating layer IL1 and the pad connection electrode PCE. The pad electrode PDE can be connected to the circuit portion CP through the pad connection electrode PCE. The pad electrode PDE can include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. They can be used alone or in combination with each other. The pad electrode PDE can be formed by the same process as the pixel electrode disposed in the display area DA and the dummy electrode disposed in the dummy pixel area DUMA, and can include the same material as the pixel electrode disposed in the display area DA and the dummy electrode disposed in the dummy pixel area DUMA.

[0141] ​​​An organic protective layer APL can be disposed on the substrate SUB and the pad electrode PDE in the pad area PDA. In an embodiment, the organic protective layer APL can cover and protect the pad electrode PDE in the pad area PDA.

[0142] A lens layer LL can be disposed on the organic protective layer APL in the pad area PDA. The lens layer LL can extend to an end of the pad area PDA adjacent to an edge of the substrate SUB.

[0143] Figure 8 is a block diagram illustrating an electronic device according to an embodiment of the present disclosure. Figure 9 is a view illustrating an example in which the electronic device of Figure 8 is implemented as a smart phone. Figure 10 is a view illustrating an example in which the electronic device of Figure 8 is implemented as a head-mounted display device.

[0144] Referring to Figure 8 , Figure 9 and Figure 10 , the electronic device 1000 can include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. The display device 1060 can be a display device DD of Figure 1 . In addition, the electronic device 1000 can further include a plurality of ports for communication with a video card, a sound card, a memory card, a universal serial bus (USB) device, other systems, etc.

[0145] In an embodiment, the electronic device 1000 can be implemented as a smart phone as illustrated in Figure 9 . In another embodiment, the electronic device 1000 can be implemented as a head-mounted display device as illustrated in Figure 10 . However, the electronic device 1000 is not limited thereto. For example, the electronic device 1000 can be implemented as a smart pad, a smart watch, a tablet PC, a car navigation system, a laptop computer, etc.

[0146] The processor 1010 can perform various computing functions. The processor 1010 can be a microprocessor, a central processing unit ("CPU"), an application processor ("AP"), etc. The processor 1010 can be coupled to other components via an address bus, a control bus, a data bus, etc. In an embodiment, the processor 1010 can be coupled to an extension bus, such as a peripheral component interconnect ("PCI") bus.

[0147] The memory device 1020 can store data for operations of the electronic device 1000. For example, the memory device 1020 can include at least one non-volatile memory device such as an erasable programmable read-only memory ("EPROM") device, an electrically erasable programmable read-only memory ("EEPROM") device, a flash memory device, a phase-change random access memory ("PRAM") device, a resistive random access memory ("RRAM") device, a nano floating-gate memory ("NFGM") device, a polymer random access memory ("PoRAM") device, a magnetic random access memory ("MRAM") device, a ferroelectric random access memory ("FRAM") device, etc., and / or at least one volatile memory device such as a dynamic random access memory ("DRAM") device, a static random access memory ("SRAM") device, a mobile DRAM device, etc.

[0148] The storage device 1030 can include a solid state drive ("SSD") device, a hard disk drive ("HDD") device, a CD-ROM device, etc. The I / O device 1040 can include an input device such as a keyboard, a keypad, a mouse device, a touchpad, a touchscreen, etc., and an output device such as a printer, a speaker, etc. In some embodiments, the I / O device 1040 can include the display device 1060.

[0149] The power supply 1050 can provide power for operations of the electronic device 1000. In other words, the power supply 1050 can provide power to the display device 1060. The display device 1060 can be connected to other components through a bus or other communication links.

[0150] Embodiments of the present disclosure can be applied to various display devices, for example, display devices for vehicles, ships, and airplanes, portable communication devices, display devices for exhibition or information transmission, medical display devices, etc.

[0151] The present application should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art.

[0152] While the present application has been particularly shown and described with reference to embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details can be made therein without departing from the spirit or scope of the present application as defined by the following claims.

Claims

1. A display device, comprising: a substrate including a display area, a dam area surrounding the display area, and a pad area spaced apart from the dam area in one direction; a light emitting layer disposed on the substrate in the display area; a dam portion disposed on the substrate in the dam area; an encapsulation layer disposed on the light emitting layer in the display area and on the dam portion in the dam area; an organic protective layer disposed on the encapsulation layer in the display area and including an organic material, wherein the organic protective layer directly contacts an upper surface of the encapsulation layer in the display area and does not overlap the dam area in a plan view; and a color filter layer disposed on the organic protective layer in the display area, wherein the color filter layer directly contacts an upper surface of the organic protective layer in the display area and does not overlap the dam area in the plan view.

2. The display device of claim 1, wherein, The color filter layer is spaced apart from the encapsulation layer, and the organic protective layer is interposed between the color filter layer and the encapsulation layer. 3.The display device of claim 1, further comprising: a pad electrode disposed on the substrate in the pad area, wherein the organic protective layer covers the pad electrode in the pad area. 4.The display device of claim 1, further comprising: a planarization layer disposed on the color filter layer in the display area; and a lens layer disposed on the planarization layer in the display area. 5.The display device of claim 4, the planarization layer is further disposed on the encapsulation layer in the dam area, and wherein, wherein the lens layer is further disposed on the planarization layer in the dam area. An upper surface of the planarization layer in the display area has a different height from an upper surface of the planarization layer in the dam area.

6. The display device of claim 5, wherein, 7.The display device of claim 5, the lens layer includes a plurality of microlenses overlapping the display area in the plan view, and wherein wherein the plurality of microlenses are spaced apart from the dam area in the plan view. The encapsulation layer includes:

8. The display device of claim 5, wherein, a first inorganic encapsulation layer disposed on and covering the dam portion; an organic encapsulation layer disposed on the first inorganic encapsulation layer, wherein the organic encapsulation layer does not overlap at least a portion of the dam portion in the plan view; and a second inorganic encapsulation layer disposed on and covering the dam portion and the first inorganic encapsulation layer, and wherein the planarization layer directly contacts an upper surface of the second inorganic encapsulation layer in the dam area. The color filter layer includes first, second, and third color filters that respectively transmit light of different colors.

9. The display device of claim 1, wherein, The substrate includes a silicon wafer.

10. The display device of claim 1, wherein, 11.A display device, comprising: a substrate including a display area, a dummy pixel area surrounding the display area, a dam area surrounding the dummy pixel area, and a pad area spaced apart from the dam area in one direction; a light emitting layer disposed on the substrate in the display area; ​ dummy electrode disposed on the substrate in the dummy pixel area; dam portion disposed on the substrate in the dam area; encapsulation layer disposed on the light-emitting layer in the display area, on the dummy electrode in the dummy pixel area, and on the dam portion in the dam area; organic protective layer disposed on the encapsulation layer in the display area and the dummy pixel area and comprising an organic material, wherein the organic protective layer directly contacts an upper surface of the encapsulation layer in the display area and the dummy pixel area, and does not overlap the encapsulation layer in the dam area in the plan view; and color filter layer disposed on the organic protective layer in the display area and the dummy pixel area, wherein the color filter layer directly contacts an upper surface of the organic protective layer in the display area and the dummy pixel area, and does not overlap the encapsulation layer in the dam area in the plan view.

12. The display device of claim 11, wherein, The color filter layer is spaced apart from the encapsulation layer, and the organic protective layer is interposed between the color filter layer and the encapsulation layer.

13. The display device of claim 11, further comprising: pad electrode disposed on the substrate in the pad area, wherein the organic protective layer covers the pad electrode in the pad area.

14. The display device of claim 11, further comprising: planarization layer disposed on the color filter layer in the display area and the dummy pixel area; and lens layer disposed on the planarization layer in the display area and the dummy pixel area. An upper surface of the planarization layer in the display area has a same height as an upper surface of the planarization layer in the dummy pixel area.

15. The display device of claim 14, wherein, 16. The display device of claim 14, the planarization layer is further disposed on the encapsulation layer in the dam area, and wherein wherein the lens layer is further disposed on the planarization layer in the dam area. An upper surface of the planarization layer in the display area has a different height than an upper surface of the planarization layer in the dam area.

17. The display device of claim 16, wherein, The encapsulation layer comprises:

18. The display device of claim 16, wherein, first inorganic encapsulation layer disposed on and covering the dam portion; organic encapsulation layer disposed on the first inorganic encapsulation layer, wherein the organic encapsulation layer does not overlap at least a portion of the dam portion in the plan view; and second inorganic encapsulation layer disposed on and covering the dam portion and the first inorganic encapsulation layer, and wherein the planarization layer directly contacts an upper surface of the second inorganic encapsulation layer in the dam area.

19. The display device of claim 14, the lens layer comprises a plurality of microlenses overlapping the display area in the plan view, and wherein wherein the plurality of microlenses are spaced apart from the dummy pixel area and the dam area in the plan view. The light-emitting layer is spaced apart from the dummy pixel area in the plan view.

20. The display device of claim 11, wherein, 21. An electronic device comprising: a display device; and ​ a power supply configured to provide power to the display device, wherein the display device comprises: a substrate comprising a display area, a dam area surrounding the display area, and a pad area spaced apart from the dam area in one direction; a light-emitting layer disposed on the substrate in the display area; a dam portion disposed on the substrate in the dam area; an encapsulation layer disposed on the light-emitting layer in the display area and on the dam portion in the dam area; an organic protective layer disposed on the encapsulation layer in the display area and comprising an organic material, wherein the organic protective layer directly contacts an upper surface of the encapsulation layer in the display area and does not overlap the dam area in a plan view; and a color filter layer disposed on the organic protective layer in the display area, wherein the color filter layer directly contacts an upper surface of the organic protective layer in the display area and does not overlap the dam area in the plan view.

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