Display device and electronic device including the same

Abstract

The invention relates to a display device and an electronic device including the same. The display device includes: a sub-pixel region; a display layer including a light emitting element disposed in the sub-pixel area and an encapsulation layer disposed on the light emitting element; and a sensor layer including a sensor base layer and a conductive pattern layer including a first conductive pattern layer and a second conductive pattern layer disposed on layers different from each other. The sensor layer includes an overlapping region in which the first conductive pattern layer and the second conductive pattern layer overlap each other, a non-overlapping region in which any one of the first conductive pattern layer and the second conductive pattern layer is not both is disposed, and a cut region in which the first conductive pattern layer and / or the second conductive pattern layer is cut. The conductive pattern layer includes a non-overlapping recognition pattern portion disposed in the non-overlapping region and an overlapping recognition pattern portion disposed in the overlapping region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2024-0051287, filed on April 17, 2024, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Various embodiments of the present disclosure relate to a display device and an electronic device including the display device. Background Art

[0004] In order to provide an intuitive means of input and output, a display device is often incorporated into an electronic product. The display device may include a light source such as an inorganic light emitting element or an organic light emitting element.

[0005] The display device may include a display panel configured to display an image and a sensing panel configured to sense proximity and / or touch of an object such as a user's finger or a stylus. Here, the sensing panel may be used to determine the position of a touch input provided from the user.

[0006] It is desirable for display devices to have good visibility, especially in bright environments where light reflections may be a problem. Summary of the Invention

[0007] A display device includes a subpixel region. A display layer of the display device includes a light-emitting element disposed in the subpixel region and an encapsulation layer disposed on the light-emitting element. A sensor layer includes a sensor base layer and a conductive pattern layer disposed on the sensor base layer. The conductive pattern layer includes a first conductive pattern layer and a second conductive pattern layer disposed on different layers. The sensor base layer is disposed on the encapsulation layer. The sensor layer includes an overlapping region in which the first conductive pattern layer and the second conductive pattern layer overlap each other, a non-overlapping region in which either one of the first conductive pattern layer and the second conductive pattern layer but not both is disposed, and a cut region in which the first conductive pattern layer and / or the second conductive pattern layer is cut. The conductive pattern layer includes a non-overlapping identification pattern portion disposed in the non-overlapping region and an overlapping identification pattern portion disposed in the overlapping region.

[0008] The non-overlapping recognition pattern portion may include a protruding structure and may correspond to the position of the cutting area.

[0009] The cutting area may include a plurality of cutting areas arranged in a matrix structure. The non-overlapping recognition pattern portion may include a plurality of non-overlapping recognition pattern portions arranged to correspond to the matrix structure based on a position to which the matrix structure is shifted in one direction.

[0010] The non-overlapping identification pattern portion can have a shape extending in two or more directions.

[0011] The non-overlapping identification pattern portion can include a first non-overlapping identification pattern portion formed by the first conductive pattern layer and a second non-overlapping identification pattern portion formed by the second conductive pattern layer.

[0012] The overlapping area can include a dot-type overlapping area. The overlapping identification pattern portion can include a dot-type overlapping identification pattern portion formed in the dot-type overlapping area. The dot-type overlapping area can be an area in which at least the respective portions of the first conductive pattern layer and the second conductive pattern layer extend in different directions from each other and cross each other.

[0013] The dot-type overlapping identification pattern portion can not overlap with the sub-pixel area in a first direction, and can not overlap with the sub-pixel area in a second direction different from the first direction.

[0014] The dot-type overlapping identification pattern portion can include a plurality of dot-type overlapping identification pattern portions sequentially arranged in the second direction.

[0015] The dot-type overlapping identification pattern portion can not overlap with the non-overlapping identification pattern portion in a first direction, and can overlap with the non-overlapping identification pattern portion in a second direction.

[0016] The size of the dot-type overlapping identification pattern portion can be smaller than the size of the non-overlapping identification pattern portion.

[0017] The dot-type overlapping identification pattern portion can include protrusions extending in different respective directions.

[0018] The dot-type overlapping identification pattern portion can have an "X" shape.

[0019] The dot-type overlapping identification pattern portion can have a forward slash shape or a back slash shape.

[0020] The dot-type overlapping identification pattern portion can include a first dot-type overlapping identification pattern portion having a forward slash shape and a second dot-type overlapping identification pattern portion having a back slash shape. The first dot-type overlapping identification pattern portion and the second dot-type overlapping identification pattern portion can be alternately disposed in a certain direction.

[0021] The protrusions can be formed by the second conductive pattern layer.

[0022] The overlapping area can include a line-type overlapping area. The overlapping identification pattern portion can include a line-type overlapping identification pattern portion formed in the line-type overlapping area. The line-type overlapping area can be an area in which at least the respective portions of the first conductive pattern layer and the second conductive pattern layer extend in the same direction and overlap each other.

[0023] The line-type overlap identification pattern portion can not overlap the sub-pixel area in a first direction, and can overlap the sub-pixel area in a second direction different from the first direction.

[0024] The line-type overlap identification pattern portion can include a plurality of line-type overlap identification pattern portions sequentially arranged in the first direction and spaced apart from each other at regular intervals.

[0025] The size of the line-type overlap identification pattern portion can be greater than the size of the non-overlap identification pattern portion.

[0026] The line-type overlap identification pattern portion can have a shape extending in two or more directions.

[0027] The line-type overlap identification pattern portion can have a forward slash shape or a backward slash shape.

[0028] The line-type overlap identification pattern portion can include a first line-type overlap identification pattern portion having a forward slash shape and a second line-type overlap identification pattern portion having a backward slash shape. The first line-type overlap identification pattern portion and the second line-type overlap identification pattern portion can be alternately disposed in a certain direction.

[0029] The overlap area can include a dot-type overlap area and a line-type overlap area. The overlap identification pattern portion can include a dot-type overlap identification pattern portion formed in the dot-type overlap area and a line-type overlap identification pattern portion formed in the line-type overlap area. The dot-type overlap identification pattern portion and the line-type overlap identification pattern portion can have different shapes.

[0030] The conductive pattern layer can form a first sensing electrode and a second sensing electrode. The first sensing electrode and the second sensing electrode can be physically spaced apart from each other with a cut area interposed therebetween.

[0031] The sensor base layer can be disposed directly on the encapsulation layer.

[0032] The sub-pixel area can include a first sub-pixel area providing light of a first color, a second sub-pixel area providing light of a second color, and a third sub-pixel area providing light of a third color. The first sub-pixel area and the second sub-pixel area can be adjacent to each other in a first direction, and the third sub-pixel area can be adjacent to the first sub-pixel area and the second sub-pixel area in a second direction different from the first direction. The third sub-pixel area can have a larger surface area than a surface area of the first sub-pixel area or a surface area of the second sub-pixel area.

[0033] A display apparatus includes subpixels forming subpixel regions each providing light of a specific color. A sensing electrode is disposed on different layers from each other, formed of a first conductive pattern layer and a second conductive pattern layer not overlapping the subpixel regions, and includes a mesh structure formed of the second conductive pattern layer. At least a portion of the second conductive pattern layer is cut in a cutting region. The first conductive pattern layer and the second conductive pattern layer include a non-overlapping identification pattern portion formed in a region in which the first conductive pattern layer and the second conductive pattern layer do not overlap each other, and an overlapping identification pattern portion formed in a region in which the first conductive pattern layer and the second conductive pattern layer overlap each other. The cutting region is arranged in a matrix structure based on a first direction and a second direction different from the first direction. The non-overlapping identification pattern portion is disposed adjacent to the cutting region and corresponds to the matrix structure. The overlapping identification pattern portion does not overlap the cutting region in the first direction or the second direction.

[0034] An electronic apparatus includes a processor configured to provide input image data. A display apparatus is configured to display an image based on the input image data and includes subpixel regions. A power supply is configured to supply power to the display apparatus. The display apparatus includes a display layer including light emitting elements disposed in the subpixel regions, and a sensor layer including a conductive pattern layer including a first conductive pattern layer and a second conductive pattern layer disposed on different layers from each other. The sensor layer includes an overlapping region in which the first conductive pattern layer and the second conductive pattern layer overlap each other, a non-overlapping region in which either one of the first conductive pattern layer and the second conductive pattern layer but not both are disposed therein, and a cutting region in which the first conductive pattern layer and / or the second conductive pattern layer are cut. The conductive pattern layer includes a non-overlapping identification pattern portion disposed in the non-overlapping region and an overlapping identification pattern portion disposed in the overlapping region. BRIEF DESCRIPTION OF DRAWINGS

[0035] A more complete understanding of the present disclosure and the many attendant aspects thereof will be readily understood by reference to the following detailed description when considered in connection with the drawings.

[0036] Figure 1 FIG. 1 is a diagram illustrating a display apparatus according to an embodiment.

[0037] Figure 2 FIG. 2 is a schematic cross-sectional view illustrating a stack structure of a display apparatus according to an embodiment.

[0038] Figure 3 FIG. 3 is a schematic cross-sectional view illustrating a display layer according to an embodiment.

[0039] Figure 4 FIG. 4 is a schematic cross-sectional view illustrating a sensor layer according to an embodiment.

[0040] Figure 5is a schematic block diagram illustrating a region of a sensor layer according to an embodiment.

[0041] Figure 6 and Figure 7 are each a schematic plan view illustrating a sensing electrode according to an embodiment.

[0042] Figure 8 is a schematic cross-sectional view illustrating a sensor layer according to an embodiment.

[0043] Figure 9 is a schematic cross-sectional view illustrating a display device according to an embodiment.

[0044] Figures 10 to 12 is a schematic plan view illustrating a display device including a dot-type overlap identification pattern portion.

[0045] Figure 13 is a schematic cross-sectional view taken along line C-C’ of Figure 10 .

[0046] Figures 14 to 16 is a schematic plan view illustrating a display device including a line-type overlap identification pattern portion.

[0047] Figure 17 is a schematic cross-sectional view taken along line D-D’ of Figure 14 and Figure 15 .

[0048] Figure 18 is a schematic plan view illustrating a display device including a first line-type overlap identification pattern portion.

[0049] Figure 19 is a schematic block diagram illustrating an electronic device including a display device according to an embodiment.

[0050] Figure 20 is a schematic diagram illustrating an example in which the electronic device of Figure 19 is implemented as a smart phone.

[0051] Figure 21 is a schematic diagram illustrating an example in which the electronic device of Figure 19 is implemented as a tablet computer. DETAILED DESCRIPTION

[0052] Since the present disclosure allows various changes and numerous embodiments, specific embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not necessarily intended to limit the present disclosure to a specific mode of practice, and it should be understood that all changes, equivalents, and substitutes not departing from the spirit and technical scope of the present disclosure are encompassed in the present disclosure.

[0053] It will be understood that, although the terms "first", "second", etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. For example, a first element discussed below could be termed a second element without departing from the teachings of the present disclosure. Similarly, a second element could be termed a first element. In the present disclosure, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0054] It will be further understood that the terms "comprises" and / or "comprising", "includes" and / or "including" when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components and / or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. In addition, in the case where a first portion is disposed on a second portion, such as a layer, film, region or plate, the first portion can be directly on the second portion, but a third portion can also be interposed therebetween. In addition, when it is expressed that a first portion, such as a layer, film, region or plate, is formed on a second portion, a surface of the second portion on which the first portion is formed is not necessarily limited to an upper surface of the second portion, but can include other surfaces such as a side surface or a lower surface of the second portion. Conversely, in the case where a first portion, such as a layer, film, region or plate, is under a second portion, the first portion can be directly under the second portion, but a third portion can also be interposed therebetween.

[0055] Various embodiments of the present disclosure relate to a display device and an electronic device including the same. Hereinafter, the display device and the electronic device including the same according to embodiments will be described with reference to the accompanying drawings.

[0056] Figure 1 FIG. 1 is a diagram illustrating a display device DD according to an embodiment. Figure 2 FIG. 2 is a schematic cross-sectional view illustrating a stacked structure of the display device DD according to an embodiment.

[0057] Referring to Figure 1 and Figure 2 The display device DD can be configured to provide (e.g., emit) light. The display device DD can include a panel PNL and a driving circuit part DV configured to drive the panel PNL. The display device DD can include an upper layer UL.

[0058] The panel PNL can include a display layer DP configured to display an image and a sensor layer TSP configured to sense a user input (e.g., a touch input of a user's finger and / or a stylus pen).

[0059] The display layer DP can be referred to as a display panel. The sensor layer TSP can be referred to as a sensing panel.

[0060] The panel PNL can include a sub-pixel SPX and a sensing electrode SP. In an embodiment, the sub-pixel SPX can display an image in units of each display frame period. The sensing electrode SP can sense an input (e.g., a touch input) from a user in units of each sensing frame period. The sensing frame period and the display frame period can be independent of each other, or can be different from each other. The sensing frame period and the display frame period can be synchronized with each other, or can be asynchronous.

[0061] The sensor layer TSP can acquire information about a touch input from a user. The sensing electrode SP can include a first sensing electrode SP1 configured to provide a first sensing signal and a second sensing electrode SP2 configured to provide a second sensing signal. In an embodiment (e.g., an embodiment using a mutual capacitance scheme), the first sensing electrode SP1 can be a transmitter (Tx) pattern electrode, and the second sensing electrode SP2 can be a receiver (Rx) pattern electrode. The information about a touch input (or a touch event) can refer to information including a position of a touch provided from a user, etc. However, the present disclosure is not necessarily limited to the above. For example, in an embodiment (e.g., an embodiment using a self-capacitance scheme), the sensing electrode SP can be configured by one type of sensing electrode without distinguishing the first sensing electrode SP1 and the second sensing electrode SP2.

[0062] The driving circuit part DV can include a display driver DDV (D-IC) configured to drive the display layer DP and a sensor driver SDV (T-IC) configured to drive the sensor layer TSP.

[0063] The display layer DP can include a display base layer DBSL and sub-pixels SPX provided on the display base layer DBSL. The sub-pixels SPX can be disposed in a display area DA.

[0064] The display base layer DBSL (or the display device DD) can include a display area DA displaying an image and a non-display area NDA which is an area other than the display area DA. In an embodiment, the display area DA can be disposed in a central portion of the display layer DP, and the non-display area NDA can be disposed adjacent to a periphery of the display area DA. However, the present disclosure is not necessarily limited to the above example.

[0065] The display base layer DBSL can be a base substrate or a base part for supporting the display device DD. The display base layer DBSL can be a rigid substrate made of glass. The display base layer DBSL can be formed of a silicon substrate. The display base layer DBSL can be a flexible substrate capable of being bent, folded, rolled, etc. to a significant degree without cracking or otherwise being damaged. In this case, the display base layer DBSL can include an insulating material such as a polymer resin, for example, polyimide. However, the present disclosure is not necessarily limited to the specific example.

[0066] Scan lines SL, data lines DL, and subpixels SPX electrically connected to the scan lines SL and the data lines DL may be provided in the display area DA. The subpixels SPX may be selected by a scan signal, each of which has an on-level and is supplied from the scan lines SL. The subpixels SPX may be supplied with a data signal from the data lines DL and may emit light having a brightness corresponding to the data signal. Thus, an image corresponding to the data signal may be displayed in the display area DA.

[0067] Various lines and / or internal circuit components connected to the sub-pixels SPX in the display area DA may be provided in the non-display area NDA. For example, a plurality of lines for supplying various power voltages and control signals to the display area DA may be provided in the non-display area NDA.

[0068] The display layer DP can output visual information (e.g., images). In an embodiment, the display layer DP may include an organic light-emitting diode or a light-emitting diode containing an inorganic material. However, the present disclosure is not necessarily limited to a specific example. Hereinafter, for ease of description, the following will be based on an embodiment in which the display layer DP includes an organic light-emitting diode.

[0069] The sensor layer TSP may include a sensor base layer SBSL and a sensing electrode SP formed on the sensor base layer SBSL. The sensing electrode SP may be disposed on the sensor base layer SBSL in the sensing area SA.

[0070] The sensor base layer SBSL (or the display device DD) may include a sensing area SA capable of sensing touch input, etc., and a non-sensing area NSA formed around the periphery of the sensing area SA. In an embodiment, the sensing area SA may overlap with at least a portion of the display area DA. For example, the sensing area SA may be an area corresponding to the display area DA (e.g., an area overlapping the display area DA). The non-sensing area NSA may be an area corresponding to the non-display area NDA (e.g., an area overlapping the non-display area NDA). In this case, when a touch input, etc. is provided on the display area DA, the touch input can be detected by the sensor layer TSP.

[0071] The sensor base layer SBSL may include one or more insulating layers (eg, a first insulating layer INS1 (refer to FIG. Figure 4 )). For example, the first insulating layer INS1 provided to form the sensor base layer SBSL may be provided on the display layer DP, thereby forming a base on which the sensing electrode SP may be formed. For example, the sensor base layer SBSL may be provided (eg, directly provided) on the encapsulation layer TFE (refer to FIG. Figure 3For example, after the display layer DP is manufactured, the sensor layer TSP can be formed by sequentially forming layers for forming the sensor layer TSP on the encapsulation layer TFE formed throughout the display layer DP. In this case, process convenience can be improved.

[0072] The sensing area SA can be an area (i.e., an active area of the sensor) that is capable of responding to a touch input. The sensor layer TSP can acquire information about an input provided from a user. The sensor layer TSP can recognize a touch input. The sensor layer TSP can recognize a touch input using a capacitive sensing scheme. The sensor layer TSP can sense a touch input in a mutual capacitance scheme, or can sense a touch input in a self-capacitance scheme.

[0073] In an embodiment, each of the first sensing electrodes SP1 can extend in the first direction DR1. The first sensing electrodes SP1 can be arranged in the second direction DR2. In an embodiment, each of the second sensing electrodes SP2 can extend in the second direction DR2. The second sensing electrodes SP2 can be arranged in the first direction DR1. The second direction DR2 can be different from the first direction DR1. For example, the second direction DR2 can be a direction perpendicular to the first direction DR1.

[0074] In the non-sensing area NSA of the sensor layer TSP, a sensing line can electrically connect the sensing electrode SP with the sensor driver SDV, etc.

[0075] The drive circuit component DV can include a display driver DDV configured to drive the display layer DP and a sensor driver SDV configured to drive the sensor layer TSP.

[0076] The display driver DDV can be electrically connected to the display layer DP and configured to drive the sub-pixel SPX. The sensor driver SDV can be electrically connected to the sensor layer TSP and configured to drive the sensor layer TSP.

[0077] An upper layer UL can be disposed on the sensor layer TSP. Light provided from the display layer DP can be output to the outside through the upper layer UL.

[0078] A display layer DP according to an embodiment will be described with reference to Figure 3 A display layer DP according to an embodiment will be described with reference to Figure 3 is a schematic cross-sectional view illustrating a display layer DP according to an embodiment.

[0079] Referring to Figure 3 , the display layer DP can include a pixel circuit layer PCL and a light emitting element layer LEL.

[0080] The pixel circuit layer PCL can include a pixel circuit PXC configured to drive the light emitting element LD. The pixel circuit layer PCL can include a display base substrate layer DBSL, conductive layers provided to form the pixel circuit PXC, and insulating layers disposed between the conductive layers.

[0081] The pixel circuit PXC can include a pixel element (e.g., a driving transistor). The pixel circuit PXC can be electrically connected to the light emitting element LD, and can provide an electrical signal to allow the light emitting element LD to emit light.

[0082] The light emitting element layer LEL can be disposed on the pixel circuit layer PCL. In an embodiment, the light emitting element layer LEL can include the light emitting element LD, a pixel defining layer PDL, and a encapsulation layer TFE.

[0083] The light emitting element LD can be disposed on the pixel circuit layer PCL. In an embodiment, the light emitting element LD can include a first electrode ELT1, an emission structure EL, and a second electrode ELT2. In an embodiment, the emission structure EL can be disposed in an area defined by the pixel defining layer PDL. The pixel defining layer PDL can be adjacent to a periphery of the emission structure EL. One surface of the emission structure EL can be electrically connected to the first electrode ELT1. Another surface of the emission structure EL can be electrically connected to the second electrode ELT2.

[0084] The first electrode ELT1 can be an anode electrode for the emission structure EL. The second electrode ELT2 can be a common electrode (or a cathode electrode) for the emission structure EL. In an embodiment, the first electrode ELT1 and the second electrode ELT2 can include a conductive material. For example, the first electrode ELT1 can include a conductive material that also reflects light. The second electrode ELT2 can include a transparent conductive material. However, the present disclosure is not necessarily limited to the above examples.

[0085] The emission structure EL can include a plurality of layers. For example, the emission structure EL can include a plurality of emission structures each including a hole transport part, an emission layer (or a light generating layer), and an electron transport part. Each of the plurality of layers forming the emission structure can include an organic material, and in an embodiment, can further include an inorganic material such as a compound including a metal or a quantum dot.

[0086] The hole transport part can include a multi-layer structure having a plurality of layers each including a material different from each other. For example, the hole transport part can include a hole injection layer and a hole transport layer, and in an embodiment, can further include an auxiliary emission layer and an electron blocking layer, etc.

[0087] The emission layer may include a material capable of emitting light of a specific color. The emission layer may include a host and a dopant. The host of the emission layer may be an emitting material capable of capturing carriers (electrons and holes) to generate light, thereby inducing efficient exciton generation. The dopant may include a phosphorescent dopant or a fluorescent dopant. In an embodiment, the examples of dopants are not specifically limited to the examples already described herein. In an embodiment, the dopant may include an organic material, and may include a metal complex, etc.

[0088] The electron transport component may include a multilayer structure having a plurality of layers including different materials. The electron transport component may include an electron injection layer and an electron transport layer, and in an embodiment, may further include an electron buffer layer and a hole blocking layer.

[0089] The emission structure EL may form a sub-pixel SPX. The emission structure EL may form a sub-pixel region SPXA configured to emit light of a single color. In a plan view, the region of the emission structure EL and the sub-pixel region SPXA may correspond to each other. For example, each emission structure EL may correspond to an associated sub-pixel region SPXA.

[0090] The pixel defining layer (PDL) may be disposed on the pixel circuit layer (PCL) and may define a location where the emission structure (EL) is disposed. The pixel defining layer (PDL) may include an organic material or an inorganic material. For example, the pixel defining layer (PDL) may include multiple layers, each including an inorganic material. However, the present disclosure is not necessarily limited to the above examples.

[0091] The encapsulation layer TFE may be provided on the light emitting element LD (e.g., the second electrode ELT2). The encapsulation layer TFE may offset the step difference formed by the light emitting element LD and the pixel defining layer PDL. The encapsulation layer TFE may include a plurality of insulating layers configured to cover the light emitting element LD. In an embodiment, the encapsulation layer TFE may include an inorganic layer and an organic layer. For example, the encapsulation layer TFE may have a structure in which a first inorganic layer, an organic layer, and a second inorganic layer are arranged sequentially. However, the present disclosure is not necessarily limited to the above examples. In an embodiment, the encapsulation layer TFE may be formed of a thin film encapsulation layer.

[0092] Will refer to Figures 4 to 8 A sensor layer TSP according to an embodiment is described.

[0093] Figure 4 is a schematic cross-sectional view illustrating a sensor layer TSP according to an embodiment. Figure 5 is a schematic block diagram illustrating a region of a sensor layer TSP according to an embodiment. Figure 6 and Figure 7 1 and 2 are schematic plan views each illustrating a sensing electrode SP according to an embodiment. Figure 6 and Figure 7Each illustrates a schematic plan structure of a region in which the first and second sensing electrodes SP1 and SP2 are adjacent to each other. Figure 6 and Figure 7 Each illustrates a plan structure of the first and second sensing electrodes SP1 and SP2 each having a specific shape according to an embodiment. Figure 8 is a schematic cross-sectional view illustrating a sensor layer TSP according to an embodiment. Figure 8 illustrates a schematic cross-sectional structure taken along a line A-A’ of Figure 6 and a cross-sectional structure taken along a line B-B’ of Figure 6 .

[0094] Referring to Figures 4 to 8 , the sensor layer TSP can be disposed (e.g., directly disposed) on the encapsulation layer TFE. The sensor layer TSP can include a first insulating layer INS1, a first conductive pattern layer CP1, a second insulating layer INS2, a second conductive pattern layer CP2, and a passivation layer PVX.

[0095] In an embodiment, the first and second conductive pattern layers CP1 and CP2 can be disposed on different layers. In a plan view, the first and second conductive pattern layers CP1 and CP2 can partially overlap each other.

[0096] A plane defined in the present specification can extend in the first and second directions DR1 and DR2, and can be defined based on a plane on which the display base layer DBSL (refer to Figure 1 ) is disposed. In an embodiment, the third direction DR3 can correspond to a thickness direction of the display base layer DBSL. The third direction DR3 can correspond to a light output direction of the display device DD (refer to Figure 1 ).

[0097] In an embodiment, the first and second conductive pattern layers CP1 and CP2 can be patterned in a region to form the sensing electrodes SP. For example, at least a portion of each of the first and second conductive pattern layers CP1 and CP2 or the second conductive pattern layer CP2 can form the first sensing electrode SP1. At least a portion of each of the first and second conductive pattern layers CP1 and CP2 or the second conductive pattern layer CP2 can form the second sensing electrode SP2.

[0098] The first insulating layer INS1 can be disposed (e.g., directly disposed) on the encapsulation layer TFE. The first insulating layer INS1 can form a sensor base layer SBSL, and thus provide a region in which the first conductive pattern layer CP1, the second insulating layer INS2, the second conductive pattern layer CP2, and the passivation layer PVX are disposed.

[0099] The first conductive pattern layer CP1 can be disposed on the first insulating layer INS1. The second conductive pattern layer CP2 can be disposed on the second insulating layer INS2. The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be spaced apart from each other with the second insulating layer INS2 interposed therebetween.

[0100] Each of the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can include a single metal layer or a plurality of metal layers. Each of the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can include gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or platinum (Pt), etc., or an alloy thereof. In an embodiment, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can include silver nanowires (AgNW), indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), aluminum zinc oxide (AZO), indium tin zinc oxide (ITZO), zinc oxide (ZnO), tin oxide (SnO2), carbon nanotubes, and / or graphene.

[0101] The second insulating layer INS2 can be disposed on the first conductive pattern layer CP1. The second insulating layer INS2 can be interposed between the first conductive pattern layer CP1 and the second conductive pattern layer CP2. The passivation layer PVX can be disposed on the second conductive pattern layer CP2.

[0102] The first insulating layer INS1 can include one or more of an inorganic material and an organic material. The second insulating layer INS2 can include one or more of an inorganic material and an organic material. In an embodiment, the passivation layer PVX can include an organic material. The inorganic material can include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and / or aluminum oxide (AlO x ). The organic material can include an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and / or a polyimide resin. However, the present disclosure is not necessarily limited to the above examples.

[0103] In an embodiment, the sensor layer TSP can include a non-overlapping area NOA, a cut area CA, and an overlapping area OA.

[0104] The non-overlapping area NOA can be an area in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 do not overlap each other, and can include an area in which the first conductive pattern layer CP1 is disposed and an area in which the second conductive pattern layer CP2 is disposed. For example, the non-overlapping area NOA can include an area in which the first conductive pattern layer CP1 is disposed without the second conductive pattern layer CP2 and an area in which the second conductive pattern layer CP2 is disposed without the first conductive pattern layer CP1. In a plan view, the non-overlapping area NOA can not overlap the sub-pixel area SPXA (see Figure 3 ).

[0105] The cut area CA can be an area formed by cutting either one of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. For example, the cut area CA can be an area formed by cutting at least a portion of the second conductive pattern layer CP2 to electrically separate the first sensing electrode SP1 and the second sensing electrode SP2 from each other. For example, the first sensing electrode SP1 and the second sensing electrode SP2 can be adjacent to each other with the cut area CA interposed therebetween, and can be physically spaced apart from each other. In a plan view, the cut area CA can not overlap the sub-pixel area SPXA.

[0106] In a plan view, the overlapping area OA can be an area in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 overlap each other. In an embodiment, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be disposed not to overlap the sub-pixel area SPXA in a plan view. The first conductive pattern layer CP1 and the second conductive pattern layer CP2 can partially overlap each other, thereby defining the overlapping area OA. In a plan view, the overlapping area OA can not overlap the sub-pixel area SPXA.

[0107] Accordingly, the sensor layer TSP can include areas explicitly defined based on the structure of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. Experimentally, the amount of reflection of external light applied from the outside of the display device DD can vary in the non-overlapping area NOA, the cut area CA, and the overlapping area OA. In this case, there can be a risk of a reduction in visibility due to external light.

[0108] However, according to an embodiment, the identification pattern portions NIP and OIP (see Figure 10 ) can compensate for the difference in the structure of the first conductive pattern layer CP1 and the second conductive pattern layer CP2 between the non-overlapping area NOA, the cut area CA, and the overlapping area OA of the sensor layer TSP. Accordingly, it is possible to reduce the risk of deterioration in visibility due to reflection of external light, thereby providing a display device DD having improved display quality. Reference will be made to Figure 10Details of identifying the patterned portion NIP and the OIP are described with subsequent figures.

[0109] The sensing electrode SP can include cells C and bridges BRD. The cells C can have a relatively large surface area. The bridges BRD can have a relatively small surface area. The cells C adjacent to each other can be electrically connected to each other by the bridges BRD. The cells C can include first cells C1 and second cells C2. The bridges BRD can include first bridges BRD1 and second bridges BRD2.

[0110] In an embodiment, the first cells C1 and the second cells C2 can be formed by the second conductive pattern layer CP2. The first bridges BRD1 can be formed by the second conductive pattern layer CP2. A portion of the second bridges BRD2 can be formed by the first conductive pattern layer CP1. Another portion of the second bridges BRD2 can be formed by the second conductive pattern layer CP2. However, the disclosure is not necessarily limited to the above example. For example, the first cells C1 and the second cells C2 can be formed by the first conductive pattern layer CP1. The first bridges BRD1 can be formed by the first conductive pattern layer CP1. A portion of the second bridges BRD2 can be formed by the second conductive pattern layer CP2. Another portion of the second bridges BRD2 can be formed by the first conductive pattern layer CP1.

[0111] In an embodiment, the sensing electrode SP can form a mesh structure. The cells C and the bridges BRD can form the mesh structure. For example, the second conductive pattern layer CP2 for forming the sensing electrode SP can be patterned according to the mesh structure.

[0112] The first sensing electrode SP1 can have a structure in which the first cells C1 each having a relatively large surface area and the first bridges BRD1 having a relatively small surface area are connected to each other. For example, the first cells C1 can include a 1-1 cell C1-1 and a 1-2 cell C1-2. The first bridges BRD1 can electrically connect the 1-1 cell C1-1 and the 1-2 cell C1-2 to each other.

[0113] The second sensing electrode SP2 can have a structure in which the second cells C2 each having a relatively large surface area and the second bridges BRD2 having a relatively small surface area are connected to each other. For example, the second cells C2 can include a 2-1 cell C2-1 and a 2-2 cell C2-2. The second bridges BRD2 can electrically connect the 2-1 cell C2-1 and the 2-2 cell C2-2 to each other.

[0114] In an embodiment, the second bridge BRD2 can be electrically connected to the 2-1st unit C2-1 through a contactor CNT, and can be electrically connected to the 2-2nd unit C2-2 through another contactor CNT. Accordingly, the second bridge BRD2, whose layers are disposed on different layers from the second unit C2, can electrically connect the 2-1st unit C2-1 and the 2-2nd unit C2-2 to each other through the contactors CNT. In an embodiment, the contactors CNT can pass through the second insulating layer INS2.

[0115] The first unit C1 and the second unit C2 can each have a rhombus shape overall (refer to Figure 6 ). However, the shape of each of the first unit C1 and the second unit C2 is not necessarily specifically limited to the above-described shape. For example, each of the first unit C1 and the second unit C2 can have a rectangular shape overall (refer to Figure 7 ).

[0116] According to an embodiment, a cut region CA can be defined between the sensing electrodes SP that are electrically spaced apart from each other. For example, the first sensing electrode SP1 and the second sensing electrode SP2 can be adjacent to each other, with the cut region CA interposed therebetween. The cut region CA can be defined in a region between the first sensing electrode SP1 and the second sensing electrode SP2. For example, the cut region CA can be disposed (or formed or defined) between the 1-1st unit C1-1 and the 1-2nd unit C1-2 and the 2-1st unit C2-1 and the 2-2nd unit C2-2. The cut region CA can be disposed (or formed or defined) between the first bridge BRD1 and the 2-1st unit C2-1 and the 2-2nd unit C2-2.

[0117] Hereinafter, a cross-sectional structure of a display device DD according to an embodiment will be described with reference to Figure 9 .

[0118] Figure 9 is a schematic cross-sectional view illustrating a display device DD according to an embodiment.

[0119] With reference to Figure 9 , the emission structure EL can include a first emission structure EL1 included in the first sub-pixel SPX1, a second emission structure EL2 included in the second sub-pixel SPX2, and a third emission structure EL3 included in the third sub-pixel SPX3. The first emission structure EL1 can emit light of a first color (e.g., red), and can form a first sub-pixel region SPXA1. The second emission structure EL2 can emit light of a second color (e.g., green), and can form a second sub-pixel region SPXA2. The third emission structure EL3 can emit light of a third color (e.g., blue), and can form a third sub-pixel region SPXA3.

[0120] In the sensor layer TSP, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be disposed on different layers, thereby forming a structure of the sensing electrode SP.

[0121] An upper layer UL can be disposed on the sensor layer TSP. The upper layer UL can transmit at least a portion of light provided from the emission structure EL. In an embodiment, the upper layer UL can include a light blocking layer LBL, color filters CF1 to CF3, and an overcoat layer OC. However, the structure of the upper layer UL is not necessarily limited to the above-described example.

[0122] In a plan view, the light blocking layer LBL can overlap the first conductive pattern layer CP1 and the second conductive pattern layer CP2. The light blocking layer LBL can include a light blocking material such as a material that can reflect or absorb light. Alternatively, in an embodiment, the light blocking layer LBL can be formed by overlapping the first to third color filters CF1 to CF3.

[0123] The color filters CF1 to CF3 can include a first color filter CF1 disposed in the first sub-pixel area SPXA1, a second color filter CF2 disposed in the second sub-pixel area SPXA2, and a third color filter CF3 disposed in the third sub-pixel area SPXA3.

[0124] The first color filter CF1 can be disposed in the first sub-pixel area SPXA1. The first color filter CF1 can include a color filter material (e.g., a pigment or a dye) for selectively allowing light of a first color (e.g., red) to pass therethrough.

[0125] The second color filter CF2 can be disposed in the second sub-pixel area SPXA2. The second color filter CF2 can include a color filter material (e.g., a pigment or a dye) for selectively allowing light of a second color (e.g., green) to pass therethrough.

[0126] The third color filter CF3 can be disposed in the third sub-pixel area SPXA3. The third color filter CF3 can include a color filter material (e.g., a pigment or a dye) for selectively allowing light of a third color (e.g., blue) to pass therethrough.

[0127] The overcoat layer OC can be disposed on the color filters CF1 to CF3. The overcoat layer OC can include various materials suitable for protecting the layers disposed thereunder from foreign substances. For example, the overcoat layer OC can include an inorganic insulating layer and / or an organic insulating layer. For example, the overcoat layer OC can include an epoxy resin, but embodiments are not necessarily limited thereto.

[0128] In an embodiment, the size (or surface area) of the sub-pixel regions SPXA can be different from each other. The surface area of the first sub-pixel region SPXA1, the second sub-pixel region SPXA2, and the third sub-pixel region SPXA3 can be different from each other. For example, the surface area of the third sub-pixel region SPXA3 can be larger than the surface area of the second sub-pixel region SPXA2. The surface area of the second sub-pixel region SPXA2 can be larger than the surface area of the first sub-pixel region SPXA1. In an embodiment, the surface area of some sub-pixel regions SPXA can be different from the surface area of other sub-pixel regions SPXA, so that the emission efficiency deviation between the sub-pixels SPX due to color can be compensated for.

[0129] The cross-sectional structure of the display device DD is not necessarily limited to the above-described example. For example, according to an embodiment, the display device DD can further include a color conversion layer including quantum dots capable of converting the color of light applied thereto. The color conversion layer can be disposed on the light emitting element LD (see FIG. 1A). The position of the color conversion layer is not necessarily limited specifically to what is described herein. Figure 3

[0130] A display device DD including identification pattern portions NIP and OIP will be described with reference to Figures 10 to 18 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively.

[0131] Figures 10 to 18 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figures 10 to 12 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 13 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 10 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figures 14 to 16 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 17 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 14 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 15 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively. Figure 18 FIGS. 1A to 1C are schematic plan views illustrating a display device DD including identification pattern portions NIP and OIP according to an embodiment. FIGS. 2A to 2C are schematic cross-sectional views taken along line C-C’ of FIGS. 1A to 1C, respectively.

[0132] According to an embodiment, the sub-pixels SPX can be arranged in various structures. Hereinafter, an embodiment in which the sub-pixels SPX are arranged according to an S stripe structure will be described. In the following description, the positional relationship of the sub-pixels SPX1, SPX2, and SPX3 can correspond to the positional relationship of the sub-pixel regions SPXA1, SPXA2, and SPXA3 and / or the emission structures EL1, EL2, and EL3.

[0133] ​The first sub-pixel SPX1 and the second sub-pixel SPX2 can form a first pixel column COL1. The first sub-pixel SPX1 and the second sub-pixel SPX2 can be sequentially arranged in the first direction DR1. The first sub-pixel SPX1 and the second sub-pixel SPX2 can be alternately arranged in the first direction DR1. The first sub-pixel SPX1 and the second sub-pixel SPX2 can be arranged in the first pixel column COL1, and the third sub-pixel SPX3 is not arranged in the first pixel column COL1.

[0134] The third sub-pixel SPX3 can form a second pixel column COL2. The third sub-pixel SPX3 can be sequentially arranged in the first direction DR1. The third sub-pixel SPX3 can be arranged in the second pixel column COL2, and the first sub-pixel SPX1 and the second sub-pixel SPX2 are not arranged in the second pixel column COL2.

[0135] The first pixel column COL1 and the second pixel column COL2 can be adjacent to each other in the second direction DR2. For example, the first sub-pixel SPX1 can be adjacent to the third sub-pixel SPX3 in the second direction DR2. The second sub-pixel SPX2 can be adjacent to the third sub-pixel SPX3 in the second direction DR2.

[0136] The first pixel column COL1 and the second pixel column COL2 can be alternately arranged in the second direction DR2. For example, each second pixel column COL2 can be arranged between two first pixel columns COL1. Each first pixel column COL1 can be arranged between two second pixel columns COL2.

[0137] The first sub-pixel SPX1 and the second sub-pixel SPX2 adjacent to each other in the first direction DR1 and the third sub-pixel SPX3 adjacent to the first sub-pixel SPX1 and the second sub-pixel SPX2 in the second direction DR2 can form a pixel PXL (or a pixel unit).

[0138] In an embodiment, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can be arranged in a peripheral portion of the sub-pixel area SPXA. For example, the second conductive pattern layer CP2 can be arranged around the sub-pixel SPX (or the sub-pixel area SPXA). In a plan view, the second conductive pattern layer CP2 can surround at least a portion of the sub-pixel area SPXA.

[0139] As described above, identifying the pattern portions NIP and OIP can compensate for the difference in the structure of the first conductive pattern layer CP1 and the second conductive pattern layer CP2 between the non-overlapping area NOA, the cutting area CA, and the overlapping area OA of the sensor layer TSP.

[0140] According to an embodiment, the cutting area CA can include a plurality of cutting areas CA. According to an embodiment, the non-overlapping identification pattern portion NIP can include a plurality of non-overlapping identification pattern portions NIP. The plurality of non-overlapping identification pattern portions NIP can correspond to positions of the plurality of cutting areas CA.

[0141] For example, the plurality of non-overlapping identification pattern portions NIP can overlap the plurality of cutting areas CA in the first direction DR1. The plurality of non-overlapping identification pattern portions NIP can be disposed at respective positions offset from positions where the plurality of cutting areas CA are disposed in the first direction DR1 (see FIG. 10A, for example). For example, the plurality of cutting areas CA can be arranged in a matrix structure based on the first direction DR1 and the second direction DR2. The plurality of non-overlapping identification pattern portions NIP can be arranged based on positions to which the matrix structure is offset in the first direction DR1. Figure 12 For example, the plurality of non-overlapping identification pattern portions NIP can overlap the plurality of cutting areas CA in the first direction DR1. The plurality of non-overlapping identification pattern portions NIP can be disposed at respective positions offset from positions where the plurality of cutting areas CA are disposed in the first direction DR1 (see FIG. 10A, for example). For example, the plurality of cutting areas CA can be arranged in a matrix structure based on the first direction DR1 and the second direction DR2. The plurality of non-overlapping identification pattern portions NIP can be arranged based on positions to which the matrix structure is offset in the first direction DR1.

[0142] In an embodiment, the cutting area CA and the non-overlapping identification pattern portion NIP can be adjacent to each other in the first direction DR1, with any one of the sub-pixels SPXA interposed therebetween. Each of the cutting area CA and the non-overlapping identification pattern portion NIP can be disposed between the first sub-pixel area SPXA1 and the second sub-pixel area SPXA2 based on the first direction DR1. The cutting area CA and the non-overlapping identification pattern portion NIP can be adjacent to each other, with the first sub-pixel area SPXA1 or the second sub-pixel area SPXA2 interposed therebetween.

[0143] In this case, even when the cutting area CA separates the first sensing electrode SP1 and the second sensing electrode SP2 from each other, the non-overlapping identification pattern portion NIP can compensate for a difference in reflection of external light, thereby mitigating the risk of reduced visibility.

[0144] In an embodiment, the non-overlapping identification pattern portion NIP can include a bump structure. For example, the non-overlapping identification pattern portion NIP can include a portion protruding in a planar direction in some areas of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. In this case, the non-overlapping identification pattern portion NIP can have a shape extending in two or more directions. As described above, even when the cutting area CA separates the first sensing electrode SP1 and the second sensing electrode SP2 from each other, the non-overlapping identification pattern portion NIP can change a reflection pattern of external light and compensate for a difference in reflection of external light. For example, in a plan view, the non-overlapping identification pattern portion NIP can have a circular shape or an elliptical shape. However, the present disclosure is not necessarily limited to the above-described examples.

[0145] In an embodiment, the non-overlapping identification pattern portion NIP can be formed of at least one of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. For example, the non-overlapping identification pattern portion NIP can include a first non-overlapping identification pattern portion NIP1 formed of the first conductive pattern layer CP1 and a second non-overlapping identification pattern portion NIP2 formed of the second conductive pattern layer CP2.

[0146] In an embodiment, the overlapping area OA can include a point-type overlapping area OA_P and a line-type overlapping area OA_L.

[0147] In some areas of the sensing area SA (refer to FIG. 1A), the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can extend in the same direction, and areas in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 overlap each other can extend in a linear shape. Accordingly, areas in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 extend in parallel to each other and overlap each other can be defined as the line-type overlapping area OA_L. Figure 1

[0148] In some areas of the sensing area SA, the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can extend in different directions, and the first conductive pattern layer CP1 and the second conductive pattern layer CP2 can cross each other. Accordingly, areas in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 cross each other can be defined as the point-type overlapping area OA_P.

[0149] Referring to FIG. 1A, Figures 10 to 18 , the display device DD (refer to FIG. 1A) can include an overlapping identification pattern portion OIP formed in the overlapping area OA to improve the visibility of the display device DD. In an embodiment, the overlapping identification pattern portion OIP can not overlap the cutting area CA in the first direction DR1 or the second direction DR2. For example, the overlapping identification pattern portion OIP can not overlap the cutting area CA in the first direction DR1. Figure 1 In an embodiment, the reflection of external light in the overlapping area OA can be different from the reflection of external light in the non-overlapping area NOA and the cutting area CA. In an embodiment, the overlapping identification pattern portion OIP can be formed in the overlapping area OA to compensate for the difference in the reflection of external light between the areas.

[0150] Depending on the shape of the overlapping area OA, the overlapping identification pattern portion OIP can have different shapes. Hereinafter, an embodiment including the overlapping identification pattern portion OIP having a different structure for each area of the overlapping area OA will be described.

[0151]

[0152] Figures 10 to 13 ​​An embodiment is illustrated in which the display device DD includes non-overlapping identification pattern portions NIP corresponding to the cutting area CA and further includes a point-type overlapping identification pattern portion OIP_P formed in a point-type overlapping area OA_P.

[0153] In an embodiment, the overlapping identification pattern portion OIP can include a point-type overlapping identification pattern portion OIP_P. The point-type overlapping identification pattern portion OIP_P can be referred to as a first overlapping identification pattern portion.

[0154] The point-type overlapping identification pattern portion OIP_P can be disposed in a point-type overlapping area OA_P. The point-type overlapping identification pattern portion OIP_P can be formed in an area in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 extending in different directions cross each other.

[0155] The point-type overlapping identification pattern portion OIP_P can not overlap with the sub-pixel area SPXA in the first direction DR1. The point-type overlapping identification pattern portion OIP_P can not overlap with the sub-pixel area SPXA in the second direction DR2.

[0156] The point-type overlapping identification pattern portion OIP_P can include a plurality of point-type overlapping identification pattern portions OIP_P. The number of the point-type overlapping identification pattern portions OIP_P formed around the sub-pixel area SPXA is not necessarily limited to what is described herein. In an embodiment, the plurality of point-type overlapping identification pattern portions OIP_P can be sequentially arranged in the second direction DR2.

[0157] The point-type overlapping identification pattern portion OIP_P can overlap with a non-overlapping identification pattern portion NIP (e.g., a first non-overlapping identification pattern portion NIP1) in the second direction DR2 (refer to Figure 12 and can not overlap with non-overlapping identification pattern portions NIP (e.g., the first non-overlapping identification pattern portion NIP1 and the second non-overlapping identification pattern portion NIP2) in the first direction DR1. In an embodiment, the point-type overlapping identification pattern portion OIP_P can not overlap with a portion (e.g., the second non-overlapping identification pattern portion NIP2) of the non-overlapping identification pattern portion NIP in the second direction DR2.

[0158] The point-type overlapping identification pattern portion OIP_P can have a relatively small surface area. For example, the point-type overlapping identification pattern portion OIP_P can have a smaller surface area than a surface area of the non-overlapping identification pattern portion NIP. For example, the point-type overlapping identification pattern portion OIP_P can include a protrusion PRU having a smaller surface area than a surface area of the non-overlapping identification pattern portion NIP. The protrusion PRU can be formed around the point-type overlapping area OA_P, and can be formed by either one of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. For example, in an embodiment, the protrusion PRU can be formed by the second conductive pattern layer CP2.

[0159] In an embodiment, the point-type overlapping identification pattern portion OIP_P can have a structure protruding in two or more directions from the point-type overlapping area OA_P. For example, the protrusion PRU can include a plurality of protrusions PRU. The plurality of protrusions PRU can extend in two or more different directions from the point-type overlapping area OA_P. In an embodiment, the above-described different directions can be different from the first direction DR1 and the second direction DR2.

[0160] For example (with reference to FIG. 4A), Figure 10 The plurality of protrusions PRU can respectively extend in four directions, whereby the point-type overlapping identification pattern portion OIP_P can have an approximately "X" shape. For example, the plurality of protrusions PRU can include first to fourth protrusions. In the point-type overlapping area OA_P, the first protrusion can extend in an upper right direction, the second protrusion can extend in a lower right direction, the third protrusion can extend in a lower left direction, and the fourth protrusion can extend in an upper left direction.

[0161] For example (with reference to FIG. 4A), Figure 11 The plurality of protrusions PRU can respectively extend in two directions. Accordingly, the point-type overlapping identification pattern portion OIP_P can have at least an approximately diagonal bar shape such as a diagonal line shape (e.g., a " / " shape) and / or at least an approximately backslash shape such as a back diagonal line shape (e.g., a shape in which the left and right of the " / " are reversed). For example, the plurality of protrusions PRU can include first and second protrusions, and in the point-type overlapping area OA_P, the first protrusion can extend in an upper right direction and the second protrusion can extend in a lower left direction. Alternatively, the plurality of protrusions PRU can include first and second protrusions, and in the point-type overlapping area OA_P, the first protrusion can extend in an upper left direction and the second protrusion can extend in a lower right direction. In an embodiment, the point-type overlapping identification pattern portion OIP_P of the diagonal bar shape (e.g., a first point-type overlapping identification pattern portion) and the point-type overlapping identification pattern portion OIP_P of the backslash shape (e.g., a second point-type overlapping identification pattern portion) can be alternately arranged in a certain direction (e.g., the second direction DR2).

[0162] Experimentally, in a case where the first conductive pattern layer CP1 and the second conductive pattern layer CP2 overlap in the point-type overlapping area OA_P, reflected light from external light applied in the point-type overlapping area OA_P can have a relatively low light amount, and there can be a risk of perceiving the reflected light in the form of a point.

[0163] In an embodiment, the point-type overlapping identification pattern portion OIP_P can include a protrusion PRU extending in two or more directions. Accordingly, the protrusion PRU can disperse reflected light generated from the point-type overlapping area OA_P. For example, the protrusion PRU can disperse a reflection angle of the reflected light generated in the point-type overlapping area OA_P. In this case, the intensity of the reflected light having a relatively low light amount can be reduced, so that the risk of perceiving reflection of external light in the point-type overlapping area OA_P can be reduced.

[0164] Figures 14 to 17 An embodiment in which the display device DD includes a non-overlapping identification pattern portion NIP corresponding to the cut area CA and further includes a line-type overlapping identification pattern portion OIP_L formed in a line-type overlapping area OA_L is illustrated.

[0165] In an embodiment, the overlapping identification pattern portion OIP can include a line-type overlapping identification pattern portion OIP_L. The line-type overlapping identification pattern portion OIP_L can be referred to as a second overlapping identification pattern portion.

[0166] The line-type overlapping identification pattern portion OIP_L can be disposed in a line-type overlapping area OA_L. The line-type overlapping identification pattern portion OIP_L can be formed in an area in which the first conductive pattern layer CP1 and the second conductive pattern layer CP2 extending in the same direction overlap each other.

[0167] The line-type overlapping identification pattern portion OIP_L can not overlap the sub-pixel area SPXA in the first direction DR1. The line-type overlapping identification pattern portion OIP_L can overlap the sub-pixel area SPXA in the second direction DR2.

[0168] The line-type overlapping identification pattern portion OIP_L can include a plurality of line-type overlapping identification pattern portions OIP_L. The number of the line-type overlapping identification pattern portions OIP_L formed around the sub-pixel area SPXA is not necessarily specifically limited to what is described herein. In an embodiment, the plurality of line-type overlapping identification pattern portions OIP_L can be sequentially arranged in the first direction DR1. In an embodiment, the plurality of line-type overlapping identification pattern portions OIP_L can be spaced apart from each other at the same interval. However, the disclosure is not necessarily limited to the above-described example.

[0169] The line-type overlapping identification pattern portion OIP_L can be partially overlapped with the non-overlapping identification pattern portion NIP (e.g., the first non-overlapping identification pattern portion NIP1 and the second non-overlapping identification pattern portion NIP2) or the cut region CA in the second direction DR2. However, the disclosure is not necessarily limited to the above-described example. The line-type overlapping identification pattern portion OIP_L can not be overlapped with the non-overlapping identification pattern portion NIP (e.g., the first non-overlapping identification pattern portion NIP1 and the second non-overlapping identification pattern portion NIP2) or the cut region CA in the second direction DR2.

[0170] In an embodiment (with reference to FIG. 1A), Figure 14 ), the line-type overlapping identification pattern portion OIP_L can include a protruding structure in a similar manner to the non-overlapping identification pattern portion NIP. For example, the line-type overlapping identification pattern portion OIP_L can include a portion protruding in a planar direction in some regions of the first conductive pattern layer CP1 and the second conductive pattern layer CP2. In this case, the line-type overlapping identification pattern portion OIP_L can have a shape extending in two or more directions. Accordingly, even when reflection of external light occurs in the line-type overlapping region OA_L, the line-type overlapping identification pattern portion OIP_L can change a reflection pattern of the external light and compensate for a difference in reflection of the external light. For example, in a plan view, the line-type overlapping identification pattern portion OIP_L can have a circular shape or an elliptical shape. However, the disclosure is not necessarily limited to the above-described example. In an embodiment, a size of the line-type overlapping identification pattern portion OIP_L can be greater than a size of the non-overlapping identification pattern portion NIP.

[0171] Alternatively, in an embodiment (with reference to FIG. 1A), Figure 15 ), the line-type overlapping identification pattern portion OIP_L can include a protruding structure similar to the protruding structure of the above-described dot-type overlapping identification pattern portion OIP_P. For example, the line-type overlapping identification pattern portion OIP_L can have a protrusion PRU protruding in two or more directions in the line-type overlapping region OA_L. In the line-type overlapping region OA_L, the protrusion PRU can extend in two or more different directions. In an embodiment, the above-described different directions can be different from the first direction DR1 and the second direction DR2. For example, the line-type overlapping identification pattern portion OIP_L can approximately have a diagonal shape (e.g., a “ / ” shape) and / or a backslash shape (e.g., a shape in which the left and right of “ / ” are reversed). In an embodiment, the line-type overlapping identification pattern portion OIP_L of the diagonal shape (e.g., a first line-type overlapping identification pattern portion) and the line-type overlapping identification pattern portion OIP_L of the backslash shape (e.g., a second line-type overlapping identification pattern portion) can be alternately disposed in a certain direction (e.g., the first direction DR1). However, the disclosure is not necessarily limited to the above-described example. For example, the line-type overlapping identification pattern portion OIP_L can have an approximate “X” shape.

[0172] Experimentally, in a case where the first conductive pattern layer CP1 and the second conductive pattern layer CP2 overlap in the linear overlapping area OA_L, the reflected light from the externally applied light in the linear overlapping area OA_L can have a relatively high light amount.

[0173] In an embodiment, in the linear overlapping area OA_L, the linear overlapping identification pattern portion OIP_L can be sequentially disposed along the overlapping area. Thus, the amount of the reflected light generated from the linear overlapping area OA_L can be reduced, thereby reducing the risk of perceiving the reflection of the external light in the linear overlapping area OA_L. Further, in an embodiment, since the size of the linear overlapping identification pattern portion OIP_L can be greater than the size of the non-overlapping identification pattern portion NIP, the amount of the light generated in the linear overlapping area OA_L can be further reduced.

[0174] Figure 18 FIG. 13 is a schematic view illustrating an embodiment in which the display device DD includes the non-overlapping identification pattern portion NIP corresponding to the cut area CA and includes both the point-type overlapping identification pattern portion OIP_P and the linear overlapping identification pattern portion OIP_L.

[0175] For example, the point-type overlapping identification pattern portion OIP_P can be formed in the point-type overlapping area OA_P of the overlapping area OA. The linear overlapping identification pattern portion OIP_L can be formed in the linear overlapping area OA_L of the overlapping area OA. In the present embodiment, the point-type overlapping identification pattern portion OIP_P can have the structure described above with reference to FIG. 10. Figures 10 to 13 The linear overlapping identification pattern portion OIP_L can have the structure described above with reference to FIG. 11. In an embodiment, the linear overlapping identification pattern portion OIP_L and the point-type overlapping identification pattern portion OIP_P can have different shapes. Figures 14 to 17

[0176] In the present embodiment, the reflection patterns of all external light corresponding to different types of overlapping areas OA can be compensated for. Thus, a display device DD having further increased visibility can be provided.

[0177] Hereinafter, an electronic device 1000 including a display device DD according to an embodiment will be described.

[0178] Figure 19 is a schematic block diagram illustrating an electronic device 1000 including a display device according to an embodiment. Figure 20 is a schematic view illustrating an example in which the electronic device 1000 of Figure 19 is implemented as a smart phone. Figure 21 is a schematic view illustrating an example in which the electronic device 1000 of Figure 19 is implemented as a tablet computer.​

[0179] Reference Figures 19 to 21 , the electronic device 1000 can include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. The display device 1060 can be a display device DD of Figure 1 . The electronic device 1000 can further include various ports for communication with a video card, a sound card, a memory card, a USB device, or other systems. In an embodiment, as illustrated in Figure 20 , the electronic device 1000 can be implemented as a smart phone. In an embodiment, as illustrated in Figure 21 , the electronic device 1000 can be implemented as a tablet computer. However, the above examples are illustrative, and the electronic device 1000 is not necessarily limited to the above examples. For example, the electronic device 1000 can be implemented as a cellular phone, a video phone, a smart pad, a smart watch, a navigation device of a vehicle, a computer monitor, a laptop computer, a head-mounted display device, or the like.

[0180] The processor 1010 can perform a specific computation or task. In an embodiment, the processor 1010 can be a microprocessor, a central processing unit, or an application processor, etc. The processor 1010 can be connected to other components through an address bus, a control bus, and a data bus, etc. In an embodiment, the processor 1010 can be connected to an expansion bus such as a peripheral component interconnect (PCI) bus. In an embodiment, the processor 1010 can provide input image data to the display device 1060. Accordingly, the display device 1060 can display an image based on the input image data provided from the processor 1010.

[0181] The memory device 1020 can store data required to perform an operation of the electronic device 1000. For example, the memory device 1020 can include a non-volatile memory device such as an erasable programmable read-only memory (EPROM) device, an electrically erasable programmable read-only memory (EEPROM) device, a flash memory device, a phase change random access memory (PRAM) device, a resistive random access memory (RRAM) device, a nano floating gate memory (NFGM) device, a polymer random access memory (PoRAM) device, a magnetic random access memory (MRAM) device, and a ferroelectric random access memory (FRAM) device, and / or a volatile memory device such as a dynamic random access memory (DRAM) device, a static random access memory (SRAM) device, and a mobile DRAM device, etc.

[0182] The storage device 1030 can include a solid state drive (SSD), a hard disk drive (HDD), or a CD-ROM, etc.

[0183] The I / O device 1040 can include input devices such as a keyboard, a keypad, a touchpad, a touch screen, and a mouse, and output devices such as a speaker and a printer. In an embodiment, the display device 1060 can be included in the I / O device 1040.

[0184] The power supply 1050 can supply power required for performing an operation of the electronic device 1000. For example, the power supply 1050 can be a power management integrated circuit (PMIC). In an embodiment, the power supply 1050 can supply power to the display device 1060.

[0185] The display device 1060 can display an image corresponding to visual information of the electronic device 1000. The display device 1060 can be connected to other components through a bus or other communication links.

[0186] Various embodiments of the present disclosure can provide a display device having increased visibility and an electronic device including the same.

[0187] While various exemplary embodiments have been described above, it will be understood that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the present disclosure.

Claims

1. A display device comprising: a plurality of sub-pixel areas; a display layer including light emitting elements disposed in the sub-pixel areas and an encapsulation layer disposed on the light emitting elements; and a sensor layer including a sensor base layer and a conductive pattern layer disposed on the sensor base layer, the conductive pattern layer including a first conductive pattern layer and a second conductive pattern layer disposed on different layers from each other, wherein the sensor base layer is disposed on the encapsulation layer, wherein the sensor layer includes an overlapping area in which the first conductive pattern layer and the second conductive pattern layer overlap each other, a non-overlapping area in which either one of the first conductive pattern layer and the second conductive pattern layer is disposed but not both, and a cut area in which the first conductive pattern layer and / or the second conductive pattern layer is cut, and wherein the conductive pattern layer includes a non-overlapping identification pattern portion disposed in the non-overlapping area and an overlapping identification pattern portion disposed in the overlapping area. The non-overlapping identification pattern portion includes a protruding structure and corresponds to a position of the cut area.

2. The display device according to claim 1, wherein The cut area includes a plurality of cut areas arranged in a matrix structure, and 3. The display device according to claim 2, wherein wherein the non-overlapping identification pattern portion includes a plurality of non-overlapping identification pattern portions arranged to correspond to the matrix structure based on a position to which the matrix structure is shifted in a direction. The non-overlapping identification pattern portion has a shape extending in two or more directions.

4. The display device according to claim 1, wherein The non-overlapping identification pattern portion includes a first non-overlapping identification pattern portion formed by the first conductive pattern layer and a second non-overlapping identification pattern portion formed by the second conductive pattern layer.

5. The display device according to claim 1, wherein The overlapping area includes a dot-type overlapping area, 6. The display device according to claim 1, wherein wherein the overlapping identification pattern portion includes a dot-type overlapping identification pattern portion formed in the dot-type overlapping area, and wherein the dot-type overlapping area is an area in which at least respective portions of the first conductive pattern layer and the second conductive pattern layer extend in different directions from each other and cross each other. The dot-type overlapping identification pattern portion does not overlap the sub-pixel area in a first direction and does not overlap the sub-pixel area in a second direction different from the first direction.

7. The display device of claim 6, wherein, The dot-type overlapping identification pattern portion includes a plurality of dot-type overlapping identification pattern portions arranged sequentially in the second direction.

8. The display device of claim 7, wherein, The dot-type overlapping identification pattern portion does not overlap the non-overlapping identification pattern portion in the first direction and overlaps the non-overlapping identification pattern portion in the second direction.

9. The display device of claim 8, wherein, A size of the dot-type overlapping identification pattern portion is smaller than a size of the non-overlapping identification pattern portion.

10. The display device according to claim 6, wherein The dot-type overlapping identification pattern portion includes protrusions extending in different respective directions.

11. The display device of claim 10, wherein, The dot-type overlapping identification pattern portion has an "X" shape.

12. The display device of claim 11, wherein, The dot-type overlapping identification pattern portion has a forward slash shape or a back slash shape.

13. The display device of claim 11, wherein, The dot-type overlapping identification pattern portion includes a first dot-type overlapping identification pattern portion having the forward slash shape and a second dot-type overlapping identification pattern portion having the back slash shape, and 14. The display device of claim 13, wherein, ​ The first point-type overlap identification pattern portion and the second point-type overlap identification pattern portion are alternately arranged in a certain direction.

15. The display device of claim 11, wherein, The protrusion is formed of the second conductive pattern layer.

16. The display device of claim 1, wherein, The overlap region includes a line-type overlap region, The overlap identification pattern portion includes a line-type overlap identification pattern portion formed in the line-type overlap region, and The line-type overlap region is a region in which at least the respective portions of the first conductive pattern layer and the second conductive pattern layer extend in the same direction and overlap each other.

17. The display device of claim 16, wherein, The line-type overlap identification pattern portion does not overlap the sub-pixel region in a first direction, and overlaps the sub-pixel region in a second direction different from the first direction.

18. The display device of claim 17, wherein, The line-type overlap identification pattern portion includes a plurality of line-type overlap identification pattern portions sequentially arranged in the first direction and spaced apart from each other at regular intervals.

19. The display device of claim 16, wherein, The line-type overlap identification pattern portion has a size greater than a size of the non-overlap identification pattern portion.

20. The display device of claim 16, wherein, The line-type overlap identification pattern portion has a shape extending in two or more directions.

21. The display device of claim 16, wherein, The line-type overlap identification pattern portion has a slash shape or a backslash shape.

22. The display device of claim 21, wherein, The line-type overlap identification pattern portion includes a first line-type overlap identification pattern portion having the slash shape and a second line-type overlap identification pattern portion having the backslash shape, and The first line-type overlap identification pattern portion and the second line-type overlap identification pattern portion are alternately arranged in a certain direction.

23. The display device of claim 1, wherein, The overlap region includes a point-type overlap region and a line-type overlap region, The overlap identification pattern portion includes a point-type overlap identification pattern portion formed in the point-type overlap region and a line-type overlap identification pattern portion formed in the line-type overlap region, and The point-type overlap identification pattern portion and the line-type overlap identification pattern portion have different shapes.

24. The display device of claim 1, wherein, The conductive pattern layer forms a first sensing electrode and a second sensing electrode, and The first sensing electrode and the second sensing electrode are physically spaced apart from each other, and the cut region is interposed between the first sensing electrode and the second sensing electrode.

25. A display device according to any one of claims 1 to 24, wherein, The sensor base layer is directly disposed on the encapsulation layer.

26. The display device of claim 1, wherein, The sub-pixel region includes a first sub-pixel region providing light of a first color, a second sub-pixel region providing light of a second color, and a third sub-pixel region providing light of a third color, The first sub-pixel region and the second sub-pixel region are adjacent to each other in a first direction, and the third sub-pixel region is adjacent to the first sub-pixel region and the second sub-pixel region in a second direction different from the first direction, and The third sub-pixel region has a larger surface area than a surface area of the first sub-pixel region or a surface area of the second sub-pixel region.

27. A display device, comprising: sub-pixels forming sub-pixel regions each providing light of a certain color; and sensing electrodes disposed on different layers from each other, formed of a first conductive pattern layer and a second conductive pattern layer not overlapping the sub-pixel regions, and including a mesh structure formed of the second conductive pattern layer, wherein at least a portion of the second conductive pattern layer is cut in a cutting area, wherein the first conductive pattern layer and the second conductive pattern layer include a non-overlapping identification pattern portion formed in an area in which the first conductive pattern layer and the second conductive pattern layer do not overlap each other and an overlapping identification pattern portion formed in an area in which the first conductive pattern layer and the second conductive pattern layer overlap each other, wherein the cutting area is arranged in a matrix structure based on a first direction and a second direction different from the first direction, wherein the non-overlapping identification pattern portion is disposed adjacent to the cutting area and corresponds to the matrix structure, and wherein the overlapping identification pattern portion does not overlap the cutting area in the first direction or the second direction. 28.An electronic device comprising: a processor configured to provide input image data; a display device configured to display an image based on the input image data, the display device including a sub-pixel area; and a power supply configured to supply power to the display device, wherein the display device includes a display layer including a light emitting element disposed in the sub-pixel area and a sensor layer including a conductive pattern layer including a first conductive pattern layer and a second conductive pattern layer disposed on different layers from each other, wherein the sensor layer includes an overlapping area in which the first conductive pattern layer and the second conductive pattern layer overlap each other, a non-overlapping area in which either one of the first conductive pattern layer and the second conductive pattern layer is disposed without both, and a cutting area in which the first conductive pattern layer and / or the second conductive pattern layer is cut, and wherein the conductive pattern layer includes a non-overlapping identification pattern portion disposed in the non-overlapping area and an overlapping identification pattern portion disposed in the overlapping area.

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