Data format conversion method and device, equipment and storage medium

Abstract

The invention discloses a data format conversion method and device, equipment and a storage medium, and relates to the technical field of data conversion, and the method comprises the steps: reading initial image data from a memory, and storing the initial image data into a first static random access memory; the first target format is a format for arranging the image data according to a sequence of channel grouping group, height, width and channel number; extracting target image data from the initial image data in the first static random access memory; determining channel data of each image channel of the initial image based on the target image data, and storing the channel data in a second static random access memory; storing the channel data in the second static random access memory into a memory to obtain a target image; the target image is an image in a second target format, and the second target format is a CHW image format in which the image data is arranged according to a sequence of channel number, height and width. According to the invention, the image data format conversion efficiency can be improved.

Description

Technical Field

[0001] This invention relates to the field of data conversion technology, and in particular to a data format conversion method, apparatus, device, and storage medium. Background Technology

[0002] In recent years, Convolutional Neural Networks (CNNs) have become a core technology supporting fields such as computer vision and speech processing due to their powerful feature learning and pattern recognition capabilities. With the deepening application of deep learning, model size and computational complexity are growing exponentially, making the demand for computational efficiency increasingly urgent. To meet real-time requirements, dedicated hardware accelerators are widely used in the deployment and operation of CNNs. These hardware accelerators, through parallel computing architectures and optimized memory access modes, can efficiently handle core operations such as convolution and pooling, significantly improving the execution speed of CNNs. However, there are significant differences in data formats between hardware accelerators and software systems. Hardware accelerators typically use specific storage formats to adapt to parallel computing logic. The output of hardware accelerators needs to be converted before it can be effectively utilized.

[0003] Existing conversion methods mostly rely on software implementation, that is, the CPU calls memory operations to complete the format reconstruction. However, this process has obvious drawbacks: on the one hand, the switching between hardware operation and software conversion will generate additional time consumption and break the continuity of the processing flow; on the other hand, when the software accesses memory point by point to perform format reconstruction, it will lead to a surge in memory accesses and low efficiency.

[0004] In conclusion, improving the efficiency of image data format conversion is a pressing technical problem that needs to be solved. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a data format conversion method, apparatus, device, and storage medium that can improve the efficiency of image data format conversion. The specific solution is as follows:

[0006] Firstly, this application provides a data format conversion method, including:

[0007] Based on the memory address corresponding to the initial image, the corresponding initial image data is read from memory and stored in the first static random access memory; the initial image is an image of the first target format obtained after processing by the convolutional neural network hardware accelerator, and the first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels;

[0008] Extract the target image data from the initial image data in the first static random access memory;

[0009] Based on the target image data, determine the channel data corresponding to each image channel of the initial image, and store the channel data in the second static random access memory;

[0010] The channel data in the second static random access memory is stored in the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which image data are arranged in the order of channel number, height, and width.

[0011] Optionally, before reading the corresponding initial image data from memory based on the memory address corresponding to the initial image, the method further includes:

[0012] Determine the number of data readout arrays for the convolutional neural network hardware accelerator;

[0013] The number of image channels corresponding to the initial image is determined, and the channels of the initial image are grouped based on the quotient of the number of image channels and the number of data readout arrays to obtain the corresponding grouping results;

[0014] Accordingly, reading the corresponding initial image data from memory based on the memory address corresponding to the initial image includes:

[0015] The initial image data is read from the memory based on the grouping result and the memory address corresponding to the initial image.

[0016] Optionally, after extracting the target image data from the initial image data in the first static random access memory, the method further includes:

[0017] The target image data is stored in a preset register array;

[0018] Accordingly, after determining the channel data corresponding to each image channel of the initial image based on the target image data, the method further includes:

[0019] The channel data is read sequentially from the preset register array so that the channel data is stored in the second static random access memory.

[0020] Optionally, storing the target image data in a preset register array includes:

[0021] Based on the number of data read arrays, determine each group of data to be written from the target image data;

[0022] The data to be written in each group is stored in the corresponding register in the preset register array.

[0023] Optionally, determining the channel data corresponding to each image channel of the initial image includes:

[0024] The first data in each register of the preset register array is taken as the current data to be read;

[0025] Read the current data to be read from each of the registers and concatenate the current data to be read to obtain the channel data, so as to store the channel data in the second static random access memory;

[0026] The next data to be read from each of the registers is taken as the current data to be read, and the process jumps to the step of reading the current data to be read from each of the registers until the data in the preset register array is read.

[0027] Optionally, storing the channel data in a second static random access memory includes:

[0028] Determine the data storage address corresponding to each image channel in the second static random access memory;

[0029] The channel data corresponding to each image channel is stored in the second static random access memory according to the data storage address.

[0030] Optionally, storing the channel data in the second static random access memory into the main memory includes:

[0031] Determine the width and height of the initial image, and determine the pixels of the initial image in one image channel based on the product of the width and the height;

[0032] If the channel data stored at the data storage address corresponding to the same image channel in the second static random access memory is the image data corresponding to each pixel, then the channel data corresponding to the same image channel is sequentially stored in the memory.

[0033] Secondly, this application provides a data format conversion apparatus, comprising:

[0034] An initial image data reading module is used to read the corresponding initial image data from memory based on the memory address corresponding to the initial image, and store the initial image data in a first static random access memory; the initial image is an image of a first target format obtained after processing by a convolutional neural network hardware accelerator, and the first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels;

[0035] The target image data extraction module is used to extract target image data from the initial image data in the first static random access memory.

[0036] The channel data determination module is used to determine the channel data corresponding to each image channel of the initial image based on the target image data, and store the channel data in a second static random access memory;

[0037] The target image determination module is used to store the channel data in the second static random access memory into the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which image data are arranged in the order of channel number, height, and width.

[0038] Thirdly, this application provides an electronic device, comprising:

[0039] Memory, used to store computer programs;

[0040] A processor is used to execute the computer program to implement the aforementioned data format conversion method.

[0041] Fourthly, this application provides a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned data format conversion method.

[0042] In this application, firstly, the corresponding initial image data is read from memory based on the memory address corresponding to the initial image, and the initial image data is stored in a first static random access memory (SRAM). The initial image is an image in a first target format obtained after processing by a convolutional neural network hardware accelerator. The first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. Then, target image data is extracted from the initial image data in the first SRAM. Subsequently, based on the target image data, the channel data corresponding to each image channel of the initial image is determined, and the channel data is stored in a second SRAM. Finally, the channel data in the second SRAM is stored in the memory to obtain the target image corresponding to the initial image. The target image is an image in a second target format, which is a CHW image format in which image data is arranged in the order of number of channels, height, and width. As can be seen from the above, the initial image is an image generated after processing by a convolutional neural network hardware accelerator, with image data arranged in the order of channel grouping, height, width, and number of channels. In order to convert the initial image in the first target format into the second target format, i.e., the target image in CHW image format,... This application first reads the initial image data from memory based on the memory address corresponding to the initial image in memory, and stores the read initial image data in a first static random access memory (SRAM). Then, it extracts the target image data from the first SRAM, determines the channel data corresponding to each image channel of the initial image based on the extracted target image data, and stores the channel data in a second SRAM. Finally, it writes the channel data from the second SRAM back to memory, thus obtaining a target image with image data arranged in the order of channel number, height, and width. In this way, this application transforms the originally inefficient and non-continuous format conversion process into an efficient and continuous process, reducing the time consumption and memory access overhead of image data format conversion, thereby improving the efficiency of image data format conversion. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0044] Figure 1 A flowchart of a data format conversion method provided in this application;

[0045] Figure 2 A specific initial image schematic diagram provided for this application;

[0046] Figure 3 This application provides a specific initial image layout diagram;

[0047] Figure 4 A specific CHW image format illustration provided for this application;

[0048] Figure 5 This application provides a specific schematic diagram of image layout in CHW image format;

[0049] Figure 6 A system architecture diagram of a specific data format conversion scheme provided in this application;

[0050] Figure 7 A schematic diagram of a specific preset register array provided in this application;

[0051] Figure 8 This application provides a specific schematic diagram of data storage in SRAM2;

[0052] Figure 9 This application provides a specific schematic diagram of data storage in SRAM2;

[0053] Figure 10 This application provides a specific schematic diagram of data storage in SRAM2;

[0054] Figure 11 This application provides a specific schematic diagram of data storage in SRAM2;

[0055] Figure 12 A flowchart of a specific data format conversion method provided in this application;

[0056] Figure 13 A schematic diagram of a data format conversion device provided in this application;

[0057] Figure 14 This application provides a structural diagram of an electronic device. Detailed Implementation

[0058] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0059] With the deepening application of deep learning, model size and computational complexity are growing exponentially, making the demand for computational efficiency increasingly urgent. To meet real-time requirements, dedicated hardware accelerators are widely used in the deployment and operation of CNNs. These hardware accelerators, through parallel computing architectures and optimized memory access modes, can efficiently handle core operations such as convolution and pooling, significantly improving the execution speed of CNNs. However, there are significant differences in data formats between hardware accelerators and software systems. Hardware accelerators typically use specific storage formats to adapt to parallel computing logic. The output of hardware accelerators needs to be converted before it can be effectively utilized. Existing conversion methods mostly rely on software implementation, that is, the CPU calls memory operations to complete the format reorganization. However, this process has obvious drawbacks: on the one hand, the switching between hardware operation and software conversion will generate additional time consumption, breaking the continuity of the processing flow; on the other hand, when the software accesses memory point by point for format reorganization, it will lead to a surge in memory accesses, resulting in low efficiency. To this end, this application provides a data format conversion scheme that can improve the efficiency of image data format conversion.

[0060] See Figure 1 As shown, this embodiment of the invention discloses a data format conversion method, which may include:

[0061] Step S11: Read the corresponding initial image data from memory based on the memory address corresponding to the initial image, and store the initial image data in the first static random access memory; the initial image is an image of the first target format obtained after processing by the convolutional neural network hardware accelerator, and the first target format is a format in which image data is arranged in the order of channel grouping, height, width and number of channels.

[0062] In this embodiment, an RGB image is used as an example for explanation. The first target format output by the convolutional neural network hardware accelerator is a preset GHWSA format, which is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. See the initial image output by the convolutional neural network hardware accelerator. Figure 2As shown, the image height is 6 and the image width is 8. Before reading the corresponding initial image data from memory based on the memory address corresponding to the initial image, the process may further include: first, determining the number of data readout arrays of the convolutional neural network hardware accelerator; then, determining the number of image channels corresponding to the initial image, and grouping the channels of the initial image based on the quotient of the number of image channels and the number of data readout arrays to obtain the corresponding grouping results. Specifically, SA represents the number of data readout arrays used by the convolutional neural network hardware accelerator during operation, and the SA direction is the channel direction of the image. The convolutional neural network hardware accelerator needs to divide all channels of the image in units of SA to perform operations. Each SA number of channels is called a GROUP. Next, taking SA as 16 and image channels as 32 as an example, the image data format conversion process will be explained. For the initial image, when SA is 16, the 32 channels of the initial image are grouped to obtain two groups.

[0063] It should be noted that the default arrangement of the initial GHWSA format image in memory is as follows: Figure 3 As shown, each memory address stores the image data of SA channels corresponding to the pixel, and the image data of the entire group is stored sequentially in the width-height direction. Then, the image data of the next group is stored in memory, for a total of 48 pixels and 32 channels. Here, 1-1 represents the image data of the 2nd pixel in the 2nd channel, and 2-16 represents the image data of the 2nd pixel in the 16th channel.

[0064] It should be noted that an image with a height of 6, a width of 8, and 32 channels, in CHW (Channels, Height, Width, i.e., number of channels, height, and width) format, such as... Figure 4 As shown, the storage result in memory is as follows Figure 5 As shown, the image data of the first channel of all pixels is first stored in memory sequentially, followed by the image data of the second channel of all pixels, the third channel of all pixels, and so on, until the image data of the 32nd channel of all pixels is stored in memory.

[0065] In this way, see Figure 6 As shown, after receiving the conversion start command, the address control module can read the initial image data from memory based on the grouping result of the initial image and the memory address corresponding to the initial image, and store the initial image data in the first static random access memory, namely SRAM1 (Static Random-Access Memory).

[0066] Step S12: Extract target image data from the initial image data in the first static random access memory.

[0067] In this embodiment, to improve data conversion efficiency, a register array can be used to rearrange the data. The format conversion module can extract a certain amount of target image data from the initial image data in the first static random access memory based on the image height and image width of the initial image, and temporarily store it in a preset register array. It should be noted that storing the target image data in the preset register array can include: firstly, determining each group of data to be written from the target image data based on the number of data read arrays; then storing each group of data to be written into the corresponding registers in the preset register array. In one specific embodiment, the number of data read arrays is 16, then the number of registers in the preset register array is the same as the number of data read arrays, that is, there are 16 registers in the preset register array. It can be seen that the groups of data to be written are: 1-1, 1-2...1-16, 2-1, 2-2...2-16, 3-1, 3-2...3-16, ..., 16-1, 16-2...16-16. Figure 7 As shown, each group of data to be written can be written to the corresponding register in the preset register array.

[0068] Step S13: Determine the channel data corresponding to each image channel of the initial image based on the target image data, and store the channel data in the second static random access memory.

[0069] In this embodiment, channel data can be sequentially read from a preset register array to store the channel data in a second static random access memory (SRAM2). Further, determining the channel data corresponding to each image channel of the initial image includes: first, taking the first data of each register in the preset register array as the current data to be read; then reading the current data to be read from each register and concatenating them to obtain the channel data, so as to store the channel data in the second SRAM; then taking the next data of the current data to be read from each register as the current data to be read, and jumping to the step of reading the current data to be read from each register, until the data in the preset register array is read completely. Specifically, first, the first segment of data from each register in the preset register array is taken, concatenated to obtain the first output, and written into SRAM2. See [link to previous section]. Figure 8As shown, at this point, the first address in SRAM2 stores the channel data of the first channel of pixels 1-16. Then, the next segment of data from each register in the preset register array is retrieved, concatenated to form the next output, and written into SRAM2, until all data in the preset register array has been read.

[0070] It should be noted that the above-mentioned storage of channel data in the second static random access memory may include: firstly, determining the data storage address corresponding to each image channel in the second static random access memory; then, storing the channel data corresponding to each image channel in the second static random access memory according to the data storage address. It is understood that, in order to ensure continuous data output, address switching is required when storing channel data in the second static random access memory. See also... Figure 9 As shown, address 4 in SRAM2 stores channel data for the second channel of pixels 1-16. Address 2 needs to be reserved for channel data for the first channel of pixels 17-32, and address 3 needs to be reserved for channel data for the first channel of pixels 33-48. See also... Figure 10 As shown, the data 1-1,1-2...1-16, 2-1,2-2...2-16, 3-1,3-2...3-16, ..., 16-1,16-2...16-16 in each register of the preset register array are stored in SRAM2. That is, the channel data of the 1st to 16th channels of the 1st to 16th pixels are stored at addresses 1, 4, 7...46 in SRAM2.

[0071] Step S14: The channel data in the second static random access memory is stored in the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which the image data is arranged in the order of channel number, height, and width.

[0072] In this embodiment, the process of storing the channel data in the second static random access memory (SRAM) into the main memory can include: first, determining the width and height of the initial image, and then determining the pixels of the initial image in one image channel based on the product of the width and the height; if the channel data stored at the data storage address corresponding to the same image channel in the second SRAM is the image data corresponding to each pixel, then the channel data corresponding to the same image channel is sequentially stored into the main memory. Specifically, it is determined whether SRAM2 has been filled with a sufficient amount of data according to a certain pattern for writing back to main memory. See also... Figure 11As shown, in SRAM2, when the data storage address corresponding to the same image channel stores the image data corresponding to each pixel, that is, the data storage address corresponding to the first channel stores channel data 1-1, 2-1...16-1, the data storage address corresponding to the first channel stores channel data 17-1, 18-1...32-1, the data storage address corresponding to the first channel stores channel data 33-1, 34-1...48-1, and so on. The data storage address corresponding to the 16th channel stores channel data 1-16, 2-16...16-16, the data storage address corresponding to the 16th channel stores channel data 17-16, 18-16...32-16, and the data storage address corresponding to the 16th channel stores channel data 33-16, 34-16...48-16. Then, the channel data corresponding to the same channel can be written back to memory in sequence. At this time, all addresses store continuous data, resulting in high write-back efficiency. In this way, the initial image in memory, which is in the preset GHWSA format (i.e., the image data is arranged in the order of channel group, height, width, and number of channels), can be converted into the target image format, which is the image data is arranged in the order of number of channels, height, and width.

[0073] As can be seen from the above, in this embodiment, the corresponding initial image data is first read from memory based on the memory address corresponding to the initial image, and the initial image data is stored in the first static random access memory. The initial image is an image in a first target format obtained after processing by a convolutional neural network hardware accelerator. The first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. Then, target image data is extracted from the initial image data in the first static random access memory. Subsequently, based on the target image data, the channel data corresponding to each image channel of the initial image is determined, and the channel data is stored in the second static random access memory. Finally, the channel data in the second static random access memory is stored in the memory to obtain the target image corresponding to the initial image. The target image is an image in a second target format, which is a CHW image format in which image data is arranged in the order of number of channels, height, and width. As can be seen from the above, the initial image is an image generated after processing by a convolutional neural network hardware accelerator, in which image data is arranged in the order of channel grouping, height, width, and number of channels. In order to convert the initial image in the first target format into the second target format, i.e., the target image in the CHW image format,... In this embodiment, the initial image data is first read from memory based on its memory address and stored in a first static random access memory (SRAM). Then, the target image data is extracted from the first SRAM. Based on the extracted target image data, the channel data corresponding to each image channel of the initial image is determined and stored in a second SRAM. Finally, the channel data in the second SRAM is written back to memory, thus obtaining a target image with image data arranged in the order of channel number, height, and width. In this way, this embodiment transforms the originally inefficient and non-continuous format conversion process into an efficient and continuous one, reducing the time consumption and memory access overhead of image data format conversion, thereby improving the efficiency of image data format conversion.

[0074] In one specific implementation, see Figure 12 As shown, the specific process of the data format conversion method can be as follows:

[0075] S0: Starts upon receiving the conversion start command;

[0076] S1: The address control module controls the address according to a certain rule to read data from memory;

[0077] S2: The read data is stored sequentially into SRAM1;

[0078] S3: The format conversion module retrieves a certain amount of data from SRAM1 based on the image height and image width of the image to be converted, and temporarily stores it in the register array;

[0079] S4: Take the first segment of data from each register in the register array, concatenate them to form the first output, and write it to SRAM2;

[0080] S5: Fetch the next segment of data from each register in the register array, concatenate them to form the next output, and write it to SRAM2. At this point, a jump is required to write the address.

[0081] S6: Determine whether all the data in the register array has been written to SRAM2. If all data has been written, jump to S7; otherwise, jump to S5.

[0082] S7: Has SRAM2 been filled with enough data according to the rules for writing back to memory? If so, jump to S8; otherwise, jump to S3 and continue to retrieve data from SRAM1 and perform the conversion.

[0083] S8: Write the data in SRAM2 back to memory in sequence;

[0084] S9: Has all the data in memory been converted? If yes, jump to S10; otherwise, jump to S1 and continue reading data from memory and storing it in SRAM1.

[0085] S10: Conversion complete, end.

[0086] Accordingly, see Figure 13 As shown in the embodiments of this application, a data format conversion device is also provided, which may include:

[0087] The initial image data reading module 11 is used to read the corresponding initial image data from memory based on the memory address corresponding to the initial image, and store the initial image data in the first static random access memory; the initial image is an image of a first target format obtained after processing by a convolutional neural network hardware accelerator, and the first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels;

[0088] The target image data extraction module 12 is used to extract target image data from the initial image data in the first static random access memory;

[0089] The channel data determination module 13 is used to determine the channel data corresponding to each image channel of the initial image based on the target image data, and store the channel data in the second static random access memory;

[0090] The target image determination module 14 is used to store the channel data in the second static random access memory into the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which image data are arranged in the order of channel number, height, and width.

[0091] As can be seen from the above, in this application, the corresponding initial image data is first read from memory based on the memory address corresponding to the initial image, and the initial image data is stored in a first static random access memory (SRAM). The initial image is an image in a first target format obtained after processing by a convolutional neural network hardware accelerator. The first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. Then, target image data is extracted from the initial image data in the first SRAM. Subsequently, based on the target image data, the channel data corresponding to each image channel of the initial image is determined, and the channel data is stored in a second SRAM. Finally, the channel data in the second SRAM is stored in the memory to obtain the target image corresponding to the initial image. The target image is an image in a second target format, which is a CHW image format in which image data is arranged in the order of number of channels, height, and width. As can be seen from the above, the initial image is an image generated after processing by a convolutional neural network hardware accelerator, in which image data is arranged in the order of channel grouping, height, width, and number of channels. In order to convert the initial image in the first target format into the second target format, i.e., the target image in CHW image format,... This application first reads the initial image data from memory based on the memory address corresponding to the initial image in memory, and stores the read initial image data in a first static random access memory (SRAM). Then, it extracts the target image data from the first SRAM, determines the channel data corresponding to each image channel of the initial image based on the extracted target image data, and stores the channel data in a second SRAM. Finally, it writes the channel data from the second SRAM back to memory, thus obtaining a target image with image data arranged in the order of channel number, height, and width. In this way, this application transforms the originally inefficient and non-continuous format conversion process into an efficient and continuous process, reducing the time consumption and memory access overhead of image data format conversion, thereby improving the efficiency of image data format conversion.

[0092] In some specific embodiments, the data format conversion device may further include:

[0093] A data readout array number determination module is used to determine the number of data readout arrays of the convolutional neural network hardware accelerator;

[0094] The channel grouping module is used to determine the number of image channels corresponding to the initial image, and to group the channels of the initial image based on the quotient of the number of image channels and the number of data reading arrays to obtain the corresponding grouping results;

[0095] Correspondingly, the initial image data reading module 11 may include:

[0096] An initial image data reading unit is used to read the initial image data from the memory based on the grouping result and the memory address corresponding to the initial image.

[0097] In some specific embodiments, the data format conversion device may further include:

[0098] The target image data storage module is used to store the target image data into a preset register array;

[0099] Accordingly, the data format conversion device may further include:

[0100] The channel data reading module is used to read the channel data sequentially from the preset register array so as to store the channel data in the second static random access memory.

[0101] In some specific embodiments, the target image data storage module may include:

[0102] The data to be written determination unit is used to determine each group of data to be written from the target image data based on the number of data reading arrays;

[0103] The data storage unit to be written is used to store each group of data to be written into the corresponding registers in the preset register array.

[0104] In some specific embodiments, the channel data determination module 13 may include:

[0105] The current data to be read determination unit is used to take the first data of each register in the preset register array as the current data to be read;

[0106] The channel data determination unit is used to read the current data to be read in each of the registers, and concatenate the current data to be read to obtain the channel data, so as to store the channel data in the second static random access memory; take the next data of the current data to be read in each register as the current data to be read, and jump to the step of reading the current data to be read in each register until the data in the preset register array is read.

[0107] In some specific embodiments, the channel data determination module 13 may include:

[0108] A data storage address determination unit is used to determine the data storage address corresponding to each of the image channels in the second static random access memory;

[0109] The first channel data storage unit is used to store the channel data corresponding to each image channel into the second static random access memory according to the data storage address.

[0110] In some specific embodiments, the target image determination module 14 may include:

[0111] A pixel determination unit is used to determine the width and height of the initial image, and to determine each pixel of the initial image in one image channel based on the product of the width and the height.

[0112] The second channel data storage unit is configured to, if the channel data stored at the data storage address corresponding to the same image channel in the second static random access memory is the image data corresponding to each pixel, then sequentially store the channel data corresponding to the same image channel into the memory.

[0113] Furthermore, embodiments of this application also disclose an electronic device, Figure 14 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application. Specifically, the electronic device 20 may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the data format conversion method disclosed in any of the foregoing embodiments. Furthermore, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0114] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0115] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0116] The operating system 221 is used to manage and control the various hardware devices on the electronic device 20 and the computer program 222, which may be Windows Server, Netware, Unix, Linux, etc. In addition to including a computer program capable of performing the data format conversion method executed by the electronic device 20 as disclosed in any of the foregoing embodiments, the computer program 222 may further include a computer program capable of performing other specific tasks.

[0117] Furthermore, this application also discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned data format conversion method. The specific steps of this method can be found in the corresponding content disclosed in the foregoing embodiments, and will not be repeated here.

[0118] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0119] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0120] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0121] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0122] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A data format conversion method, characterized in that, include: Based on the memory address corresponding to the initial image, the corresponding initial image data is read from memory and stored in the first static random access memory; The initial image is an image in a first target format obtained after processing by a convolutional neural network hardware accelerator. The first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. Extract the target image data from the initial image data in the first static random access memory; Based on the target image data, determine the channel data corresponding to each image channel of the initial image, and store the channel data in the second static random access memory; The channel data in the second static random access memory is stored in the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which image data are arranged in the order of channel number, height, and width.

2. The data format conversion method according to claim 1, characterized in that, Before reading the corresponding initial image data from memory based on the memory address corresponding to the initial image, the process also includes: Determine the number of data readout arrays for the convolutional neural network hardware accelerator; The number of image channels corresponding to the initial image is determined, and the channels of the initial image are grouped based on the quotient of the number of image channels and the number of data readout arrays to obtain the corresponding grouping results; Accordingly, reading the corresponding initial image data from memory based on the memory address corresponding to the initial image includes: The initial image data is read from the memory based on the grouping result and the memory address corresponding to the initial image.

3. The data format conversion method according to claim 2, characterized in that, After extracting the target image data from the initial image data in the first static random access memory, the process further includes: The target image data is stored in a preset register array; Accordingly, after determining the channel data corresponding to each image channel of the initial image based on the target image data, the method further includes: The channel data is read sequentially from the preset register array so that the channel data is stored in the second static random access memory.

4. The data format conversion method according to claim 3, characterized in that, The step of storing the target image data into a preset register array includes: Based on the number of data read arrays, determine each group of data to be written from the target image data; The data to be written in each group is stored in the corresponding register in the preset register array.

5. The data format conversion method according to claim 4, characterized in that, The step of determining the channel data corresponding to each image channel of the initial image includes: The first data in each register of the preset register array is taken as the current data to be read; Read the current data to be read from each of the registers and concatenate the current data to be read to obtain the channel data, so as to store the channel data in the second static random access memory; The next data to be read from each of the registers is taken as the current data to be read, and the process jumps to the step of reading the current data to be read from each of the registers until the data in the preset register array is read.

6. The data format conversion method according to any one of claims 1 to 5, characterized in that, The step of storing the channel data in a second static random access memory includes: Determine the data storage address corresponding to each image channel in the second static random access memory; The channel data corresponding to each image channel is stored in the second static random access memory according to the data storage address.

7. The data format conversion method according to claim 6, characterized in that, The step of storing the channel data in the second static random access memory into the main memory includes: Determine the width and height of the initial image, and determine the pixels of the initial image in one image channel based on the product of the width and the height; If the channel data stored at the data storage address corresponding to the same image channel in the second static random access memory is the image data corresponding to each pixel, then the channel data corresponding to the same image channel is sequentially stored in the memory.

8. A data format conversion device, characterized in that, include: The initial image data reading module is used to read the corresponding initial image data from memory based on the memory address corresponding to the initial image, and store the initial image data in the first static random access memory; The initial image is an image in a first target format obtained after processing by a convolutional neural network hardware accelerator. The first target format is a format in which image data is arranged in the order of channel grouping, height, width, and number of channels. The target image data extraction module is used to extract target image data from the initial image data in the first static random access memory. The channel data determination module is used to determine the channel data corresponding to each image channel of the initial image based on the target image data, and store the channel data in a second static random access memory; The target image determination module is used to store the channel data in the second static random access memory into the memory to obtain the target image corresponding to the initial image; the target image is an image in a second target format, which is a CHW image format in which image data are arranged in the order of channel number, height, and width.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory; wherein the memory is used to store a computer program, which is loaded and executed by the processor to implement the data format conversion method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, Used to store a computer program, which, when executed by a processor, implements the data format conversion method as described in any one of claims 1 to 7.

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