Photovoltaic module and method of manufacturing the same

Abstract

The embodiment of the present application relates to the photovoltaic field, and provides a photovoltaic module and a manufacturing method thereof, the photovoltaic module comprising: a plurality of photovoltaic cells; a solder strip electrically connecting two adjacent photovoltaic cells; a single photovoltaic cell comprising: a substrate; a plurality of first electrodes arranged at intervals along a first direction and a plurality of second electrodes arranged at intervals along a second direction on a surface of the substrate, the surface of the substrate comprising an overlapping region provided with the first electrodes and the second electrodes, and the first electrode in the overlapping region being provided with the second electrode away from one side of the substrate; a dielectric layer at least between the second electrode and the first electrode, and the dielectric layer in the overlapping region having apertures, and at least part of the number of apertures containing the first electrode and / or the second electrode, so that the first electrode and the second electrode are in contact; wherein the solder strip is located away from one side of the second electrode, and the solder strip and the second electrode have the same extension direction, at least to improve the electrical performance of the photovoltaic module.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photovoltaics, in particular to a photovoltaic module and a manufacturing method thereof. BACKGROUND

[0002] Photovoltaic cells are increasingly used as a sustainable clean energy source. A photovoltaic cell is a device that uses the photovoltaic effect to generate charge carriers, i.e. electrons and holes, to convert solar energy into electrical energy. Electrodes are usually used in photovoltaic cells to extract the charge carriers, so that the electrical energy can be effectively utilized. The mainstream types of current photovoltaic cells include Back Contact (BC) cells, Tunnel Oxide Passivated Contact (TOPCON) cells, Passivated emitter and real cell (PERC) cells, and Heterojunction with Intrinsic Thin-film (HIT or HJT) cells, etc.

[0003] However, in the step of assembling multiple photovoltaic cells into a photovoltaic module, in order to achieve electrical connection between the solder strip and the photovoltaic cell, a large force is applied to the photovoltaic cell, which may damage the photovoltaic cell and affect the electrical performance of the photovoltaic module, and the electrical connection stability between the solder strip and the photovoltaic cell needs to be further studied. SUMMARY

[0004] The present application provides a photovoltaic module and a manufacturing method thereof, which at least helps to improve the electrical performance of the photovoltaic module.

[0005] According to some embodiments of the present application, the present application provides a photovoltaic module, comprising: a plurality of photovoltaic cells; a solder strip electrically connecting two adjacent photovoltaic cells; and each photovoltaic cell comprising: a substrate; a plurality of first electrodes arranged at intervals along a first direction on a surface of the substrate and a plurality of second electrodes arranged at intervals along a second direction on the surface of the substrate, the surface of the substrate comprising an overlapping region provided with both the first electrodes and the second electrodes, the first electrodes in the overlapping region being provided with the second electrodes on a side away from the substrate, the first direction and the second direction intersecting; and a dielectric layer at least between the second electrodes and the first electrodes, the dielectric layer in the overlapping region having pores, at least a portion of the pores containing the first electrodes and / or the second electrodes, so that the first electrodes and the second electrodes are in contact; wherein the solder strip is located on a side of the second electrode away from the substrate, and the solder strip and the second electrode have the same extension direction.

[0006] In some embodiments, the photovoltaic assembly further comprises: a flux, located between the solder ribbon and the second electrode.

[0007] In some embodiments, the surface of the substrate further comprises a first region provided with the first electrode; the dielectric layer is further located on the first region and away from the surface of the substrate; along the extension direction of the first electrode, the flux is located not only on the surface of the second electrode away from the substrate, but also on a partial region of the dielectric layer in the first region away from the substrate.

[0008] In some embodiments, along the extension direction of the second electrode, a single second electrode comprises a plurality of bus segments arranged at intervals, a single bus segment is located at least on one side of a first electrode away from the substrate, and the dielectric layer is located in the interval between two adjacent bus segments; the solder ribbon further covers the dielectric layer located in the interval between two adjacent bus segments.

[0009] In some embodiments, the photovoltaic assembly further comprises: a flux, located between the solder ribbon and the dielectric layer.

[0010] In some embodiments, the surface of the substrate further comprises a second region provided with the second electrode; the dielectric layer is further located on the second region and between the second electrode and the substrate.

[0011] In some embodiments, the surface of the substrate further comprises a third region which is a region not provided with the first electrode and the second electrode; the dielectric layer is further located on the third region; the photovoltaic assembly further comprises: a flux; along the extension direction of the first electrode, the flux is located not only on the surface of the second electrode away from the substrate, but also on a partial region of the dielectric layer in the third region away from the substrate.

[0012] In some embodiments, the photovoltaic cell further comprises: a transparent conductive layer, located between the dielectric layer and the substrate and between the first electrode and the substrate.

[0013] In some embodiments, along a direction perpendicular to the extension direction of the second electrode, the width of the solder ribbon is greater than the width of the second electrode.

[0014] In some embodiments, the first electrode has opposite bottom and top ends along a third direction, the bottom end is closer to the substrate, and the third direction is the thickness direction of the substrate; in the dielectric layer located in the overlapping region, the thickness of the dielectric layer located on the surface of the bottom end is greater than or equal to the thickness of the dielectric layer located on the surface of the top end.

[0015] In some embodiments, the substrate comprises: a substrate, one surface of the substrate comprises fourth regions and fifth regions arranged alternately along the first direction; a first semiconductor layer and a first doped layer, the first semiconductor layer is located on the fourth region, and the first doped layer is located on a side of the first semiconductor layer away from the substrate; a second semiconductor layer and a second doped layer, the second semiconductor layer is located on the fifth region, and the second doped layer is located on a side of the second semiconductor layer away from the substrate, the second doped layer and the first doped layer are doped with different types of doped elements; the first electrode comprises a first current collecting electrode located on the fourth region and a second current collecting electrode located on the fifth region, the first current collecting electrode and the first doped layer are electrically connected, and the second current collecting electrode and the second doped layer are electrically connected; wherein the first semiconductor layer and the second semiconductor layer are tunneling layers, and the first doped layer and the second doped layer are doped polysilicon layers; or, the first semiconductor layer and the second semiconductor layer are intrinsic amorphous silicon layers, and the first doped layer and the second doped layer are doped amorphous silicon layers; or, the first semiconductor layer is the tunneling layer, the first doped layer is the doped polysilicon layer, the second semiconductor layer is the intrinsic amorphous silicon layer, and the second doped layer is the doped amorphous silicon layer.

[0016] In some embodiments, the substrate comprises: a substrate, having two surfaces opposite along a third direction; a semiconductor layer located on one of the two surfaces; a doped layer located on a side of the semiconductor layer away from the substrate; the first electrode comprises a first current collecting electrode located on a side of the doped layer away from the substrate, and a second current collecting electrode located on the other of the two surfaces; wherein the semiconductor layer is a tunneling layer, and the doped layer is a doped polysilicon layer; or, the semiconductor layer is an intrinsic amorphous silicon layer, and the doped layer is a doped amorphous silicon layer.

[0017] According to some embodiments of the present application, another aspect of the embodiments of the present application further provides a method for manufacturing a photovoltaic module, comprising: providing a plurality of photovoltaic cells; providing a plurality of solder strips, and electrically connecting two adjacent photovoltaic cells by using the solder strips; each of the photovoltaic cells comprises: a substrate; a plurality of first electrodes arranged at intervals along a first direction and a plurality of second electrodes arranged at intervals along a second direction on a surface of the substrate, the surface of the substrate comprises an overlapping area provided with both the first electrodes and the second electrodes, the first electrodes in the overlapping area are provided with the second electrodes on a side away from the substrate, and the first direction and the second direction intersect; and a dielectric layer at least between the second electrodes and the first electrodes, and the dielectric layer in the overlapping area has apertures, and at least part of the apertures contain the first electrodes and / or the second electrodes, so that the first electrodes and the second electrodes are in contact; wherein the solder strips are located on the side of the second electrodes away from the substrate, and the solder strips and the second electrodes have the same extension direction.

[0018] In some embodiments, the step of electrically connecting two adjacent photovoltaic cells by using the solder strips comprises: providing a flux at least on the side of the second electrodes away from the substrate; and welding the solder strips on the second electrodes by using the flux; wherein the melting range of the flux is 100-300 DEG C, and the welding time of the solder strips is less than or equal to 20 s.

[0019] The technical scheme provided by the embodiments of the present application has at least the following advantages:

[0020] In the process of welding the soldering strip and the second electrode, one, the medium layer between the first electrode and the second electrode is designed, the support protection of the medium layer can reduce the force acting on the first electrode, so as to reduce the risk of fracture of the first electrode at the overlapping area, ensure the high collection efficiency of the first electrode to the photo-generated carrier, improve the photoelectric conversion efficiency of the photovoltaic cell, and further improve the electrical performance and structural stability of the photovoltaic module. Moreover, the medium layer in the overlapping area has a pore, which does not affect the transmission of the carrier in the first electrode and the second electrode. Two, whether the additional soldering material or the material for assisting welding in the soldering strip itself is blocked by the medium layer and does not erode the first electrode, which can further ensure the high collection efficiency of the first electrode to the photo-generated carrier, and further improve the electrical performance and structural stability of the photovoltaic module. In addition, for a single photovoltaic cell, the first electrode can be directly in ohmic contact with the surface of the substrate, which is conducive to controlling the good contact morphology between the first electrode and the substrate, and the raw material of the first electrode can be a low burn-through conductive material or a non-burn-through conductive material, so that the first electrode is directly in contact with the surface of the substrate, and the substrate is not damaged. All of the above are conducive to improving the collection efficiency of the first electrode to the photo-generated carrier in the substrate, and can improve the electrical performance of the photovoltaic cell, and further improve the electrical performance of the photovoltaic module assembled based on the photovoltaic cell. BRIEF DESCRIPTION OF DRAWINGS

[0021] One or more embodiments are illustrated by way of example in the figures that form a part of this disclosure and which are shown by way of illustration in the drawings. These embodiments are described in enough detail to enable those skilled in the art to practice the embodiments and it is understood that the drawings are not necessarily to scale. Wherever possible, the same reference numbers will be used throughout the drawing(s) and this description to refer to the same or similar parts. One or more embodiments can also encompass structural and / or functional modifications of elements as readily understood by those skilled in the art, and nowhere is the application limited to the exact construction details set forth in the figures and / or description.

[0022] Figure 1 A partial top view of a photovoltaic module according to an embodiment of the present application is shown in FIG. 1.

[0023] Figure 2 A partial top view of a photovoltaic module according to an embodiment of the present application is shown in FIG. 1. Figure 1 A partial perspective view of a cell string in a corresponding photovoltaic module is shown in FIG. 2.

[0024] Figure 3 A partial perspective view of a cell string in a corresponding photovoltaic module is shown in FIG. 2. Figure 2 A partial cross-sectional view of a corresponding photovoltaic module is shown in FIG. 3.

[0025] Figure 4 Another partial top view of a photovoltaic module according to an embodiment of the present application is shown in FIG. 4.

[0026] Figure 5 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application. Figure 4 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0027] Figure 6 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application. Figure 5 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0028] Figure 7 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0029] Figure 8 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0030] Figure 9 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0031] Figure 10 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0032] Figure 11 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0033] Figure 12 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0034] Figure 13 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0035] Figure 14 A partial perspective view of a string of cells in a corresponding photovoltaic module is provided for an embodiment of the present application.

[0036] BRIEF DESCRIPTION OF THE DRAWINGS

[0037] 100, substrate; 1001, front surface; 1002, back surface; 110, first area; 120, second area; 130, overlapping area; 140, third area; 101, first electrode; 111, bottom end; 121, top end; 131, first current collecting electrode; 141, second current collecting electrode; 102, second electrode; 112, bus section; 103, dielectric layer; 113, aperture; 104, transparent conductive layer; 105, substrate; 115, fourth area; 125, fifth area; 135, surface; 1351, first surface; 1352, second surface; 106, semiconductor layer; 116, first semiconductor layer; 126, second semiconductor layer; 136, second intrinsic amorphous silicon layer; 107, doped layer; 117, first doped layer; 127, second doped layer; 137, second doped amorphous silicon layer; 40, photovoltaic cell; 41, encapsulation film; 42, cover plate; 43, solder strip; 44, flux. DETAILED DESCRIPTION

[0038] As can be known from the background, the electrical performance of the photovoltaic module needs to be further improved.

[0039] The embodiments of the present application provide a photovoltaic module and a manufacturing method thereof. In the photovoltaic module, when the solder strip is electrically connected with the second electrode, firstly, a dielectric layer is designed between the first electrode and the second electrode, the support protection of the dielectric layer can be used to reduce the force acting on the first electrode, so as to reduce the risk of fracture of the first electrode at the overlapping area, to ensure the high collection efficiency of the photogenerated carrier by the first electrode, to improve the photoelectric conversion efficiency of the photovoltaic cell, and to further improve the electrical performance and structural stability of the photovoltaic module, and the dielectric layer in the overlapping area has an aperture, which does not affect the transmission of the carrier in the first electrode and the second electrode; secondly, whether the flux provided additionally or the material for assisting welding of the solder strip itself is shielded by the dielectric layer and thus cannot erode the first electrode, so as to further ensure the high collection efficiency of the photogenerated carrier by the first electrode, to further improve the electrical performance and structural stability of the photovoltaic module. In addition, for a single photovoltaic cell, the first electrode can be directly in ohmic contact with the surface of the substrate, which is conducive to controlling the good contact morphology between the first electrode and the substrate, and the raw material of the first electrode can be a low burn-through conductive material or a non-burn-through conductive material, so that the first electrode is directly in contact with the surface of the substrate and does not cause great damage to the substrate, which is conducive to improving the collection efficiency of the photogenerated carrier by the first electrode in the substrate, and to improving the electrical performance of the photovoltaic cell, to further improve the electrical performance of the photovoltaic module assembled based on the photovoltaic cell.

[0040] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise explicitly specified and limited.

[0041] Reference herein to "embodiments" means that the particular features, structures, or characteristics described in connection with the embodiments can be included in at least one embodiment of the present application. The appearance of this phrase in various places in the specification does not necessarily all refer to the same embodiment, nor is it necessarily a separate or alternative embodiment to other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0042] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can mean: A exists, A and B exist, and B exists. In addition, the character " / " herein generally represents an "or" relationship between the associated objects before and after it.

[0043] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two), and similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0044] In the description of the embodiments of the present application, the technical terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the embodiments of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the embodiments of the present application.

[0045] In the description of the embodiments of the present application, unless otherwise explicitly specified and limited, the technical terms "mounting", "connection", "connection", "fixing" and the like should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0046] In the drawings corresponding to the embodiments of the present application, the thickness and area of a layer are exaggerated for clarity. When a component (such as a layer, film, region, or substrate) is described as being "on" or "at" another component, it can be "directly on" the other component (i.e., in the absence of intervening medium) or intervening components can also be present. In contrast, when a component is described as being "directly on" or "directly at" another component, it indicates that there are no intervening components present. In addition, when a component is described as being "formed on" another component, it means that the component is not formed on the entire surface (or front surface) of the other component, nor is it formed on a partial edge of the entire surface.

[0047] In the description of the embodiments of the present application, when a component "includes" another component, unless otherwise specified, other components can also be included, and further inclusion can also be included. In addition, when a layer, film, region, or plate, and the like, is referred to as "on / over" another component, it can be "directly on" the other component (i.e., between the other component and another component, no other component is present), or another component can be present therebetween. In addition, when a layer, film, region, plate, and the like, is "directly on" another component, or when a layer, film, region, plate, and the like, is on the surface of another component, it is indicated that no other component is present therebetween.

[0048] The terms used in the description of various described embodiments herein are used only to describe particular embodiments and are not intended to limit. As used in the description of various embodiments described and the appended claims, "the component" is also intended to include the plural form, unless the context clearly indicates otherwise. Among them, the components include layers, films, regions, or plates, and the like.

[0049] The embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art can understand that in the embodiments of the present application, many technical details are presented in order to enable the reader to better understand the embodiments of the present application. However, the technical solutions claimed by the embodiments of the present application can be implemented even without these technical details and based on various changes and modifications of the following embodiments.

[0050] An embodiment of the present application provides a photovoltaic module, which will be described in detail below with reference to the accompanying drawings.

[0051] Combined with reference Figures 1 to 7The photovoltaic module comprises: a plurality of photovoltaic cells 40; a solder strip 43 electrically connecting two adjacent photovoltaic cells 40; a single photovoltaic cell 40 comprises: a substrate 100; a plurality of first electrodes 101 arranged at intervals along a first direction X and a plurality of second electrodes 102 arranged at intervals along a second direction Y on a surface of the substrate 100, the surface of the substrate 100 comprises an overlapping area 130 provided with the first electrodes 101 and the second electrodes 102 at the same time, the first electrodes 101 in the overlapping area 130 are provided with the second electrodes 102 on a side away from the substrate 100, and the first direction X and the second direction Y intersect; a dielectric layer 103 at least between the second electrodes 102 and the first electrodes 101, and the dielectric layer 103 in the overlapping area 130 has apertures 113, and the first electrodes 101 and / or the second electrodes 102 are contained in at least part of the apertures 113, so that the first electrodes 101 and the second electrodes 102 are in contact; wherein the solder strip 43 is located on a side of the second electrode 102 away from the substrate 100, and the solder strip 43 and the second electrode 102 have the same extension direction.

[0052] wherein, Figure 1 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 2 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 1 a partial perspective view schematic diagram of a cell string in a corresponding photovoltaic module; Figure 3 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 2 a partial perspective view schematic diagram of a cell string in a corresponding photovoltaic module; Figure 4 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 5 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 4 a partial perspective view schematic diagram of a cell string in a corresponding photovoltaic module; Figure 6 a partial top view schematic diagram of a photovoltaic module provided by an embodiment of the present application; Figure 5 a partial perspective view schematic diagram of a cell string in a corresponding photovoltaic module; Figure 7 a partial cross-sectional view schematic diagram of a photovoltaic module along a first cross-sectional direction AA1 provided by an embodiment of the present application.

[0053] It should be noted that, in order to clearly show the positions of the first electrodes 101, the second electrodes 102 and the solder strip 43 on the surface of the substrate 100, Figure 1 and Figure 4 neither of which shows the dielectric layer and both of which show the solder strip 43 in a perspective drawing mode. In addition, Figure 1 in which the solder strip 43 is truncated along the first direction X by a double wavy line to show that the solder strip 43 is bent in the interval between the two adjacent photovoltaic cells 40, from the front surface 1001 of one photovoltaic cell 40 to the back surface 1002 of another photovoltaic cell 40. Moreover, Figure 1The front side 1001 of one photovoltaic cell 40 and the back side 1002 of another photovoltaic cell 40 are respectively shown in the figure, Figure 4 The back sides 1002 of two photovoltaic cells 40 are respectively shown in the figure.

[0054] It is worth noting that in order to realize the electrical connection of the two adjacent photovoltaic cells 40, the single solder strip 43 will electrically connect the second electrodes 102 in the two adjacent photovoltaic cells 40, and in the process of electrical connection, the solder strip 43 will exert a certain force on the second electrode 102. In addition, at the overlapping area 130, the second electrode 102 will be stacked on the first electrode 101, but the part of the second electrode 102 which is not located in the overlapping area 130 will not be spaced from the first electrode 101. Thus, the second electrode 102 includes a relatively flat part which is not located in the overlapping area 130, and a relatively protruding part which is located in the overlapping area 130, in other words, the second electrode 102 can be regarded as a concave-convex strip structure along its extension direction. In this way, the solder strip 43 will generate a larger force on the second electrode 102 at the stacking position of the first electrode 101 and the second electrode 102, that is, at the overlapping area 130, and the problem of stress concentration is prone to occur at the overlapping area 130.

[0055] On the basis of the above, the medium layer 103 between the first electrode 101 and the second electrode 102 is designed, that is, the medium layer 103 located in the overlapping area 130, which can be protected by the support of the medium layer 103 when the solder strip 43 is electrically connected with the second electrode 102, so as to reduce the force generated on the first electrode 101, so as to reduce the risk of fracture of the first electrode 101 at the overlapping area 130, so as to ensure the high collection efficiency of the first electrode 101 to the photo-generated carriers, improve the photoelectric conversion efficiency of the photovoltaic cell 40, and further improve the electrical performance and structural stability of the photovoltaic module. Moreover, the medium layer 103 located in the overlapping area 130 has pores 113, and at least part of the number of pores 113 contains the first electrode 101 and / or the second electrode 102, so as to ensure the ohmic contact of the first electrode 101 and the second electrode 102. In this way, the risk of fracture of the first electrode 101 can be reduced by the support protection of the medium layer 103, and the transmission of the carriers in the first electrode 101 and the second electrode 102 will not be affected.

[0056] Further, when the solder strip 43 is electrically connected with the second electrode 102, whether it is the additional soldering material or the material for assisting welding possessed by the solder strip 43 itself, will be blocked by the medium layer 103, so as to avoid the erosion of the first electrode 101, so as to further ensure the high collection efficiency of the first electrode 101 to the photo-generated carriers, improve the photoelectric conversion efficiency of the photovoltaic cell 40, and further improve the electrical performance and structural stability of the photovoltaic module.

[0057] In summary, in the photovoltaic cell 40, the medium layer 103 with the aperture 113 is arranged between the first electrode 101 and the second electrode 102, which is conducive to the support and protection of the first electrode 101 by the medium layer 103, and the electrical performance of the first electrode 101 is stabilized in multiple aspects, and thus the electrical performance of the photovoltaic module can be improved.

[0058] In addition, for a single photovoltaic cell 40, on the one hand, the first electrode 101 can be in ohmic contact with the surface of the substrate 100, which is conducive to controlling the first electrode 101 and the substrate 100 to have a good contact morphology, so as to improve the collection efficiency of the photogenerated carriers in the substrate 100 by the first electrode 101; on the other hand, it is conducive to making the raw material of the first electrode 101 be a low-cost low-penetration conductive material or a non-penetration conductive material, so that the first electrode 101 is in direct contact with the surface of the substrate 100, and the substrate 100 is not damaged, and the preparation cost of the first electrode 101 can be reduced; on the other hand, before the second electrode 102 is formed, the first electrode 101 can be protected by the medium layer 103 to reduce the risk of damage or pollution of the first electrode 101, thereby improving the yield of the first electrode 101; on the other hand, while ensuring the ohmic contact between the first electrode 101 and the second electrode 102 by the medium layer 103 with the aperture 113 in the overlapping area 130, the raw material of the second electrode 102 can also be a low-cost low-penetration conductive material or a non-penetration conductive material, so as to reduce the preparation cost of the second electrode 102. Therefore, the cooperation in multiple aspects is conducive to comprehensively improving the electrical performance of the photovoltaic cell 40, thereby further improving the electrical performance of the photovoltaic module assembled based on the photovoltaic cell 40.

[0059] It should be noted that in the photovoltaic cell 40 provided by an embodiment of the present application, the medium layer 103 can be located on other regions of the surface of the substrate 100 in addition to being located between the first electrode 101 and the second electrode 102, so that the medium layer 103 can play a role in reducing reflection or protection, which will be described later.

[0060] The photovoltaic module provided by an embodiment of the present application will be described in more detail below with reference to the accompanying drawings.

[0061] In some embodiments, referring to Figure 7 , the photovoltaic module can further include: a flux 44 located between the solder strip 43 and the second electrode 102. Wherein, Figure 7 may be considered Figure 1 is a kind of local cross-sectional schematic view of the photovoltaic module along the first cross-sectional direction AA1, and can also be considered Figure 4 is a kind of local cross-sectional schematic view of the photovoltaic module along the first cross-sectional direction AA1.

[0062] It should be noted that, in order to improve the electrical connection performance between the solder strip 43 and the second electrode 102, in some cases, a soldering material is additionally provided on the second electrode 102, for example, the soldering material is coated on the second electrode 102, and then the solder strip 43 is well electrically connected with the second electrode 102 based on the soldering material; in other cases, the solder strip 43 is designed to have a material, for example, tin, for assisting soldering in at least a surface layer, so that the solder strip 43 and the second electrode 102 are well electrically connected. Based on this, in the finally formed photovoltaic module, the soldering agent 44 can be a soldering material different from the solder strip 43 or can be a material for assisting soldering possessed by the solder strip 43 itself.

[0063] In some cases, when the soldering material is additionally provided on the second electrode 102, the melting range of the soldering material can be 100-300°C, for example, can be 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, 240°C, 250°C, 260°C, 270°C, 280°C or 290°C, etc.

[0064] In some cases, when the soldering material is additionally provided on the second electrode 102, the soldering material can include organic acid (specific components such as rosin acid, lactic acid, citric acid), isopropyl alcohol and a small amount of high-boiling-point solvent. Among them, the specific components of the organic acid can be rosin acid, lactic acid or citric acid, etc.; the specific components of the high-boiling-point solvent can be glycol ethers, alcohols or esters, etc., for preventing volatilization.

[0065] In some cases, in combination with reference to Figure 1 , Figure 8 and Figure 9 , or in combination with reference to Figure 4 , Figure 8 and Figure 9 , the surface of the substrate 100 can further include a first area 110 provided with the first electrode 101; the dielectric layer 103 is further located on the first area 110 and away from the surface of the substrate 100 on the first electrode 101; along the extension direction of the first electrode 101, the soldering agent 44 is not only located on the surface of the second electrode 102 away from the substrate 100, but also located on a partial area of the dielectric layer 103 of the first area 110 away from the substrate 100.

[0066] Among them, Figure 8 is a partial cross-sectional schematic view of a photovoltaic module provided by an embodiment of the present application along a second cross-sectional direction BB1, Figure 9 is a partial cross-sectional schematic view of a photovoltaic module provided by an embodiment of the present application along a third cross-sectional direction CC1; in addition, Figure 8 can be regarded as Figure 1or Figure 4 a partial cross-sectional view of the photovoltaic module along a second cross-sectional direction BB1, Figure 9 may be regarded as Figure 1 or Figure 4 a partial cross-sectional view of the photovoltaic module along a third cross-sectional direction CC1.

[0067] It should be noted that the first region 110 can be regarded as a region provided with the first electrode 101 and not provided with the second electrode 102. In other words, the first region 110 can be regarded as a region where the first electrode 101 except for the part located in the overlapping region 130, i.e. the part of the first electrode 101 not covered by the second electrode 102, is located.

[0068] In addition, when the solder strip 43 is electrically connected with the second electrode 102, even if the additional flux material part is sputtered on the region not provided with the second electrode 102 but provided with the first electrode 101, i.e. the first region 110, or the material for assisting soldering possessed by the solder strip 43 itself extends to the region not provided with the second electrode 102 but provided with the first electrode 101, i.e. the first region 110, due to the fluidity, the flux 44 will be located not only on the surface of the second electrode 102 away from the substrate 100, but also on the first region 110. In this way, along the extension direction of the first electrode 101, the width of the flux 44 will be greater than the width of the second electrode 102. Among them, along the extension direction of the first electrode 101, the width of the flux 44 can be regarded as the maximum width that the flux 44 can extend.

[0069] On this basis, the design of the dielectric layer 103 located in the overlapping region 130 and the first region 110, the dielectric layer 103 will cover the entire surface of the first electrode 101, and the surface of the first electrode 101 not covered by the second electrode 102 will also be covered by the dielectric layer 103. In this way, even if the flux 44 is located on the first region 110, it is located on the part of the dielectric layer 103 in the first region 110 away from the surface of the substrate 100. With the protection of the entire first electrode 101 by the dielectric layer 103, the possibility of the flux 44 contacting the first electrode 101 can be eliminated, thereby effectively avoiding the erosion of the flux 44 to the first electrode 101, thereby reducing the power loss caused by the flux 44 in the process of manufacturing the photovoltaic module, and improving the electrical performance of the photovoltaic module.

[0070] In addition, generally, the first electrode 101 contains more metal materials, and has stronger reflection ability to incident light. The medium layer 103 is designed to be located in the overlapping area 130 and the first area 110, and the reflectivity of the incident light irradiated to the area where the first electrode 101 is located can be reduced by means of the medium layer 103, that is, the anti-reflection effect of the medium layer 103 can avoid the incident light from being directly irradiated on the surface of the first electrode 101, so as to avoid the phenomenon that a large amount of incident light reflected by the first electrode 101 propagates in a direction away from the substrate 100 and cannot be utilized by the substrate 100, thereby facilitating more incident light to be absorbed and utilized by the substrate 100; on the other hand, the medium layer 103 can play a protection role for the entire first electrode 101.

[0071] It is worth emphasizing that, compared with the medium layer 103 in the overlapping area 130 having the aperture 113, the medium layer 103 in the first area 110 has higher density and good insulation performance, in other words, the medium layer 103 in the first area 110 almost has no aperture that can realize electrical conduction. Alternatively, the medium layer 103 in the overlapping area 130 can be regarded as a film layer discontinuously distributed between the first electrode 101 and the second electrode 102, and the medium layer 103 in the first area 110 can be regarded as a film layer continuously distributed on the surface of the substrate 100. In addition, the thickness of the medium layer 103 in the first area 110 is basically consistent with the thickness of the medium layer 103 in the overlapping area 130.

[0072] Based on this, only the medium layer 103 located between the second electrode 102 and the first electrode 101, that is, the medium layer 103 in the overlapping area 130 has the aperture 113 that can realize electrical conduction, is beneficial to realizing ohmic contact of the first electrode 101 and the second electrode 102 without removing the medium layer 103 in the overlapping area 130 when the medium layer 103 is prepared, and can avoid etching damage to the first electrode when the medium layer in the overlapping area is removed, and can simplify the preparation process of the photovoltaic cell.

[0073] In some examples, the ratio of the area of the overlapping area 130 to the area of the first area 110 can be 0.005% to 1.705%, for example, can be 0.05%, 0.1%, 0.15%, 0.2%, 0.25%, 0.3%, 0.35%, 0.4%, 0.45%, 0.5%, 0.55%, 0.6%, 0.65%, 0.7%, 0.75%, 0.8%, 0.85%, 0.9%, 0.95%, 1%, 1.05%, 1.1%, 1.15%, 1.2%, 1.25%, 1.3%, 1.35%, 1.4%, 1.45%, 1.5%, 1.55%, 1.6%, 1.65%, or 1.7%, etc.

[0074] It is worth noting that the area of the overlapping region 130 can be regarded as the layout area occupied by the part where the single first electrode 101 and the single second electrode 102 overlap on the surface of the substrate 100, and the area of the first region 110 can be regarded as the layout area occupied by the single first electrode 101 on the surface of the substrate 100. The ratio of the area of the overlapping region 130 to the area of the first region 110 is 0.005% to 1.705%, which is beneficial to ensure that the single first electrode 101 and the single second electrode 102 have a suitable contact area, and that different regions in the single first electrode 101 can respectively realize ohmic contact with the plurality of second electrodes 102, so as to ensure that the second electrode 102 has a good convergence effect on the carriers in the first electrode 101.

[0075] In some embodiments, in combination with reference to Figures 7 to 10 , Figure 10 Another partial top view schematic diagram of the photovoltaic module provided by an embodiment of the present application is shown. In the extension direction of the second electrode 102, the single second electrode 102 includes a plurality of bus sections 112 arranged at intervals, and the single bus section 112 is located at least on one side of the first electrode 101 away from the substrate 100, and the interval between the adjacent two bus sections 112 has a dielectric layer 103; the solder strip 43 also covers the dielectric layer 103 located in the interval between the adjacent two bus sections 112. In other embodiments, the single second electrode can also be a single long strip structure.

[0076] It should be noted that, Figure 7 may also be regarded as Figure 10 A partial cross-sectional view schematic diagram of the photovoltaic module shown along the first cross-sectional direction AA1 is shown, Figure 8 may also be regarded as Figure 10 A partial cross-sectional view schematic diagram of the photovoltaic module shown along the second cross-sectional direction BB1 is shown, Figure 9 may also be regarded as Figure 10 A partial cross-sectional view schematic diagram of the photovoltaic module shown along the third cross-sectional direction CC1 is shown. In addition, Figure 10 only a single bus section 112 and 2, 3 or 4 adjacent first electrodes 101 are shown in the figure, and in actual application, the single bus section can be electrically connected to at least one first electrode, and the number of first electrodes electrically connected to the single bus section is not limited too much. Moreover, Figure 10 the same or corresponding parts in Figure 1 will not be described here.

[0077] It is worth noting that the solder ribbon 43 is generally a long strip structure spanning two photovoltaic cells 40. When the second electrode 102 is designed to include multiple current-carrying segments 112 arranged at intervals, the solder ribbon 43 will not only be located on the surface of the multiple current-carrying segments 112, but also in the interval between two adjacent current-carrying segments 112. Based on this, if the interval between two adjacent current-carrying segments 112 is designed to have a dielectric layer 103, then there will be no area in the solder ribbon 43 directly on the surface of the substrate 100. In other words, the solder ribbon 43 located in the overlapping area 130 will be separated from the substrate 100 by at least the first electrode 101, the dielectric layer 103, and the second electrode 102, and the solder ribbon 43 not located in the overlapping area 130 will be separated from the substrate 100 by at least the second electrode 102 or the dielectric layer 103. This helps to effectively avoid damage to the substrate 100 caused by the solder ribbon 43.

[0078] Furthermore, designing a single busbar 112 to be located at least on the side of one first electrode 101 away from the substrate 100 not only ensures good current-carrying performance of a single second electrode 102 for multiple first electrodes 101, but also reduces the raw materials required to fabricate the second electrode 102, thereby lowering its fabrication cost. Moreover, by utilizing the dielectric layer 103 with pores 113 located in the overlap region 130 to ensure ohmic contact between the first electrode 101 and the second electrode 102, the raw materials for the second electrode 102 can be low-cost low-burn-through conductive materials or non-burn-through conductive materials, further reducing the fabrication cost of the second electrode 102.

[0079] In some cases, continue to combine references Figures 7 to 10 The photovoltaic module may also include flux 44, which is located between the solder ribbon 43 and the dielectric layer 103. It is worth noting that flux 44 is generally present in the area where the solder ribbon 43 is located. When designing a second electrode 102 including multiple spaced-apart busbars 112, and designing the space between two adjacent busbars 112 to have a dielectric layer 103, there will be no area in the solder ribbon 43 directly on the surface of the substrate 100. This effectively avoids the flux 44 eroding the substrate 100, thereby further reducing power loss caused by the flux 44 during the manufacturing process of the photovoltaic module, and improving the electrical performance of the photovoltaic module.

[0080] In some embodiments, reference Figure 11 , Figure 11 This is a partial cross-sectional view of a photovoltaic module provided in an embodiment of this application along the fourth cross-sectional direction DD1. The surface of the substrate 100 may further include a second region 120 on which a second electrode 102 is disposed; a dielectric layer 103 is also located on the second region 120 and between the second electrode 102 and the substrate 100. Figure 11 Can be regarded as Figure 1 , Figure 4 orFigure 10 a partial cross-sectional view of the photovoltaic module along a fourth cross-sectional direction DD1.

[0081] It is to be noted that the second region 120 can be regarded as a region where the second electrode 102 is provided and the first electrode 101 is not provided. In other words, the second region 120 can be regarded as a region where the second electrode 102, except for the portion located in the overlapping region 130, is located, i.e. a region where the portion of the second electrode 102 which does not overlap with the first electrode 101 is located. In this way, the medium layer 103 is designed to be located in the overlapping region 130 and the second region 120, so that the second electrode 102 can be regarded as being located on the side of the medium layer 103 away from the substrate 100, i.e. not only is the medium layer 103 including the apertures 113 (see Figure 7 or Figure 9 ) provided between the second electrode 102 and the first electrode 101, but the portion of the second electrode 102 which does not overlap with the first electrode 101 is also provided with the medium layer 103 between the second electrode 102 and the substrate 100.

[0082] It is to be emphasized that, compared with the medium layer 103 located in the overlapping region 130 having the apertures 113, the medium layer 103 located in the second region 120 has a higher density and good insulation performance, i.e. the medium layer 103 located in the second region 120 has almost no apertures which can realize electrical conduction. In other words, the medium layer 103 located in the overlapping region 130 can be regarded as a film layer which is discontinuously distributed between the first electrode 101 and the second electrode 102, and the medium layer 103 located in the second region 120 can be regarded as a film layer which is continuously distributed on the surface of the substrate 100.

[0083] In addition, while the medium layer 103 is used to improve the anti-reflection effect on the incident light, the second electrode 102 is designed to be located on the medium layer 103, so that the second electrode 102 is not covered by the medium layer 103, and the medium layer 103 does not cause a failure problem when the second electrode 102 in the adjacent two photovoltaic cells is subsequently electrically connected by means of the solder strip, i.e. the second electrode 102 is designed to be exposed on the medium layer 103, so as to facilitate the subsequent effective electrical connection of the solder strip to the second electrode 102, for example, the soldering material can be directly applied on the exposed second electrode 102, or the solder strip 43 can be directly soldered to the second electrode 102. Moreover, compared with the scheme of forming the medium layer with the anti-reflection function on the surface of the first electrode and the second electrode, and removing the medium layer located on the surface of the second electrode, in the photovoltaic module provided by the embodiment of the present application, the operation of removing the medium layer located on the surface of the second electrode 102 is not required, so that the etching damage to the second electrode 102 can be avoided, and the preparation process of the photovoltaic module can be simplified and the electrical performance of the photovoltaic module can be improved.

[0084] In some cases, in combination with reference Figures 7 to 9 andFigure 11 The medium layer 103 is located on the first area 110, the second area 120 and the overlapping area 130. Unlike the entire first electrode 101 is covered by the medium layer 103 away from the surface of the substrate 100, the entire second electrode 102 can be considered as located on the side of the medium layer 103 away from the substrate 100, and the medium layer 103 between the second electrode 102 and the first electrode 101 has the aperture 113, so that the second electrode 102 and the first electrode 101 are in ohmic contact.

[0085] In some cases, in combination with reference to Figure 8 and Figure 11 The surface of the substrate 100 can further include a third area 140, which is an area without the first electrode 101 and the second electrode 102; the medium layer 103 is also located on the third area 140; the photovoltaic module can further include the flux 44; along the extension direction of the first electrode 101, the flux 44 is not only located on the surface of the second electrode 102 away from the substrate 100, but also on the partial area of the surface of the medium layer 103 in the third area 140 away from the substrate 100.

[0086] It is worth noting that the area where the solder strip 43 is arranged generally has the flux 44, and when the solder strip 43 is electrically connected with the second electrode 102, the additional flux material can also be partially sputtered on the third area 140 adjacent to the second electrode 102; or the material for assisting welding of the solder strip 43 itself extends to the third area 140 adjacent to the second electrode 102 due to the fluidity, which can also make the flux 44 not only located on the surface of the second electrode 102 away from the substrate 100, but also on the partial area of the third area 140. Therefore, along the extension direction of the first electrode 101, the width of the flux 44 is greater than the width of the second electrode 102. Among them, along the extension direction of the first electrode 101, the width of the flux 44 can be considered as the maximum width of the flux 44 that can be extended.

[0087] On this basis, the medium layer 103 is designed to be located on the overlapping area 130 and the third area 140, so that even if the flux 44 is located on the partial area of the third area 140, it is also located on the partial area of the surface of the medium layer 103 in the third area 140 away from the substrate 100, which can protect the substrate 100 in the third area 140 by the medium layer 103, and prevent the flux 44 from contacting the substrate 100, thereby effectively avoiding the erosion of the flux 44 to the substrate 100, reducing the power loss caused by the flux 44 in the process of manufacturing the photovoltaic module, and further improving the electrical performance of the photovoltaic module. In addition, the risk of reflection of the light incident on the third area 140 can be reduced by the medium layer 103 located in the third area 140, thereby improving the absorption and utilization of light by the substrate 100 in the third area 140.

[0088] It is worth emphasizing that the medium layer 103 in the overlapping area 130 has the pores 113 (refer to Figure 7 Or Figure 9 The medium layer 103 in the third area 140 has a higher density and good insulation performance, in other words, the medium layer 103 in the third area 140 has almost no pores that can realize electrical conduction. In other words, the medium layer 103 in the overlapping area 130 can be regarded as a discontinuous film layer between the first electrode 101 and the second electrode 102, and the medium layer 103 in the third area 140 can be regarded as a continuous film layer on the surface of the substrate 100.

[0089] In some cases, in combination with reference to Figures 7 to 9 And Figure 11 The medium layer 103 can be located on the first area 110, the second area 120, the overlapping area 130 and the third area 140. In other words, the medium layer 103 can be located on the entire surface of the substrate 100, and the first electrode 101 is arranged between the medium layer 103 and the substrate 100, and the second electrode 102 is arranged on the side of the medium layer 103 away from the substrate 100.

[0090] In some embodiments, in combination with reference to Figures 7 to 9 And Figure 11 The photovoltaic cell 40 can further include a transparent conductive layer 104 located between the medium layer 103 and the substrate 100 and between the first electrode 101 and the substrate 100.

[0091] It is worth noting that the transparent conductive layer 104 is used to assist the electrical connection between the first electrode 101 and the substrate 100, and the transparent conductive layer 104 can be arranged at least on the area used to prepare the first electrode 101, that is, the first area 110, before the first electrode 101 is designed. Generally, the transparent conductive layer 104 can be arranged on the periphery of the first area 110 in addition to the first area 110 in the surface of the substrate 100. In other words, the orthogonal projection of the first electrode 101 on the substrate 100 is located in the orthogonal projection of the transparent conductive layer 104 on the substrate 100, and the area of the orthogonal projection of the transparent conductive layer 104 on the substrate 100 can be greater than or equal to the area of the orthogonal projection of the first electrode 101 on the substrate 100.

[0092] In addition, the medium layer 103 between the first electrode 101 and the second electrode 102, i.e. the medium layer 103 in the overlapping area 130 has the aperture 113, which is conducive to ensuring the ohmic contact of the first electrode 101 and the second electrode 102 without removing the medium layer 103 in the overlapping area 130, which not only avoids the etching damage to the first electrode caused by removing the medium layer in the overlapping area, but also avoids the etching damage to the transparent conductive layer in contact with the first electrode, reduces the risk of additional defects caused by multiple film layers, and thus further ensures the excellent electrical performance of the photovoltaic cell.

[0093] In some cases, referring to Figure 8 or Figure 11 , the medium layer 103 is also located on the third area 140, and the transparent conductive layer 104 is located between the medium layer 103 and the substrate 100. Based on this, it is conducive to effectively avoiding the corrosion of the transparent conductive layer 104 caused by the flux 44 by means of the medium layer 103 in the third area 140, thereby further reducing the power loss caused by the flux 44 in the process of manufacturing the photovoltaic module, and improving the electrical performance of the photovoltaic module. In other words, even if the transparent conductive layer 104 is also arranged in the area not covered by the first electrode 101 and the second electrode 102, the transparent conductive layer 104 can be well protected by means of the medium layer 103.

[0094] It should be noted that the layout of the transparent conductive layer 104 on the surface of the substrate 100 is different based on the type of the photovoltaic cell. In some cases, referring to Figures 1 to 3 or Figure 10 , the photovoltaic cell can be a cell with electrodes on both sides, such as a TOPCON cell, a PERC cell or a heterojunction cell, based on which the polarity of the first electrode 101 on the same surface of the substrate 100 is the same, and then the transparent conductive layer 104 can be located on the entire surface of the substrate 100; in other cases, referring to Figure 4 , the photovoltaic cell can be a cell with electrodes on one side, such as a BC cell, based on which the polarity of the two adjacent first electrodes 101 in the first direction X is different, for example, the first electrode 101 includes the first current collecting electrode 131 and the second current collecting electrode 141, and the transparent conductive layer 104 in contact with the two first electrodes 101 with different polarities has a spacing, in other words, the transparent conductive layer 104 can correspond to the first electrode 101 one by one.

[0095] In some cases, in combination with referring to Figures 7 to 9 and Figure 11The thickness of the transparent conductive layer 104 can be 20 nm to 200 nm, for example, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, or 190 nm, etc.

[0096] In some embodiments, referring to Figure 9 or Figure 11 The width of the solder strip 43 is greater than the width of the second electrode 102 along the direction perpendicular to the extending direction of the second electrode 102.

[0097] It is worth noting that a single solder strip 43 is used to electrically connect a respective one of the second electrodes 102 of the adjacent two photovoltaic cells 40. In general, in addition to the solder strip 43 being arranged on the side of the second electrode 102 away from the substrate 100, the solder strip 43 also wraps around the side of the second electrode 102 to increase the contact area between the solder strip 43 and the second electrode 102. In other words, the orthogonal projection of the second electrode 102 on the substrate 100 is located in the orthogonal projection of the solder strip 43 on the substrate 100, and the area of the orthogonal projection of the solder strip 43 on the substrate 100 is greater than the area of the orthogonal projection of the second electrode 102 on the substrate 100.

[0098] In some cases, the width of the solder strip 43 can be 0.05 mm to 0.1 mm along the direction perpendicular to the extending direction of the second electrode 102, for example, 0.06 mm, 0.07 mm, 0.08 mm, or 0.09 mm, etc.

[0099] It is to be noted that the cross-sectional shape of the solder strip 43 along the direction perpendicular to the extending direction of the second electrode 102 can be circular, elliptical, rectangular, triangular, etc. Figure 9 and Figure 11 Only the case where the cross-sectional shape of the solder strip 43 is elliptical is taken as an example. Based on this, the width of the solder strip 43 can be regarded as the diameter or the maximum width of the cross-sectional shape of the solder strip 43.

[0100] The thickness of the dielectric layer 103 is described in detail below.

[0101] In some embodiments, referring to Figure 7 The first electrode 101 has opposite bottom end 111 and top end 121 along the third direction Z, the bottom end 111 is closer to the substrate 100, and the third direction Z is the thickness direction of the substrate 100; in the dielectric layer 103 located in the overlapping area 130, the thickness of the dielectric layer 103 located on the surface of the bottom end 111 is greater than or equal to the thickness of the dielectric layer 103 located on the surface of the top end 121.

[0102] It is to be noted that Figure 7The bottom end 111 and the top end 121 are divided in the first electrode 101 by a dashed line, and Figure 7 The divided bottom end 111 and top end 121 are only a relative example, and the proportion of the bottom end 111 and the top end 121 in the first electrode 101 is not limited.

[0103] It is worth noting that, based on the manufacturing process of the first electrode 101, in the cross section perpendicular to the extension direction of the first electrode 101, the cross-sectional shape of the first electrode 101 can be approximately semicircular. In other words, in the direction gradually away from the substrate 100, the cross-sectional width of at least part of the first electrode 101 gradually decreases. In practical applications, the cross-sectional shape of the first electrode in the cross section perpendicular to the extension direction of the first electrode can also be approximately rectangular.

[0104] In addition, when the cross-sectional shape of the first electrode is semicircular, the top end of the first electrode can include a top surface with a larger width in the first direction and a side surface inclined to the center of the top end.

[0105] In some cases, based on the surface topography of the first electrode 101, when the dielectric layer 103 is designed on the surface of the first electrode 101, the dielectric layer 103 with a relatively thick thickness is designed at the bottom end 111, which is beneficial to improve the protection effect of the dielectric layer 103 on the surface contact between the first electrode 101 and the substrate 100; at least the dielectric layer 103 with a relatively thin thickness is designed on the side surface of the top end 121, which is beneficial to reduce the difficulty of forming the pore 113 in the dielectric layer 103, so as to further ensure the ohmic contact between the second electrode 102 and the first electrode 101.

[0106] In addition, in the case that the first electrode 101 protrudes from the surface of the substrate 100, based on the manufacturing process of the dielectric layer 103, the coverage of the dielectric layer 103 at the step changes, which is easy to form the dielectric layer 103 with a relatively thick thickness at the bottom end 111, and at least the dielectric layer 103 with a relatively thin thickness on the side surface of the top end 121. It is worth noting that, in the case that the width of the top surface of the top end 121 is small, the top surface of the top end 121 will also form a dielectric layer 103 with a relatively thin thickness. In practical applications, in the case that the width of the top surface of the top end is large, the top surface of the top end will also form a dielectric layer with a relatively thick thickness, for example, the thickness of the dielectric layer at the bottom end.

[0107] In some examples, continuing to refer to Figure 7The thickness of the dielectric layer 103 gradually decreases along the side of the first electrode 101 from the bottom end 111 to the top end 121 in the overlapping region 130. It is worth noting that in the case where the first electrode 101 protrudes from the surface of the substrate 100 and the cross-sectional width of at least part of the first electrode 101 gradually decreases in the direction gradually away from the substrate 100, the dielectric layer 103 has the feature that the thickness gradually decreases as it is formed upward, and the smaller the thickness, the more conducive to designing the second electrode 102 so that the dielectric layer 103 between the second electrode 102 and the first electrode 101 has the aperture 113.

[0108] It should be noted that the side of the first electrode 101 includes the surface of the bottom end 111 and the side of the top end 121. In actual use, based on the difference in the width of the top surface of the top end, the thickness of the dielectric layer located on the top surface of the top end can be smaller than the thickness of the dielectric layer located on the side of the top end, or the thickness of the dielectric layer located on the top surface of the top end can be substantially the same as the thickness of the dielectric layer located on the bottom end.

[0109] In some cases, in combination with reference to Figures 7 to 9 and Figure 11 The surface of the substrate 100 can also include a protection region in addition to the overlapping region 130, the protection region being a region where the first electrode 101 is not provided, and the dielectric layer 103 is also located on at least part of the protection region; wherein the ratio of the thickness of the dielectric layer 103 located in the overlapping region 130 to the thickness of the dielectric layer 103 located in the protection region can be 30% to 50%, for example, it can be 31%, 32%, 33%, 34%, 35%, 36%, 37%, 38%, 39%, 40%, 41%, 42%, 43%, 44%, 45%, 46%, 47%, 48% or 49%, etc.

[0110] It should be noted that the protection area includes at least one of the second area 120 and the third area 140. In addition, the medium layer 103 located in the protection area, for example, the medium layer 103 located in any one of the second area 120 and the third area 140, has a higher density than the medium layer 103 located in the overlapping area 130 with the hole 113. In other words, the medium layer 103 located in any one of the second area 120 and the third area 140 has almost no hole that can realize electrical conduction, that is, the medium layer 103 located in any one of the second area 120 and the third area 140 has good insulation performance, avoids unnecessary electrical connection between the first electrode 101 and other conductive components, and avoids erosion of the first electrode 101 and the substrate 100 when the solder strip 43 is electrically connected to the second electrode 102. In addition, the medium layer 103 located in any one of the second area 120 and the third area 140 can be used as an anti-reflection layer to reduce the reflectivity of the incident light, greatly increase the area of the substrate 100 that can be used to efficiently absorb the incident light, reduce optical reflection loss, and improve the current density of the photovoltaic cell. In addition, the medium layer 103 can cover the entire surface formed by the substrate 100 and the first electrode 101.

[0111] It should be noted that since the first electrode 101 has been designed on the surface of the substrate 100 before the medium layer 103 is designed, the surface formed by the substrate 100 and the first electrode 101 is in a convex state at the area where the first electrode 101 is located. Based on the manufacturing process of the medium layer 103, the coverage of the medium layer 103 at the convex part changes, so that the thickness of the medium layer 103 located in the protection area is greater than the thickness of at least part of the medium layer 103 located in the overlapping area 130, and the thickness of the medium layer 103 located in the protection area is greater than the thickness of at least part of the medium layer 103 located in the first area 110. Based on the control of the manufacturing process of the medium layer 103, the ratio of the thickness of the medium layer 103 located in the overlapping area 130 to the thickness of the medium layer 103 located in the protection area can be designed to be 30% to 50%. In this way, it is beneficial to ensure that a thicker medium layer 103 is provided on the protection area to improve the protection effect and anti-reflection effect of the substrate 100 and the first electrode 101, while a thinner medium layer 103 is provided on the overlapping area 130 to reduce the difficulty of forming the hole 113 in the medium layer 103 located in the overlapping area 130, thereby further ensuring the ohmic contact between the second electrode 102 and the first electrode 101.

[0112] In some examples, the thickness of the medium layer 103 located in the protection area can be 30 nm to 200 nm, for example, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, or 190 nm, etc.

[0113] In some embodiments, referring to Figures 1 to 11 , the material of the first electrode 101 can include a metal or a mixture of a metal and an organic polymer.

[0114] In some embodiments, referring to Figures 1 to 11 , the material of the second electrode 102 can include a metal or a mixture of a metal and an organic polymer.

[0115] In the above two embodiments, the metal can include at least one of Ag, Al, Cu, Mg, Mo, W, Cr, Ni or Sn.

[0116] In some embodiments, referring to Figures 1 to 11 , the material of the dielectric layer 103 can include at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or magnesium fluoride.

[0117] In some embodiments, referring to Figures 1 to 11 , the dielectric layer 103 can be a single-layer structure or a stacked structure.

[0118] In some embodiments, referring to Figures 1 to 11 , the refractive index of the dielectric layer 103 can be 1.46-2.5, for example, 1.5, 1.55, 1.6, 1.65, 1.7, 1.75, 1.8, 1.85, 1.9, 1.95, 2, 2.05, 2.1, 2.15, 2.2, 2.25, 2.3, 2.35, 2.4 or 2.45, etc.

[0119] In some embodiments, referring to Figures 1 to 11 , the width of the overlapping region 130 in the direction perpendicular to the extension direction of the first electrode 101 can be 5-40 μm, for example, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm or 35 μm, etc. It should be noted that the width of the overlapping region 130 can be regarded as the width of the first electrode 101, and thus the width of the first electrode 101 can also be 5-40 μm.

[0120] In some embodiments, referring to Figures 1 to 11 , the height of the first electrode 101 in the third direction Z can be 5-30 μm, for example, 10 μm, 15 μm, 20 μm or 25 μm, etc. The third direction Z is the thickness direction of the substrate 100.

[0121] It should be noted that in a cross section perpendicular to the extension direction of the first electrode 101, the cross-sectional shape of the first electrode 101 can be approximately semicircular or rectangular, and based on this, the height of the first electrode 101 can be considered as the average of the heights of different parts of the first electrode 101.

[0122] Based on different designs inside the substrate 100, the photovoltaic cell can include at least the following two types.

[0123] In some embodiments, with reference to Figure 12 , Figure 12 A partial cross-sectional schematic view of a single photovoltaic cell in a photovoltaic module according to an embodiment of the present application is provided, the substrate 100 includes: a substrate 105, one surface 135 of the substrate 105 includes fourth regions 115 and fifth regions 125 arranged alternately along a first direction X; a first semiconductor layer 116 and a first doped layer 117, the first semiconductor layer 116 is located on the fourth region 115, and the first doped layer 117 is located on a side of the first semiconductor layer 116 away from the substrate 105; a second semiconductor layer 126 and a second doped layer 127, the second semiconductor layer 126 is located on the fifth region 125, and the second doped layer 127 is located on a side of the second semiconductor layer 126 away from the substrate 105, the second doped layer 127 and the first doped layer 117 are doped with different types of doping elements; the first electrode 101 includes a first current collecting electrode 131 located on the fourth region 115 and a second current collecting electrode 141 located on the fifth region 125, the first current collecting electrode 131 and the first doped layer 117 are electrically connected, and the second current collecting electrode 141 and the second doped layer 127 are electrically connected. In this way, the photovoltaic cell can be considered as a BC cell, and only one surface of the substrate 100 is provided with the first electrode 101 and the second electrode 102 (with reference to Figure 11 ), and the first electrode 101 includes the first current collecting electrode 131 and the second current collecting electrode 141 with different polarities.

[0124] The types of BC cells are described in detail below.

[0125] In some cases, the first semiconductor layer 116 and the second semiconductor layer 126 are tunneling layers, and the first doped layer 117 and the second doped layer 127 are doped polycrystalline silicon layers. In this way, the photovoltaic cell is a TBC cell (TOPCon Back Contact, referring to a cross-passivation back contact cell).

[0126] In other cases, the first semiconductor layer 116 and the second semiconductor layer 126 are intrinsic amorphous silicon layers, and the first doped layer 117 and the second doped layer 127 are doped amorphous silicon layers. In this way, the photovoltaic cell is a HBC cell (Heterojunction Back Contact, heterojunction back contact cell).

[0127] In yet some cases, the first semiconductor layer 116 is a tunneling layer, the first doped layer 117 is a doped polysilicon layer, the second semiconductor layer 126 is an intrinsic amorphous silicon layer, and the second doped layer 127 is a doped amorphous silicon layer. In practical applications, the first semiconductor layer can also be an intrinsic amorphous silicon layer, the first doped layer can be a doped amorphous silicon layer, the second semiconductor layer can be a tunneling layer, and the second doped layer can be a doped polysilicon layer. In this way, the photovoltaic cell is a heterojunction and tunnel oxide passivated contact hybrid passivated backcontact photovoltaic cell (abbreviated as HTBC).

[0128] In the above various cases, one of the second doped layer 127 and the first doped layer 117 is doped with an N-type doping element, and the other of the second doped layer 127 and the first doped layer 117 is doped with a P-type doping element.

[0129] In some examples, the N-type doping element can be at least one of a phosphorus (P) element, a bismuth (Bi) element, an antimony (Sb) element, or an arsenic (As) element, etc. A P-type semiconductor substrate is doped with a P-type element, and the P-type doping element can be at least one of a boron (B) element, an aluminum (Al) element, a gallium (Ga) element, or an indium (In) element, etc.

[0130] In another embodiment, referring to Figure 13 or Figure 14 The substrate 100 includes a substrate 105 having two surfaces 135 opposite along the third direction Z, a semiconductor layer 106 on one of the two surfaces 135, and a doped layer 107 on a side of the semiconductor layer 106 away from the substrate 105. The first electrode 101 includes a first current collector 131 on a side of the doped layer 107 away from the substrate 105, and a second current collector 141 on the other of the two surfaces 135. In this way, the photovoltaic cell can be considered as a cell with electrodes on both sides.

[0131] Wherein, Figure 13 is another partial cross-sectional schematic view of a single photovoltaic cell in a photovoltaic module provided by an embodiment of the present application, Figure 14 is still another partial cross-sectional schematic view of a single photovoltaic cell in a photovoltaic module provided by an embodiment of the present application.

[0132] It should be noted that the substrate 105 has two surfaces 135 opposite along the third direction Z, which can be a first surface 1351 and a second surface 1352, respectively. In some examples, continuing to refer to Figure 13 or Figure 14The semiconductor layer 106, the doped layer 107 and the first current collector 131 are located on the first surface 1351, and the second current collector 141 is located on the second surface 1352.

[0133] The following describes the types of the battery with electrodes on both sides in detail.

[0134] In some cases, referring to Figure 13 The semiconductor layer 106 is a tunneling layer, and the doped layer 107 is a doped polysilicon layer. In this way, the photovoltaic cell is a TOPCON cell.

[0135] In other cases, referring to Figure 14 The semiconductor layer 106 is an intrinsic amorphous silicon layer, and the doped layer 107 is a doped amorphous silicon layer.

[0136] In some examples, continuing to refer to Figure 14 The semiconductor layer 106 is a first intrinsic amorphous silicon layer, and the doped layer 107 is a first doped amorphous silicon layer. The first intrinsic amorphous silicon layer and the first doped amorphous silicon layer are stacked on the first surface 1351. The substrate 100 can further include: a second intrinsic amorphous silicon layer 136 located on the second surface 1352; a second doped amorphous silicon layer 137 located on a side of the second intrinsic amorphous silicon layer 136 away from the second surface 1352; and the second current collector 141 located on a side of the second doped amorphous silicon layer 137 away from the second intrinsic amorphous silicon layer 136. In this way, the photovoltaic cell is a heterojunction cell.

[0137] In the various embodiments described above, the material of the tunneling layer can include one or more of silicon oxide, silicon carbide, silicon nitride, and silicon oxynitride.

[0138] In summary, when the solder strip 43 is electrically connected with the second electrode 102, firstly, the medium layer 103 is designed between the first electrode 101 and the second electrode 102, and the support protection of the medium layer 103 can reduce the force acting on the first electrode 101, so as to reduce the risk of fracture of the first electrode 101 at the overlapping area 130, so as to ensure the high collection efficiency of the first electrode 101 to the photo-generated carriers, improve the photoelectric conversion efficiency of the photovoltaic cell 40, and further improve the electrical performance and structural stability of the photovoltaic module. Moreover, the medium layer 103 has the aperture 113 in the overlapping area 130, which does not affect the transmission of the carriers in the first electrode 101 and the second electrode 102. Secondly, whether the additional soldering material or the material for assisting soldering of the solder strip 43 itself is shielded by the medium layer 103, so as not to erode the first electrode 101, which can further ensure the high collection efficiency of the first electrode 101 to the photo-generated carriers, so as to further improve the electrical performance and structural stability of the photovoltaic module. In addition, for a single photovoltaic cell 40, the first electrode 101 can be directly in ohmic contact with the surface of the substrate 100, which is conducive to controlling the first electrode 101 and the substrate 100 to have a good contact morphology, and the raw material of the first electrode 101 can be a low burn-through conductive material or a non-burn-through conductive material, so that the first electrode 101 is directly in contact with the surface of the substrate 100, and the substrate 100 is not damaged, which is conducive to improving the collection efficiency of the first electrode 101 to the photo-generated carriers in the substrate 100, and can improve the electrical performance of the photovoltaic cell 40, so as to further improve the electrical performance of the photovoltaic module assembled based on the photovoltaic cell 40.

[0139] Another embodiment of the present application also provides a manufacturing method of a photovoltaic module for forming the photovoltaic module provided in the foregoing embodiments. The manufacturing method of the photovoltaic module provided in another embodiment of the present application will be described in detail below with reference to the accompanying drawings. It should be noted that the same or corresponding parts as the foregoing embodiments will not be described herein.

[0140] In combination with reference Figure 1 to 3 and Figure 7 , in combination with reference Figures 4 to 7The manufacturing method of the photovoltaic module at least comprises the following steps: providing a plurality of photovoltaic cells 40; providing a plurality of solder strips 43, and electrically connecting two adjacent photovoltaic cells 40 by using the solder strips 43; a single photovoltaic cell 40 comprises: a substrate 100; a plurality of first electrodes 101 arranged at intervals along a first direction X and a plurality of second electrodes 102 arranged at intervals along a second direction Y on a surface of the substrate 100, the surface of the substrate 100 comprises an overlapping area 130 provided with the first electrodes 101 and the second electrodes 102 at the same time, the first electrodes 101 in the overlapping area 130 are provided with the second electrodes 102 on a side away from the substrate 100, and the first direction X and the second direction Y intersect; a dielectric layer 103 at least between the second electrodes 102 and the first electrodes 101, and the dielectric layer 103 in the overlapping area 130 has apertures 113, and at least part of the number of the apertures 113 contain the first electrodes 101 and / or the second electrodes 102, so that the first electrodes 101 and the second electrodes 102 are in contact; wherein the solder strip 43 is located on a side of the second electrode 102 away from the substrate 100, and the solder strip 43 and the second electrode 102 have the same extension direction.

[0141] It is worth noting that when the solder strip 43 is used to electrically connect two adjacent photovoltaic cells 40, a single solder strip 43 needs to be electrically connected with the second electrodes 102 in the two adjacent photovoltaic cells 40 respectively, and in this process, a large force will be generated on the second electrodes 102, especially on the overlapping area 130 provided with the first electrodes 101 and the second electrodes 102 at the same time. Based on this, the dielectric layer 103 is designed between the first electrodes 101 and the second electrodes 102, which can reduce the force on the first electrodes 101 by the support protection of the dielectric layer 103, so as to reduce the risk of fracture of the first electrodes 101 at the overlapping area 130, so as to ensure the high collection efficiency of the first electrodes 101 to the photo-generated carriers, improve the photoelectric conversion efficiency of the photovoltaic cell 40, and further improve the yield of the manufactured photovoltaic module, and improve the electrical performance and structural stability of the photovoltaic module; Moreover, whether it is the additional soldering material or the material for assisting welding possessed by the solder strip 43 itself, it will be blocked by the dielectric layer 103 and thus will not erode the first electrodes 101, which can further ensure the high collection efficiency of the first electrodes 101 to the photo-generated carriers, so as to further improve the yield of the manufactured photovoltaic module, and improve the electrical performance and structural stability of the photovoltaic module.

[0142] In some embodiments, in combination with reference to Figures 1 to 3 and Figure 7 , or in combination with reference to Figures 4 to 7In some embodiments, the step of electrically connecting the two adjacent photovoltaic cells 40 by the solder strip 43 can include: disposing a flux 44 on the second electrode 102 away from the substrate 100; and soldering the solder strip 43 to the second electrode 102 by the flux 44; wherein the melting range of the flux 44 can be 100-300°C, and the soldering time of the solder strip 43 can be less than or equal to 20s.

[0143] It is worth noting that when soldering the solder strip 43 to the second electrode 102 by the flux 44, the melting range of the flux 44 is designed to be 100-300°C, and the soldering time of the solder strip 43 is designed to be less than or equal to 20s, i.e., the low-temperature soldering process is used to realize the electrical connection between the solder strip 43 and the second electrode 102, which is conducive to reducing the temperature of the photovoltaic cell to reduce the thermal stress inside the photovoltaic cell 40, and can avoid the photovoltaic cell 40 being in an environment higher than room temperature for a long time, so as to further reduce the thermal stress inside the photovoltaic cell 40, thereby avoiding thermal damage to the internal structure of the photovoltaic cell 40, and reducing the risk of warping of the photovoltaic cell 40, so as to further improve the yield and electrical performance of the photovoltaic module formed finally.

[0144] In some cases, the melting range of the flux 44 can be 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, 240°C, 250°C, 260°C, 270°C, 280°C, or 290°C, etc.

[0145] In some cases, the soldering time of the solder strip 43 can be 1s, 2s, 3s, 4s, 5s, 6s, 7s, 8s, 9s, 10s, 11s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, or 19s, etc.

[0146] The following describes the unevenness of the solder strip 43 and the photovoltaic cell 40 in the photovoltaic module in combination with the type of the photovoltaic cell 40.

[0147] In some embodiments, in combination with reference to Figures 1 to 3 , and Figure 13 and Figure 14 The photovoltaic cell 40 is a cell with electrodes on both sides, including but not limited to a TOPcon cell, a PERC cell, or a HJT cell.

[0148] It should be noted that the plurality of photovoltaic cells 40 can be electrically connected by the solder strip 43. Figures 1 to 3Only one position relationship between the photovoltaic cells 40 is shown, that is, the photovoltaic cells 40 have the same polarity of the second electrode, for example, the arrangement direction of the first busbar electrode is the same or in other words, the first surface 1351 of the first busbar electrode of each photovoltaic cell 40 is arranged towards the same side, so that the solder strip 43 is connected to different sides of two adjacent photovoltaic cells 40 respectively. In other embodiments, the photovoltaic cells can also be arranged according to the same side of the second electrode of different polarity, that is, the first electrode of the adjacent photovoltaic cells on the same side is arranged in the order of first busbar electrode, second busbar electrode, first busbar electrode, second busbar electrode in sequence, and the solder strip is connected to two adjacent photovoltaic cells on the same side.

[0149] In some other embodiments, in combination with reference to Figures 4 to 6 , and Figure 12 , the photovoltaic cell 40 is a BC cell, which includes but is not limited to an HBC cell, a TBC cell, an HTBC cell, etc.

[0150] It should be noted that the plurality of photovoltaic cells 40 can be electrically connected by the solder strip 43. Figures 4 to 6 Only one position relationship between the photovoltaic cells 40 is shown, that is, the first surface 1351 of the first busbar electrode of each photovoltaic cell 40 is arranged towards the same side, so that the solder strip 43 is connected to different sides of two adjacent photovoltaic cells 40 respectively. In other embodiments, the photovoltaic cells can also be arranged according to the same side of the second electrode of different polarity, that is, the first electrode of the adjacent photovoltaic cells on the same side is arranged in the order of first busbar electrode, second busbar electrode, first busbar electrode, second busbar electrode in sequence, and the solder strip is connected to two adjacent photovoltaic cells on the same side.

[0151] In some embodiments, the photovoltaic cells 40 are electrically connected in the form of a whole piece or multiple pieces to form a plurality of cell strings, and the plurality of cell strings are electrically connected in series and / or parallel. The photovoltaic cell 40 can be a whole piece cell or a sliced cell, which refers to a cell formed by cutting a complete whole piece cell.

[0152] In some embodiments, the encapsulation film 41 comprises a first encapsulation layer covering one of the front side or the back side of the photovoltaic cell 40, and a second encapsulation layer covering the other of the front side or the back side of the photovoltaic cell 40. Specifically, at least one of the first encapsulation layer or the second encapsulation layer can be an organic encapsulation film such as a polyvinyl butyral (PVB) film, an ethylene-vinyl acetate (EVA) film, a polyolefin elastomer (POE) film, or a polyethylene terephthalate (PET) film, or at least one of the first encapsulation layer or the second encapsulation layer can also be an EP film, an EPE film, or a PVP film. The EP film refers to a co-extrusion film formed by stacking an EVA film and a POE film, the EPE film refers to a co-extrusion film formed by stacking an EVA film, a POE film, and an EVA film in sequence, and the PVP film refers to a co-extrusion film formed by stacking a POE film, an EVA film, and a POE film in sequence. The co-extrusion film can be prepared by extruding one or more raw materials onto another film that has been prepared, or by bonding different kinds of films to each other during film processing.

[0153] In some cases, the first encapsulation layer and the second encapsulation layer have a boundary before lamination, and after lamination, the photovoltaic module is formed without the concept of the first encapsulation layer and the second encapsulation layer, i.e., the first encapsulation layer and the second encapsulation layer have formed an integral encapsulation film 41.

[0154] In some embodiments, the cover plate 42 can be a glass cover plate, a plastic cover plate, or the like having a light-transmitting function. Specifically, the surface of the cover plate 42 facing the encapsulation film 41 can be a concave-convex surface or a suede surface comprising a plurality of convex structures, thereby increasing the utilization rate of incident light. The cover plate 42 comprises a first cover plate opposite the first encapsulation layer and a second cover plate opposite the second encapsulation layer.

[0155] The following describes the step of providing the photovoltaic cell 40 in the method of manufacturing the photovoltaic module according to another embodiment of the present application.

[0156] In some embodiments, the step of providing the photovoltaic cell 40 comprises the following steps: Figures 1 to 14 Figure 1 Figure 4 Figure 10 The step of providing the substrate 100 comprises the following steps: Figure 1 Figure 4 Figure 10 The step of forming the plurality of first electrodes 101 on the surface of the substrate 100 comprises the following steps:​​​​​Figure 7 forming a plurality of second electrodes 102 on the surface of the initial dielectric layer, the second electrodes 102 are arranged in the second direction Y, the first direction X and the second direction Y are perpendicular to each other; wherein the surface of the substrate 100 comprises an overlapping region 130 where the first electrode 101 and the second electrode 102 are arranged simultaneously, in the process of forming the second electrode 102, the initial dielectric layer in the overlapping region 130 is converted into a dielectric layer 103 with pores 113, and at least part of the pores 113 contain the first electrode 101 and / or the second electrode 102, so that the first electrode 101 and the second electrode 102 are in contact.

[0157] It is worth noting that first, after the formation of the first electrode 101, since the first electrode 101 protrudes from the surface of the substrate 100, the surface formed by the substrate 100 and the first electrode 101 together has a concave-convex topography, based on this, when preparing the initial dielectric layer, the coverage of the film layer at the mutation or step is reduced, which makes the initial dielectric layer formed on the overlapping region 130 thinner, and it is not easy to form a dense initial dielectric layer on the overlapping region 130, in other words, the initial dielectric layer formed on the overlapping region 130 is loose itself. Further, after the formation of the initial dielectric layer, the second electrode 102 is formed, so that the initial dielectric layer with thin thickness and loose in the overlapping region 130 is easily penetrated by the second electrode 102, and the influence of thermal stress in the process of forming the second electrode 102 will also promote the formation of pores 113 containing the first electrode 101 and / or the second electrode 102 in the initial dielectric layer in the overlapping region 130. In this way, without using additional processes to remove the dielectric layer 103 between the first electrode 101 and the second electrode 102, the ohmic contact of the first electrode 101 and the second electrode 102 can be achieved, avoiding etching damage to the first electrode 101, and facilitating the simplification of the manufacturing process of the photovoltaic cell and the reduction of the manufacturing cost of the photovoltaic cell.

[0158] In addition, the initial dielectric layer in the region outside the overlapping region 130 can be considered as a dielectric layer 103 without pores that can realize electrical conduction, which can play the effect of insulation and anti-reflection, so as to reduce the reflectivity of the incident light and improve the absorption and utilization of light by the substrate 100.

[0159] In summary, the preparation process of the dielectric layer 103 for insulation and anti-reflection effect is integrated into the steps of forming the first electrode 101 and the second electrode 102, which can simplify the manufacturing process of the photovoltaic cell as much as possible. Firstly, compared with the technical solution of forming the dielectric layer for insulation and anti-reflection effect first and then forming the first electrode, the first electrode needs to have high burn-through property to make ohmic contact with the surface of the dielectric layer and the substrate, which is not only conducive to controlling the good contact morphology between the first electrode 101 and the substrate 100 to improve the collection efficiency of the photogenerated carriers in the substrate 100 by the first electrode 101, but also conducive to making the raw material of the first electrode 101 use low-cost low-burn-through conductive material or non-burn-through conductive material, so that the first electrode 101 directly contacts the surface of the substrate 100 and does not cause great damage to the substrate 100, and the preparation cost of the first electrode 101 can be reduced. In addition, before the second electrode 102 is formed, the first electrode 101 can be protected by the dielectric layer 103 to reduce the risk of damage or pollution of the first electrode 101, thereby improving the yield of the first electrode 101.

[0160] Secondly, compared with the technical solution of forming the dielectric layer for insulation and anti-reflection effect after forming the first electrode and the second electrode, the dielectric layer on the surface of the second electrode needs to be removed to facilitate the subsequent solder strip electrical connection between the second electrode in the adjacent two photovoltaic cells. The second electrode 102 is formed outside the dielectric layer 103, so that the second electrode 102 is not blocked by the dielectric layer 103, and there is no need to remove the dielectric layer 103 by using an additional process, which can avoid etching damage to the second electrode 102, is conducive to simplifying the manufacturing process of the photovoltaic cell and reducing the manufacturing cost of the photovoltaic cell, and can ensure that the subsequent solder strip and the second electrode 102 have good electrical connection performance.

[0161] In some cases, in combination with reference to Figure 4 and Figure 12 , the step of providing the substrate 100 can include: providing a substrate 105, one surface 135 of the substrate 105 includes fourth regions 115 and fifth regions 125 arranged alternately along the first direction X; forming a first semiconductor layer 116 on the fourth region 115 and forming a first doped layer 117 on the side of the first semiconductor layer 116 away from the substrate 105; forming a second semiconductor layer 126 on the fifth region 125 and forming a second doped layer 127 on the side of the second semiconductor layer 126 away from the substrate 105, the second doped layer 127 and the first doped layer 117 are doped with different types of doped elements.

[0162] On this basis, the step of forming the first electrode 101 comprises: forming a first current collector 131 on the side of the first doped layer 117 away from the fourth region 115, and the first current collector 131 and the first doped layer 117 are electrically connected; forming a second current collector 141 on the side of the second doped layer 127 away from the fifth region 125, and the second current collector 141 and the second doped layer 127 are electrically connected; the first electrode 101 comprises the first current collector 131 and the second current collector 141 with different polarities. In this way, the photovoltaic cell can be regarded as a BC cell, and only one surface of the substrate 100 is provided with the first electrode 101 and the second electrode 102. It should be noted that the fourth region 115 and the fifth region 125 are both a kind of first region 110.

[0163] It should be noted that the description of the first semiconductor layer 116, the first doped layer 117, the second semiconductor layer 126 and the second doped layer 127 is the same as or corresponding to the foregoing embodiment, and will not be repeated here. In addition, the forming process steps of the first semiconductor layer 116, the first doped layer 117, the second semiconductor layer 126 and the second doped layer 127 in the manufacturing method of the photovoltaic module provided by another embodiment of the present application are not limited too much, and can be adjusted according to the actual process.

[0164] In some examples, continuing to refer to Figure 12 After providing the substrate 100, before forming the first electrode 101, a transparent conductive layer 104 is also formed on the surface of the substrate 100, and then the first electrode 101 is formed on the side of the transparent conductive layer 104 away from the substrate.

[0165] In other cases, referring to Figure 13 Or Figure 14 The step of providing the substrate 100 can comprise: providing a substrate 105, the substrate 105 having two surfaces 135 opposite along a third direction Z; forming a semiconductor layer 106 on one of the two surfaces 135, for example, a first surface 1351; forming a doped layer 107 on the side of the semiconductor layer 106 away from the substrate 105.

[0166] On this basis, the step of forming the first electrode 101 comprises: forming a first current collector 131 on the side of the doped layer 107 away from the substrate 105, and the first current collector 131 and the first doped layer 117 are electrically connected; forming a second current collector 141 on the other of the two surfaces 135, for example, a second surface 1352; the first electrode 101 comprises the first current collector 131 and the second current collector 141. In this way, the photovoltaic cell can be regarded as a double-sided electrode cell. It should be noted that the formation order of the first current collector 131 and the second current collector 141 can be reversed.

[0167] In some examples, the step of forming the second current collector 141 after forming the first current collector 131 can include: first forming an initial first current collector on the side of the doped layer 107 away from the substrate 105, and then performing a drying treatment on the initial first current collector; then forming an initial second current collector on the other one of the two surfaces 135, for example, the second surface 1352, and then performing a drying treatment on the initial second current collector; and finally performing a solidification treatment on both the initial first current collector and the initial second current collector, so as to convert the initial first current collector into the first current collector 131 and convert the initial second current collector into the second current collector 141. It is worth noting that, before forming the initial second current collector, the initial first current collector is subjected to the drying treatment to reduce the fluidity and viscosity of the initial first current collector, so as to avoid damage to the initial first current collector when the semi-finished battery is flipped, for example, to avoid the initial first current collector from being left on the conveyor belt when the initial first current collector is in contact with the conveyor belt. After forming the initial second current collector, the initial first current collector and the initial second current collector are subjected to the solidification treatment, which is also conducive to simplifying the manufacturing process of the first electrode 101.

[0168] It should be noted that the description of the semiconductor layer 106 and the doped layer 107 is the same as or similar to that of the foregoing embodiments, and thus is not described herein again.

[0169] In some cases, the initial dielectric layer can be formed by a deposition process. The deposition process can be performed at a temperature of 100-300°C, for example, 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, 240°C, 250°C, 260°C, 270°C, 280°C, or 290°C. The deposition process can be performed for a time period of 10-120 minutes, for example, 20 minutes, 30 minutes, 40 minutes, 50 minutes, 60 minutes, 70 minutes, 80 minutes, 90 minutes, 100 minutes, or 110 minutes.

[0170] In some examples, the deposition process for forming the initial dielectric layer can be a PECVD (Plasma Enhanced Chemical Vapor Deposition) process, a HWCVD (Hot Wire Assisted Chemical Vapor Deposition) process, or an ALD (Atomic Layer Deposition) process.

[0171] In some examples, the initial dielectric layer can have a thickness of 60 nm to 200 nm, for example, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm, 120 nm, 130 nm, 140 nm, 150 nm, 160 nm, 170 nm, 180 nm, or 190 nm, etc.

[0172] In some cases, in combination with reference to Figure 1 , Figure 4 or Figure 10 and Figure 7 , the step of forming the second electrode 102 can include: forming a plurality of initial second electrodes spaced along the second direction Y on the surface of the initial dielectric layer; and sequentially performing a drying treatment and a curing treatment on the initial second electrodes to convert the initial second electrodes into the second electrode 102; wherein the drying treatment has a processing temperature of 100°C to 200°C and a processing time of 1 min to 10 min, and the curing treatment has a processing temperature of 60°C to 250°C and a processing time of 0 min to 60 min.

[0173] It is worth noting that in the drying treatment and the curing treatment, the processing temperature is higher than the normal temperature, so that the initial dielectric layer with a relatively thin thickness in the overlapping area 130 is easily affected by thermal stress, and then pores 113 appear in the film layer. Moreover, the second electrode 102 further penetrates into the loose initial dielectric layer, and the first electrode 101 can also be squeezed into the pores 113 under the influence of thermal stress, so that the first electrode 101 and the second electrode 102 can be in ohmic contact even if there is a dielectric layer 103 between them.

[0174] In some examples, the drying treatment can have a processing temperature of 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, or 190°C, etc.

[0175] In some examples, the drying treatment can have a processing time of 2 min, 3 min, 4 min, 5 min, 6 min, 7 min, 8 min, or 9 min, etc.

[0176] In some examples, the curing treatment can have a processing temperature of 70°C, 80°C, 90°C, 100°C, 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, or 240°C, etc.

[0177] In some examples, the curing treatment can have a processing time of 5 min, 10 min, 15 min, 20 min, 25 min, 30 min, 35 min, 40 min, 45 min, 50 min, or 55 min, etc.

[0178] The following is a manufacturing method of a photovoltaic module provided by another embodiment of the present application. The photovoltaic cell provided in the manufacturing method is an HJT cell, i.e. Figure 14 The specific embodiment of the photovoltaic cell shown corresponds.

[0179] The back contact cell is prepared by the following steps:

[0180] (1) An N-type silicon wafer is selected, the resistivity of the N-type silicon wafer is about 0.5 Ω·m~8 Ω·m, the thickness of the N-type single crystal silicon wafer in the third direction Z is about 100 μm~200 μm, the short side length of the N-type silicon wafer can be 182 mm, and the long side length of the N-type silicon wafer can be 210 mm.

[0181] (2) The N-type silicon wafer is subjected to cleaning treatment and texturing treatment. For example, the cleaning treatment can use a dilution degree of 5% hydrofluoric acid solution to remove the surface oxide layer; the texturing treatment can use potassium hydroxide, sodium hydroxide or tetramethylammonium hydroxide plus alcohol method, and utilize the anisotropic etching of single crystal silicon to form a relatively shallow pyramid structure on the surface of the N-type silicon wafer to obtain the substrate 105.

[0182] (3) The substrate 105 is placed in a vacuum chamber, then silane gas is introduced into the vacuum chamber, and an intrinsic amorphous silicon layer, i.e. a semiconductor layer 106, is formed on the entire area of the first surface 1351 of the substrate 105 by plasma chemical vapor deposition process. Then silane gas, hydrogen gas and phosphine gas are introduced into the vacuum chamber, and a doped amorphous silicon layer doped with N-type doping elements, i.e. a doping layer 107, is formed on the intrinsic amorphous silicon layer by plasma chemical vapor deposition process.

[0183] (4) The semi-finished product cell formed after step (3) is subjected to turning over treatment, the tray carrying the semi-finished product cell is replaced, then silane gas is introduced into the vacuum chamber, and an intrinsic amorphous silicon layer, i.e. a second intrinsic amorphous silicon layer 136, is formed on the entire area of the second surface 1352 of the substrate 105 by plasma chemical vapor deposition process; then silane gas, hydrogen and diborane gas are introduced into the vacuum chamber, and a doped amorphous silicon layer doped with P-type doping elements, i.e. a second doped amorphous silicon layer 137, is formed on the intrinsic amorphous silicon layer by plasma chemical vapor deposition process, to obtain the substrate 100.

[0184] (5) RPD (reactive plasma deposition) process or magnetron sputtering process is used for film plating to form a transparent conductive layer 104 on the intrinsic amorphous silicon layer located at the first surface 1351 and the second surface 1352, and the thickness of the transparent conductive layer 104 can be 20 nm~200 nm.

[0185] (6) Forming an initial first current collecting electrode on the first area and the overlapping area of the second surface 1352 by one or more steps of printing, the printing process including but not limited to screen printing, steel mesh printing, laser transfer printing or copper electroplating, etc., the width of the initial first current collecting electrode can be 5 μm to 40 μm, and the height of the initial first current collecting electrode can be 5 μm to 30 μm; performing 1 time of drying treatment on the initial first current collecting electrode, the processing temperature of the drying treatment is 100 ℃ to 200 ℃, and the processing time of the drying treatment is 1 min to 10 min; then, forming an initial second current collecting electrode on the first area and the overlapping area of the first surface 1351 by one or more steps of printing, the width of the initial second current collecting electrode can be 5 μm to 40 μm, and the height of the initial second current collecting electrode can be 5 μm to 30 μm; performing 1 time of drying treatment on the initial second current collecting electrode, the processing temperature of the drying treatment is 100 ℃ to 200 ℃, and the processing time of the drying treatment is 1 min to 10 min; performing 1 time of curing treatment on the initial first current collecting electrode and the initial second current collecting electrode, the processing temperature of the curing treatment is 60 ℃ to 250 ℃, and the processing time of the curing treatment is 0 min to 60 min, the initial first current collecting electrode is converted into the first current collecting electrode 131, and the initial second current collecting electrode is converted into the second current collecting electrode 141, so as to complete the manufacturing of the first electrode 101.

[0186] (7) Depositing an initial dielectric layer on the first surface 1351 and the second surface 1352 after forming the first electrode 101 by PECVD process, HWCVD process or ALD process, the initial dielectric layer can be a single-layer structure or a laminated structure including at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide or magnesium fluoride.

[0187] (8) Form a second electrode 102 on the semi-finished battery formed after step (7). Specifically, by one or more steps of printing, the printing process includes but is not limited to screen printing, steel mesh printing, laser transfer printing or copper electroplating, etc. to form an initial second electrode on the second area of the second surface 1352 and the overlapping area, which can be referred to as an initial first bus electrode, and the area ratio of the overlapping area to the first area can be 0.005%~1.705%; the initial second electrode formed on the second surface 1352, i.e. the initial first bus electrode, is subjected to 1 drying treatment, and the process parameters of the drying treatment can be the same as those of the drying treatment in step (6); then, by one or more steps of printing, an initial second electrode is also formed on the second area and the overlapping area of the first surface 1351, which can be referred to as an initial second bus electrode; the initial second electrode formed on the first surface 1351, i.e. the initial second bus electrode, is subjected to 1 drying treatment, and the process parameters of the drying treatment can be the same as those of the drying treatment in step (6); the initial second electrode located on the two surfaces 135, i.e. the initial first bus electrode and the initial second bus electrode, is subjected to 1 curing treatment, and the curing treatment temperature is 60℃~250℃, and the curing treatment time is 0min~60min, the initial first bus electrode is converted into a first bus electrode, and the initial second bus electrode is converted into a second bus electrode, and the second electrode 102 includes the first bus electrode and the second bus electrode, to complete the manufacturing of the second electrode 102.

[0188] (9) Use low-temperature solder strips (solder strip diameter range: 0.05mm-0.1mm) and flux 44 (melting range: 100-300℃) to connect the second electrodes of adjacent photovoltaic cells in series; wherein the welding time is controlled to be ≤20s to avoid damaging the photovoltaic cells themselves. During welding, the solder strip and the flux cannot directly contact the first electrode or the transparent conductive layer due to the presence of the dielectric layer. The solder strip and the flux are directly welded with the second electrode, and the flux at the edge of the solder strip that does not contact the second electrode contacts the dielectric layer and cannot directly contact the first electrode or the transparent conductive layer.

[0189] (10) Arrange the series-welded cell string, and place it together with the packaging adhesive film and the cover plate into a laminator for packaging to ensure vacuum lamination.

[0190] (11) Package the laminated photovoltaic module into a metal frame.

[0191] Those skilled in the art can understand that the above-mentioned embodiments are specific examples for implementing the present application, and in actual applications, various changes can be made in form and details without departing from the spirit and scope of the embodiments of the present application. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present application, and therefore the protection scope of the embodiments of the present application should be subject to the scope defined by the claims.

Claims

1. A photovoltaic module, characterized in that, include: Multiple photovoltaic cells; The welding strip electrically connects two adjacent photovoltaic cells. A single photovoltaic cell includes: a substrate; a plurality of first electrodes and a plurality of second electrodes arranged at intervals along a first direction on the surface of the substrate, the surface of the substrate including an overlapping region where the first electrodes and the second electrodes are simultaneously disposed, the second electrodes being disposed on the side of the first electrodes in the overlapping region away from the substrate, the first direction and the second direction intersecting; a dielectric layer, at least between the second electrodes and the first electrodes, and the dielectric layer in the overlapping region having pores, the pores being formed during the formation of the second electrodes, at least a portion of the pores accommodating the first electrodes and / or the second electrodes, such that the first electrodes and the second electrodes are in contact; The substrate surface further includes a protection zone other than the overlapping region. The protection zone is a region where the first electrode is not disposed. The dielectric layer is located on at least a portion of the protection zone. The thickness of the dielectric layer in the protection zone is greater than the thickness of at least a portion of the dielectric layer in the overlapping region. The thickness of the dielectric layer in the protection zone is 30 nm to 200 nm. The solder ribbon is located on the side of the second electrode away from the substrate, and the solder ribbon and the second electrode extend in the same direction.

2. The photovoltaic module according to claim 1, characterized in that, Also includes: Flux is located between the solder strip and the second electrode.

3. The photovoltaic module according to claim 2, characterized in that, The surface of the substrate further includes a first region on which the first electrode is disposed; the dielectric layer is also located on the first region and on the surface of the first electrode away from the substrate; Along the extension direction of the first electrode, the flux is located not only on the surface of the second electrode away from the substrate, but also on a portion of the surface of the dielectric layer in the first region away from the substrate.

4. The photovoltaic module according to claim 1 or 2, characterized in that, Along the extension direction of the second electrode, a single second electrode includes a plurality of spaced busbars, each of the busbars being located on the side of a first electrode away from the substrate, and the dielectric layer being present in the interval between two adjacent busbars; the solder strip also covers the dielectric layer located in the interval between two adjacent busbars.

5. The photovoltaic module according to claim 4, characterized in that, Also includes: Flux, which is located between the solder strip and the dielectric layer.

6. The photovoltaic module according to claim 1, characterized in that, The surface of the substrate further includes a second region on which the second electrode is disposed; the dielectric layer is also located on the second region and between the second electrode and the substrate.

7. The photovoltaic module according to claim 6, characterized in that, The surface of the substrate further includes a third region, which is a region where the first electrode and the second electrode are not disposed; the dielectric layer is also located on the third region. The photovoltaic module further includes: flux; along the extension direction of the first electrode, the flux is located not only on the surface of the second electrode away from the substrate, but also on a portion of the surface of the dielectric layer in the third region away from the substrate.

8. The photovoltaic module according to claim 1, characterized in that, The photovoltaic cell further includes: a transparent conductive layer located between the dielectric layer and the substrate, and between the first electrode and the substrate.

9. The photovoltaic module according to claim 1, characterized in that, Along the extension direction perpendicular to the second electrode, the width of the solder strip is greater than the width of the second electrode.

10. The photovoltaic module according to claim 1, characterized in that, The first electrode has a bottom end and a top end along a third direction, the bottom end being closer to the substrate, and the third direction being the thickness direction of the substrate; in the dielectric layer located in the overlapping region, the thickness of the dielectric layer on the surface located at the bottom end is greater than or equal to the thickness of the dielectric layer on the surface located at the top end.

11. The photovoltaic module according to claim 1, characterized in that, The substrate includes: A substrate, one surface of which includes a fourth region and a fifth region arranged alternately along the first direction; A first semiconductor layer and a first doped layer, wherein the first semiconductor layer is located on the fourth region and the first doped layer is located on the side of the first semiconductor layer away from the substrate; A second semiconductor layer and a second doped layer, the second semiconductor layer being located on the fifth region, the second doped layer being located on the side of the second semiconductor layer away from the substrate, the second doped layer and the first doped layer being doped with different types of doping elements; The first electrode includes a first current collector electrode located in the fourth region and a second current collector electrode located in the fifth region. The first current collector electrode is electrically connected to the first doped layer, and the second current collector electrode is electrically connected to the second doped layer. Wherein, the first semiconductor layer and the second semiconductor layer are tunneling layers, and the first doped layer and the second doped layer are doped polycrystalline silicon layers; or, the first semiconductor layer and the second semiconductor layer are intrinsic amorphous silicon layers, and the first doped layer and the second doped layer are doped amorphous silicon layers; or, the first semiconductor layer is the tunneling layer, the first doped layer is the doped polycrystalline silicon layer, the second semiconductor layer is the intrinsic amorphous silicon layer, and the second doped layer is the doped amorphous silicon layer.

12. The photovoltaic module according to claim 1, characterized in that, The substrate includes: The substrate has two surfaces opposite each other along a third direction; A semiconductor layer is located on one of the two surfaces; A doped layer is located on the side of the semiconductor layer away from the substrate; The first electrode includes a first current collector located on the side of the doped layer away from the substrate, and a second current collector located on the other of the two surfaces; Wherein, the semiconductor layer is a tunneling layer and the doped layer is a doped polycrystalline silicon layer; or, the semiconductor layer is an intrinsic amorphous silicon layer and the doped layer is a doped amorphous silicon layer.

13. A method for manufacturing a photovoltaic module, characterized in that, include: Provides multiple photovoltaic cells; Multiple solder strips are provided, and two adjacent photovoltaic cells are electrically connected using the solder strips; A single photovoltaic cell includes: a substrate; a plurality of first electrodes and a plurality of second electrodes arranged at intervals along a first direction on the surface of the substrate, the surface of the substrate including an overlapping region where the first electrodes and the second electrodes are simultaneously disposed, the second electrodes being disposed on the side of the first electrodes in the overlapping region away from the substrate, the first direction and the second direction intersecting; a dielectric layer, at least between the second electrodes and the first electrodes, and the dielectric layer in the overlapping region having pores, the pores being formed during the formation of the second electrodes, at least a portion of the pores accommodating the first electrodes and / or the second electrodes, such that the first electrodes and the second electrodes are in contact; The substrate surface further includes a protection zone other than the overlapping region. The protection zone is a region where the first electrode is not disposed. The dielectric layer is located on at least a portion of the protection zone. The thickness of the dielectric layer in the protection zone is greater than the thickness of at least a portion of the dielectric layer in the overlapping region. The thickness of the dielectric layer in the protection zone is 30 nm to 200 nm. The solder ribbon is located on the side of the second electrode away from the substrate, and the solder ribbon and the second electrode extend in the same direction.

14. The method for manufacturing a photovoltaic module according to claim 13, characterized in that, The step of electrically connecting two adjacent photovoltaic cells using the welding strip includes: Flux is applied to at least the side of the second electrode away from the substrate; The solder strip is soldered onto the second electrode using the flux. The flux has a melting range of 100℃ to 300℃, and the welding time for the solder strip is less than or equal to 20s.

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