Interference suppression method, system and device based on frequency point quality cognition and medium

Abstract

The invention discloses an interference suppression method, system and device based on frequency point quality cognition and a medium, and relates to the field of frequency hopping communication. A transmitting end adopts a frame structure of'synchronous head sequence + information sequence + synchronous tail sequence ', and forms a frequency hopping pulse signal for radiation after processes of coding, framing and frequency hopping modulation; a receiving end processes a received frequency hopping pulse signal after signal detection and timing synchronization, calculates a noise power value of each frequency hopping pulse after frequency hopping pulse synchronization head and tail sequences are correlated with a local sequence, calculates a noise weight value of each pulse, multiplies a weight factor with a pulse signal after channel equalization, and obtains a frequency hopping pulse signal. By reducing the signal observed quantity weight of the interfered frequency point, the influence of the confidence coefficient reduction caused by the interference signal on the channel decoding of the whole communication system is suppressed, so that the reliable transmission under the condition of low signal-to-noise ratio and strong interference is realized.

Description

Technical Field

[0001] This invention relates to the field of frequency hopping communication, and specifically to an interference suppression method, system, device, and medium based on frequency point quality perception. Background Technology

[0002] The statements in this section are provided only as background information in connection with this disclosure and may not constitute prior art.

[0003] Low-cost unmanned platform communication terminals are frequently subjected to various forms of electromagnetic interference in practical applications, which can severely affect communication quality and stability. High anti-interference capability is a key indicator for the normal operation of unmanned platform communication terminals, ensuring the stability, reliability, and security of the communication link. Given limited cost and resources, improving the anti-interference capability of unmanned platform communication terminals has become an urgent problem to be solved.

[0004] Since its inception, frequency-hopping communication has been used to improve the anti-jamming capabilities of communication networks. Because the operating frequencies of frequency-hopping communication are dispersed, it is difficult for jammers to intercept and interfere with the signals. However, there are still jamming methods targeting frequency-hopping communication networks, such as jamming and frequency-selective jamming. Jamming can cover the entire operating bandwidth of the communication system, achieving the goal of paralyzing the system. Frequency-selective jamming refers to covering certain frequency bands of the frequency-hopping communication system, which can also affect communication quality.

[0005] Conventional anti-jamming methods for frequency hopping communication networks include randomizing the frequency hopping sequence to make it difficult for jammers to capture the operating frequency, changing the hopping rate to reduce the dwell time in the jammed frequency band, or increasing the number of hopping frequencies to make it difficult for jammers to cover all frequencies. For low-cost communication systems, these methods undoubtedly increase overhead and complexity. Summary of the Invention

[0006] The purpose of this invention is to address the interference methods such as blocking interference and frequency-selective interference in current low-cost unmanned platform communication terminals, as well as the need for low-cost and low-complexity transmission. It provides an interference suppression method, system, device, and medium based on frequency point quality awareness. The transmitter adopts a frame structure of "synchronization header sequence + information segment + synchronization tail sequence," which is radiated to the air interface after encoding, framing, and modulation. At the receiver, after signal detection and timing synchronization, the synchronization header and tail sequences of each frequency-hopping pulse are extracted. The noise power value of each frequency-hopping pulse is calculated using the synchronization sequence, and the weight value of each pulse is calculated. The weight factor is multiplied by the channel-equalized signal. By reducing the signal observation of the interfered frequency point, the impact of interference signals on the confidence reduction of the entire communication system's channel decoding is suppressed. Finally, demodulation and decoding are completed, achieving reliable transmission under low signal-to-noise ratio and strong interference.

[0007] The technical solution of the present invention is as follows: An interference suppression method based on frequency point quality cognition includes: Step S1: The transmitter encodes and frames according to the preset frame structure; the frame structure is: synchronization header sequence + information sequence + synchronization tail sequence; Step S2: Modulate the signal according to the frequency hopping pattern to form a frequency hopping pulse signal for transmission, with a fixed frequency hopping frequency within each pulse; Step S3: The receiving end performs signal detection and timing synchronization on the received signal, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse signal; Step S4: The local synchronization sequence is multiplied by the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal by conjugate, and the sum is calculated and the mean square is obtained to obtain the useful signal power of the synchronization head sequence and synchronization tail sequence. Step S5: Calculate the total power of each frequency hopping pulse signal based on the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal extracted in Step 3; Step S6: Obtain the noise power value of the pulse synchronization head sequence and synchronization tail sequence at each frequency hopping point by subtracting the total power of each frequency hopping pulse signal from the power of the useful signal; Step S7: Take the maximum noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse as the noise power of each frequency hopping pulse; Step S8: Calculate the weighting factor for each frequency hopping pulse based on the noise power; Step S9: Multiply the channel-equalized pulse signal with its respective weighting factor to suppress the signal amplitude of the frequency hopping pulse that is strongly interfered with, and amplify the signal amplitude of the frequency hopping pulse that is not interfered with or is less interfered with. Step S10: Demodulate and decode to recover the information sequence.

[0008] Further, the useful signal power of the synchronization head sequence and the synchronization tail sequence in step S4 is expressed as follows:

[0009]

[0010] in: Indicates the first l The useful signal power of the synchronization header sequence of a frequency hopping pulse; Indicates the first l The useful signal power of the synchronization tail sequence of a frequency hopping pulse; The k-th modulation symbol in the local sequence; This is the kth received symbol; The length of the synchronization sequence; This is the time interval between the start time of the synchronization header sequence and the start time of the synchronization tail sequence.

[0011] Further, the total power of each frequency-hopping pulse signal in step S5 is expressed as:

[0012]

[0013] in: Indicates the first l The total power of the synchronization header sequence of the frequency hopping pulses; Indicates the first l The total power of the synchronization tail sequence of the frequency hopping pulse.

[0014] Further, in step S6, the noise power values ​​of the synchronization head sequence and synchronization tail sequence at each frequency hopping point are expressed as follows:

[0015]

[0016] in: Indicates the first l Noise power of the synchronization header sequence of a frequency hopping pulse; Indicates the first l The noise power of the synchronization tail sequence of a frequency hopping pulse.

[0017] Further, in step S7, the maximum value of the noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse is taken as the noise power of each frequency hopping pulse and expressed as follows:

[0018] in: This indicates that the first step determined in step S7 is... The noise power of a frequency hopping pulse; This represents the noise power value of the pulse synchronization header sequence at all frequency hopping points; This represents the noise power value of the pulse synchronization tail sequence at all frequency hopping points.

[0019] Furthermore, the formula for calculating the weighting factor in step S8 is as follows:

[0020] in: Indicates the first Weighting factors for each frequency hopping pulse; This represents the average noise power of all frequency-hopping pulses.

[0021] Further, step S9 includes:

[0022] in: Indicates the first l The signal after interference suppression of the pulse; For the first l One pulse of original equalization signal.

[0023] This invention also proposes an interference suppression system based on frequency point quality cognition, for implementing the above-mentioned interference suppression method based on frequency point quality cognition, comprising: a transmitter and a receiver; The transmitting end includes: The encoding module is used to perform channel coding on the information sequence; The framing module is used to frame the encoded information sequence according to the frame structure of synchronization header sequence + information sequence + synchronization tail sequence. The frequency hopping modulation module modulates the framed signal according to the frequency hopping pattern to generate a frequency hopping pulse signal, with a fixed frequency hopping frequency in each pulse. The upconversion module upconverts the frequency-hopping pulse signal to radio frequency for radiation. The receiving end includes: The downconversion module is used to perform downconversion processing on the received signal; The signal detection and timing synchronization module detects the down-converted signal, completes timing synchronization, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse. The noise power calculation module is used to perform the following operations: The useful signal power is calculated by summing the conjugate multiplication of the local synchronization sequence with the synchronization head sequence and synchronization tail sequence of the received pulse; The synchronization head noise power and synchronization tail noise power are obtained by comparing the total power of the synchronization head sequence and the synchronization tail sequence with the power of the useful signal. The maximum value of the synchronization head noise power and the synchronization tail noise power is taken as the noise power of the current frequency hopping pulse. The weighting factor generation module calculates the mean based on the mean noise power of all frequency hopping pulses and uses the ratio of the mean to the noise power of each pulse as the weighting factor. The interference suppression module multiplies the channel-equalized pulse signal with the corresponding weighting factor to suppress high-noise frequency signals and enhance low-noise frequency signals. The demodulation and decoding module demodulates the weighted signal and decodes the channel to recover the original information sequence.

[0024] The present invention also proposes an electronic device, comprising: At least one processor; and a memory communicatively connected to said at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory to perform the method described above.

[0025] The present invention also proposes a computer-readable storage medium for storing instructions that, when executed, enable the above-described method to be implemented.

[0026] Compared with existing technologies, the advantages of this invention are: 1. Possess the ability to recognize the quality of communication frequency points: By calculating the power of pulses at each frequency hopping point, the noise power of each operating frequency point can be effectively obtained, and the noise power can be used to characterize the quality of each frequency point. The greater the noise power, the more severe the interference at that frequency point.

[0027] 2. Excellent anti-interference capability: By using a noise power weighting factor, the original equalization signal of each frequency hopping point pulse is weighted, suppressing the signal amplitude of the frequency hopping point pulse that is strongly interfered with, and amplifying the signal amplitude of the frequency hopping point pulse that is not interfered with or is only slightly interfered with, effectively reducing the impact of interference noise on the decoding confidence of the communication receiver.

[0028] 3. Low computational complexity: The algorithm is implemented using only adders, multipliers, and comparators, requiring fewer computational resources and making it easier to implement when cost and resources are limited. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of an interference suppression method based on frequency point quality cognition proposed in this invention; Figure 2 This is a schematic diagram illustrating the decoding performance of an interference suppression method based on frequency point quality cognition in one embodiment of the present invention. Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0030] It should be noted that relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0031] The features and performance of the present invention will be further described in detail below with reference to embodiments.

[0032] Example 1 To address the challenges posed by blocking interference and frequency-selective interference to low-cost unmanned platform communication terminals, and to meet the requirements of low-cost and low-complexity transmission, this embodiment proposes an interference suppression algorithm based on frequency hopping point quality perception. The transmitter employs a frame structure of "synchronization header sequence + information segment + synchronization tail sequence," which, after encoding, framing, and modulation, is radiated to the air interface. The frequency hopping communication receiver, after signal detection and timing synchronization, acquires the synchronization header and synchronization tail sequences. It calculates the noise power value of each frequency hopping pulse using the frequency hopping pulse synchronization sequence and calculates the weight value of each pulse. The weighting factor is multiplied by the channel-equalized signal. By reducing the signal observation at the interfered frequency point, the impact of interference signals on the confidence reduction of the entire communication system's channel decoding is suppressed, achieving reliable transmission under low signal-to-noise ratio and strong interference.

[0033] Please see Figure 1 This interference suppression method based on frequency hopping point quality cognition is applied after signal detection and timing synchronization in a frequency hopping communication receiver. The receiving platform performs analog-to-digital conversion, down-conversion, signal detection, and timing synchronization. Then, it calculates the noise power and its weighting factor for each frequency hopping point pulse. The weighting factor is then multiplied by the channel-equalized signal, followed by demodulation and channel decoding. The specific process is as follows: Step S1: The transmitter encodes and frames according to a preset frame structure; the frame structure is: synchronization header sequence + information sequence + synchronization tail sequence; where, the first... The first frequency hopping pulse The sampled observations are as follows:

[0034] in, For the first The original signal of the frequency hopping pulse. Sampling time, To account for the Doppler frequency offset of the received signal, For the first phase, To receive the first Noise from a frequency-hopping pulse.

[0035] Step S2: Modulate the signal according to the frequency hopping pattern to form a frequency hopping pulse signal for transmission, with a fixed frequency hopping frequency within each pulse.

[0036] Step S3: The receiving end performs signal detection and timing synchronization on the received signal, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse signal.

[0037] Step S4: The local synchronization sequence is multiplied by the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal by conjugate, and the sum is calculated and the mean square is obtained to obtain the useful signal power of the synchronization head sequence and synchronization tail sequence. In this embodiment, specifically, the useful signal power of the synchronization head sequence and the synchronization tail sequence in step S4 is uniformly represented as follows:

[0038] in: The k-th modulation symbol in the local sequence; This is the kth received symbol; Among them, the l The useful signal power of the synchronization header sequence of the frequency hopping pulses is:

[0039] No. l The useful signal power of the synchronization tail sequence of the frequency hopping pulse is:

[0040] in: Indicates the first l The useful signal power of the synchronization header sequence of a frequency hopping pulse; Indicates the first l The useful signal power of the synchronization tail sequence of a frequency hopping pulse; The k-th modulation symbol in the local sequence; This is the kth received symbol; The length of the synchronization sequence; This is the time interval between the start time of the synchronization header sequence and the start time of the synchronization tail sequence.

[0041] Step S5: Calculate the total power of each frequency hopping pulse signal based on the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal extracted in Step 3; In this embodiment, specifically, the total power of each frequency-hopping pulse signal in step S5 is uniformly expressed as:

[0042] Among them, the l The total power of the synchronization header sequence of the frequency hopping pulses is:

[0043] No. l The total power of the synchronization tail sequence of the frequency hopping pulses is:

[0044] in: Indicates the first l The total power of the synchronization header sequence of the frequency hopping pulses; Indicates the first l The total power of the synchronization tail sequence of the frequency hopping pulse.

[0045] Step S6: Obtain the noise power value of the pulse synchronization head sequence and synchronization tail sequence at each frequency hopping point by subtracting the total power of each frequency hopping pulse signal from the power of the useful signal; In this embodiment, specifically, in step S6, the noise power values ​​of the synchronization head sequence and synchronization tail sequence at each frequency hopping point are uniformly represented as follows:

[0046] Among them, the l The noise power of the synchronization header sequence of the frequency hopping pulse is:

[0047] No. l The noise power of the synchronization tail sequence of the frequency hopping pulse is:

[0048] in: Indicates the first l Noise power of the synchronization header sequence of a frequency hopping pulse; Indicates the first lThe noise power of the synchronization tail sequence of a frequency hopping pulse.

[0049] Step S7: Take the maximum noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse as the noise power of each frequency hopping pulse; In this embodiment, specifically, in step S7, the maximum value of the noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse is taken as the noise power of each frequency hopping pulse and expressed as follows:

[0050] in: This indicates that the first step determined in step S7 is... The noise power of a frequency hopping pulse; This represents the noise power value of the pulse synchronization header sequence at all frequency hopping points; This represents the noise power value of the pulse synchronization tail sequence at all frequency hopping points.

[0051] Step S8: Calculate the weighting factor for each frequency hopping pulse based on the noise power; In this embodiment, specifically, the weighting factor calculation in step S8 is expressed as the ratio of the average noise power of all pulses to the noise power of each pulse, and its formula is as follows:

[0052] in: Indicates the first Weighting factors for each frequency hopping pulse; This represents the average noise power of all frequency-hopping pulses. In order to achieve expectations.

[0053] Step S9: Multiply the channel-equalized pulse signal with its respective weighting factor to suppress the signal amplitude of the frequency hopping pulse that is strongly interfered with, and amplify the signal amplitude of the frequency hopping pulse that is not interfered with or is less interfered with. In this embodiment, specifically, step S9 includes:

[0054] in: Indicates the first l The signal after interference suppression of the pulse; For the first l One pulse of original equalization signal.

[0055] Step S10: Demodulate and decode to recover the information sequence.

[0056] The interference suppression algorithm based on frequency hopping point quality cognition proposed in this embodiment is verified through simulation. Please refer to [link / reference]. Figure 2 When the signal amplitude is -84dBm and 70% of the operating frequency band is interfered with, the receiver decoding performance deteriorates. After introducing an interference suppression method based on frequency quality cognition, the decoding performance is improved by 6dB.

[0057] Example 2 Example 2 proposes an interference suppression system based on frequency point quality cognition to implement the interference suppression method based on frequency point quality cognition described in Example 1, including: a transmitter and a receiver; The transmitting end includes: The encoding module is used to perform channel coding on the information sequence; The framing module is used to frame the encoded information sequence according to the frame structure of synchronization header sequence + information sequence + synchronization tail sequence. The frequency hopping modulation module modulates the framed signal according to the frequency hopping pattern to generate a frequency hopping pulse signal, with a fixed frequency hopping frequency in each pulse. The upconversion module upconverts the frequency-hopping pulse signal to radio frequency for radiation. The receiving end includes: The downconversion module is used to perform downconversion processing on the received signal; The signal detection and timing synchronization module detects the down-converted signal, completes timing synchronization, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse. The noise power calculation module is used to perform the following operations: The useful signal power is calculated by summing the conjugate multiplication of the local synchronization sequence with the synchronization head sequence and synchronization tail sequence of the received pulse; The synchronization head noise power and synchronization tail noise power are obtained by comparing the total power of the synchronization head sequence and the synchronization tail sequence with the power of the useful signal. The maximum value of the synchronization head noise power and the synchronization tail noise power is taken as the noise power of the current frequency hopping pulse. The weighting factor generation module calculates the mean based on the mean noise power of all frequency hopping pulses and uses the ratio of the mean to the noise power of each pulse as the weighting factor. The interference suppression module multiplies the channel-equalized pulse signal with the corresponding weighting factor to suppress high-noise frequency signals and enhance low-noise frequency signals. The demodulation and decoding module demodulates the weighted signal and decodes the channel to recover the original information sequence.

[0058] The specific working principle of each module in the above device can be referred to the description in the aforementioned embodiment method, and will not be repeated here.

[0059] Example 3 Based on the same technical concept, embodiments of the present invention also provide an electronic device that can implement the interference suppression method based on frequency point quality cognition provided in the above embodiments of the present invention. In one embodiment, the electronic device can be a server, a terminal device, or other electronic devices. Figure 3 As shown, the electronic device may include: At least one processor and a memory connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor and the memory is not limited. Figure 3 The example used is the connection between the processor and memory via a bus. The bus... Figure 3 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. Buses can be divided into address buses, data buses, control buses, etc., but for ease of representation, [the specific bus type is not shown here]. Figure 3 The processor is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, a processor can also be called a controller; there are no restrictions on the name.

[0060] In this embodiment of the invention, the memory stores instructions executable by at least one processor. By executing the instructions stored in the memory, the at least one processor can perform the interference suppression method based on frequency point quality awareness discussed above. The processor can implement... Figure 3 The functions of each module in the device shown.

[0061] The processor is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory and calling data stored in memory, it can monitor the device's various functions and process data, thereby enabling overall monitoring of the device.

[0062] In an alternative design, the processor may include one or more processing units. The processor may integrate an application processor and a modem processor, wherein the application processor primarily handles the operating system, user interface, and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may also not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip; in some embodiments, they may also be implemented separately on separate chips.

[0063] The processor can be a general-purpose processor, such as a CPU, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the interference suppression method based on frequency point quality cognition disclosed in the embodiments of this invention can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0064] Memory, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory can include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic memory, magnetic disk, optical disk, etc. Memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. In embodiments of the present invention, memory can also be a circuit or any other device capable of implementing storage functions, used to store program instructions and / or data.

[0065] By designing and programming the processor, the code corresponding to the frequency-point quality awareness-based interference suppression method described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute the steps of the method described in the foregoing embodiments during operation. How to design and program a processor is a technique well-known to those skilled in the art and will not be elaborated upon here.

[0066] Based on the same inventive concept, embodiments of the present invention also provide a storage medium storing computer instructions that, when executed on a computer, cause the computer to perform an interference suppression method based on frequency point quality cognition as described above.

[0067] In some alternative embodiments, the present invention also provides a variety of aspects of an interference suppression method based on frequency point quality cognition, which can also be implemented in the form of a program product including program code. When the program product is run on a device, the program code is used to cause the control device to perform the steps in an interference suppression method based on frequency point quality cognition according to various exemplary embodiments of the present invention as described above.

[0068] It should be noted that although several units or sub-units of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units. Furthermore, although the operation of the method of the invention is described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0069] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0070] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a server, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0071] Program code for performing the operations of this invention can be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0072] In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0073] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0074] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0075] The embodiments described above merely illustrate specific implementation methods of this application, and while the descriptions are detailed and specific, they should not be construed as limiting the scope of protection of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the technical solution of this application, and these modifications and improvements all fall within the scope of protection of this application.

[0076] This background section is provided to generally present the context of the invention. The work of the currently named inventors, the work to the extent described in this background section, and aspects of this section that did not constitute prior art at the time of application are neither expressly nor impliedly acknowledged as prior art to the invention.

Claims

1. An interference suppression method based on frequency point quality cognition, characterized in that, include: Step S1: The transmitting end encodes and frames according to the preset frame structure; The frame structure is: synchronization header sequence + information sequence + synchronization tail sequence; Step S2: Modulate the signal according to the frequency hopping pattern to form a frequency hopping pulse signal for transmission, with a fixed frequency hopping frequency within each pulse; Step S3: The receiving end performs signal detection and timing synchronization on the received signal, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse signal; Step S4: The local synchronization sequence is multiplied by the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal by conjugate, and the sum is calculated and the mean square is obtained to obtain the useful signal power of the synchronization head sequence and synchronization tail sequence. Step S5: Calculate the total power of each frequency hopping pulse signal based on the synchronization head sequence and synchronization tail sequence of the frequency hopping pulse signal extracted in Step 3; Step S6: Obtain the noise power value of the pulse synchronization head sequence and synchronization tail sequence at each frequency hopping point by subtracting the total power of each frequency hopping pulse signal from the power of the useful signal; Step S7: Take the maximum noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse as the noise power of each frequency hopping pulse; Step S8: Calculate the weighting factor for each frequency hopping pulse based on the noise power; Step S9: Multiply the channel-equalized pulse signal with its respective weighting factor to suppress the signal amplitude of the frequency hopping pulse that is strongly interfered with, and amplify the signal amplitude of the frequency hopping pulse that is not interfered with or is less interfered with. Step S10: Demodulate and decode to recover the information sequence.

2. The interference suppression method based on frequency point quality cognition according to claim 1, characterized in that, The useful signal power of the synchronization head sequence and synchronization tail sequence in step S4 is expressed as follows: in: Indicates the first l The useful signal power of the synchronization header sequence of a frequency hopping pulse; Indicates the first l The useful signal power of the synchronization tail sequence of a frequency hopping pulse; The k-th modulation symbol in the local sequence; This is the kth received symbol; The length of the synchronization sequence; This is the time interval between the start time of the synchronization header sequence and the start time of the synchronization tail sequence.

3. The interference suppression method based on frequency point quality cognition according to claim 2, characterized in that, The total power of each frequency-hopping pulse signal in step S5 is expressed as follows: in: Indicates the first l The total power of the synchronization header sequence of the frequency hopping pulses; Indicates the first l The total power of the synchronization tail sequence of the frequency hopping pulse.

4. The interference suppression method based on frequency point quality cognition according to claim 3, characterized in that, In step S6, the noise power value of each frequency hopping pulse synchronization head sequence and synchronization tail sequence is expressed as follows: in: Indicates the first l Noise power of the synchronization header sequence of a frequency hopping pulse; Indicates the first l The noise power of the synchronization tail sequence of a frequency hopping pulse.

5. The interference suppression method based on frequency point quality cognition according to claim 4, characterized in that, In step S7, the maximum noise power of the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse is taken as the noise power of each frequency hopping pulse and expressed as follows: in: This indicates the first step determined in step S7. The noise power of a frequency hopping pulse; This represents the noise power value of the pulse synchronization header sequence at all frequency hopping points; This represents the noise power value of the pulse synchronization tail sequence at all frequency hopping points.

6. The interference suppression method based on frequency point quality cognition according to claim 5, characterized in that, The formula for calculating the weighting factor in step S8 is as follows: in: Indicates the first Weighting factors for each frequency hopping pulse; This represents the average noise power of all frequency-hopping pulses.

7. The interference suppression method based on frequency point quality cognition according to claim 6, characterized in that, Step S9 includes: in: Indicates the first l The signal after interference suppression of the pulse; For the first l One pulse of original equalization signal.

8. An interference suppression system based on frequency point quality cognition, characterized in that, An interference suppression method based on frequency point quality cognition as described in any one of claims 1-7, comprising: a transmitter and a receiver; The transmitting end includes: The encoding module is used to perform channel coding on the information sequence; The framing module is used to frame the encoded information sequence according to the frame structure of synchronization header sequence + information sequence + synchronization tail sequence. The frequency hopping modulation module modulates the framed signal according to the frequency hopping pattern to generate a frequency hopping pulse signal, with a fixed frequency hopping frequency in each pulse. The upconversion module upconverts the frequency-hopping pulse signal to radio frequency for radiation. The receiving end includes: The downconversion module is used to perform downconversion processing on the received signal; The signal detection and timing synchronization module detects the down-converted signal, completes timing synchronization, and extracts the synchronization head sequence and synchronization tail sequence of each frequency hopping pulse. The noise power calculation module is used to perform the following operations: The useful signal power is calculated by summing the conjugate multiplication of the local synchronization sequence with the synchronization head sequence and synchronization tail sequence of the received pulse; The synchronization head noise power and synchronization tail noise power are obtained by comparing the total power of the synchronization head sequence and the synchronization tail sequence with the power of the useful signal. The maximum value of the synchronization head noise power and the synchronization tail noise power is taken as the noise power of the current frequency hopping pulse. The weighting factor generation module calculates the mean based on the mean noise power of all frequency hopping pulses and uses the ratio of the mean to the noise power of each pulse as the weighting factor. The interference suppression module multiplies the channel-equalized pulse signal with the corresponding weighting factor to suppress high-noise frequency signals and enhance low-noise frequency signals. The demodulation and decoding module demodulates the weighted signal and decodes the channel to recover the original information sequence.

9. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions executable by the at least one processor, which executes the instructions stored in the memory to perform the method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store instructions that, when executed, cause the method as described in any one of claims 1-7 to be implemented.

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