Laser cutting to control splash

Abstract

One example method (100) includes directing a laser beam at an entry point at a first side surface of a semiconductor substrate (102) along a respective scribe lane of the semiconductor substrate. The substrate includes a plurality of dies having circuitry at the first side surface and separated from each other by respective scribe lanes. The laser beam is focused within the substrate to form a modified region and a crack extending from the modified region toward at least one of the first side surface and the second side surface. The modified region is closer to the first side surface than a second side surface opposite the first side surface. The method (100) also includes applying a web onto the first side surface (104) after directing the laser beam, and back grinding to reduce a thickness of the substrate from the second side surface (106) and provide a thinned second side surface intersecting an extension of the crack.

Description

Technical Field

[0001] This manual generally relates to laser cutting for controlling spatter. Background Technology

[0002] Die preparation is part of the semiconductor device manufacturing process in which wafers are prepared for integrated circuit (IC) packaging and testing. The die preparation process typically includes wafer dicing, also known as die individualization or die separation. Before dicing, wafers are mounted on a reel (e.g., a dicing reel). The wafer dicing process is used to separate individual dies from the semiconductor wafer while mounting them onto the dicing reel. Dicing processes can involve dicing and breaking, mechanical sawing, or laser cutting. Once the wafer has been diced, the dies typically remain on the dicing reel until they are subsequently extracted in the packaging process by die handling equipment such as die bonders or die sorters. Summary of the Invention

[0003] One example described herein relates to a method comprising guiding a laser beam at an entry point onto a first side surface of a semiconductor substrate along corresponding scribe lines. The substrate comprises a plurality of dies having circuitry on the first side surface and separated from each other by the corresponding scribe lines. The laser beam is focused within the substrate to form a modified region and a crack extending from the modified region toward at least one of a first side surface and a second side surface. The modified region is closer to the first side surface than the second side surface opposite to it. The method further comprises applying a tape to the first side surface after guiding the laser beam, and performing back-side grinding to reduce the substrate thickness from the second side surface and provide a thinned second side surface intersecting the extension of the crack.

[0004] Another example described herein relates to a method comprising directing a laser beam at an entry point onto a first side surface of a semiconductor substrate along corresponding scribe lines. The substrate comprises a plurality of semiconductor dies having circuitry on the first side surface and separated from each other by the corresponding scribe lines. The laser beam is focused within the substrate to form a modified region and a crack extending from the modified region in a direction orthogonal to the first side surface. The modified region is closer to the first side surface than to a corresponding second side surface of the substrate. The method further comprises applying pressure to the first side surface of the substrate to cause the crack to extend toward the first side surface. The method further comprises performing back-side grinding to reduce the thickness of the substrate from the second side surface and providing a thinned second side surface intersecting the extension of the crack.

[0005] Another example described herein relates to a semiconductor device. The semiconductor device includes a semiconductor die containing a substrate having sidewall surfaces extending between opposing first and second side surfaces. An integrated circuit is located in the substrate at a first location closer to the first side surface than to the second side surface. The sidewall surfaces include a single region with a modified texture at a second location located between the first and second side surfaces, and the second location is closer to the first side surface than to the second side surface. Attached Figure Description

[0006] Figure 1 A flowchart illustrating an example method for forming a semiconductor device.

[0007] Figure 2A , 2B 3, 4, 5 and 6 are based on Figure 1 Cross-sectional views of semiconductor devices at different processing stages of the method.

[0008] Figure 7 This is a side view diagram illustrating an example of a packaged semiconductor device.

[0009] Figure 8 This is a photograph showing a side view of a wafer after the example stealth laser cutting method has been performed. Detailed Implementation

[0010] This specification generally relates to semiconductor devices and methods for manufacturing semiconductor devices.

[0011] For example, the method includes performing a single stealth laser dicing at an entry point by guiding a laser beam at a first side surface of the semiconductor substrate (e.g., a wafer) along a corresponding dicing track. The substrate comprises a plurality of dies distributed across the substrate, each die having a circuit system (e.g., one or more integrated circuits (ICs)) at its first side surface and separated from each other by a corresponding dicing track. The laser beam is focused within the substrate to form a modified region and a crack extending from the modified region toward at least one of the first and second side surfaces (e.g., in a direction orthogonal to the respective side surface). The resulting modified region within the substrate is closer to the first side surface (e.g., adjacent to the circuit system) than the second side surface opposite the first side surface.

[0012] After laser cutting, a tape is applied to a first side surface. Sufficient force is applied to the tape on the first side surface while supporting a second side surface (e.g., on a chuck or other support surface) to cause the crack to extend toward the first side surface. For example, rollers or other devices are configured to apply pressure to the exposed surface of the tape already applied to the first side surface. The tape may be back-ground, and the method therefore further includes back-grinding the second side surface to reduce the thickness of the substrate from the second side surface and obtain a thinned second side surface. Back-grinding may also cause the crack to extend further toward one or both side surfaces. Back-grinding may be performed (e.g., by a surface grinder or grinding wheel) to remove a sufficient amount of substrate material from the second side surface such that the thinned second surface intersects the second-side-facing extension of the crack.

[0013] A dicing reel can be applied to the thinned second side surface, and a back-grinding reel can be removed from the first side. The dicing reel can extend in the direction of the sawing kerf to separate (or monolithize) the respective dies from each other and provide the desired die-to-die gap to facilitate further manufacturing. Further manufacturing may include encapsulating each of the dies in a molding material, such as plastic or ceramic. As another example, the method described herein provides each die with a sidewall surface having a specific modified surface texture region (e.g., a silicon damage layer) located between the IC and the thinned second side surface, wherein the location of the modified surface texture region (e.g., in the Z direction) is closer to the first side surface than the thinned second side surface.

[0014] As used herein, the term semiconductor device (and variations thereof) refers to any structure or arrangement that includes a semiconductor substrate. For example, a semiconductor substrate (e.g., a wafer) on which multiple integrated circuit (IC) dies are formed is a semiconductor device. Individual dies or groups of dies that may be located on or separate from the wafer are another example of a semiconductor device. Furthermore, one or more dies encapsulated in molding material are yet another example of a semiconductor device. Thus, semiconductor devices can exist at any stage of a semiconductor manufacturing process, including the production of packaged IC chips or system-on-a-chip (SOC) devices.

[0015] Figure 1 This is a flowchart illustrating an example method 100 for die fabrication that can be implemented as part of an overall semiconductor manufacturing workflow. (Regarding...) Figure 2A , 2BMethod 100 is described by cross-sectional views 3, 4, 5, 6, and 7, which illustrate an example processing procedure for wafer fabrication in a semiconductor manufacturing workflow to form one or more semiconductor devices from a semiconductor substrate (e.g., also referred to herein as a wafer). The wafer includes opposing first and second side surfaces and a plurality of semiconductor dies distributed across the first side surface and separated from adjacent dies by respective saw marks. Each die includes a circuit system formed on or near the first side surface. Conductive bumps may also be formed on the first side surface of the respective die to electrically couple input and / or output terminals of the circuit system. The wafer is mounted on a chuck with its active side facing upwards.

[0016] At 102, method 100 includes performing stealth laser cutting of the substrate by guiding a laser beam at a surface on a first side (e.g., the active side) of the substrate. For example, Figure 2A A laser cutting system 200 configured to perform stealth laser-based dicing of a semiconductor substrate 202 is shown. The substrate 202 includes opposing first side surfaces 204 and second side surfaces 206, and sidewalls extending between the side surfaces, providing a wafer thickness along a Z-direction orthogonal to the first and second side surfaces. For example, the first side surface 204 is the top side (also referred to as the front side or active side) of the wafer 202, and the second side surface 206 is the bottom side (also referred to as the back side) of the wafer. The wafer 202 has a surface located on the second side and includes a plurality of semiconductor dies 208, shown as dies 1, dies 2, dies 3, and dies 4. Each die 208 has a circuitry 210 formed at or near the active surface 204. Each of the dies 208 is separated from each other by a corresponding dicing track 212. Thus, the corresponding dicing tracks 212 are located between adjacent dies 208.

[0017] like Figure 2AAs shown in the example, stage 214 includes a chuck 216 (e.g., a vacuum chuck) configured to support wafer 202 during laser dicing at 102. System 200 also includes a control system 220 coupled to stage 214 and laser system 222. Control system 220 is configured to control the movement of stage 214 along several degrees of freedom to position the stage and wafer 202 supported by chuck 216 relative to laser system 222. As stage 214 moves along a scanning direction parallel to a given scribe line and orthogonal to incident surface 204 of wafer 202, control system 220 is also configured to control the operation of laser system 222 to guide an incident laser beam (e.g., a pulsed beam) to perform stealth laser dicing within a given scribe line 212. For example, as described herein, control system 220 controls parameters of laser system 222 and stage to perform stealth laser dicing during a single stealth laser dicing process. The parameters may include pulse rate (e.g., pulse frequency), pulse spacing, feed rate, ion beam separation distance, stage position and movement, optical wavelength, beam energy level, beam focal length, beam width, and the like.

[0018] like Figure 2A As schematically shown, laser system 222 includes laser module 224. For example, laser module 224 is configured to generate an infrared (IR) laser beam 228. Laser system 222 also includes an arrangement of optics, such as one or more focusing lenses 226. Laser module 224 includes a laser source configured to perform pulsed oscillations of laser light along optical axis 230, while lenses 226 are adjusted (e.g., by control system 220) to focus the beam along a corresponding scribe line 212 at a focal point 232 located within wafer 202. Focusing lens 226 may also be referred to as a condenser lens and is movable in a direction parallel to optical axis 230 to adjust the position of the focal point of the focused laser beam. The distance between lens 226 and focal point 232 defines focal length 234, which can be set (by control system 220) to different distances. For example, the scanning direction of laser beam 228 is specified by a symbol shown as 233 (e.g., compared to the...). Figure 2A The beam 228 moves in the scanning direction 233 within the corresponding scribe line 212, for example by linearly moving the stage 214 below the pulsed laser beam while setting a given focal length.

[0019] Laser beam 228 is provided at a wavelength capable of transmitting through wafer 202 and is directed at an entry position (also referred to as an entry point) on a first surface 204 located within a corresponding scribe line 212 of wafer 202. As an example, laser module 224 is configured to pulse laser beam 228 at a frequency of approximately 50 kHz to 200 kHz (e.g., 100 kHz), while stage 214 moves wafer 202 relative to laser beam 228 at a speed (e.g., ranging from approximately 0.5 m / sec to approximately 2 m / s). Laser beam 228 (e.g., linearly) scans across the wafer to remain within the scribe line 212, thereby limiting the extent of each die on wafer 202 during each pass. As another example, laser module 224 includes a pulsed laser (e.g., an Nd:YAG laser) outputting a wavelength of 1,064 nm. Laser module 224 is suitable for silicon dicing applications because silicon has a room-temperature bandgap of approximately 1.11 eV (1.12 nm), allowing for adjustment of maximum laser absorption via optical focusing. Other types of lasers and wavelengths can be used in other instances depending on the substrate material used for wafer 202.

[0020] During each pass of the laser across wafer 202 through the corresponding scribe line 212, the focused beam 228 possesses sufficient energy to generate thermal shock at a localized damaged region surrounding the focal point 232. The damaged region may be a volumetric substrate material (e.g., silicon), referred herein as a modified region (also known as a silicon damaged (SD) region). As the pulsed beam 228 scans across the wafer, multiple adjacent modified regions are formed at a given depth (e.g., depending on the focal length 234 of the beam 228) to deposit a corresponding modified layer (e.g., an SD layer) 236 within the wafer along the length of the scribe line 212. Because the laser dicing at 102 is applied to the first side surface 204 in a single pass, sputtering is absent on the circuit system 210, whereas it often occurs when using a multi-pass laser beam.

[0021] Figure 2B To show a portion of substrate 202 along Figure 2A A schematic diagram of another cross-sectional view taken by line 2B-2B in the diagram. Figure 2B In one example, the substrate includes bumps 240 located on surface 204, the bumps not yet being... Figure 2A This is illustrated in the examples. Furthermore, in... Figure 2B In one example, the laser beam 228 scans laterally across the surface in direction 233 to form a corresponding modified region 236 within the substrate during laser cutting (at 102).

[0022] exist Figure 2AIn an example, the illustration can be viewed as representing a single modified region 236 of a corresponding modified layer, the modified layer comprising a plurality of such modified regions embedded within each of the scribe lines 212 of the wafer 202 during a given pass of a laser beam focused at a certain depth within the wafer. An arrangement of modified regions 236 forming a modified layer within the scribe lines at a given depth is shown in… Figure 2B In the example, although the modified region 236 is schematically shown as having a toroidal or ellipsoidal shape, the modified region can have more unstructured shapes depending on the crystal structure and the interaction between the beam 228 and the substrate material (see, for example...). Figure 8 ).

[0023] like Figure 2A and 2B As shown, the distance 238 between surface 204 and the center (or center of reference) of the modified region 236 is along the Z direction and is therefore also referred to herein as the Z-height. The center of the modified region can also form a focal point 232 during laser treatment. Figure 2A and 2B As shown, the modified region 236 is closer to the first side surface 204 than the second side surface 206. In this example, the modified region 236 is spaced less than about 30 micrometers (e.g., less than 20 micrometers) from the first side surface, which is represented by a Z-height 238. Consequently, the circuitry 210 in each die 208 is similarly spaced in the Z-direction between the modified region 236 and the first side surface 204.

[0024] As described herein, laser beam 228 also forms cracks extending along the Z-direction from modified region 236, shown as corresponding crack portions 242 and 244. Crack portion 242 (e.g., bottom crack) extends from modified region toward second side surface 206 to seal its end. Another crack portion 244 (e.g., top crack) extends from modified region toward first side surface 204 to seal its end. Although cracks 242, 244 are depicted as extending in a straight (e.g., linear) manner, these cracks may follow a more nonlinear and / or non-uniform path along the Z-direction depending on the material structure of substrate 202.

[0025] The length of each slit portion 242 and 244 extending from the modified region 236 in the Z direction can be controlled based on laser parameters, such as power, frequency, and beam width. The control system 220 can thus be configured to control the length of the respective slits formed during laser cutting (at 102) to ensure that slit 244 does not extend all the way to the first side surface 204 to avoid damaging the circuit system 210. Furthermore, the length of each slit 242, 244 can be controlled to prevent the wafer from fragmenting during subsequent processing steps after laser cutting and before actual die separation. For example, the distance between the tip of slit 244 and the first side surface 204 (e.g., the active side) of wafer 202 is less than the distance between the lower edge of the circuit system 210 and the first side surface (e.g., approximately 10 micrometers). The control system 220 can control laser parameters different from those in other examples to provide different slit lengths and relative placement of the slits with respect to the circuit system 210.

[0026] The control system 220 is configured to control the laser module to provide the Z-height of the modified region 236 and the lengths of the corresponding cracks 242 and 244 to prevent (e.g., avoid) damage to the circuit system 210 and avoid premature separation between adjacent dies 208. For example, the parameters for a given application may vary depending on the energy absorption rate of the wafer material, such as the wafer's doping density. Power, frequency, beam width, and Z-height may be determined empirically, for example, by performing multiple tests.

[0027] At position 104, a back-side polishing tape is applied to the first (e.g., active) side surface of the semiconductor substrate (e.g., a wafer). For example, as... Figure 3 The image shows a back-side polishing tape 300 applied to a first side surface 204 of a wafer 202, which can be supported by a wafer chuck (or other support surface, such as a stage), shown as 302. The tape 300 may be a UV-curable polishing tape, comprising a substrate layer 306 and one or more adhesive layers (e.g., UV-curable adhesive) 304 to temporarily bond to the first side surface 204 of the wafer 202 for subsequent polishing. The adhesive material 304 may be sufficiently flexible and conformable to the bumps 240.

[0028] like Figure 3As shown in the example, roller 308 is configured to apply pressure (e.g., ranging from about 0.2 MPa to about 0.5 MPa) to the reel 302 in a direction 310 orthogonal to surface 204. The applied pressure (or at least most of it) is transferred to surface 204 to cause crack 244 to extend from the modified area 236 toward the first surface 204. Roller 308 may apply pressure simultaneously with or after applying the reel 300 to surface 204, for example by moving the roller across wafer surface 204 in a direction shown as 312. Although in Figure 3 The example shows a roller 308, but another device (e.g., a light hammer device) can be used to apply force to the first side surface to cause crack 244 to extend from the modified area 236. The applied pressure or other force applied to the first side surface 204 may also cause some extension of crack 242 toward the second side surface 206. The pressure applied by the roller or another device may be sufficient to cause crack 244 to extend from each SD area toward (but not yet to) the side surface, such that the ends of the respective cracks remain spaced apart from side surfaces 204 and 206.

[0029] At position 106, the method includes performing back-side grinding on the second side surface. For example, as... Figure 4 As shown, wafer 202 is mounted on stage 400 after tape 300 has been coated (at 104) onto the opposite side surface 204. Backside grinding of tape 300 at 106 helps protect circuitry 210, the backside grinding being performed to thin the second (e.g., back) side 206 of the wafer. Figure 3 Also shown is a grinding wheel 402 supported above the stage 400 and configured to thin the substrate by grinding and / or polishing.

[0030] In this example, the stage 400 may be movable in two or more orthogonal directions parallel to the surface of the wafer 202 (e.g., to provide movement in at least two degrees of freedom), such as movement in five degrees of freedom, for example, along three orthogonal axes as well as pitch and roll directions. Alternatively, the stage 400 may be stationary, and the polishing wheel 402 may be movable relative to the wafer 202. The polishing wheel 402 is configured to remove a substrate layer from the first side surface to provide a thinned second side surface, shown as 206'.

[0031] During polishing, the contact surface of polishing wheel 402 can be pushed onto the already thinned side surface 206 and pressure is applied in a direction orthogonal to the surface 404. The applied pressure is sufficient to cause cracks 242 and 244 to extend further toward the respective adjacent side surfaces 206 and 204 of wafer 202. For example, back-side polishing can be performed at 106 so that crack 244 intersects with the first side surface 204 of the wafer (e.g., exposed to said side surface). Furthermore, back-side polishing can be performed at 106 until crack 242 intersects with the thinned second side surface 206' of the wafer and the desired thickness of the wafer is achieved (e.g., 50 micrometers to 100 micrometers). In an example, back-side polishing performed at 106 removes at least 40% (e.g., up to about 90%) of the thickness of the wafer from the second side surface 206 of wafer 202. The amount of material removed during back-side polishing can depend on the desired thickness of the die and the type of package being manufactured.

[0032] At 108, the method includes applying a diced tape to a second side surface of the substrate that is thinned at 106. For example, as Figure 5 As shown, a cutting roll 500 is applied to a back surface 206' opposite to the back-grinding roll 300. After applying the cutting roll at 108, the method includes removing the back-grinding roll from the first side surface 204 at 110. For example, also as Figure 5 As shown, the back-grinding tape is peeled off from surface 204, either manually or via an automated peeling process.

[0033] The remaining diced tape 500 is an integrated tape structure having a backing layer and adhesive, for example, made of a substrate material of polyvinyl chloride (PVC), polyolefin, or polyethylene, to hold the wafer 202 in place during the spreading at 112. At 112, tape spreading is performed. For example, as... Figure 6 As shown, tape extension (at 112) causes the wafer to expand to separate the die along the slits extending through the corresponding scribe lines, thus spacing adjacent dies apart by a distance (e.g., a known distance). For example, as... Figure 6 As schematically shown, wafer 202 extends uniformly in an orthogonal direction (e.g., including another unshown direction shown by arrow 602 and orthogonal to arrow 602 (e.g., to the surface of the drawing)). The extension direction is therefore parallel to the back surface and orthogonal to the direction of the corresponding scribe line so as to space the corresponding dies along the scribe line to a desired die-to-die gap.

[0034] The separated dies may remain on the diced reel and / or be removed for further processing at 114 to provide one or more packaged semiconductor devices. For example, such as... Figure 7As shown, the packaged semiconductor device 700 includes a molding material layer 702 located above a semiconductor die 208. The packaged semiconductor device 700 also includes a single SD layer 704 along the sidewalls. The SD layer 704 is closer to the first side surface 204 than the thinned second side surface 206'. The molding material can be any suitable IC chip packaging material, such as a plastic or ceramic material, to provide the packaged semiconductor device. Figure 1 The method can produce devices using virtually any packaging technology, including wafer-level packaging, chip-level packaging, or other packaging types. For example, as described herein, one or more bumps 240 may extend from the first side surface 204.

[0035] In one example, the separated dies may undergo additional processing prior to packaging at 114. This further processing may include picking up the respective dies that can be retrieved from the dicing reel and physically attaching the dies to the lead frame using a die attachment material (e.g., epoxy resin, eutectic solder, or glass powder), for example, for a quad flat no-leads (QFN) package. In some examples, wire bonding may be used to connect leads on the die surface to corresponding terminals on the lead frame. For examples of wafer-level chip-scale package (WCSP) packaging, the WCSP package may be placed in a reel for further testing and distribution. The resulting die assembly may be encapsulated (e.g., encapsulated) in molding material to provide a packaged semiconductor device 700.

[0036] Table 1 below shows examples of test results for method 100 performed by back-side grinding (at 106) with different process parameters. In Table 1, BHC refers to a back-side half-cut where a half-cut is made along the upper layer closer to the first (e.g., active) side surface of the wafer. BHC “is” means that the vertical length of the crack is sufficient to extend the thickness of the upper layer close to the surface.

[0037] Table 1

[0038] times Z-height (micrometers) laser power BHC Crack situation Grinding results 1 time 13 to 18 2.0W yes Unbroken Good separation 1 time 13 to 18 1.4W yes Unbroken Good separation 1 time 13 to 18 1W yes Unbroken Good separation

[0039] As another example, Table 2 shows examples of successful test results of method 100 performed from different process parameter results verified with a whole wafer. In Table 2, HC refers to a half-cut along the lower layer closer to the second side surface of the wafer. HC “No” means that the crack has not extended to the side opposite the circuit layer. Furthermore, in Table 2, BQ refers to the beam quality, a mechanical parameter of the laser beam, and the slit refers to the width of the laser beam (e.g., 10 refers to the width parameter of the laser system).

[0040] Table 2

[0041] side times beam Offset Frequency (kHz) Z-height (μm) Power (W) BQ aperture BHC HC Separation Side - 4 1 time single beam 2 100 16 1.6 BQ1 10 yes yes yes

[0042] Figure 8This shows a side view of the cross-section of wafer 800 after the proposed laser cutting at point 102. Figure 8 In this example, the wafer's sidewall comprises only one SD layer 802 positioned close to the active side of the wafer (e.g., the first side surface 204). The portion of the sidewall shown at 804, located between the SD layer 802 and the opposing surface, represents a crack line through the wafer's texture, which may be attributed, for example, to wafer extension from the adjacent sidewall of another die (at 112).

[0043] In this specification, the terms "coupled" or "couples" mean indirect or direct connection. Therefore, if a first device is coupled to a second device, that connection can be either direct or indirect via other devices and connectors. For example, if device A generates a signal to control device B to perform an operation, then: (a) in a first instance, device A is coupled to device B; or (b) in a second instance, if the intervening component C has not yet altered the functional relationship between device A and device B, then device A is coupled to device B via the intervening component C, and therefore the control signal generated by device B via device A is controlled by device A.

[0044] Furthermore, devices "configured to" perform tasks or functions as described in this specification may be configured (e.g., programmed and / or hardwired) to perform functions during manufacturing by the manufacturer, and / or may perform functions and / or other additional or alternative functions after manufacturing by means of user-configurable (or reconfigurable) means. Configuration may be achieved through firmware and / or software programming of the device, through the construction and / or layout of the device's hardware components and interconnections, or a combination thereof. Additionally, circuits or devices described herein as including certain components may actually be configured to couple to those components to form the described circuit system or device. For example, a structure described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage and / or current sources) may actually consist only of semiconductor elements within a single physical device (e.g., a semiconductor wafer and / or integrated circuit (IC) package), and may be configured to couple to at least some of the passive elements and / or sources, for example, by an end user and / or a third party during or after manufacturing, to form the described structure.

[0045] The use of "based on" means "at least partially based on". Therefore, if X is based on Y, then X can depend on Y and any number of other factors.

[0046] Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. A method comprising: A laser beam is directed at an entry point along a corresponding scribe line on a semiconductor substrate to a first side surface of the semiconductor substrate, wherein the substrate includes a plurality of dies having a circuit system on the first side surface and separated from each other by the corresponding scribe line; the laser beam is focused within the substrate to form a modified region and a crack extending from the modified region toward at least one of the first side surface and a second side surface, wherein the modified region is closer to the first side surface than the second side surface opposite to the first side surface; After guiding the laser beam, the tape is applied to the first side surface; and Backside grinding is performed to reduce the thickness of the substrate from the second side surface, so as to provide a thinned second side surface that intersects with the extension of the crack.

2. The method according to claim 1, wherein: Applying force to the tape includes applying a force sufficient to extend the crack toward the first side surface, and Backside grinding includes extending the crack toward at least one of the first side surface and the second side surface.

3. The method of claim 2, wherein applying the tape includes using a roller to press the tape onto the first side surface while supporting it on the second side surface.

4. The method of claim 1, wherein guiding the laser beam comprises a single pass of the laser beam along the respective scribe line to provide a respective single silicon damage layer constituting the modified region within the substrate.

5. The method of claim 1, wherein the modified region is spaced less than 20 micrometers from the first side surface.

6. The method of claim 5, wherein the circuitry is spaced between the modified region and the first side surface.

7. The method according to claim 1, wherein the tape is a back-grinding tape, and the method further comprises: Apply the diced tape to the second side surface of the substrate; and Remove the back-side grinding tape from the first side surface.

8. The method of claim 7, further comprising performing tape extension to separate the semiconductor dies from each other.

9. A corresponding semiconductor die, produced by the method according to claim 8, wherein: The circuit system in the substrate is located at a first position that is closer to the first side surface than the second side surface. The corresponding semiconductor die includes at least one sidewall surface located between its first side surface and second side surface, the at least one sidewall surface including a single modified textured region at a second location located between the first location and the second side surface, wherein the second location is closer to the first side surface than the second side surface.

10. The method of claim 1, wherein guiding the laser beam comprises controlling the laser beam to have a focal point and a beam width based on the position of the circuit system relative to the first side surface and the width of the corresponding scribe line.

11. A method comprising: A laser beam is directed at an entry point along a corresponding scribe line on a semiconductor substrate to a first side surface of the semiconductor substrate, wherein the substrate comprises a plurality of semiconductor dies having circuitry on the first side surface and separated from each other by the corresponding scribe lines, the laser beam being focused within the substrate to form a modified region and a crack extending from the modified region in a direction orthogonal to the first side surface, and the modified region being closer to the first side surface than to a relative second side surface of the substrate; Pressure is applied to the first side surface of the substrate to cause the crack to extend toward the first side surface; and Backside grinding is performed to reduce the thickness of the substrate from the second side surface and to provide a thinned second side surface that intersects with the extension of the crack.

12. The method according to claim 11, wherein: Applying the pressure includes applying the tape to the first side, and Backside grinding includes extending a first portion of the crack to intersect the first side surface and extending a second portion of the crack toward the second side surface.

13. The method of claim 12, wherein applying the tape includes using a roller to press the tape onto the first side surface while supporting it on the second side surface.

14. The method of claim 11, wherein the modified region is spaced less than 20 micrometers from the first side surface, and the circuit system is spaced between the modified region and the first side surface.

15. The method according to claim 11, wherein: Guiding the laser beam includes a single pass of the laser beam along the corresponding scribe line to provide a corresponding single silicon damage layer constituting the modified region within the substrate, and The method further includes: Apply the diced tape to the second side surface of the substrate; and The tape extension is performed using the dicing tape to separate the semiconductor dies from each other.

16. A corresponding semiconductor die, produced by the method of claim 15, wherein the corresponding semiconductor die includes at least one sidewall surface extending between its first side surface and a second side surface, the at least one sidewall surface including a single modified textured region located at a position between the circuit system and the second side surface, the position being closer to the first side surface than the second side surface.

17. The method of claim 11, wherein guiding the laser beam comprises controlling the laser beam to have a focal point and a beam width based on the position of the circuit system relative to the first side surface and the width of the corresponding scribe line.

18. A semiconductor device comprising: A semiconductor die, comprising a substrate having sidewall surfaces extending between opposing first and second side surfaces; and An integrated circuit located in the substrate at a first position closer to the first side surface than to the second side surface, wherein the sidewall surface includes a single region with a modified texture at a second position located between the first position and the second side surface, and the second position is closer to the first side surface than to the second side surface.

19. The semiconductor device of claim 18, wherein the second position is spaced less than 20 micrometers from the first side surface, and the first position is spaced between the second position and the first side surface.

20. The semiconductor device of claim 18, wherein the sidewall surface has the modified texture based on a modified silicon damage layer through the substrate to separate the semiconductor die from the adjacent die, and the sidewall surface has a smoother texture outside the single region based on a crack through which the semiconductor die is separated from the adjacent die.

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