Battery pack failure proactive monitoring method and system

Abstract

The application provides a battery pack fault active monitoring method and system, a master control chip interacts with a micro control unit and a chip link including at least one slave chip, and the method applied to the master control chip comprises the following steps: based on a loop confirmation frame sent to the chip link in a wake-up state of a sleep monitoring mode, identifying the connectivity of the chip link, and initiating a wake-up operation on each slave chip in a sleep state of the sleep monitoring mode on the chip link; in the case that the connectivity of the chip link is normal, receiving a fault frame indicating an existing fault provided by fault measurement of an adapted power battery in the wake-up state of the slave chip, and the power battery adapted by each slave chip constitutes a power battery pack; in response to receiving the fault frame, waking up the micro control unit in a low-power state, and triggering the micro control unit to query the slave chip reporting the fault frame. The application can ensure that the slave chip responds quickly when there is a use demand, guarantee response flexibility, and shorten the fault processing time.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power batteries, and particularly relates to a battery pack fault active monitoring method and system. BACKGROUND

[0002] With the increasing number of new energy vehicles, the installed capacity of power batteries also continues to rise. Since power batteries are prone to fire and explosion accidents once they fail, personal safety is threatened, and under this situation, higher demands are put forward for the safety management of vehicle batteries.

[0003] As the core component of the entire BMS (Battery Management System), the AFE (Analog Front End) chip is directly responsible for monitoring the state of the power battery, including OV (Overvoltage), UV (Under voltage), OT (Over temperature), UT (Under temperature) and other faults, and the effective implementation of the active monitoring mode in the AFE chip is of great significance for improving battery safety management.

[0004] In a typical hybrid electric vehicle configuration, the BMU (Battery Management Unit) is powered by a 12V supply battery. In order to support functions such as remote key entry, safety and battery monitoring, the supply battery must be continuously powered, even when the vehicle is parked or turned off. After parking, in order to ensure that the power battery is in a normal state, the MCU (Microcontroller Unit) must be periodically woken up to check whether the high-voltage battery pack (including multiple power batteries) has failed. This periodic wake-up will consume power and may cause the 12V supply battery to run out of power prematurely. In view of this situation, an active monitoring mode is designed, in which the BMS AFE chip itself actively monitors at regular intervals and actively feeds back to the MCU in the event of a fault. This processing method can enable the MCU and PMIC (Power Management Integrated Circuits) to run in a low-power mode under the active monitoring mode, thereby saving the power of the supply battery.

[0005] In existing active monitoring schemes, each chip enters active monitoring mode upon receiving a command. Each chip has an internal timer, and the timing of this timer varies between chips. Upon reaching the set time, the chip begins measuring for faults in the connected power battery, such as overvoltage (OV), undervoltage (UV), overtemperature (OT), and undertemperature (UT). After measurement, the front-end chip sends characteristic signals to the back-end chip. The front-end chip sends an adaptation signal based on the battery measurement: a heartbeat signal if the battery is in a non-faulty state, and a fault signal if it is in a faulty state. Both signals propagate along the battery chain and are sent periodically. In most cases, the power battery is fault-free, and the back-end chip receives the heartbeat signal from the front-end chip. Since the back-end chip cannot know the timing of the front-end chip's signal transmission, it needs to perform real-time monitoring and set a predetermined time threshold. If no heartbeat signal is received within the predetermined time threshold, a connection fault is identified, and a fault signal needs to be transmitted. This processing method requires each downstream chip to monitor the signals provided by the upstream chip in real time, and the corresponding circuits are always in operation. The chip includes a communication module and a monitoring module (used to monitor the power battery's overvoltage (OV), undervoltage (UV), overtemperature (OT), and undertemperature (UT) states). The communication module, which monitors the heartbeat signal at the port, operates continuously, while the monitoring module operates after a timer expires (i.e., the monitoring module operates periodically). Therefore, although the MCU and PMIC are in a low-power state in active monitoring mode, the AFE chip still operates to a certain extent for extended periods, consuming power from the power battery. This consumption is significant during prolonged periods of parking or engine shutdown. Summary of the Invention

[0006] This application provides a method and system for active monitoring of battery pack faults to solve the problem in the prior art where the AFE chip is online for a long time and continuously consumes power in the active monitoring mode, which makes the power battery prone to depletion when the vehicle is parked for a long time.

[0007] In a first aspect, embodiments of this application provide a method for active monitoring of battery pack faults, applied to a main control chip, wherein the main control chip interacts with a microcontroller unit (MCU) and a chip link, the chip link including at least one slave chip, and the method includes:

[0008] In the wake-up state of the sleep monitoring mode, based on the loop confirmation frame sent to the chip link, the connectivity of the chip link is identified and the wake-up operation of each slave chip on the chip link is initiated. The slave chips on the chip link are in the sleep state of the sleep monitoring mode. The sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state.

[0009] In the case that the connectivity of the chip link is normal, receiving a fault frame indicating a fault provided by the slave chip in a measurement mode of the wake-up state for fault measurement on the adapted power battery, the at least one slave chip adapted power battery constitutes a power battery pack;

[0010] In response to receiving the fault frame provided by the slave chip, waking up the MCU in the low-power state to trigger the MCU to revisit the chip link and query the slave chip reporting the fault frame.

[0011] Wherein, when the master chip and the slave chip are in the sleep monitoring mode, the MCU is in the low-power state, and the MCU is switched to the running state after being woken up to revisit.

[0012] In a second aspect, the embodiments of the present application provide a battery pack fault active monitoring method, applied to a slave chip on a chip link, the chip link interacts with a master chip, the master chip interacts with a micro control unit MCU, the chip link includes at least one slave chip, and the method includes:

[0013] In the sleep state of the sleep monitoring mode, in response to receiving the loop confirmation frame sent by the master chip, switching to the wake-up state and forwarding the loop confirmation frame along the chip link, the sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state, the loop confirmation frame is sent in the wake-up state of the sleep monitoring mode of the master chip and is transmitted on the chip link to wake up each slave chip;

[0014] In the measurement mode of the wake-up state, fault measurement is performed on the adapted power battery, and a fault frame indicating a fault is generated based on the measurement result of the fault of the power battery and is transmitted along the chip link;

[0015] Wherein, the at least one slave chip adapted power battery constitutes a power battery pack, the loop confirmation frame returned to the master chip is used to verify that the connectivity of the chip link is normal, when the master chip and the slave chip are in the sleep monitoring mode, the MCU is in the low-power state; the fault frame is transmitted on the chip link, and the fault frame transmitted to the master chip is used to wake up the MCU in the low-power state to trigger the MCU to switch from the low-power state to the running state, and revisit the chip link in the running state to query the slave chip reporting the fault frame.

[0016] In a third aspect, the embodiments of the present application provide a battery pack fault active monitoring system, comprising: a master control chip, a micro control unit (MCU) interacting with the master control chip and a chip link, the chip link comprising at least one slave chip, and a power battery adapted to the slave chip, the at least one slave chip and the adapted power battery constituting a power battery pack;

[0017] In the wake-up state of the sleep monitoring mode, the master control chip sends a loop confirmation frame to the chip link, identifies the connectivity of the chip link based on the loop confirmation frame, and initiates a wake-up operation on each slave chip on the chip link, the slave chip on the chip link being in a sleep state of the sleep monitoring mode, and the sleep monitoring mode supporting cyclic switching between the wake-up state and the sleep state;

[0018] The slave chip switches to the wake-up state based on the loop confirmation frame, and the loop confirmation frame is transmitted on the chip link in stages to wake up each slave chip;

[0019] In the case that the connectivity of the chip link is normal, the master control chip receives a fault frame indicating a fault provided by the slave chip in a measurement mode of the wake-up state for fault measurement on the adapted power battery;

[0020] The master control chip wakes up the MCU in a low-power state in response to receiving the fault frame provided by the slave chip, the MCU being in the low-power state when the master control chip and the slave chip are in the sleep monitoring mode;

[0021] The MCU is switched from the low-power state to a running state after being woken up, and the chip link is revisited, and the slave chip reporting the fault frame is queried in the running state.

[0022] In the embodiments of the present application, the master control chip generates a loop confirmation frame in the wake-up state of the sleep monitoring mode and sends it to the chip link, identifies the connectivity of the chip link, and initiates a wake-up operation on each slave chip on the chip link in a sleep state of the sleep monitoring mode. The loop confirmation frame can be used to quickly detect the link connectivity, so that the slave chip on the chip link enters a working state, ensuring that the slave chip can respond quickly when there is a use demand, and ensuring the response speed and flexibility. In the case that the connectivity of the chip link is normal, a fault frame indicating a fault provided by the slave chip in a measurement mode of the wake-up state for fault measurement on the adapted power battery is received, the MCU in a low-power state is woken up in response to receiving the fault frame provided by the slave chip, the MCU is switched to a running state to revisit the chip link and query the slave chip reporting the fault frame, which can facilitate targeted inspection and maintenance by maintenance personnel, shorten the fault processing time, reduce the maintenance cost, and ensure the safety and reliability of the power battery. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 FIG. 1 shows a circuit architecture diagram for actively monitoring battery pack failure according to an embodiment of the present application;

[0024] Figure 2 FIG. 2 shows a flowchart of a method for actively monitoring battery pack failure according to an embodiment of the present application; Figure 1 ;

[0025] Figure 3A FIG. 3 shows a signal waveform diagram of a first idle signal according to an embodiment of the present application;

[0026] Figure 3B FIG. 4 shows a waveform diagram of a first preamble according to an embodiment of the present application;

[0027] Figure 3C FIG. 5 shows a waveform diagram of a verification signal according to an embodiment of the present application;

[0028] Figure 4 FIG. 6 shows a transmission diagram of a loop confirmation frame according to an embodiment of the present application;

[0029] Figure 5 FIG. 7 shows a waveform diagram of a feature signal according to an embodiment of the present application;

[0030] Figure 6 FIG. 8 shows a diagram of a master chip switching between a sleep state and a wake-up state according to an embodiment of the present application;

[0031] Figure 7 FIG. 9 shows a flowchart of a method for actively monitoring battery pack failure according to an embodiment of the present application; Figure 2 ;

[0032] Figure 8 FIG. 10 shows a diagram of a system for actively monitoring battery pack failure according to an embodiment of the present application. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0034] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Multiple embodiments in this application may include two or more.

[0035] In the various embodiments of this application, it should be understood that the sequence number of each process described below does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0036] The active battery pack fault monitoring method provided in this application embodiment is applicable to Figure 1 The circuit architecture shown is in Figure 1 In this configuration, the main control chip 11 interacts with the microcontroller unit 12. Both the main control chip 11 and the microcontroller unit 12 are connected to the power management chip 15. The battery management unit 10 includes the main control chip 11, the microcontroller unit 12, and the power management chip 15. The power supply battery 20 supplies power to the battery management unit 10. The main control chip 11 also interacts with the chip link 13. The chip link 13 includes at least one slave chip 131. The slave chip 131 is connected to the power battery 14 and is used for fault measurement of the power battery 14. The power battery 14 supplies power to the slave chip 131. A single slave chip 131 can be adapted to one or more power batteries 14. The power batteries 14 adapted to by at least one slave chip 131 on the chip link 13 constitute a power battery pack. Figure 1 In this paper, we will take the example of matching one power battery 14 with each chip 131 as an example.

[0037] The main control chip 11 acts as a bridge chip (communication conversion chip), connecting the microcontroller unit 12 and the chip link 13. The slave chip 131 on the chip link 13 is an analog front-end sampling chip (AFE chip), which collects battery status data (such as voltage, temperature, etc.) of the power battery 14 for fault measurement of the power battery 14.

[0038] The main control chip 11 and the slave chip 131 can switch between sleep monitoring mode and normal function mode. Sleep monitoring mode supports cyclic switching between wake-up state and sleep state, while normal function mode is a working mode that keeps the wake-up state. When working in sleep monitoring mode, by switching between wake-up state and sleep state, a rapid response can be achieved based on the wake-up mechanism, while reducing power consumption and extending service life based on the periodic sleep mechanism. When working in normal function mode, the wake-up state is always maintained, which can achieve real-time monitoring, but requires greater power consumption.

[0039] In the running state (non-low power consumption state), the micro control unit 12 controls the master control chip 11 and the slave chip 131 to switch from the normal function mode to the sleep monitoring mode, and when the master control chip 11 and the slave chip 131 are in the sleep monitoring mode, the micro control unit 12 switches to the low power consumption state. When the master control chip 11 and the slave chip 131 are in the normal function mode, the micro control unit 12 remains in the running state.

[0040] In an optional embodiment, the master control chip 11 and the micro control unit 12 interact based on the SPI (Serial Peripheral Interface) communication protocol, and the master control chip 11 and the slave chip 131 interact based on the DIO (differential IO) communication protocol. The master control chip 11 can be regarded as a chip obtained based on the SPI_EN pin configuration on the basis of the AFE chip. By setting the SPI_EN pin, the master control chip 11 can switch between the SPI communication mode and the DIO communication mode. Compared with the slave chip 131, the master control chip 11 has various measurement functions possessed by the slave chip 131, and also supports the SPI communication protocol, as a bridge, can directly communicate with the micro control unit 12, and at the same time, converts the command transmitted by the micro control unit 12 in the SPI communication protocol into the communication protocol supported inside the chip link 13.

[0041] It should be noted that in the sleep monitoring mode, the transmission loop confirmation frame and the fault frame are transmitted between the master control chip 11 and the slave chip 131 (for specific introduction of the loop confirmation frame and the fault frame, see the relevant description below); in the normal function mode, the micro control unit 12 provides a master control command of a specific frame format (such as including preamble-0, command, confirmation), provides the master control command to the master control chip 11, and the master control chip 11 sends the master control command to the slave chip 131, so that the master control chip 11 and the slave chip 131 respond to the master control command in time. Whether in the sleep monitoring mode or in the normal function mode, the master control chip 11 and the slave chip 131 interact based on the DIO communication protocol; when the micro control unit 12 is in the low power consumption state, no interaction occurs with the master control chip 11, and when the micro control unit 12 is in the running state, the micro control unit 12 interacts with the master control chip 11 based on the SPI communication protocol.

[0042] When the master chip 11 and the slave chip 131 are in the sleep monitoring mode, the micro control unit 12 is in a low power consumption state. The power management chip 15 is used to supply power for the micro control unit 12, and when the micro control unit 12 switches to the running state, the power management chip 15 also needs to switch from the low power consumption state to the running state to keep supplying power for the micro control unit 12. The power management chip 15 can also always keep in the running state, or the power management chip 15 supports regular sleep, and before the micro control unit 12 switches to the running state, the power management chip 15 switches to the running state to switch in advance when the micro control unit 12 has power supply demand, and supply power for the micro control unit 12 in time.

[0043] The master chip 11 wakes up the micro control unit 12 in the low power consumption state based on the IRQ (Interrupt ReQuest, interrupt request), and the master chip 11 initiates the IRQ to wake up the power management chip 15 in the low power consumption state based on the connection with the power management chip 15, so that the power management chip 15 switches to the running state to supply power for the micro control unit 12 after being woken up. If the power management chip 15 keeps in the running state, the IRQ for the power management chip 15 does not need to be initiated. If the power management chip 15 and the micro control unit 12 are both in the low power consumption state, the power management chip 15 can be woken up earlier than the micro control unit 12, to ensure that power is supplied for the micro control unit 12 in time.

[0044] The battery pack failure active monitoring method applied to the master chip is introduced as follows, as shown in FIG. 1, the method comprises the following steps: Figure 2

[0045] Step 201, in the wake-up state in the sleep monitoring mode, based on the loop confirmation frame sent to the chip link, the connectivity of the chip link is identified, and the wake-up operation of each slave chip in the sleep state in the sleep monitoring mode on the chip link is initiated.

[0046] The master chip in the embodiment switches to the wake-up state when working in the sleep monitoring mode, generates the loop confirmation frame and sends it to the chip link. The loop confirmation frame sent by the master chip has a dual role, one is to identify the connectivity of the chip link, and the other is to initiate the wake-up operation of each slave chip on the chip link.

[0047] The slave chip on the chip link is in the sleep state in the sleep monitoring mode, and after the loop confirmation frame is transmitted to the slave chip on the chip link, the slave chip is driven to switch from the sleep state in the sleep monitoring mode to the wake-up state in the sleep monitoring mode, so as to realize the switching of the slave chip from the sleep state to the wake-up state based on the wake-up state of the master chip, so that the slave chip enters the working state. This wake-up mechanism ensures that the slave chip can respond quickly when there is a use demand, and ensures the response speed and flexibility.​

[0048] The chip link includes one or more slave chips, for the case that the chip link includes only one slave chip, the wake-up operation of the single slave chip is initiated based on the loop confirmation frame; for the case that the chip link includes at least two slave chips, the at least two slave chips are connected in a linear sequence, each slave chip is connected to the next slave chip through one or more pins, and the chain structure formed by the connection is a daisy chain, that is, the chip link in the embodiment of the application.

[0049] The loop confirmation frame is sent by the output end of the master chip and is propagated step by step along the chip link. The input end of the slave chip receives the loop confirmation frame, and the loop confirmation frame is forwarded to the next-level slave chip at the output end. This step-by-step propagation mode can verify the connectivity of the chip link, and the wake-up operation of the slave chip can be initiated one by one according to the position of the slave chip on the chip link, so as to realize the step-by-step transmission based on the loop confirmation frame provided by the master chip and wake up the slave chips one by one.

[0050] In the case that the connectivity of the chip link is normal, the fault frame indicating the existence of a fault is received, which is provided by the fault measurement of the adapted power battery in the wake-up state of the slave chip in the measurement mode.

[0051] The master chip identifies the connectivity of the chip link by sending the loop confirmation frame, and in the case that the connectivity of the chip link is determined to be normal based on the loop confirmation frame, the fault frame indicating the existence of a fault is received, which is provided by the fault measurement of the adapted power battery after the slave chip on the chip link is activated in the measurement mode. Each slave chip on the chip link corresponds to one or more power batteries, and the power batteries adapted by the respective slave chips form a power battery pack, thereby realizing fault monitoring of the power battery pack.

[0052] For the slave chip on the chip link, after being woken up, the measurement mode is activated in the wake-up state based on a specific trigger condition, and the fault measurement of the adapted power battery is performed in the measurement mode. If a fault of the power battery is detected, the fault frame is sent. If no fault of the power battery is detected, no content needs to be sent, and the slave chip waits for the arrival of the fault frame provided by the previous slave chip within a set time length. If the fault frame provided by the previous slave chip is not received within the set time length, the slave chip automatically switches to the sleep state of the sleep monitoring mode to save power consumption. If the fault frame provided by the previous slave chip is received after switching to the sleep state of the sleep monitoring mode, the slave chip is woken up to forward the fault frame. For any slave chip, it can perform fault measurement on one or more power batteries. In order to facilitate the description, the embodiment is introduced by taking the single slave chip measuring one power battery as an example.

[0053] The master chip receives the fault frames provided by one or more slave chips on the chip link, and the fault frames provided by the slave chips are transmitted step by step along the chip link, for example, the fault frame provided by the slave chip 1 is transmitted step by step to the master chip along the slave chip 2, the slave chip 3, the slave chip 4 and the slave chip 5, the fault frame provided by the slave chip 2 is transmitted step by step to the master chip along the slave chip 3, the slave chip 4 and the slave chip 5.

[0054] In step 203, in response to receiving the fault frame provided by the slave chip, the micro control unit in the low power consumption state is woken up to trigger the micro control unit to revisit the chip link and query the slave chip reporting the fault frame; wherein, when the master chip and the slave chip are in the sleep monitoring mode, the micro control unit is in the low power consumption state, and the micro control unit is switched to the running state for revisiting after being woken up.

[0055] After the master chip and the slave chip are switched to the sleep monitoring mode, the MCU is switched from the running state to the low power consumption state. In the sleep monitoring mode, in response to receiving the fault frame provided by the slave chip, the master chip wakes up the MCU in the low power consumption state, for example, the master chip initiates an IRQ to notify the MCU after receiving the fault frame, wakes up the MCU and makes subsequent response by the MCU. After the MCU is woken up, it is switched from the low power consumption state to the running state, and revisits the chip link and queries the slave chip reporting the fault frame in the running state, so as to locate the power battery with fault, facilitating targeted inspection and maintenance by maintenance personnel.

[0056] The master chip receives the fault frames provided by one or more slave chips on the chip link, and in order to ensure timely processing of fault conditions, the master chip wakes up the MCU in the low power consumption state immediately after receiving the first fault frame provided by the slave chip, and revisits the chip link by the MCU. When the MCU revisits the chip link, the MCU sends a revisit command to the master chip, the revisit command can query the fault flag and obtain fault information, and the master chip sends the revisit command to the chip link and transmits it step by step from front to back on the chip link. The revisit command provided by the MCU belongs to the master command, and the master chip and the slave chip are switched from the sleep monitoring mode to the normal function mode based on the master command.

[0057] Each slave chip on the chip link has a corresponding ID (identification, identity number), and the content is read in each slave chip in the process of step-by-step transmission of the revisit command on the chip link, to query the fault flag and obtain fault information based on the content provided by each slave chip, locate the slave chip reporting the fault frame, and further determine the power battery with fault.

[0058] The MCU analyzes the fault information obtained based on the return command, judges the severity of the fault, and executes a corresponding processing strategy according to the severity of the fault: for example, for a slight fault, the fault information is recorded to a log file, and the user is reminded through an indicator light or a user interface; for a serious fault, the power supply is cut off in time to prevent further damage, and the user is notified through an alarm system.

[0059] It should be noted that for some faults that can be temporarily ignored, the MCU can continue to configure the slave chip corresponding to the faulty power battery to ignore the current fault, and then configure the master chip and all slave chips to continue sleep monitoring in the sleep monitoring mode to monitor other faults of the power battery pack.

[0060] In the above embodiments of the present application, the master chip generates a loop confirmation frame in the wake-up state of the sleep monitoring mode and sends it to the chip link to identify the connectivity of the chip link and initiate a wake-up operation on each slave chip in the sleep state of the sleep monitoring mode on the chip link. The loop confirmation frame can quickly detect the link connectivity, so that the slave chip on the chip link enters the working state, ensuring that the slave chip can respond quickly when there is a demand for use, and ensuring the response speed and flexibility. In the case where the connectivity of the chip link is normal, the fault frame indicating the existence of a fault provided by the slave chip in the measurement mode of the wake-up state for the adapted power battery is received, and in response to receiving the fault frame provided by the slave chip, the MCU in the low-power state is woken up, and the MCU is switched to the running state to return to the chip link and query the slave chip reporting the fault frame. This can facilitate targeted inspection and maintenance by maintenance personnel, shorten the fault handling time, reduce maintenance costs, and ensure the safety and reliability of the power battery.

[0061] The process of identifying link connectivity and waking up slave chips based on a loop confirmation frame is described below. When identifying the connectivity of the chip link and initiating a wake-up operation on each slave chip on the chip link based on the loop confirmation frame sent to the chip link, it includes:

[0062] In the sleep monitoring mode, in response to entering the wake-up state based on the timing autonomous wake-up mechanism, a loop confirmation frame is generated and sent to the chip link. The slave chip on the chip link transmits the loop confirmation frame step by step, and the loop confirmation frame drives the slave chip to switch from the sleep state of the sleep monitoring mode to the wake-up state. If the loop confirmation frame returned by the chip link is received within a first preset time period after sending the loop confirmation frame, it is determined that the connectivity of the chip link is normal.

[0063] The master chip generates a loop confirmation frame along the chip link in the wake-up state of the sleep monitoring mode, each slave chip forwards the loop confirmation frame to the next-level slave chip after receiving the loop confirmation frame, the loop confirmation frame is forwarded step by step along the chip link, and finally the loop confirmation frame needs to return to the master chip along the chip link. If the loop confirmation frame can return to the master chip within a first preset time period after being sent, it indicates that the connectivity of the chip link is normal, that is, if the master chip receives the returned loop confirmation frame within the first preset time period after sending the loop confirmation frame, it is determined that the connectivity of the chip link is normal, and the loop confirmation mechanism can quickly detect whether there is a connection fault in the chip link.

[0064] The loop confirmation frame is used to drive the slave chip to switch from the sleep state of the sleep monitoring mode to the wake-up state, and the slave chip in the sleep state of the sleep monitoring mode switches to the wake-up state based on the trigger of the loop confirmation frame after receiving the loop confirmation frame, and forwards the loop confirmation frame in the wake-up state. For the case that the chip link includes at least two slave chips, the slave chips arranged in sequence on the chip link forward the loop confirmation frame step by step, and each slave chip is woken up in sequence based on the loop confirmation frame, so as to wake up the slave chips one by one in batches based on a single loop confirmation frame provided by the master chip.

[0065] Correspondingly, if the loop confirmation frame returned by the chip link is not received within the first preset time period after the loop confirmation frame is sent, it is determined that the connectivity of the chip link is abnormal; in response to the abnormal connectivity of the chip link, the MCU in the low-power state is woken up to trigger the MCU to switch to the running state to diagnose and process the chip link with abnormal connectivity.

[0066] After the master chip sends the loop confirmation frame, if the loop confirmation frame returned by the chip link is not received within a first preset time period, it is determined that the connectivity of the chip link has a problem, the link connectivity flag bit (0 indicates that the loop confirmation frame is received, and 1 indicates that the loop confirmation frame is not received) is set to 1, so that the MCU is queried subsequently. In addition, the master chip notifies the MCU through an IRQ to wake up the MCU in the low-power state, and the MCU makes a subsequent response.

[0067] The MCU is in a running state after being woken up, and subsequent responses are made in the running state to diagnose and process the chip link with connectivity abnormalities. For example, the MCU first queries the link connectivity flag bit of the master chip. When the value of the flag bit is 1, it indicates that there is a problem with the link connectivity. The MCU triggers the master chip and the slave chip to exit the sleep monitoring mode when querying the link connectivity flag bit. The MCU can clear the flag bit and trigger the master chip and the slave chip to re-enter the sleep monitoring mode, so that the master chip re-sends the loop confirmation frame, and the connectivity of the chip link is verified again based on the loop confirmation frame to exclude accidental communication errors. If it is determined based on the repeatedly sent loop confirmation frame that there is a problem with the link connectivity, the MCU controls the master chip and the slave chip to switch back to the normal function mode by sending a master control command. In the normal function mode, the master chip and the slave chip automatically perform link open circuit and short circuit monitoring based on the continuous communication data stream, and determine whether there is a fault based on the monitoring result. If there is a fault, the corresponding open circuit and short circuit flag bit is set to 1. The MCU can query the flag bit to determine the fault condition.

[0068] After the MCU identifies the fault, it records the fault information (such as fault time, fault type and possible cause), displays the fault information to the user through a user interface (such as a dashboard, an application page, etc.), reminds the user to check or repair, and can also trigger an alarm system (such as an alarm, an indicator light) to remind the user or maintenance personnel to pay attention. For faults that may cause safety hazards, the MCU can switch to a safety mode to limit the use of certain functions until the fault is eliminated.

[0069] In the above embodiment, in the sleep monitoring mode, the master chip generates a loop confirmation frame based on the current state being a wake-up state and sends it to the chip link, and the connectivity of the chip link is verified based on the transmission of the loop confirmation frame on the chip link to quickly detect the link connectivity based on the loop confirmation mechanism; in the long idle or low power consumption mode of the power battery, the slave chip on the chip link is in a sleep state of the sleep monitoring mode to save energy, and the master chip wakes up each slave chip on the chip link by sending a loop confirmation frame to make it enter a working state. This wake-up mechanism ensures that the slave chip can respond quickly when needed, ensuring response speed and flexibility.

[0070] The following describes a scheme of triggering a slave chip to perform fault measurement and receiving a fault frame provided by the slave chip. In the embodiment of the application, the loop confirmation frame is a signal sequence sequentially transmitting a first idle signal, a first preamble and a verification signal in time sequence, the loop confirmation frame triggers the slave chip to enter a wake-up time when the loop confirmation frame is transmitted to an input end of the slave chip, and the slave chip forwards the loop confirmation frame to a lower-level slave chip after entering a wake-up state at the end of the wake-up time, and the loop confirmation frame triggers the slave chip to activate a measurement mode in the wake-up state within a second preset time length after entering the wake-up state in response to receiving at least a first number of continuous first preambles and at least one verification signal, so as to perform fault measurement on the adapted power battery.

[0071] The verification signal is transmitted to the input end of the slave chip and then forwarded to the lower-level slave chip after a delay time, and the delay time is greater than or equal to the wake-up time.

[0072] The loop confirmation frame includes three elements, a first idle signal (denoted as Idle), a first preamble (denoted as Preamble-0) and a verification signal (denoted as A), and the loop confirmation frame is expressed as {Idle, Preamble-0, A} for example, the first idle signal is used to initialize a communication link, the first preamble is used to identify the start of the frame, and the verification signal is used to confirm the connectivity and state wake-up of the link, the first idle signal, the first preamble and the verification signal are sequentially transmitted when the loop confirmation frame is transmitted, and each element lasts for a set time length. As an example, the signal waveform of the first idle signal is as shown in FIG. 1, the waveform of the first preamble is as shown in FIG. 2, and the waveform of the verification signal (such as the A signal) is as shown in FIG. 3. Figure 3A Figure 3B Figure 3C

[0073] Figure 4 A transmission schematic of the loop confirmation frame is shown. After the master chip generates the loop confirmation frame, the master chip sends the loop confirmation frame to the chip link, the loop confirmation frame triggers the slave chip 1 to enter a wake-up time when the loop confirmation frame is transmitted to an input end of the slave chip 1, so that the slave chip 1 enters a wake-up state after the end of the wake-up time. After entering the wake-up state at the end of the wake-up time, the slave chip 1 forwards the loop confirmation frame to a lower-level slave chip 2, the loop confirmation frame triggers the slave chip 2 to enter a wake-up time when the loop confirmation frame is transmitted to an input end of the slave chip 2, so that the slave chip 2 enters a wake-up state after the end of the wake-up time. After entering the wake-up state at the end of the wake-up time, the slave chip 2 forwards the loop confirmation frame to a lower-level slave chip 3, the loop confirmation frame triggers the slave chip 3 to enter a wake-up time when the loop confirmation frame is transmitted to an input end of the slave chip 3, so that the slave chip 3 enters a wake-up state after the end of the wake-up time. By analogy, the transmission of the loop confirmation frame is performed on the chip link.

[0074] ​​​For each slave chip, the receiving loop-ack frame and the forwarding loop-ack frame are two parallel processes. If the slave chip receives at least a first number of continuous first preambles and at least one verification signal (such as at least 40 continuous preambles-0 and at least one A signal) within a second preset time period after entering the wake-up state, the measurement mode can be activated, and the adapted power battery is measured for faults in the measurement mode. The verification signal is a necessary condition for activating the measurement mode. Only when the verification signal is received, the slave chip can be activated to the measurement mode. If there is no verification signal, the slave chip will automatically return to the sleep state.

[0075] In Figure 4 , a delay time (tdelay) is set for each slave chip. After the verification signal is transmitted to the input end of the slave chip, the slave chip forwards the verification signal to the next-level slave chip after a delay time, which is greater than or equal to the wake-up time (twake) of the slave chip. Figure 4 In the case of a delay time equal to the wake-up time of the slave chip), the delay time compensates for the loss of the length of the input signal within the wake-up time of the slave chip, so as to ensure that the length of the first preamble does not become shorter and shorter as it propagates along the chain. If no delay time is set, as the loop-ack frame propagates along the chip link, the length of the frame will gradually shorten at each level, which may easily lead to the slave chip not receiving a first preamble of sufficient length to identify the loop-ack frame and thus not being activated to enter the measurement mode. From the perspective of communication robustness, this design can effectively prevent accidental noise from waking up the slave chip and entering the measurement mode.

[0076] In the case of normal connectivity of the chip link, when the receiving slave chip receives a fault frame indicating a fault in the measurement mode of the wake-up state of the adapted power battery, the fault frame includes:

[0077] In response to the normal connectivity of the chip link, the receiving slave chip receives the fault frame repeatedly transmitted by the slave chip in the measurement mode of the wake-up state and transmitted along the chip link at each level. The fault frame is a signal sequence sequentially transmitting a second idle signal, a second preamble, and a characteristic signal in time order, and the fault frame is terminated when the MCU visits the chip link.

[0078] For any slave chip, after the slave chip measures the power battery for faults in the measurement mode, if it finds that there is a fault such as OV, UV, OT, UT, etc., the slave chip generates a fault frame indicating a fault and sends it to the next-level slave chip, so that the fault frame is transmitted to the master chip along the chip link at each level.

[0079] The fault frame includes three elements, a second idle signal (denoted as Idle), a second preamble (denoted as Preamble-0), and a feature signal (denoted as B), and the fault frame is expressed as {Idle, Preamble-0, B}, for example. The second idle signal is used to initialize the communication link, the second preamble is used to identify the start of the frame, and the feature signal is used to identify the fault, such as identifying the fault type or fault state. The second idle signal, the second preamble, and the feature signal are transmitted in sequence when transmitting the fault frame, and each element lasts for a set time length. As an example, the signal waveform of the second idle signal is shown in Figure 3A , the waveform of the second preamble is shown in Figure 3B , and the waveform of the feature signal (such as the B signal) is shown in Figure 5 .

[0080] The fault frame generated from the chip is repeatedly sent until the MCU visits the chip link, so that the fault frame can be detected by the master chip without being affected by noise and other unexpected factors, thereby ensuring that the fault can be timely and reliably notified to the MCU by the master chip. For the master chip, after receiving the fault frame provided by the slave chip, the IRQ is pulled up to wake up the MCU, so that the MCU switches to the running state and timely visits the chip link to detect the fault occurrence position and the fault type, so as to perform subsequent response processing.

[0081] In an optional embodiment of the present application, in response to identifying that the connectivity of the chip link is normal within a third preset time length, the master chip automatically switches to the sleep state; and when the duration of the sleep state satisfies a preset condition, the master chip switches to the wake-up state based on a timing autonomous wake-up mechanism; wherein the duration of the sleep state of the master chip is set according to the maximum allowed safe detection interval and the minimized standby power consumption.

[0082] If the master chip identifies that the connectivity of the chip link is normal, and no fault frame sent by the slave chip is received within a third preset time length (such as 1S) after confirming that the connectivity of the chip link is normal, it indicates that the slave chip has not measured a fault, and the master chip can automatically return to the sleep state of the sleep monitoring mode. When the duration of the sleep state satisfies a preset condition, the master chip switches back to the wake-up state based on a timing autonomous wake-up mechanism to perform the next round of monitoring. As shown in Figure 6 , it is a schematic diagram of the master chip switching between the sleep state and the wake-up state.

[0083] The duration of the sleep state of the master control chip needs to consider the maximum safe detection interval allowed after the power battery fails and minimize standby power consumption, and the duration of the sleep state is set by balancing the above two. The maximum safe detection interval refers to the longest time interval during which the system can safely operate after the power battery fails, during which time the failure must be detected and appropriate measures must be taken. Therefore, the sleep duration of the master control chip cannot exceed this interval to ensure that the failure can be responded to in a timely manner and the above risks are avoided. The smaller the power consumption of the master control chip in the sleep state, the longer the standby time of the device, which is particularly important for devices that need to be on standby for a long time. Therefore, it is necessary to prolong the sleep duration of the master control chip as much as possible to reduce standby power consumption. Based on this, a balance is found between the maximum safe detection interval and the minimum standby power consumption to set the duration of the sleep state, which can minimize the standby power consumption of the master control chip while ensuring that the power battery failure can be detected in a timely manner, achieving efficient operation while ensuring safety.

[0084] The interval time between the two sleepings can be reasonably set under the condition of meeting the safety requirement to minimize the standby power consumption and achieve continuous active monitoring of the power battery pack. That is, the sleep interval can be adjusted according to actual requirements to balance the standby power consumption of the chip link and the master control chip, and effective active monitoring of the power battery pack can be achieved in the standby state during long parking or parking, improving the effectiveness of battery management.

[0085] For the case where the master control chip automatically returns to the sleep state if no failure frame is received from the chip within the third preset time interval after identifying that the connectivity of the chip link is normal, if the master control chip receives a failure frame sent from the slave chip after switching to the sleep state, the master control chip switches back to the wake-up state, and the MCU is woken up by IRQ after detecting the failure frame in the wake-up state, triggering the MCU to visit the chip link.

[0086] In the embodiments of the present application, the master control chip supports mode switching between the sleep monitoring mode and the normal function mode, and the method further comprises:

[0087] In the normal function mode, in response to receiving a first master control command indicating sleep sent by the MCU in the running state, switching to the sleep state;

[0088] In the normal function mode, in response to receiving a second master control command indicating mode switching sent by the MCU in the running state, switching to the sleep monitoring mode, and the MCU enters the low-power state from the running state after controlling the master control chip to switch modes;

[0089] In the sleep monitoring mode, in response to receiving a third master command sent by the MCU in the running state, the normal function mode is switched, and the return command of the chip link visited by the MCU is the third master command provided by the MCU.

[0090] Since the normal function mode is a working mode of keeping the wake-up state, when the master chip is in the normal function mode, the wake-up state needs to be kept, and the MCU needs to continuously access the data kept in the running state. The MCU controls the master chip to switch to the sleep state by sending a first master command (such as a sleep instruction) indicating sleep. Correspondingly, the MCU can also send a first master command (such as a wake-up instruction) indicating wake-up to control the master chip to switch from the sleep state back to the wake-up state in the normal function mode. And the MCU controls the master chip at the same time, and the first master command is forwarded to the slave chip by the master chip, so that the slave chip and the master chip are linked to switch the state in the normal function mode.

[0091] When the master chip is in the normal function mode and the MCU is in the running state, the MCU controls the master chip to switch to the sleep monitoring mode by sending a sleep monitoring instruction (a second master command indicating mode switching), and controls the slave chip on the chip link to switch to the sleep monitoring mode from the normal function mode. After the MCU sends the second master command to control the master chip and the slave chip to switch the mode, it enters a low-power state from the running state to save power consumption.

[0092] When the master chip and the slave chip are in the sleep monitoring mode, the MCU is in a low-power state. The master chip wakes up the MCU in the low-power state based on the fault frame received in the wake-up state in the sleep monitoring mode. After the MCU switches to the running state, it sends a return command to visit the chip link, and the master chip and the slave chip switch to the normal function mode based on the return command. In the sleep monitoring mode, the master command provided by the MCU is the third master command, and the return command of the chip link visited is the third master command. The third master command also includes other commands provided by the MCU.

[0093] In the sleep monitoring mode, the third master control command sent by the MCU is a command that needs to be responded to in priority, so as to ensure that the master chip and the slave chip can respond to the command provided by the MCU at any time in the sleep monitoring mode, and based on the third master control command provided by the MCU, the master chip and the slave chip can switch to the normal function mode. For example, in the wake-up state of the sleep monitoring mode, the master chip receives the third master control command sent by the MCU through the SPI bus in the process of sending the loop confirmation frame, the master chip switches from sending the loop confirmation frame to forwarding the third master control command provided by the MCU, and based on the third master control command provided by the MCU, the master chip switches to the normal function mode. In the sleep monitoring mode, for each slave chip, when it is determined that the third master control command provided by the MCU comes, it needs to be responded to immediately and forwarded to the next stage in time, and based on the third master control command provided by the MCU, it switches to the normal function mode.

[0094] The overall working process of the master chip working mode switching and state switching in the sleep monitoring mode is introduced as follows. In the normal function mode, the master chip sleeps based on the sleep instruction (the first master control command) sent by the MCU; in the normal function mode, the master chip switches to the sleep monitoring mode based on the sleep monitoring instruction (the second master control command) sent by the MCU. In the wake-up state of the sleep monitoring mode, the master chip generates a loop confirmation frame to verify the connectivity of the chip link, initiates a wake-up operation on each slave chip on the chip link, and prepares to receive a fault frame provided by the slave chip when the connectivity of the chip link is normal. If no fault frame is received, the master chip switches to the sleep state, and after sleeping for a certain period of time, it automatically switches back to the wake-up state based on the timing autonomous wake-up mechanism. If a fault frame is received, the MCU in the low-power state is notified, and based on the return visit command (which belongs to the third master control command) provided by the MCU, the master chip switches to the normal function mode.

[0095] The battery pack fault active monitoring method applied to the master chip is introduced above, and the battery pack fault active monitoring method applied to the slave chip is introduced as follows, as shown in FIG. 7, which includes the following steps: Figure 7

[0096] Step 701, in the sleep state of the sleep monitoring mode, in response to receiving the loop confirmation frame sent by the master chip, switching to the wake-up state and forwarding the loop confirmation frame along the chip link, the loop confirmation frame is sent by the master chip in the wake-up state of the sleep monitoring mode and is transmitted on the chip link to wake up each slave chip, and the loop confirmation frame returned to the master chip is used to verify that the connectivity of the chip link is normal.

[0097] ​The master chip generates a loop confirmation frame and sends it to the chip link in the wake-up state of the sleep monitoring mode. The slave chip on the chip link switches from the sleep state to the wake-up state after receiving the loop confirmation frame, so as to enter the working state. This wake-up mechanism ensures that the slave chip can respond quickly when there is a demand for use, and guarantees the response speed and flexibility.

[0098] For any slave chip, the input end of the current slave chip receives the loop confirmation frame and forwards the loop confirmation frame to the next-level slave chip at the output end. This propagation mode can verify the connectivity of the chip link, and can initiate the wake-up operation of the slave chip according to the position of the slave chip on the chip link, to realize the step-by-step transmission based on the loop confirmation frame, and wake up each slave chip in turn.

[0099] The loop confirmation frame is forwarded step by step on the chip link, and finally the loop confirmation frame needs to be returned to the master chip. If the loop confirmation frame can be returned to the master chip within a first preset time period after being sent, it indicates that the connectivity of the chip link is normal. If the master chip does not receive the loop confirmation frame returned by the chip link within the first preset time period after being sent, it is determined that the connectivity of the chip link is abnormal, and the connectivity of the chip link is verified based on the loop confirmation frame.

[0100] In step 702, in the case of being activated to the measurement mode in the wake-up state, the fault of the adapted power battery is measured, and a fault frame indicating the existence of the fault is generated based on the measurement result that the power battery exists the fault and is transmitted along the chip link. Wherein, the adapted power batteries of at least one slave chip constitute a power battery pack; when the master chip and the slave chip are in the sleep monitoring mode, the micro control unit is in a low power consumption state; the fault frame is transmitted step by step on the chip link, and the fault frame transmitted to the master chip is used to wake up the micro control unit in the low power consumption state, so as to trigger the micro control unit to switch from the low power consumption state to the running state, and to revisit the chip link and query the slave chip reporting the fault frame in the running state.

[0101] The current slave chip on the chip link is activated to the measurement mode based on a specific trigger condition in the wake-up state after being woken up, and the fault of the adapted power battery is measured in the measurement mode. When it is detected that the power battery exists the fault, a fault frame indicating the existence of the fault is sent. Each slave chip on the chip link corresponds to one or more power batteries, and the adapted power batteries of each slave chip constitute a power battery pack, so as to realize the fault monitoring of the power battery pack.

[0102] The MCU can control the master chip and the slave chip to switch working modes. After the master chip and the slave chip are switched to the sleep monitoring mode, the MCU is switched to a low-power state. In the sleep monitoring mode, a fault frame provided by the current slave chip is transmitted along the chip link in stages, and the fault frame transmitted to the master chip is used to wake up the MCU in the low-power state. That is, the master chip wakes up the MCU in the low-power state in response to receiving the fault frame provided by the slave chip. After the MCU is woken up, the MCU is switched to a running state, the chip link is revisited, the slave chip reporting the fault frame is queried, and thus the faulty power battery is located, facilitating targeted inspection and maintenance by maintenance personnel.

[0103] When the MCU revisits the chip link, the MCU sends a revisit command to the master chip. The revisit command can query a fault flag and obtain fault information, and the revisit command is sent to the chip link by the master chip and transmitted on the chip link from front to back in stages. The revisit command provided by the MCU is a master control command, and the master chip and the slave chip are switched from the sleep monitoring mode to a normal function mode based on the master control command. Each slave chip on the chip link has a corresponding ID, and the content is read in each slave chip in the process of the revisit command transmitted on the chip link in stages, so as to query the fault flag and obtain the fault information based on the content provided by each slave chip, locate the slave chip reporting the fault frame, and thus determine the faulty power battery.

[0104] In the above embodiment, the slave chip receives the loop confirmation frame provided by the master chip, switches to the wake-up state based on the loop confirmation frame, and forwards the loop confirmation frame along the chip link. Based on the step-by-step transmission of the loop confirmation frame, each slave chip is woken up in turn, so that the slave chip on the chip link enters the working state, ensuring that the slave chip can respond quickly when there is a use demand, and ensuring the response speed and flexibility. The slave chip provides a fault frame indicating that there is a fault in the fault measurement of the adapted power battery in the measurement mode of the wake-up state, the MCU in the low-power state is woken up by the master chip based on the fault frame, so that the MCU is switched to the running state to revisit the chip link and query the slave chip reporting the fault frame, which can facilitate targeted inspection and maintenance by maintenance personnel, shorten the fault processing time, reduce the maintenance cost, and ensure the safety and reliability of the power battery.

[0105] As an optional implementation, when switching to the wake-up state in response to receiving the loop confirmation frame sent by the master chip and forwarding the loop confirmation frame along the chip link, the following steps are included:

[0106] In the sleep state of the sleep monitoring mode, in response to the loop confirmation frame being transmitted to the input end, the slave chip enters the wake-up time and enters the wake-up state after the wake-up time ends, and forwards the loop confirmation frame to the lower-level slave chip; wherein the loop confirmation frame is a signal sequence in which the first idle signal, the first preamble and the verification signal are transmitted in time sequence, the slave chip activates the measurement mode in the wake-up state within a second preset time period after entering the wake-up state to perform fault measurement in response to receiving at least a first number of consecutive first preambles and at least one verification signal; and the input end of the slave chip forwards to the lower-level slave chip after receiving the verification signal, and the delay time is greater than or equal to the wake-up time.

[0107] The loop confirmation frame includes three elements, the first idle signal (denoted as Idle), the first preamble (denoted as Preamble-0), and the verification signal (denoted as A), and the loop confirmation frame is expressed as {Idle, Preamble-0, A} for example. For the introduction of the loop confirmation frame, please refer to the related description of the master chip side method embodiment, which will not be repeated here. When the loop confirmation frame is transmitted to the input end of the slave chip, the slave chip enters the wake-up time, and after the wake-up time ends, the current slave chip enters the wake-up state and forwards the loop confirmation frame to the lower-level slave chip. When the loop confirmation frame is transmitted to the input end of the lower-level slave chip, the lower-level slave chip enters the wake-up time.

[0108] For the slave chip, receiving the loop confirmation frame and forwarding the loop confirmation frame are two parallel processes. If at least a first number of consecutive first preambles and at least one verification signal (such as at least 40 consecutive preamble-0 and at least one A signal) are received within a second preset time period after entering the wake-up state, the measurement mode can be activated. The verification signal is a necessary condition for activating the measurement mode. Only after receiving the verification signal, the slave chip can be activated to the measurement mode. After entering the measurement mode, the slave chip performs fault measurement on the adaptive power battery.

[0109] For the slave chip, there is a delay time (tdelay). After the verification signal is transmitted to the input end of the current slave chip, the current slave chip forwards the verification signal to the lower-level slave chip after a delay time, and the delay time is greater than or equal to the wake-up time, so as to compensate for the loss length of the input signal of the slave chip in the wake-up time, thereby ensuring that the length of the first preamble will not become shorter and shorter as it propagates along the chain. For other related introductions of setting the delay time, please refer to the description of the master chip side method embodiment.

[0110] Wherein, after entering the wake-up state, if at least a first number of consecutive first preambles and at least one verification signal are not received within a second preset time period, it is automatically switched back to the sleep state.

[0111] If the slave chip does not receive the continuous at least 40 preamble-0 and at least one A signal within the second preset time length (for example, 1 second) after entering the wake-up state, the slave chip cannot activate the measurement mode, and thus cannot actively monitor the power battery. The slave chip switches back to the sleep state. The A signal (verification signal) is a necessary condition for activating the measurement mode. Only when the A signal is received, the slave chip can be activated to the measurement mode. If there is no A signal, the chip will automatically return to the sleep state. By introducing the verification signal, possible noise interference can be excluded, and the chip can be prevented from being accidentally awakened and entering the measurement mode. After the slave chip is awakened in the sleep monitoring mode and enters the measurement mode based on the verification signal, fault measurement can be performed on the adapted power battery.

[0112] In an optional embodiment, the fault frame is a signal sequence sequentially transmitting the second idle signal, the second preamble, and the feature signal in chronological order; the fault frame generated by the slave chip is repeatedly sent, and the repeated sending is terminated when the MCU visits the chip link.

[0113] The fault frame includes three elements, the second idle signal (denoted as Idle), the second preamble (denoted as Preamble-0), and the feature signal (denoted as B). The fault frame is represented as {Idle, Preamble-0, B}, for example. For details of the fault frame, refer to the description of the method embodiment on the master chip side, which will not be repeated here. After the slave chip performs fault measurement on the power battery in the measurement mode, if it is found that there is an OV, UV, OT, UT, or the like, the slave chip generates a fault frame indicating the existence of the fault and sends it to the lower-level slave chip, and transmits it to the master chip along the chip link. The fault frame generated by the slave chip is repeatedly sent until the MCU visits the chip link to terminate the sending, so as to ensure that the fault frame can be detected by the master chip without being affected by noise interference and the like, and to maximize the guarantee that the fault can be timely and reliably notified to the MCU by the master chip.

[0114] Optionally, if the slave chip does not generate a fault frame after performing fault measurement, in response to not receiving the forwarded fault frame within the fourth preset time length after entering the wake-up state, the slave chip automatically switches back to the sleep state.

[0115] After the slave chip performs fault measurement on the power battery, if it is determined that the power battery has no fault, the slave chip does not need to generate a fault frame, and waits for the arrival of the fault frame provided by the previous-stage slave chip within the fourth preset time length after entering the wake-up state. If the fault frame provided by the previous-stage slave chip is not received, the slave chip automatically switches to the sleep state to save power consumption. If the fault frame provided by the previous-stage slave chip is received after switching to the sleep state, the slave chip is awakened to forward the fault frame.

[0116] The slave chip of the embodiment of the present application supports working mode switching between the sleep monitoring mode and the normal function mode, and the method further comprises:

[0117] In the normal function mode, in response to receiving a first master command indicating sleep sent by the MCU in the running state and forwarded by the master chip, switching to the sleep state;

[0118] In the normal function mode, in response to receiving a second master command indicating mode switching sent by the MCU in the running state and forwarded by the master chip, switching to the sleep monitoring mode, and the MCU entering the low-power state from the running state after controlling the slave chip to switch modes;

[0119] In the sleep monitoring mode, in response to receiving a third master command sent by the MCU in the running state and forwarded by the master chip, switching to the normal function mode, and the revisit command for revisiting the chip link belonging to the third master command provided by the MCU.

[0120] When the slave chip on the chip link is in the normal function mode, the slave chip needs to remain in the wake-up state, and the MCU remains in the running state due to the need to cooperate with the slave chip and the master chip to continuously access data. The MCU controls the master chip and the slave chip to switch to the sleep state by sending a first master command indicating sleep (such as a sleep instruction). The slave chip receives the first master command provided by the MCU and forwarded by the master chip, and switches to the sleep state without changing the working mode according to the first master command. Correspondingly, the MCU can also send a first master command indicating wake-up (such as a wake-up instruction) to control the master chip and the slave chip in the normal function mode to switch back to the wake-up state.

[0121] When the master chip and the slave chip are in the normal function mode and the MCU is in the running state, the MCU controls the master chip and the slave chip to switch to the sleep monitoring mode by sending a sleep monitoring instruction (a second master command indicating mode switching). The MCU enters the low-power state from the running state after sending the second master command to control the master chip and the slave chip to switch modes, so as to save power consumption.

[0122] When the master chip and the slave chip are in the sleep monitoring mode, the MCU is in the low-power state. The master chip wakes up the MCU in the low-power state based on the fault frame received in the wake-up state in the sleep monitoring mode. After switching to the running state, the MCU sends a revisit command for revisiting the chip link, and the master chip and the slave chip switch to the normal function mode based on the revisit command. In the sleep monitoring mode, the master commands provided by the MCU are all third master commands, and the revisit command for revisiting the chip link belongs to the third master command. The third master command also includes other commands provided by the MCU. In the sleep monitoring mode, the third master command sent by the MCU is a command that needs to be responded to in priority, so as to ensure that the master chip and the slave chip can respond to the command provided by the MCU at any time in the sleep monitoring mode.

[0123] The following is a summary of the overall process of switching the chip's operating mode and switching states in sleep monitoring mode. In normal function mode, the slave chip enters sleep mode based on a sleep command (first master control command) sent by the MCU. In sleep monitoring mode, the slave chip switches to sleep monitoring mode based on a sleep monitoring command (second master control command) sent by the MCU. In sleep monitoring mode, the slave chip switches to wake-up state based on a loop confirmation frame sent by the master control chip, and performs fault measurements on the compatible power battery after entering measurement mode in wake-up state. If it cannot enter measurement mode after entering wake-up state, the slave chip automatically switches back to sleep monitoring mode. If no fault is detected during fault detection, and no fault frame forwarded by the preceding slave chip is received within a specific time after wake-up, the slave chip automatically switches back to sleep monitoring mode. If a fault is detected, a fault frame is generated and provided to the master control chip, which wakes up the MCU. The slave chip then receives a callback command from the MCU and switches back to normal function mode.

[0124] This application also provides a battery pack fault active monitoring system, such as... Figure 8 As shown, it includes: a main control chip 11, a microcontroller unit 12 that interacts with the main control chip 11, and a chip link 13, wherein the chip link 13 includes at least one slave chip 131. Figure 8 The diagram illustrates that the chip link 13 includes multiple slave chips 131, and a power battery 14 adapted to the slave chip 131, wherein at least one slave chip 131 is adapted to a power battery 14 to form a power battery pack.

[0125] When the main control chip 11 is in the wake-up state of the sleep monitoring mode, the main control chip 11 sends a loop confirmation frame to the chip link 13. Based on the loop confirmation frame, the connectivity of the chip link 13 is identified and the wake-up operation of each slave chip 131 on the chip link 13 is initiated. The slave chips 131 on the chip link 13 are in the sleep state of the sleep monitoring mode. The sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state.

[0126] Slave chip 131 switches to wake-up state based on loop confirmation frame. The loop confirmation frame is transmitted step by step on chip link 13 to wake up each slave chip 131.

[0127] When the connectivity of chip link 13 is normal, the main control chip 11 receives a fault frame indicating that there is a fault, provided by the slave chip 131 in the measurement mode of the wake-up state when it performs fault measurement on the adapted power battery 14.

[0128] In response to receiving a fault frame provided by the slave chip 131, the main control chip 11 wakes up the microcontroller 12, which is in a low-power state. When the main control chip 11 and the slave chip 131 are in sleep monitoring mode, the microcontroller 12 is in a low-power state.

[0129] The micro control unit 12 is switched from the low power consumption state to the running state after being woken up, and in the running state, the chip link 13 is visited and the slave chip 131 reporting the fault frame is inquired.

[0130] Optionally, in the sleep monitoring mode, the master control chip 11 enters the wake-up state based on the timing autonomous wake-up mechanism, and in response to entering the wake-up state, the master control chip 11 generates a loop confirmation frame and sends it to the chip link 13, wherein the slave chip 131 on the chip link 13 transmits the loop confirmation frame step by step, and the loop confirmation frame drives the slave chip 131 to switch from the sleep state of the sleep monitoring mode to the wake-up state.

[0131] If the loop confirmation frame returned by the chip link 13 is received within a first preset time period after sending the loop confirmation frame, the master control chip 11 determines that the connectivity of the chip link 13 is normal.

[0132] Optionally, if the loop confirmation frame returned by the chip link 13 is not received within a first preset time period after sending the loop confirmation frame, the master control chip 11 determines that the connectivity of the chip link 13 is abnormal.

[0133] In response to the abnormal connectivity of the chip link 13, the master control chip 11 wakes up the micro control unit 12 in the low power consumption state to trigger the micro control unit 12 to switch to the running state to diagnose and process the chip link 13 with abnormal connectivity.

[0134] Optionally, in response to the normal connectivity of the chip link 13, the master control chip 11 receives the fault frame repeatedly sent by the slave chip 131 in the wake-up state and transmitted step by step through the chip link 13, which is detected by the slave chip 131 in the measurement mode that the adapted power battery 14 has a fault.

[0135] The fault frame is a signal sequence that transmits the second idle signal, the second preamble and the characteristic signal in time sequence, and the fault frame is terminated when the micro control unit 12 visits the chip link 13.

[0136] Optionally, in response to not receiving the fault frame sent by the slave chip 131 within a third preset time period after identifying the normal connectivity of the chip link 13, the master control chip 11 automatically switches to the sleep state.

[0137] In response to the duration of the sleep state meeting the preset condition, the master control chip 11 switches to the wake-up state based on the timing autonomous wake-up mechanism.

[0138] The duration of the sleep state of the master control chip 11 is set according to the maximum allowed safe exploration interval and the minimized standby power consumption.

[0139] Optionally, the loop confirmation frame is a signal sequence sequentially transmitting the first idle signal, the first preamble and the verification signal in time sequence; in the sleep state of the sleep monitoring mode, in response to the loop confirmation frame being transmitted to the input end, the slave chip 131 enters the wake-up time and enters the wake-up state after the wake-up time ends, and forwards the loop confirmation frame to the next stage;

[0140] In a second preset time period after the slave chip 131 enters the wake-up state, in response to receiving at least the first number of consecutive first preambles and at least one verification signal, the wake-up state is activated to perform fault measurement; and after the input end of the slave chip 131 receives the verification signal, the forwarding is delayed for a delay time, and the delay time is greater than or equal to the wake-up time.

[0141] Optionally, after entering the wake-up state, in response to not receiving at least the first number of consecutive first preambles and at least one verification signal within the second preset time period, the slave chip 131 automatically switches back to the sleep state.

[0142] Optionally, if no fault frame is generated after the fault measurement is performed, in response to not receiving the forwarded fault frame within a fourth preset time period after entering the wake-up state, the slave chip 131 automatically switches back to the sleep state.

[0143] Optionally, the slave chip 131 and the master chip 11 support mode switching between the sleep monitoring mode and a normal function mode, and the normal function mode is a working mode in which the wake-up state is maintained;

[0144] In the normal function mode, the slave chip 131 and the master chip 11 receive a first master command indicating sleep sent by the micro control unit 12 in a running state, and switch to the sleep state according to the first master command;

[0145] In the normal function mode, the slave chip 131 and the master chip 11 receive a second master command indicating mode switching sent by the micro control unit 12 in a running state, and switch to the sleep monitoring mode according to the second master command, and the micro control unit 12 enters a low-power state from the running state after sending the second master command to control the slave chip 131 and the master chip 11 to switch modes;

[0146] In the sleep monitoring mode, the slave chip 131 and the master chip 11 receive a third master command sent by the micro control unit 12 in a running state, and switch to the normal function mode according to the third master command, and the micro control unit 12 visits the chip link 13 The visit command of the slave chip 131 belongs to the third master command provided by the micro control unit 12.

[0147] Optionally, the battery pack fault active monitoring system further comprises a power management chip 15;

[0148] The power management chip 15 is connected to the micro control unit 12, and is used to supply power for the micro control unit 12, and the power management chip 15 is connected to the master control chip 11, and switches from the low power consumption state to the running state based on the wake-up of the master control chip 11;

[0149] Wherein, when the micro control unit 12 switches to the running state, the power management chip 15 remains in the running state to supply power for the micro control unit 12.

[0150] For the system embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant part can refer to the part of the method embodiment.

[0151] The embodiment of the application further provides a computer readable storage medium, and the computer readable storage medium stores a computer program, the computer program is executed by a processor to realize each process of the battery pack fault active monitoring method embodiment, and the same technical effects can be achieved, to avoid repetition, which will not be described here. The computer readable storage medium includes a read-only memory (Read-Only Memory, ROM for short), a random access memory (Random Access Memory, RAM for short), a magnetic disk or an optical disk, etc.

[0152] It should be noted that in this paper, the term "including", "containing" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or system including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or includes elements inherent to such process, method, article or system. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or system including the element.

[0153] Through the description of the above embodiments, those skilled in the art can clearly understand that the above embodiment method can be realized by means of software and necessary general hardware platform, of course, it can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the application can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a plurality of instructions for making a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) execute the method described in each embodiment of the application.

[0154] The embodiments of the present application are described above with reference to the accompanying drawings, but the present application is not limited to the specific embodiments described above, and the specific embodiments described above are merely illustrative, but not restrictive, and a person of ordinary skill in the art can make many forms under the inspiration of the present application without departing from the purpose of the present application and the scope protected by the claims.

Claims

1. A method of proactive battery pack failure monitoring, the method comprising: The method is applied to a master chip, the master chip interacts with a micro control unit and a chip link, the chip link comprises at least one slave chip, and the method comprises: In the wake-up state of the sleep monitoring mode, based on the loop confirmation frame sent to the chip link, the connectivity of the chip link is identified, and the wake-up operation of each slave chip on the chip link is initiated, the slave chip on the chip link is in the sleep state of the sleep monitoring mode, and the sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state; In the case that the connectivity of the chip link is normal, a fault frame indicating that there is a fault is received, which is provided by the fault measurement of the adapted power battery in the measurement mode of the wake-up state of the slave chip, and the adapted power battery of the at least one slave chip constitutes a power battery pack; In response to receiving the fault frame provided by the slave chip, the micro control unit in the low-power state is woken up to trigger the micro control unit to visit the chip link and query the slave chip reporting the fault frame; Wherein, when the master chip and the slave chip are in the sleep monitoring mode, the micro control unit is in the low-power state, and after the micro control unit is woken up, it is switched to the running state for visiting.

2. The method of claim 1, wherein, In the wake-up state of the sleep monitoring mode, based on the loop confirmation frame sent to the chip link, the connectivity of the chip link is identified, and the wake-up operation of each slave chip on the chip link is initiated, the slave chip on the chip link is in the sleep state of the sleep monitoring mode, and the sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state; In the sleep monitoring mode, in response to entering the wake-up state based on the timing autonomous wake-up mechanism, the loop confirmation frame is generated and sent to the chip link, wherein the slave chip on the chip link transmits the loop confirmation frame step by step, and the loop confirmation frame drives the slave chip to switch from the sleep state of the sleep monitoring mode to the wake-up state; If the loop confirmation frame returned by the chip link is received within a first preset time period after the loop confirmation frame is sent, it is determined that the connectivity of the chip link is normal.

3. The method of claim 2, wherein, Further comprising: If the loop confirmation frame returned by the chip link is not received within a first preset time period after the loop confirmation frame is sent, it is determined that the connectivity of the chip link is abnormal; In response to the abnormal connectivity of the chip link, the micro control unit in the low-power state is woken up to trigger the micro control unit to switch to the running state to diagnose and process the chip link with abnormal connectivity.

4. The method of claim 2, wherein, The loop confirmation frame is a signal sequence of a first idle signal, a first preamble and a verification signal transmitted in time sequence; When the loop confirmation frame is transmitted to the input end of the slave chip, the slave chip is triggered to enter the wake-up time, and after the wake-up time ends, the slave chip enters the wake-up state to forward the loop confirmation frame to the next level of slave chip, and the loop confirmation frame triggers the slave chip to activate the measurement mode in the wake-up state within a second preset time period after entering the wake-up state in response to receiving at least a first number of continuous first preambles and at least one verification signal, so as to perform fault measurement on the adapted power battery; The verification signal is transmitted to the input end of the slave chip, and then forwarded to a lower-level slave chip after a delay time, which is greater than or equal to the wake-up time.

5. The method of claim 4, wherein, The method comprises the following steps: In the case that the connectivity of the chip link is normal, receiving a fault frame indicating a fault provided by the slave chip in the measurement mode of the wake-up state for fault measurement of the adapted power battery, wherein the fault frame is repeatedly sent by the slave chip when detecting that the adapted power battery has a fault in the measurement mode of the wake-up state, and is transmitted along the chip link in stages. The fault frame is a signal sequence sequentially transmitting a second idle signal, a second preamble and a characteristic signal in time sequence, and the transmission of the fault frame is terminated when the micro control unit visits the chip link.

6. The method of claim 1, wherein, The method further comprises the following steps: In response to the fact that the fault frame sent by the slave chip is not received within a third preset time period after identifying that the connectivity of the chip link is normal, the master control chip automatically switches to a sleep state; In response to the fact that the duration of the sleep state meets a preset condition, the master control chip switches to a wake-up state based on a timing autonomous wake-up mechanism; The duration of the sleep state of the master control chip is set according to a maximum safe measurement interval allowed and minimized standby power consumption.

7. The method according to any one of claims 1 to 6, characterized in that, The master control chip supports mode switching between the sleep monitoring mode and a normal function mode, the normal function mode being a working mode of keeping the wake-up state, and the method further comprises the following steps: In the normal function mode, in response to receiving a first master control command indicating sleep sent by the micro control unit in a running state, the master control chip switches to the sleep state; In the normal function mode, in response to receiving a second master control command indicating mode switching sent by the micro control unit in the running state, the master control chip switches to the sleep monitoring mode, and the micro control unit enters a low-power state from the running state after controlling the master control chip to switch the mode; In the sleep monitoring mode, in response to receiving a third master control command sent by the micro control unit in the running state, the master control chip switches to the normal function mode, and the visiting command of the micro control unit for visiting the chip link belongs to the third master control command provided by the micro control unit.

8. The method according to any one of claims 1 to 6, characterized in that, The master control chip and the micro control unit interact based on a serial peripheral interface communication protocol, and the master control chip and the slave chip interact based on a differential input and output communication protocol.

9. A method of proactive battery pack failure monitoring, the method comprising: The method comprises the following steps: In the sleep state of the sleep monitoring mode, in response to receiving a loop confirmation frame sent by the master control chip, the slave chip switches to the wake-up state and forwards the loop confirmation frame along the chip link, the sleep monitoring mode supports cyclic switching between the wake-up state and the sleep state, and the loop confirmation frame is sent in the wake-up state of the sleep monitoring mode of the master control chip and is transmitted in stages on the chip link to wake up each slave chip. In the measurement mode of the wake-up state, the adapted power battery is measured for fault, a fault frame indicating the existence of fault is generated based on the measurement result of the existence of fault of the power battery and transmitted along the chip link; Wherein, the at least one slave chip adapted power battery constitutes a power battery pack; the loop confirmation frame returned to the master control chip is used to verify the normal connectivity of the chip link; when the master control chip and the slave chip are in the sleep monitoring mode, the micro control unit is in a low power consumption state; the fault frame is transmitted step by step on the chip link, and the fault frame transmitted to the master control chip is used to wake up the micro control unit in the low power consumption state, so as to trigger the micro control unit to switch from the low power consumption state to the running state, and in the running state, the chip link is revisited, and the slave chip reporting the fault frame is inquired.

10. The method of claim 9, wherein, In the sleep state in the sleep monitoring mode, in response to receiving the loop confirmation frame sent by the master control chip, the sleep state is switched to the wake-up state, and the loop confirmation frame is forwarded along the chip link, comprising: In the sleep state in the sleep monitoring mode, in response to the loop confirmation frame being transmitted to the input end, the slave chip enters the wake-up time and enters the wake-up state after the wake-up time ends, and forwards the loop confirmation frame to the next level slave chip; Wherein, the loop confirmation frame is a signal sequence in which a first idle signal, a first preamble and a verification signal are transmitted in time sequence, the slave chip activates the measurement mode in the wake-up state to measure the fault within a second preset time period after entering the wake-up state in response to receiving at least a first number of continuous first preambles and at least one verification signal; and the input end of the slave chip forwards to the next level slave chip after receiving the verification signal after a delay time, and the delay time is greater than or equal to the wake-up time.

11. The method of claim 10, wherein, Further comprising: After entering the wake-up state, in response to not receiving at least a first number of continuous first preambles and at least one verification signal within the second preset time period, automatically switching back to the sleep state.

12. The method of claim 9, wherein, The fault frame is a signal sequence in which a second idle signal, a second preamble and a feature signal are transmitted in time sequence; The fault frame generated by the slave chip is repeatedly sent, and the sending is terminated when the micro control unit revisits the chip link.

13. The method of claim 9, wherein, Further comprising: If the fault frame is not generated after the fault measurement, in response to not receiving the forwarded fault frame within a fourth preset time period after entering the wake-up state, automatically switching back to the sleep state.

14. The method according to any one of claims 9 to 13, characterized in that, The slave chip supports mode switching between the sleep monitoring mode and the normal function mode, and the normal function mode is a working mode keeping the wake-up state, and the method further comprises: In the normal function mode, in response to receiving a first master control command indicating sleep sent by the micro control unit in the running state and forwarded by the master control chip, switching to the sleep state; In the sleep state in the sleep monitoring mode, in response to the loop confirmation frame being transmitted to the input end, the slave chip enters the wake-up time and enters the wake-up state after the wake-up time ends, and forwards the loop confirmation frame to the next level slave chip; Wherein, the loop confirmation frame is a signal sequence in which a first idle signal, a first preamble and a verification signal are transmitted in time sequence, the slave chip activates the measurement mode in the wake-up state to measure the fault within a second preset time period after entering the wake-up state in response to receiving at least a first number of continuous first preambles and at least one verification signal; and the input end of the slave chip forwards to the next level slave chip after receiving the verification signal after a delay time, and the delay time is greater than or equal to the wake-up time. Further comprising: After entering the wake-up state, in response to not receiving at least a first number of continuous first preambles and at least one verification signal within the second preset time period, automatically switching back to the sleep state. The fault frame is a signal sequence in which a second idle signal, a second preamble and a feature signal are transmitted in time sequence; The fault frame generated by the slave chip is repeatedly sent, and the sending is terminated when the micro control unit revisits the chip link. Further comprising: If the fault frame is not generated after the fault measurement, in response to not receiving the forwarded fault frame within a fourth preset time period after entering the wake-up state, automatically switching back to the sleep state. The slave chip supports mode switching between the sleep monitoring mode and the normal function mode, and the normal function mode is a working mode keeping the wake-up state, and the method further comprises: In the normal function mode, in response to receiving a first master control command indicating sleep sent by the micro control unit in the running state and forwarded by the master control chip, switching to the sleep state; In the normal function mode, in response to receiving a second master command indicating mode switching sent by the micro control unit in the running state and forwarded by the master chip, switching to the sleep monitoring mode, the micro control unit enters a low power consumption state from the running state after controlling the slave chip to switch mode; In the sleep monitoring mode, in response to receiving a third master command sent by the micro control unit in the running state and forwarded by the master chip, switching to the normal function mode, the micro control unit revisits the revisit command of the chip link, which belongs to the third master command provided by the micro control unit.

15. A battery pack failure proactive monitoring system, comprising: Comprise: A master chip, a micro control unit interacting with the master chip and a chip link, the chip link comprising at least one slave chip, and a power battery adapted to the slave chip, the at least one slave chip respectively adapted to the power battery constituting a power battery pack; In the wake-up state of the sleep monitoring mode of the master chip, the master chip sends a loop confirmation frame to the chip link, identifies the connectivity of the chip link based on the loop confirmation frame, and initiates a wake-up operation on each slave chip on the chip link, the slave chip on the chip link being in the sleep state of the sleep monitoring mode, the sleep monitoring mode supporting cyclic switching between the wake-up state and the sleep state; The slave chip switches to the wake-up state based on the loop confirmation frame, and the loop confirmation frame is transmitted on the chip link to wake up each slave chip; In the case that the connectivity of the chip link is normal, the master chip receives a fault frame indicating the existence of a fault provided by the slave chip in the measurement mode of the wake-up state for fault measurement of the adapted power battery; The master chip wakes up the micro control unit in the low power consumption state in response to receiving the fault frame provided by the slave chip, the micro control unit being in the low power consumption state when the master chip and the slave chip are in the sleep monitoring mode; The micro control unit switches from the low power consumption state to the running state after being woken up, and revisits the chip link to query the slave chip reporting the fault frame.

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