A method and system for characterizing the time characteristics of internal excitation and observable response.
By combining a data acquisition card and a digital oscilloscope, the software processing overhead is quantified, solving the problem of the difficulty in quantifying software processing overhead in general operating systems, and improving the reliability and accuracy of data acquisition and control tasks.
Patent Information
- Application Number
- CN202511415791.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-30
- Publication Date
- 2026-01-06
- Estimated Expiration
- 2045-09-30
AI Technical Summary
In general-purpose operating systems, the software processing overhead of data acquisition systems is difficult to quantify directly and accurately, leading to time performance bottlenecks and affecting the reliability and accuracy of data acquisition and control tasks.
The programmable counter/timer module of the data acquisition card is used to generate internal hardware stimulus events, and coded response pulses are generated through the output channel. These pulses are then captured synchronously using a digital oscilloscope, thus reducing the software processing overhead.
Precisely quantify software processing overhead, reduce costs and complexity, clarify system stimulus response status, and improve the reliability and accuracy of data acquisition and control tasks.
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Figure CN120891875B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data acquisition system technology, and to a method and system for characterizing the time characteristics of internal excitation and observable response. Background Technology
[0002] Data acquisition systems, as a crucial bridge connecting the physical and digital worlds, play a fundamental role in numerous fields such as modern scientific research, industrial automation, and testing and measurement. Their time performance directly affects the accuracy of experimental results and the stability of control systems. Currently, various data acquisition solutions exist on the market. Some systems based on specific integrated hardware and software frameworks are widely used in general-purpose operating system environments with non-real-time characteristics, thanks to their claimed ease of use or specific functional integration advantages. While these operating systems can run multiple programs simultaneously and offer high flexibility, their inherent characteristics, such as preemptive multitasking scheduling, complex memory management, and unpredictable interrupt latency, introduce significant time uncertainty into time-sensitive data acquisition applications.
[0003] Although many data acquisition systems employ techniques such as hardware timing and direct memory access to mitigate the impact of the non-real-time nature of general-purpose operating systems, the entire chain from the user application issuing an operation command to the hardware actually executing the command still requires multi-layered interaction between application software, application programming interfaces (APIs), drivers, and the operating system. The software-level latency and fluctuations generated in this process, i.e., software processing overhead, remain a key bottleneck restricting the overall time performance of the system, and this overhead is often difficult to quantify directly and accurately.
[0004] Current methods for assessing software processing overhead mostly rely on external precision instruments or require in-depth access to the internal details of specific hardware. This not only presents problems such as high costs and operational complexity but also may introduce additional interference to the system and is even unsuitable for "black box" scenarios like those driven by commercial applications, failing to meet the assessment needs of practical applications. Clearly defining and quantifying software processing overhead is of irreplaceable importance for the actual operation of data acquisition and control applications: when a system experiences time performance issues, analyzing the duration and fluctuations of software processing overhead can quickly determine whether the root cause lies in the software rather than the hardware itself, avoiding meaningless hardware debugging; when attempting to optimize software code, adjust system settings, or replace hardware devices, the changing data on software processing overhead can serve as objective evidence to accurately assess the actual effectiveness of optimization measures, preventing optimization efforts from falling into a "blind men and the elephant" dilemma; furthermore, understanding the actual performance of software processing overhead on specific hardware and software platforms can help developers design data acquisition and control strategies more rationally—for example, setting a sampling rate that matches the system's capabilities or reserving sufficient processing time margin in the software design to avoid system failure due to overhead fluctuations.
[0005] It can be said that when carrying out data acquisition and control work that requires precise timing in environments with weak timeliness, such as general-purpose operating systems, software processing overhead is not only the core performance bottleneck, but also a key factor that is difficult to observe directly. Its importance runs through the entire process of system problem diagnosis, optimization evaluation and strategy design, and directly determines the reliability and accuracy of data acquisition and control tasks. Summary of the Invention
[0006] This method utilizes the hardware resources of the data acquisition card itself to construct an internal excitation-observable response measurement closed loop, eliminating the need for an external precision excitation source.
[0007] A method for characterizing the time properties of internal excitation and observable response includes the following steps:
[0008] S1: Configure the programmable counter / timer module on the data acquisition card. The programmable counter / timer module continuously generates pulse sequences, i.e., hardware trigger signals, in a hardware timing manner. Define the edge of each pulse in the pulse sequence as an internal hardware excitation event and record the occurrence time of each internal hardware excitation event. Assign a sequence number to the internal hardware excitation events based on this. The edge includes rising edge or falling edge.
[0009] S2: Configure the output channel on the same data acquisition card. After receiving the hardware trigger signal, the output channel generates a preset response pulse sequence. The sequence number of each internal hardware excitation event is encoded into the amplitude of the corresponding response pulse according to the preset periodic linear amplitude increment rule to form the theoretical target amplitude. The user-level application records the relationship between each sequence number and the corresponding theoretical target amplitude to form a theoretical value lookup table. The edge of each pulse in the response pulse sequence is defined as an observable hardware response event.
[0010] S3: Configure the output channel task to a limited sampling output mode and a non-retrievable mode so that the output channel task automatically stops after each response pulse is generated and cannot trigger the generation of the next response pulse on its own; based on this, obtain the software processing overhead, that is, the time consumed by the entire software processing flow from the completion of the last response to the re-entering the waiting trigger state of the output channel.
[0011] S4: Synchronously capture the pulse signals corresponding to the internal hardware excitation events and observable hardware response events using a digital oscilloscope, perform time delay measurement and correlation verification on the pulse signals, obtain the effective time delay, and attribute the effective time delay to software processing overhead.
[0012] S5: When the software processing overhead is less than the period of the internal hardware stimulus event, it is determined that the system can maintain a one-to-one stimulus response relationship; when the software processing overhead is greater than the period of the internal hardware stimulus event, it is determined that the system will experience hardware triggering leakage.
[0013] Furthermore, the programmable counter / timer module outputs a CO channel to the counter on the data acquisition card, and the output channel is either an analog output AO channel or a digital output DO channel on the data acquisition card.
[0014] ;
[0015] in, This represents the theoretical target amplitude of index n. Indicates the initial amplitude. Indicates the preset number of periodic steps; Represents the modulo function. This indicates the preset increment step size of the amplitude.
[0016] When the theoretical target amplitude reaches the upper limit of the output channel's range, it is reset to the initial amplitude and the above incremental reset cycle is repeated.
[0017] Furthermore, in step S3, the user-level application performs the configuration and enabling operations of the output channel task in a loop through software, specifically including the following steps:
[0018] S31: Dynamic parameter calculation: Calculate the theoretical target amplitude corresponding to the next observable hardware response event according to the periodic linear amplitude increase rule in step S2.
[0019] S32: Task Resource Configuration: Reconfigure the output channel task through the data acquisition card programming interface, including setting the task's trigger source, trigger mode, and sampling quantity;
[0020] S33: Data Buffer Write: Writes the response waveform data containing the next theoretical target amplitude to the hardware buffer of the data acquisition card;
[0021] S34: Task Startup and Waiting Enable: Calls the task startup function of the data acquisition card programming interface to start the output channel task and put it into a ready state waiting for hardware triggering;
[0022] The total time taken to execute steps S31 to S34 is the software processing overhead.
[0023] Furthermore, the time delay measurement and correlation verification in step S4 are used to confirm the unique correlation between observable hardware response events and internal hardware stimulus events, specifically including the following steps:
[0024] S41: Measured data recording: For each observable hardware response event, record its occurrence timestamp and measured amplitude;
[0025] S42: Sequence number matching lookup: After data acquisition is completed, each observable hardware response event is traversed in the host computer application or data analysis script. Based on the measured amplitude, the sequence number of the internal hardware excitation event is matched in the theoretical value lookup table. It is required that the difference between the theoretical target amplitude and the measured amplitude corresponding to the sequence number is less than the preset amplitude error tolerance.
[0026] S43: Valid data filtering: If a unique sequence number satisfies the difference condition in step S42, it is determined that the observable hardware response event is triggered by the corresponding internal hardware stimulus event, a valid event pair is generated and the time delay is calculated; Time delay = timestamp of the observable hardware response event - time of the corresponding internal hardware stimulus event; If no sequence number that meets the condition is found or there are multiple matching sequence numbers, it is determined to be an invalid measurement point and discarded, and the remaining time delay is the valid time delay.
[0027] Furthermore, step S1 also includes specific steps for determining the maximum excitation frequency:
[0028] Adjust the frequency of internal hardware stimulus events and observe the response pattern of observable hardware response events; when each internal hardware stimulus event corresponds to an observable hardware response event and there is no missed triggering, record the current frequency as the effective stimulus frequency; continue to increase the frequency until hardware triggering is missed, and determine the maximum effective stimulus frequency before the missed triggering as the maximum stimulus frequency for the system to maintain a one-to-one stimulus-response relationship.
[0029] Furthermore, step S5 also includes a sub-step to evaluate the time overhead of the additional software processing module:
[0030] S51: Baseline value acquisition: Record the effective time delay and its statistical characteristics attributed to software processing overhead in step S5 as the first baseline value;
[0031] S52: New Overhead Measurement: During the software loop configuration and enabling process of the response task in step S3 of the user-level application, the hardware resource configuration of the data acquisition card, the theoretical target amplitude encoding rule and the preset amplitude error tolerance remain unchanged, and the software processing module to be evaluated is additionally integrated; Steps S1 to S5 are repeated, and the new effective time delay is obtained through the correlation verification in step S4. It is attributed to the new software processing overhead containing the additional module and recorded as the second measurement value.
[0032] S53: Additional overhead calculation: By calculating the difference between the second measurement value and the first reference value, the time overhead introduced by the additional integrated software processing module, i.e., the new software processing overhead, is obtained.
[0033] Furthermore, in step S52, the additional integrated software processing module to be evaluated is inserted at the following location:
[0034] Before the code path of step S31 or S32 in the user-level application.
[0035] Furthermore, the specific implementation method of synchronous capture in step S41 is as follows:
[0036] When using a digital oscilloscope for measurement, connect the two channels of the oscilloscope separately:
[0037] The first channel connects to the internal hardware excitation event pulse signal output by the programmable counter / timer module;
[0038] The second channel is connected to the output channel to output observable hardware response event pulse signals;
[0039] The digital oscilloscope is configured to synchronously acquire the edge timestamps and pulse amplitude data of the pulse signal based on a timestamp synchronization mechanism, in order to obtain the occurrence timestamps and measured amplitudes of observable hardware response events.
[0040] A time characteristic characterization system based on internal excitation and observable response, used in the aforementioned time characteristic characterization method based on internal excitation and observable response, includes:
[0041] The data acquisition card is equipped with a programmable counter / timer module and an output channel. The programmable counter / timer module is used to continuously generate pulse sequences as internal hardware excitation events in a hardware timing manner and record their occurrence time and assigned sequence number. The output channel is used to generate a response pulse sequence after receiving a hardware trigger signal and encode the sequence number of the internal hardware excitation event into the amplitude of the response pulse according to a preset rule.
[0042] The user-level application is used to record the relationship between the serial number and the theoretical target amplitude to form a theoretical value lookup table, and to generate software processing overhead by repeatedly executing the configuration and enabling operations of the output channel task.
[0043] A digital oscilloscope is used to synchronously capture pulse signals of internal hardware excitation events and observable hardware response events, perform time delay measurements and correlation verification, so as to characterize the system's time characteristics and determine the excitation-response relationship and trigger leakage phenomenon.
[0044] The beneficial effects achieved by this invention are as follows:
[0045] (1) Precisely quantifying software processing overhead, balancing practicality and cost-effectiveness; This invention effectively solves the core pain point of the difficulty in directly and accurately quantifying the software processing overhead of general data acquisition systems in non-real-time operating system environments. It generates internal hardware stimulus events through the programmable counter / timer module of the data acquisition card itself, and generates observable hardware response events with ordered codes (based on periodic linear amplitude increment rules) through the output channel of the same card, without relying on complex external precision instruments or in-depth access to the internal details of the hardware (avoiding the "black box" commercial driver adaptation problem); combined with the synchronous acquisition and correlation verification of the digital oscilloscope, the effective time delay can be accurately attributed to the software processing overhead, which not only ensures the accuracy of the quantification results, but also reduces the characterization cost and operational complexity, and can meet the time characteristic evaluation needs of various general data acquisition systems.
[0046] (2) Clarify the system stimulus response status to provide key basis for system design optimization; This method can intuitively determine the stimulus response relationship and hardware triggering leakage risk of the data acquisition system, providing quantitative support for stable system operation and design optimization. By comparing the software processing overhead and the cycle of internal hardware stimulus events, it can not only confirm that the system can maintain a "one-to-one" accurate stimulus response relationship when the software processing overhead is small (ensuring the timing accuracy of data acquisition / control), but also provide timely warning of hardware triggering leakage when the software processing overhead is large (avoiding system failure caused by timing disorder); at the same time, the quantitative results of software processing overhead can be directly used to evaluate the actual effect of code optimization and system setting adjustment, helping developers to reasonably set the sampling rate and reserve software processing time margin, fundamentally improving the reliability and accuracy of data acquisition and control tasks. Attached Figure Description
[0047] Figure 1 This is a flowchart of the steps of the present invention. Detailed Implementation
[0048] The following embodiments are only used to illustrate the technical solutions of the present invention more clearly, and should not be used to limit the scope of protection of the present invention.
[0049] Reference Figure 1 A method for characterizing the time characteristics of internal excitation and observable response includes the following steps:
[0050] S1: Configure the programmable counter / timer module on the data acquisition card. The programmable counter / timer module continuously generates pulse sequences, i.e., hardware trigger signals, in a hardware timing manner. Define the edge of each pulse in the pulse sequence as an internal hardware excitation event and record the occurrence time of each internal hardware excitation event. Assign a sequence number to the internal hardware excitation events based on this. The edge includes rising edge or falling edge.
[0051] S2: Configure the output channel on the same data acquisition card. After receiving the hardware trigger signal, the output channel generates a preset response pulse sequence. The sequence number of each internal hardware excitation event is encoded into the amplitude of the corresponding response pulse according to the preset periodic linear amplitude increment rule to form the theoretical target amplitude. The user-level application records the relationship between each sequence number and the corresponding theoretical target amplitude to form a theoretical value lookup table. The edge of each pulse in the response pulse sequence is defined as an observable hardware response event.
[0052] S3: Configure the output channel task to a limited sampling output mode and a non-retrievable mode so that the output channel task automatically stops after each response pulse is generated and cannot trigger the generation of the next response pulse on its own; based on this, obtain the software processing overhead, that is, the time consumed by the entire software processing flow from the completion of the last response to the re-entering the waiting trigger state of the output channel.
[0053] S4: Synchronously capture the pulse signals corresponding to the internal hardware excitation events and observable hardware response events using a digital oscilloscope, perform time delay measurement and correlation verification on the pulse signals, obtain the effective time delay, and attribute the effective time delay to software processing overhead.
[0054] S5: When the software processing overhead is less than the period of the internal hardware stimulus event, it is determined that the system can maintain a one-to-one stimulus response relationship; when the software processing overhead is greater than the period of the internal hardware stimulus event, it is determined that the system will experience hardware triggering leakage.
[0055] Furthermore, the programmable counter / timer module outputs a CO channel to the counter on the data acquisition card, and the output channel is either an analog output AO channel or a digital output DO channel on the data acquisition card.
[0056] ;
[0057] in, This represents the theoretical target amplitude of index n. Indicates the initial amplitude. Indicates the preset number of periodic steps; Represents the modulo function. This indicates the preset increment step size of the amplitude.
[0058] When the theoretical target amplitude reaches the upper limit of the output channel's range, it is reset to the initial amplitude and the above incremental reset cycle is repeated.
[0059] Furthermore, in step S3, the user-level application performs the configuration and enabling operations of the output channel task in a loop through software, specifically including the following steps:
[0060] S31: Dynamic parameter calculation: Calculate the theoretical target amplitude corresponding to the next observable hardware response event according to the periodic linear amplitude increase rule in step S2.
[0061] S32: Task Resource Configuration: Reconfigure the output channel task through the data acquisition card programming interface, including setting the task's trigger source, trigger mode, and sampling quantity;
[0062] S33: Data Buffer Write: Writes the response waveform data containing the next theoretical target amplitude to the hardware buffer of the data acquisition card;
[0063] S34: Task Startup and Waiting Enable: Calls the task startup function of the data acquisition card programming interface to start the output channel task and put it into a ready state waiting for hardware triggering;
[0064] The total time taken to execute steps S31 to S34 is the software processing overhead.
[0065] Furthermore, the time delay measurement and correlation verification in step S4 are used to confirm the unique correlation between observable hardware response events and internal hardware stimulus events, specifically including the following steps:
[0066] S41: Measured data recording: For each observable hardware response event, record its occurrence timestamp and measured amplitude;
[0067] S42: Sequence number matching lookup: After data acquisition is completed, each observable hardware response event is traversed in the host computer application or data analysis script. Based on the measured amplitude, the sequence number of the internal hardware excitation event is matched in the theoretical value lookup table. It is required that the difference between the theoretical target amplitude and the measured amplitude corresponding to the sequence number is less than the preset amplitude error tolerance.
[0068] S43: Valid data filtering: If a unique sequence number satisfies the difference condition in step S42, it is determined that the observable hardware response event is triggered by the corresponding internal hardware stimulus event, a valid event pair is generated and the time delay is calculated; Time delay = timestamp of the observable hardware response event - time of the corresponding internal hardware stimulus event; If no sequence number that meets the condition is found or there are multiple matching sequence numbers, it is determined to be an invalid measurement point and discarded, and the remaining time delay is the valid time delay.
[0069] Furthermore, step S1 also includes specific steps for determining the maximum excitation frequency:
[0070] Adjust the frequency of internal hardware stimulus events and observe the response pattern of observable hardware response events; when each internal hardware stimulus event corresponds to an observable hardware response event and there is no missed triggering, record the current frequency as the effective stimulus frequency; continue to increase the frequency until hardware triggering is missed, and determine the maximum effective stimulus frequency before the missed triggering as the maximum stimulus frequency for the system to maintain a one-to-one stimulus-response relationship.
[0071] Furthermore, step S5 also includes a sub-step to evaluate the time overhead of the additional software processing module:
[0072] S51: Baseline value acquisition: Record the effective time delay and its statistical characteristics attributed to software processing overhead in step S5 as the first baseline value;
[0073] S52: New Overhead Measurement: During the software loop configuration and enabling process of the response task in step S3 of the user-level application, the hardware resource configuration of the data acquisition card, the theoretical target amplitude encoding rule and the preset amplitude error tolerance remain unchanged, and the software processing module to be evaluated is additionally integrated; Steps S1 to S5 are repeated, and the new effective time delay is obtained through the correlation verification in step S4. It is attributed to the new software processing overhead containing the additional module and recorded as the second measurement value.
[0074] S53: Additional overhead calculation: By calculating the difference between the second measurement value and the first reference value, the time overhead introduced by the additional integrated software processing module, i.e., the new software processing overhead, is obtained.
[0075] Furthermore, in step S52, the additional integrated software processing module to be evaluated is inserted at the following location:
[0076] Before the code path of step S31 or S32 in the user-level application.
[0077] Furthermore, the specific implementation method of synchronous capture in step S41 is as follows:
[0078] When using a digital oscilloscope for measurement, connect the two channels of the oscilloscope separately:
[0079] The first channel connects to the internal hardware excitation event pulse signal output by the programmable counter / timer module;
[0080] The second channel is connected to the output channel to output observable hardware response event pulse signals;
[0081] The digital oscilloscope is configured to synchronously acquire the edge timestamps and pulse amplitude data of the pulse signal based on a timestamp synchronization mechanism, in order to obtain the occurrence timestamps and measured amplitudes of observable hardware response events.
[0082] A time characteristic characterization system based on internal excitation and observable response, used in the aforementioned time characteristic characterization method based on internal excitation and observable response, includes:
[0083] The data acquisition card is equipped with a programmable counter / timer module and an output channel. The programmable counter / timer module is used to continuously generate pulse sequences as internal hardware excitation events in a hardware timing manner and record their occurrence time and assigned sequence number. The output channel is used to generate a response pulse sequence after receiving a hardware trigger signal and encode the sequence number of the internal hardware excitation event into the amplitude of the response pulse according to a preset rule.
[0084] The user-level application is used to record the relationship between the serial number and the theoretical target amplitude to form a theoretical value lookup table, and to generate software processing overhead by repeatedly executing the configuration and enabling operations of the output channel task.
[0085] A digital oscilloscope is used to synchronously capture pulse signals of internal hardware excitation events and observable hardware response events, perform time delay measurements and correlation verification, so as to characterize the system's time characteristics and determine the excitation-response relationship and trigger leakage phenomenon.
Claims
1. A method of characterizing the time behavior of internal excitation and observable response, comprising: The method comprises the following steps: S1: configuring a programmable counter / timer module on a data acquisition card, the programmable counter / timer module continuously generates a pulse sequence in a hardware timing mode, i.e. a hardware trigger signal; the edge of each pulse in the pulse sequence is defined as an internal hardware excitation event, and the time when each internal hardware excitation event occurs is recorded; the internal hardware excitation event is assigned a serial number based on this; the edge includes a rising edge or a falling edge; S2: configuring an output channel on the same data acquisition card, the output channel generates a preset response pulse sequence after receiving the hardware trigger signal; The serial number of each internal hardware excitation event is encoded into the amplitude of the corresponding response pulse according to a preset periodic linear amplitude increment rule, forming a theoretical target amplitude; A user-level application program records the relationship between each serial number and the corresponding theoretical target amplitude, forming a theoretical value lookup table; The edge of each pulse in the response pulse sequence is defined as an observable hardware response event; S3: configuring the output channel task as a limited sampling output mode and a non-retriggerable mode, so that the output channel task automatically stops after each response pulse generation is completed and cannot trigger the next response pulse generation; based on this, the software processing overhead, i.e. the time consumed by the entire software processing flow of the output channel from the completion of the last response to re-entering the waiting trigger state, is obtained; S4: synchronously capturing the pulse signals corresponding to the internal hardware excitation events and the observable hardware response events by a digital oscilloscope, performing time delay measurement and correlation verification on the pulse signals, obtaining an effective time delay, and attributing the effective time delay to the software processing overhead; S5: when the software processing overhead is less than the period of the internal hardware excitation event, it is determined that the system can maintain a one-to-one excitation response relationship; when the software processing overhead is greater than the period of the internal hardware excitation event, it is determined that the system will have a hardware trigger loss phenomenon.
2. The method according to claim 1, wherein: The programmable counter / timer module is a counter output CO channel on the data acquisition card, and the output channel is an analog output AO channel or a digital output DO channel on the data acquisition card; ; wherein, denotes a theoretical target amplitude of the sequence number n, denotes an initial amplitude, denotes a preset periodic step number; denotes a modulo function, denotes a preset preset amplitude increment step. When the theoretical target amplitude reaches the upper limit of the range of the output channel, it is reset to the initial amplitude and the increment reset cycle is repeated.
3. The method of claim 1, wherein the internal excitation and observable response based time characteristic representation is characterized by, In step S3, the user-level application program performs the configuration and enabling operation of the output channel task through a software loop, specifically comprising the following steps: S31: dynamic parameter calculation: calculating the theoretical target amplitude corresponding to the next observable hardware response event according to the periodic linear amplitude increment rule in step S2; S32: task resource configuration: reconfiguring the output channel task through the programming interface of the data acquisition card, including setting the trigger source, trigger mode and sampling number of the task; S33: data buffer writing: writing the response waveform data containing the next theoretical target amplitude into the hardware buffer of the data acquisition card; S34: task starting and waiting for enabling: calling the task starting function of the programming interface of the data acquisition card to start the output channel task and make it enter the ready state of waiting for hardware triggering; The total time consumption of steps S31 to S34 is the software processing overhead.
4. The method of claim 1, wherein, The time delay measurement and correlation verification in step S4 are used to confirm the unique correlation between the observable hardware response event and the internal hardware excitation event, and specifically include the following steps: S41: Real-time data recording: for each observable hardware response event, record its occurrence timestamp and measured amplitude; S42: Sequence number matching search: after data acquisition is completed, search for the sequence number of the internal hardware excitation event in the theoretical value lookup table based on the measured amplitude of each observable hardware response event, and require that the difference between the theoretical target amplitude corresponding to the sequence number and the measured amplitude be less than the preset amplitude error tolerance; S43: Effective data screening: if there is a unique sequence number that meets the difference condition of step S42, it is determined that the observable hardware response event is triggered by the corresponding internal hardware excitation event, an effective event pair is generated, and the time delay is calculated; the time delay = the occurrence timestamp of the observable hardware response event - the occurrence time of the corresponding internal hardware excitation event; if no sequence number meeting the condition is found or there are multiple matching sequence numbers, it is determined that it is an invalid measurement point and is discarded, and the remaining time delay is the effective time delay.
5. The method of claim 1, wherein, Step S1 also includes the specific steps of determining the maximum excitation frequency: Adjust the frequency of the internal hardware excitation event and observe the response mode of the observable hardware response event; when each internal hardware excitation event corresponds to an observable hardware response event and there is no missed triggering, record the current frequency as the effective excitation frequency; continue to increase the frequency until hardware triggering is missed, and determine the maximum effective excitation frequency before the missed triggering as the maximum excitation frequency for the system to maintain a one-to-one excitation response relationship.
6. The method of claim 3, wherein, Step S5 also includes the sub-steps of evaluating the additional software processing module time overhead: S51: Reference value acquisition: record the effective time delay and its statistical characteristics attributed to the software processing overhead in step S5 as the first reference value; S52: New overhead measurement: during the execution of the response task software loop configuration and enablement process of step S3 in the user-level application program, keep the data acquisition card hardware resource configuration, theoretical target amplitude coding rule, and preset amplitude error tolerance unchanged, and additionally integrate the software processing module to be evaluated; repeat steps S1 to S5, obtain a new effective time delay through the correlation verification of step S4, attribute it to the new software processing overhead including the additional module, and record it as the second measurement value; S53: Additional overhead calculation: obtain the time overhead introduced by the additional integrated software processing module, i.e., the new software processing overhead, by calculating the difference between the second measurement value and the first reference value.
7. The method of claim 6, wherein, In step S52, the insertion position of the additional integrated software processing module to be evaluated is: Before the code path of step S31 or S32 in the user-level application program.
8. The method of claim 1, wherein, The specific implementation method of synchronous capture in step S41 is: When using a digital oscilloscope to measure, connect two channels of the oscilloscope as follows: The first channel is connected to the internal hardware excitation event pulse signal output by the programmable counter / timer module; The second channel is connected to the observable hardware response event pulse signal output by the output channel; The digital oscilloscope is configured to synchronize the edge timestamp and pulse amplitude data of the collected pulse signal based on a timestamp synchronization mechanism, so as to obtain the occurrence timestamp and measured amplitude of an observable hardware response event.
9. A system for characterizing the time behavior of internal excitation and observable response based on the method of any one of claims 1 to 8, characterized in that The digital oscilloscope comprises: a data acquisition card, which is provided with a programmable counter / timer module and an output channel, the programmable counter / timer module being used to continuously generate a pulse sequence as an internal hardware excitation event in a hardware timing manner and record the occurrence time and sequence number of the internal hardware excitation event; the output channel being used to generate a response pulse sequence after receiving a hardware trigger signal, and encode the sequence number of the internal hardware excitation event into the amplitude of the response pulse according to a preset rule; a user-level application program, which is used to record the relationship between the sequence number and a theoretical target amplitude to form a theoretical value lookup table, and perform configuration and enabling operation of the output channel task through software loop execution to generate software processing overhead; and the digital oscilloscope is used to synchronously capture the pulse signals of the internal hardware excitation event and the observable hardware response event, perform time delay measurement and correlation verification, so as to realize system time characteristic characterization and determination of excitation response relationship and trigger loss phenomenon.
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