A current-type SVG control method based on improved direct-current bus voltage synchronization

Abstract

The application discloses a current-type SVG control method based on improved DC bus voltage synchronization, which comprises the following steps: based on synchronous outer loop equivalent analysis, the current control type SVG is equivalent to a power synchronization loop based on a phase-locked loop synchronization loop; according to the relationship between the DC bus voltage of the SVG and the output active power, the power synchronization loop is equivalent to a DC bus voltage synchronization loop; on the basis of the DC bus voltage synchronization loop, an improved DC bus voltage synchronization outer loop that integrates a phase-locked loop is designed; a detection method based on the instantaneous reactive power theory is adopted to realize reactive current detection and complete the design of a reactive power compensation loop; a quasi-proportional resonant controller QPR and a proportional integral controller PI are adopted to design a current control inner loop; and the above loop designs are combined to jointly construct a control system of the current-type SVG, so that stable control of the current-type SVG is realized. The application can improve the stability under a weak power grid and help the stable grid connection and consumption of new energy.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electrical control, and particularly relates to a current-type SVG control method based on improved direct-current bus voltage synchronization. BACKGROUND

[0002] New energy power generation has intermittency and volatility, which easily leads to power grid fluctuation. As an effective means to improve voltage stability of power systems, improve grid-connected power quality and reduce power grid loss, SVG is increasingly equipped in photovoltaic, wind power and other new energy power stations and various impact load occasions. At the same time, affected by the environment of new energy power stations, different scales and types of power grids exist in the construction of new power systems, which inevitably increases the weak grid attribute. However, when SVG works in a weak grid condition, there is a serious instability risk. Therefore, it has important scientific research value and economic benefits to study the control loop design of SVG under a weak grid to realize its stable operation.

[0003] Existing SVGs basically adopt grid-following control, that is, the phase information of a grid-connected point is measured by a phase-locked loop (PLL) to realize a control strategy of following the grid. The grid-following converter must rely on a strong grid to work normally and is prone to instability under a weak grid condition. The stability challenge mainly reflects in two dimensions: from the perspective of transient stability, the grid-following type generally lacks active support function and cannot provide frequency or voltage support for the grid like a traditional synchronous generator, so it is difficult to adapt to the fluctuation of the grid; from the perspective of steady-state stability, the grid-following SVG current inner loop and the phase-locked loop are prone to interaction under a weak grid, leading to system oscillation instability. Although relevant researchers of the Economic and Technical Research Institute of State Grid Zhejiang Electric Power Company have proposed an SVG control method based on the grid construction idea, the active control loop is designed by analogy with the charging and discharging characteristics of the direct-current bus capacitor and the acceleration and deceleration characteristics of the rotor of a synchronous motor, and the control inner loop is designed according to the virtual impedance control loop, but the proposed method has a complex loop and many parameters, which increases the complexity of SVG parameter adjustment and is not conducive to practical application.

[0004] Therefore, under a weak grid condition, the traditional grid-following SVG has the following two deficiencies in steady state and transient state: 1) in steady state, the grid-following SVG current loop and the phase-locked loop may be coupled with each other under a weak grid, affecting the stable operation of the system; 2) in transient state, the grid-following SVG cannot provide active support for the voltage and frequency of the grid. SUMMARY

[0005] In order to solve the above technical problems, the application is based on the synchronous loop design idea of network construction type control, combined with the DC voltage control and reactive power compensation demand of SVG, and proposes a design method of current control type SVG control system based on improved DC bus voltage synchronization, which improves the stability of the system under weak power grid and helps the stable grid connection of new energy.

[0006] To achieve the above object, the application provides the following technical scheme:

[0007] A current type SVG control method based on improved DC bus voltage synchronization, comprising the following steps:

[0008] Step S1, based on synchronous outer loop equivalent analysis, the current control type SVG is equivalent to a power synchronization loop based on the synchronization loop of the phase-locked loop;

[0009] Step S2, according to the relationship between the DC bus voltage of SVG and the output active power, the power synchronization loop is equivalent to a DC bus voltage synchronization loop;

[0010] Step S3, based on the DC bus voltage synchronization loop, an improved DC bus voltage synchronization outer loop that integrates the phase-locked loop is designed;

[0011] Step S4, using the detection method based on instantaneous reactive power theory, the reactive current detection is realized, and the reactive power compensation loop design is completed;

[0012] Step S5, using a quasi-proportional resonant controller QPR in parallel with a proportional integral controller PI to design the current control inner loop;

[0013] Step S6, combining the loop design of steps S3 to S5, the control system of current type SVG is jointly constructed to realize the stable control of current type SVG.

[0014] Further, in the step S3, a proportional derivative regulator PD is used to design the DC bus voltage synchronization control, and the fixed setting ω ref is replaced by the ω PLL obtained by phase-locked loop, and the design of improved DC bus voltage synchronization outer loop is completed.

[0015] Further, the transfer function corresponding to the DC bus voltage synchronization control is as follows,

[0016]

[0017] Where, ω represents the voltage angular frequency (or the synchronous angular frequency of the grid connection point) of SVG output; U dcrepresents the bus voltage of the SVG DC side; a0 and a1 represent parameters of the controller respectively, a0 is a proportional term coefficient, and a1 is a differential term coefficient.

[0018] Further, in the step S4, the instantaneous active current component and the instantaneous reactive current component in the dq-axis coordinate system are obtained through the positive sequence coordinate transformation, the instantaneous active current component is excluded, and only the instantaneous reactive current component is i Lq Low-frequency filtering is performed to filter out high-frequency components, and inverse transformation is performed to obtain the three-phase fundamental reactive current on the load side i Ra,b,c .

[0019] Further, in the step S5, the current control inner loop takes the three-phase reference current i refa,b,c as input, processes it through the parallelly connected quasi-proportional resonant controller QPR and proportional integral controller PI, adds and fuses the results, outputs the fusion result, and performs feedforward control on the capacitor voltage G F ( s ) through the second-order generalized integral filter v ca,b,c Finally, the processing result of the feedforward control is added and fused with the fusion result to output the three-phase control voltage command v ra,b,c .

[0020] Further, the transfer functions of the quasi-proportional resonant controller QPR and the proportional integral controller PI are as follows,

[0021]

[0022] wherein, k pPR represents the proportional gain of the quasi-proportional resonant controller QPR, k rPR represents the resonant gain of the quasi-proportional resonant controller QPR, and ω cPR represents the resonant bandwidth of the quasi-proportional resonant controller QPR, k pPI represents the proportional gain of the proportional integral controller PI, k iPI represents the integral gain of the proportional integral controller PI.

[0023] The transfer function of the second-order generalized integral filter GF is as follows,

[0024]

[0025] wherein, kF ω represents the damping coefficient; ref Indicates the reference angular frequency.

[0026] Compared with the prior art, the beneficial effects of the present invention are:

[0027] This invention proposes a current-controlled SVG control method based on improved DC bus voltage synchronization, taking into account the DC bus voltage control and reactive power compensation requirements of the SVG. This method employs improved DC bus voltage synchronization control, enabling the SVG to actively support the voltage and frequency of the power grid, thus ensuring its stability. Simultaneously, it retains the control structure of the SVG's current control inner loop, simplifying the control loop and parameter tuning. Therefore, its stability under weak power grid conditions is better than that of traditional grid-connected SVGs, and its control loop and parameter design are simpler and easier to implement compared to grid-connected SVGs. Attached Figure Description

[0028] Figure 1 This is a simplified diagram of the current-controlled SVG control loop of the present invention;

[0029] Figure 2 This is an equivalent schematic diagram of the synchronization outer loop from power to current for the current-controlled SVG of the present invention;

[0030] Figure 3 This is a schematic diagram of the equivalent synchronization outer loop from active power to DC bus voltage for the current-controlled SVG of the present invention.

[0031] Figure 4(a) is a schematic diagram of the small-signal equivalent model based on active power synchronous control of the present invention;

[0032] Figure 4(b) shows the small-signal equivalent model of the present invention based on DC bus voltage synchronous control;

[0033] Figure 5 This is a block diagram of the improved DC bus voltage synchronization control of the present invention;

[0034] Figure 6 This is a structural diagram of the reactive current detection loop of the present invention;

[0035] Figure 7 This is a structural diagram of the current control inner loop of the present invention.

[0036] Figure 8 This invention provides a framework for a current-controlled three-level SVG system based on improved DC bus voltage synchronization. Detailed Implementation

[0037] In order to make the technical means, creative features, purposes and effects of the present application easy to understand, the following embodiments are combined with the drawings to specifically describe the improved DC bus voltage synchronization based current control type SVG control method of the present application. It should be noted that the description of these embodiments is used to help understand the present application, but does not constitute a limitation of the present application.

[0038] In order to study a simpler and more effective control method suitable for SVG, the present application is based on the design idea of the synchronous loop of the grid-connected control, combined with the DC voltage control and reactive power compensation requirements of SVG, and proposes an improved DC bus voltage synchronization based current control type SVG control method, as shown in Figure 1 The control method of the present application adopts improved DC bus voltage synchronization control, which can realize the active support of SVG to the voltage and frequency of the power grid, and guarantees the stability of SVG; at the same time, the control structure of the SVG current control inner loop is retained, and the control loop and parameter setting are simplified.

[0039] Specifically as follows:

[0040] Step one: based on the equivalent analysis of the synchronous outer loop, the current control type SVG based on the phase-locked loop (PLL) synchronous loop is equivalent to the power synchronous loop. First, the equivalent block diagram of SVG under grid-connected control is given, as shown in Figure 1 From which it can be seen that the SVG under grid-connected control measures the grid point phase information using a phase-locked loop (PLL), thereby realizing synchronization with the power grid, and controls the machine side inductance current through the current inner loop, thereby realizing compensation of the reactive current, so it can be called a current control type SVG based on phase-locked loop synchronization.

[0041] Since the three-phase AC filter capacitor has little dynamic influence on the fundamental frequency and low frequency, it is approximately considered that i 1a,b,c ≈ i 2a,b,c At this time, the active power p output by the converter can be calculated according to the output voltage v cd , v cq and the current i 1d , i 1q , as shown in equation (1). Wherein, i 1d,q is the output three-phase current, i 1a,b,c is the actual value in the dq coordinate system.

[0042]

[0043] where p represents the active power output by the converter, v cd and v cq represent two components of the SVG AC side output voltage in the synchronous rotating dq coordinate system, v cd is the d-axis (direct axis) component, v cq is the q-axis (quadrature axis) component; i 1d , i 1q represent two components of the SVG AC side output current in the synchronous rotating dq coordinate system, i 1d is the d-axis current component, i 1q is the q-axis current component.

[0044] As shown in Figure 1 , the current-controlled SVG achieves control of the output current by controlling the current i 1d,q on the machine side filter inductance. Without considering the active power loss when the SVG is running, at steady state, the d-axis output current i 1d of the SVG can be considered to be 0, while the q-axis output current i 1q tracks its reference component i 1qref , at this time the output active power of the current-controlled SVG can be transformed from equation (1) to equation (2) as shown:

[0045]

[0046] where i 1qref represents the q-axis output current i 1q tracks its reference component.

[0047] When the current-controlled SVG is running at steady state, the reference value of the q-axis output current of the SVG i 1qref can be considered as a constant, at this time it can be obtained that p is proportional to v cq , so the synchronization control of the phase-locked loop from the voltage to the phase angle can be equivalent to the synchronization control from the active power to the phase angle, see Figure 2 . As shown in Figure 2 , at this time the current-controlled SVG can obtain the phase angle θ by controlling the output active power p to be 0, which is the same as the traditional phase-locked loop by controlling v cqIt is equivalent to get the phase angle θ. At the same time, it can be found that whether the synchronization control is based on the phase-locked loop or the DC bus voltage, both do not involve the change of the inner control loop, which shows that the current control type SVG can track the power grid by using the active power synchronization control and realize the reactive power compensation by controlling the output current.

[0048] Step two: According to the relationship between the SVG DC bus voltage and the output active power, the power synchronization loop is equivalent to the DC bus voltage synchronization loop.

[0049] For SVG, when the active power loss is not considered, the output active power p should be 0 in the steady-state operation. At the same time, considering that the SVG DC bus side does not have a DC source and only supports the DC bus voltage through the bus capacitor, the voltage on the bus capacitor needs to be established first in the control, and then the reactive power compensation is realized. Therefore, it is not possible to simply and directly control the output active power to be 0 to realize the synchronization control of the active loop, and it is also necessary to further establish the relationship between the DC bus voltage and the active power. Based on the circuit relationship, the SVG DC side and the AC side equation is:

[0050]

[0051] In the formula, C represents the total bus capacitance value of the SVG, U dcref and U dc are the reference value and the actual value of the total bus voltage, respectively, p in As the active power input from the DC bus capacitor side, it is equal to 0 for SVG. Therefore, by transforming equation (3) to the s domain, we can get:

[0052]

[0053] As shown in equation (4), where C and U dcref are both constants, therefore, when the active power loss in the circuit is ignored, it can be known that the active power p output by the SVG should be inversely proportional to the voltage U dc on the DC bus capacitor. From the perspective of power change, when the SVG DC bus voltage decreases, the energy stored in the bus capacitor flows from the DC side to the AC side, at which time the SVG outputs the active power. Therefore, the active power output by the SVG can be indirectly controlled by controlling the voltage on the SVG DC bus voltage, that is, the synchronization control from the active power to the phase angle can be further equivalent to the synchronization control from the DC bus voltage to the phase angle, as shown in Figure 3 . As shown in Figure 3 , where G dcvThe transfer function for the DC bus voltage synchronization control is derived in detail as follows. From the equivalent of the outer loop of the active power to the DC bus voltage, it is known that the outer loop of the current control SVG can be realized by the synchronization based on the DC bus voltage.

[0054] Step three: design of the DC bus voltage synchronization loop. For the convenience of analysis and design, the SVG small signal equivalent models based on the active power synchronization control and the DC bus voltage synchronization are given in Fig. 4, respectively.

[0055] where T dc is the transfer function between the SVG output active power and the DC bus voltage, which can be derived from equation (4):

[0056]

[0057] where, represents the small signal component of the DC voltage U dc fluctuating around its steady state value, represents the small signal component of the active power p fluctuating around its steady state value; C1 and C2 are the upper and lower DC bus capacitance values, respectively; U dc0 is the steady state operating point of the DC voltage.

[0058] As can be seen from Fig. 4(a), there is an integrator in the small signal model of the converter based on the active power synchronization control, which is used to generate the phase angle from the frequency. This integrator has a 90° phase lag for the closed loop control of the active power, so the transfer function of the active power synchronization control is G dcp The droop coefficient D p or a PI controller is usually used. As can be seen from Fig. 4(b), there are two integrators in the small signal model of the SVG based on the DC bus voltage synchronization control. The first integrator is used to generate the phase angle from the frequency, and the second integrator is included in the transfer function of the DC bus voltage to the active power T dc , which reflects the dynamic process of the DC link. The two integrators work together to produce a 180° phase lag, which deteriorates the phase margin of the closed loop control, and further introduces more phase lag for the DC bus voltage synchronization control compared with the active power synchronization control.

[0059] Therefore, unlike active power synchronization controllers, if DC bus voltage synchronization control uses a PI regulator, the phase margin of the entire loop may become negative, leading to system instability. To avoid this problem, DC bus voltage synchronization control should ideally include a phase lead element. Therefore, the DC bus voltage synchronization control designed in this invention uses a proportional-differential (PD) controller, as shown in the following formula:

[0060]

[0061] Where ω represents the angular frequency of the voltage output by the SVG; U dc This represents the bus voltage on the DC side of the SVG; a0 and a1 represent the controller parameters, where a0 is the proportional coefficient and a1 is the differential coefficient.

[0062] Step 4: Based on the existing DC bus voltage synchronization loop, an improved DC bus voltage synchronization outer loop integrating a phase-locked loop (PLL) was designed. Converters with photovoltaic or energy storage reserves on the DC side can achieve pre-synchronization with the grid voltage before grid connection by controlling the fluctuations in output active power or DC bus voltage. This involves first establishing the grid connection point voltage and synchronizing its phase angle with the grid voltage before connecting to the grid. This approach avoids excessive instantaneous grid connection current when the converter connects to the grid, protecting the converter. However, the DC bus voltage of an SVG depends on the grid, making it impossible to establish the grid connection point voltage before connecting to the grid. Therefore, this invention selects an improved DC bus voltage synchronization control integrating a PLL to ensure the rapid and safe grid connection of current-controlled SVGs. By modifying the DC bus voltage synchronization control, a design integrating a PLL and DC bus voltage synchronization outer loop is obtained. The specific control block diagram can be seen in [the diagram]. Figure 5 .

[0063] like Figure 5 As shown, the improved DC bus voltage synchronization control will change the original fixed value of 2πf. ω ref The value is obtained using phase-locked loop. ω PLL This allows the SVG to acquire the correct initial phase angle before initiating closed-loop grid-connected operation. Therefore, when the SVG begins to build up its output current, the initial phase angle provided by the PLL ensures that the voltage is close to the grid voltage, providing a pre-synchronization process before grid connection.

[0064] Step 5: Design of the reactive power compensation loop. Considering both computing resources and detection performance, the reactive current detection loop of this invention adopts a detection method based on instantaneous reactive power theory. Its specific control block diagram is shown below. Figure 6As shown in Fig. 1, the three-phase load current is detected by the current sensor, and the detected current is input to the current controller. Figure 6 As shown in Fig. 2, the three-phase load current is detected by the current sensor, and the detected current is input to the current controller. i Lq is the instantaneous reactive current component; i Ra,b,c is the three-phase fundamental reactive current on the load side. This reactive current detection method mainly obtains the instantaneous active and reactive current components in the dq axis coordinate system through positive sequence coordinate transformation, excludes the instantaneous active current component, and only the instantaneous reactive current component i Lq is subjected to inverse transformation to obtain the three-phase fundamental reactive current on the load side i Ra,b,c Since the detected load current may contain high-frequency components in addition to the fundamental wave, it is necessary to perform low-frequency filtering on the instantaneous reactive current component obtained through positive sequence coordinate transformation to filter out the high-frequency components.

[0065] Step six: design of current control inner loop. The current control type three-level SVG of the present application directly tracks the current command in the abc coordinate system, and only the PI control has poor tracking effect, therefore the present application adopts a quasi-proportional resonance (QPR) controller in parallel with a proportional integral (PI) controller as the current inner loop controller. The QPR controller is adopted in consideration of its more effective control effect on the output current when the grid voltage frequency fluctuates compared with the traditional ideal proportional resonance (PR) controller. The specific control block diagram of the current inner loop can be seen from Figure 7 As shown in Fig. 3, the three-phase reference current input to the current loop is Figure 7 As shown in Fig. 3, the three-phase reference current input to the current loop is i refa,b,c is the three-phase reference current input to the current loop; vra,b,c is the three-phase control voltage command output by the current loop; G QPR s G PI s The continuous domain expressions of the QPR and PI controllers are shown in formula (7); the current inner loop is also based on the feedforward control of the capacitor voltage v ra,b,c G F s is a second-order generalized integral filter used to filter out the noise interference in the feedforward capacitor voltage, and the expression is shown in formula (8).

[0066]

[0067] In the formula, k pPR ​​​​​is the proportional gain of the QPR controller, and the present application takes 0; k rPR is the resonant gain of the QPR controller, and ω cPR is the resonant bandwidth of the QPR controller, and the present application takes 314 rad / s, k pPI is the proportional gain of the PI controller, k iPI is the integral gain of the PI controller.

[0068]

[0069] wherein, k F is the damping coefficient. The damping coefficient k F is larger, the bandwidth is wider, the adaptability to the grid frequency fluctuation is stronger, and the response speed is faster, but the filtering effect on the harmonic components near the 50Hz center frequency is also worse. Considering the filtering effect and the adaptability to the grid frequency fluctuation, k F is taken as 1.

[0070] Step seven: combined with the loop design given in steps four, five and six, the overall control block diagram of the current control type SVG based on the improved DC bus voltage synchronization can be obtained, as shown in Figure 8 As shown in Figure 8 , at this time, in terms of synchronization characteristics, the three-level SVG based on the improved DC bus voltage synchronization no longer follows the grid through phase locking of the voltage at the grid connection point, but controls the power exchange with the grid through control of the DC bus voltage to achieve synchronization, so that in steady-state stability, it can achieve synchronization with the grid without a phase-locked loop, which can effectively eliminate the adverse effects of the phase-locked loop on system stability, and in transient-state stability, it can exchange active power with the grid side by adjusting the DC bus voltage, provide inertia and damping support for the power system during grid voltage fluctuation, participate in the regulation of grid voltage and frequency, and further suppress system oscillation. In terms of external characteristics, the three-level SVG under this control strategy still achieves feedback control of the grid-side filter inductor current through the current inner loop, so it still exhibits current source characteristics, and the inner loop design can follow the control idea of the traditional grid-following type, without the need to redesign the control inner loop, and the parameter setting and calculation are more convenient.

[0071] Although the specific embodiments of the present application are described above, those skilled in the art should understand that these are only illustrative, and various changes or modifications can be made to these embodiments without departing from the principles and essence of the present application, therefore, the protection scope of the present application is defined by the appended claims.

[0072] The above embodiments are preferred cases of the present application, and are not intended to limit the protection scope of the present application, and various modifications or changes made by those skilled in the art without creative efforts within the scope of the appended claims shall fall within the protection scope of the present application.

Claims

1. A current-mode SVG control method based on improved DC bus voltage synchronization, characterized in that... Includes the following steps: Step S1: Based on the equivalent analysis of the synchronization outer loop, the synchronization loop of the current-controlled SVG based on the phase-locked loop is equivalent to the power synchronization loop; Step S2: Based on the relationship between the DC bus voltage of the SVG and the output active power, the power synchronization loop is equivalent to the DC bus voltage synchronization loop. Step S3: Based on the DC bus voltage synchronization loop, design an improved DC bus voltage synchronization outer loop that integrates a phase-locked loop. Step S4: Using a detection method based on instantaneous reactive power theory, reactive current detection is achieved, and the reactive power compensation loop design is completed. Step S5: Design the current control inner loop using a quasi-proportional resonant controller (QPR) in parallel with a proportional-integral controller (PI). Step S6: Combine the loop design from steps S3 to S5 to jointly construct the control system of the current-type SVG and realize stable control of the current-type SVG. In step S5, the current control inner loop uses the three-phase reference current i refa,b,c As input, the data is first processed by a parallel quasi-proportional resonant controller (QPR) and a proportional-integral controller (PI), then added together to form a fused output. Simultaneously, the result is passed through a second-order generalized integrator filter (G). F (s) for capacitor voltage v ca,b,c Feedforward control is performed, and finally the processing result of the feedforward control is added to the fusion result to output the three-phase control voltage command v. ra,b,c ; In step S3, a proportional-derivative (PD) controller is used to design synchronous control of the DC bus voltage, while a fixed ω is simultaneously applied. ref The value of ω obtained using phase-locked loops PLL This replaces the design of the improved DC bus voltage synchronization outer loop.

2. The current-type SVG control method based on improved DC bus voltage synchronization according to claim 1, characterized in that: The transfer function corresponding to the DC bus voltage synchronization control is as follows. ； Where ω represents the angular frequency of the voltage output by the SVG; U dc This represents the bus voltage on the DC side of the SVG; a0 and a1 represent the controller parameters, where a0 is the proportional coefficient and a1 is the differential coefficient.

3. The current-type SVG control method based on improved DC bus voltage synchronization according to claim 1, characterized in that: In step S4, the instantaneous active current component and instantaneous reactive current component in the dq-axis coordinate system are obtained through positive sequence coordinate transformation. The instantaneous active current component is excluded, and only the instantaneous reactive current component i is considered. Lq Low-frequency filtering is performed to remove high-frequency components, followed by inverse transformation to obtain the three-phase fundamental reactive current i on the load side. Ra,b,c .

4. The current-mode SVG control method based on improved DC bus voltage synchronization according to claim 1, characterized in that: The transfer functions of the quasi-proportional resonant controller QPR and the proportional-integral controller PI are as follows. ； Where, k pPR k represents the proportional gain of the quasi-proportional resonant controller (QPR controller). rPR ω represents the resonant gain of the quasi-proportional resonant controller QPR. cPR k represents the resonant bandwidth of the quasi-proportional resonant controller QPR. pPI k represents the proportional gain of the proportional-integral controller (PI). iPI This represents the integral gain of the proportional-integral (PI) controller. The transfer function of the second-order generalized integrator filter GF is as follows. ； Where, k F ω represents the damping coefficient. ref Indicates the reference angular frequency.

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