A method for preventing reverse flow of a multi-single-phase inverter parallel networking system

Abstract

The application discloses a kind of anti-flow control methods of multiple single-phase inverter parallel networking systems, comprising the following steps: the output channel of each single-phase inverter is bound with the part of grid phase;After completing phase recognition, the three-phase power of network side is detected by intelligent meter, if the reverse flow of certain phase of grid is detected, all single-phase inverters of grid reverse flow phase bound are queried by main controller;The power parameters of the single-phase inverter queried by main controller are calculated by weighting algorithm to obtain the load limiting power target value of each single-phase inverter, and anti-flow instruction is generated and issued to the corresponding single-phase inverter.The beneficial effects of the application are: the physical binding relationship between the output channel of single-phase inverter and the three-phase of grid is automatically identified, which effectively avoids the control failure caused by manual wiring error.Anti-flow instruction is only issued to the single-phase inverter of bound reverse flow phase, which avoids the resource waste and system efficiency decline caused by global load limiting.

Description

Technical Field

[0001] This application relates to the field of new energy power generation technology, and in particular to an anti-reverse flow control method for a multi-single-phase inverter parallel grid system. Background Technology

[0002] Currently, most distributed photovoltaic and energy storage systems adopt a direct grid-connected structure with single-phase or three-phase inverters. However, when facing parallel systems composed of multiple three-wire single-phase inverters, existing technical solutions have the following drawbacks:

[0003] (1) It cannot automatically identify the binding relationship between the inverter output phase and the physical phase of the grid, which can easily lead to control mismatch.

[0004] (2) The control logic usually does not limit the power of each phase, which can easily lead to the situation where the power of the non-reverse phase is also erroneously limited, thus reducing the system efficiency.

[0005] (3) The communication architecture is mostly broadcast or does not distinguish physical phases, and lacks a directional anti-backflow command issuance mechanism.

[0006] (4) The power distribution lacks consideration of factors such as energy storage SOC and PV capacity, resulting in individual inverter overload or uneven resource utilization. Summary of the Invention

[0007] One objective of this application is to provide an anti-reverse flow control method for a multi-single-phase inverter parallel network system that can solve at least one of the defects in the above-mentioned background art.

[0008] To achieve at least one of the above objectives, the technical solution adopted in this application is as follows: a method for preventing reverse current in a multi-unit single-phase inverter parallel grid system, comprising the following steps: binding the output channel of each single-phase inverter to a portion of the grid phase and performing phase identification; after completing the phase identification of all single-phase inverters, detecting the three-phase power on the grid side through a smart meter; if reverse current is detected in a certain phase of the grid, querying all single-phase inverters bound to the reverse current phase of the grid through the main controller; the main controller calculating the load limit power target value of each single-phase inverter through a weighted algorithm based on the power parameters of the queried single-phase inverters, and generating an anti-reverse current command to be sent to the corresponding single-phase inverter.

[0009] Preferably, phase identification of the output channel and bound phase of the single-phase inverter based on synchronous phase-locked loop (PLL) is performed, specifically including the following process: time synchronization between the main controller, the smart meter, and each single-phase inverter; phase-locking of the output channel of each single-phase inverter, recording the timestamp of the positive zero crossing of the output channel and feeding it back to the main controller; the main controller calculates the communication delay time from the acquisition of the three-phase voltage waveform to the receipt by the main controller based on the three-phase voltage waveform sampled by the smart meter; based on the obtained communication delay time, the main controller performs periodic rolling prediction of the positive zero crossing time of the three-phase voltage to obtain the reference phase of the three-phase voltage; the main controller compares the timestamp of the positive zero crossing uploaded by each single-phase inverter with the reference phase of the three-phase voltage, and takes the phase corresponding to the smallest difference as the bound phase of the output channel.

[0010] Preferably, the time synchronization process between the main controller and the smart meter and single-phase inverter (which are the objects to be synchronized) is as follows: Synchronization interaction is performed: the main controller sends a clock calibration request frame carrying the current system timestamp to the objects to be synchronized; upon receiving the clock calibration request frame, the objects to be synchronized record the reception time of their local controller clock and immediately send back a response frame including the reception timestamp, the current local clock, and the frame sequence number; the main controller records the arrival time of the response frame and calculates the round-trip delay time of the clock calibration request frame, thereby estimating the master control time of the objects to receive the clock calibration request frame; the difference between the reception time of the clock calibration request frame reported by the objects to be synchronized and the master control time estimated by the main controller is used as the clock offset; multiple rounds of synchronization interaction are repeatedly performed between the main controller and the objects to be synchronized to obtain multiple clock offsets and perform data fitting to obtain a stable clock offset correction value; the main controller sends the obtained clock offset correction value to the objects to be synchronized, and the objects to be synchronized correct their local controller clock according to the received clock offset correction value.

[0011] Preferably, the phase identification of the output channel and the bound phase of the single-phase inverter based on disturbance injection includes the following process: In the initial stage of system startup, the main controller sequentially sends a disturbance power command based on a fixed period to each output channel of each single-phase inverter; the main controller synchronously collects the three-phase grid power change data from the smart meter and takes the phase with the most obvious disturbance response as the bound phase of the selected single-phase inverter's output channel.

[0012] Preferably, when a reverse current occurs in a phase of the power grid, the main controller queries the number of N single-phase inverters bound to the reverse current phase of the power grid, where the target load power ΔP of the i-th single-phase inverter is... i The calculation formula is as follows:

[0013] ;

[0014] ;

[0015] Where ΔP represents the total load-limiting power, w i SOC represents the power limit response weighting coefficient of the i-th single-phase inverter. i P represents the remaining charge of the energy storage battery in the i-th single-phase inverter. PV_i P represents the output power of the generator unit of the i-th single-phase inverter. i Let represent the output power of the i-th single-phase inverter, where α and β are both empirical coefficients.

[0016] Preferably, the DC / AC unit of the single-phase inverter adopts a dual-channel independent control architecture with the same control method. After the single-phase inverter receives the anti-reverse current command, the control process of the single control architecture is as follows: the current of the bound phase and the grid voltage of the corresponding phase are sampled, and after phase shifting by 90° and dq transformation, the d-axis and q-axis components of the bound phase current and the corresponding grid voltage are obtained; based on the received anti-reverse current command, the target values ​​of active power and reactive power corresponding to the bound phase are calculated, and then the reference values ​​of the d-axis and q-axis components of the bound phase current are calculated; the obtained reference values ​​of the d-axis and q-axis components of the bound phase current are compared with the corresponding d-axis and q-axis components of the bound phase current, and the comparison results are superimposed with the corresponding d-axis and q-axis components of the grid voltage; the superimposed results are inversely transformed and then used by the PWM generation module to generate the corresponding control signal.

[0017] Preferably, after the single-phase inverter receives the anti-reverse current command, the corresponding active power target value and reactive power target value are obtained by subtracting the load-limiting power target value from the corresponding value during normal operation; the reference value of the d-axis component of the bound phase current is calculated by the ratio of the active power target value to the d-axis component of the bound phase grid voltage; the reference value of the q-axis component of the bound phase current is calculated by the ratio of the reactive power target value to the q-axis component of the bound phase grid voltage.

[0018] Preferably, the control process for the DC / DC unit of a single-phase inverter is as follows: the output voltage and current of the generator unit are sampled, and the output voltage reference value of the generator unit is obtained after calculation by the MPPT loop; the output voltage reference value of the generator unit is compared with the output voltage of the generator unit, and the output current reference value of the generator unit is obtained through the PI controller; the output current reference value of the generator unit is compared with the output current of the generator unit, and the duty cycle of the DC / DC unit is obtained through the PI controller; the duty cycle is used to generate the control signal of the DC / DC unit through the PWM generation module.

[0019] Preferably, when the bus voltage exceeds the upper limit, the output current reference value of the generator unit is limited by the bus voltage power limiting loop; the specific limiting control process is as follows: the bus voltage is sampled and compared with the given bus voltage reference value, and the output current limit value of the generator unit is obtained after passing through the PI controller; the output current reference value of the generator unit is limited based on the obtained output current limit value of the generator unit.

[0020] Preferably, the control process for the Bi-DC / DC unit connected to the energy storage battery in a single-phase inverter is as follows: The bus voltage is sampled and compared with a given bus voltage reference value, and after passing through a PI controller, a charging / discharging current reference value is obtained; the charging / discharging current reference value is compared with the sampled charging / discharging current, and after passing through a PI controller, a charging / discharging duty cycle is obtained; the obtained charging / discharging duty cycle is passed through a PWM generation module to obtain the corresponding control signal; when the single-phase inverter receives an anti-reverse current command and executes power limiting, if the bus voltage on the DC / AC unit side rises, the single-phase inverter controls the energy storage battery to store energy; when the remaining charge of the energy storage battery reaches a set threshold upper limit, the single-phase inverter executes power limiting through the DC / DC unit's bus voltage power limiting loop.

[0021] Compared with the prior art, the beneficial effects of this application are as follows:

[0022] (1) Two phase identification methods based on synchronous phase-locked loop and disturbance injection are proposed to realize the automatic identification of the physical binding relationship between the output channel of the single-phase inverter and the three phases of the power grid, effectively avoiding control failure caused by manual wiring errors.

[0023] (2) The main controller can accurately identify the specific phase in which the reverse current occurs and only send the anti-reverse current command to the output channel of the single-phase inverter corresponding to the phase, so as to ensure that the single-phase inverters not involved remain in normal operation and avoid the waste of resources and the decrease in system efficiency caused by global power limitation.

[0024] (3) The control strategy takes into account factors such as the current output power of the single-phase inverter, the SOC of the energy storage battery, and the power generation. It uses a weighted algorithm to achieve a reasonable allocation of multi-objective power limiting tasks, thereby improving operational stability and equipment utilization. Attached Figure Description

[0025] Figure 1 A schematic diagram of the process for implementing backflow prevention control in this application.

[0026] Figure 2 This is a schematic diagram of the connection architecture between the single-phase inverter and the power grid in this application.

[0027] Figure 3 This is a schematic diagram of the phase identification process based on synchronous phase-locked loop for the single-phase inverter of this application.

[0028] Figure 4 This is a schematic diagram of the phase identification process based on disturbance injection for the single-phase inverter of this application.

[0029] Figure 5 This is a schematic diagram of the communication timing for preventing backflow in this application.

[0030] Figure 6 This is a schematic diagram of the architecture of the single-phase inverter of this application.

[0031] Figure 7 This is a schematic diagram of the control loop of the DC / AC unit in the single-phase inverter of this application.

[0032] Figure 8 This is a schematic diagram of the control loop of the DC / DC unit in the single-phase inverter of this application.

[0033] Figure 9 This is a schematic diagram of the control loop of the Bi-DC / DC unit in the single-phase inverter of this application. Detailed Implementation

[0034] The present application will now be further described in conjunction with specific embodiments. It should be noted that, in the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicates that the specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms should not be construed as necessarily referring to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. In addition, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0035] In the description of this application, it should be noted that the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc., which indicate the orientation and positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and should not be construed as limiting the specific protection scope of this application.

[0036] It should be noted that the terms "first," "second," etc., in the specification and claims of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0037] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0038] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0039] The terms “comprising” and “having”, and any variations thereof, in the specification and claims of this application are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.

[0040] One preferred embodiment of this application, such as Figure 1 As shown, a method for preventing reverse current in a multi-unit single-phase inverter parallel grid system includes the following steps: Binding the output channel of each single-phase inverter to a portion of the grid phases and performing phase identification. After completing phase identification for all single-phase inverters, the three-phase power on the grid side is detected using smart meters. If reverse current is detected in a phase of the grid, the main controller queries all single-phase inverters bound to the reverse-current phase of the grid. Based on the power parameters of the queried single-phase inverters, the main controller calculates the load-limiting power target value for each single-phase inverter using a weighted algorithm and generates an anti-reverse current command, which is then sent to the corresponding single-phase inverter.

[0041] Compared with traditional methods, the technical solution of this application can automatically identify the physical output phase of a single-phase inverter: through multiple phase identification methods, the physical binding relationship between the inverter channel and the three phases of the power grid can be automatically identified, effectively avoiding control failures caused by manual wiring errors.

[0042] It can also achieve precise phase-by-phase power limiting control to improve system efficiency: the main controller can accurately identify the specific phase in which reverse current occurs and only send anti-reverse current commands to the output channels of the single-phase inverters corresponding to the phase, ensuring that the single-phase inverters not involved continue to operate normally and avoiding resource waste and system efficiency decline caused by global power limiting.

[0043] It can also achieve power dispatch that takes into account both energy storage status and power generation capacity: the control strategy comprehensively considers factors such as the current output power of the single-phase inverter, the SOC of the energy storage battery, and the power generation, and achieves reasonable allocation of multi-objective power limiting tasks through weighted algorithms, thereby improving operational stability and equipment utilization.

[0044] As is understandable, the core of the technical solution in this application lies in establishing the binding relationship between the physical output phase of the single-phase inverter and the A / B / C three-phase of the power grid, constructing the logic of phase-by-phase control, designing a directional communication mechanism, constructing a multi-factor-based anti-reverse current power allocation mechanism, achieving accurate identification of the reverse current phase through the main controller, and issuing anti-reverse current commands only to the single-phase inverters bound to the reverse current phase of the power grid. For ease of understanding, each step will be described in detail below.

[0045] In this embodiment, the parallel networking system of multiple single-phase inverters can be networked using either conventional single-phase inverters or single-phase three-wire inverters. It's important to note that a conventional single-phase inverter has only one output channel, while a single-phase three-wire inverter has two output channels. For ease of description, the following will use a three-wire single-phase inverter as an example to specifically describe the anti-backflow communication architecture formed by the parallel networking system of multiple single-phase inverters.

[0046] Specifically, such as Figure 2 As shown, the anti-reverse current communication architecture includes multiple single-phase inverters, a main controller, smart meters, and communication links. Each single-phase inverter's two output channels, L1 and L2, can be pre-bonded to any two phases of the grid's A / B / C phases, or both output channels can be simultaneously bonded to any one phase of the grid's A / B / C phases, depending on the user's actual wiring requirements. The smart meters are installed at the grid connection point of multiple single-phase inverters, possessing three-phase power / voltage / current sampling capabilities. They collect the A / B / C phase voltages, feeder current, and power of the grid in real time and transmit this data to the main controller. The main controller can be deployed independently or integrated into any single-phase inverter, responsible for grid status acquisition, reverse current identification, power limiting strategy calculation, anti-reverse current control command issuance, and response recovery. The main controller, smart meters, and all single-phase inverters are connected via a communication link; specifically, a master-slave architecture can be built using communication methods such as RS485, CAN, Wi-Fi, or Ethernet, supporting directional control frame sending and status frame recycling.

[0047] It should be noted that the specific number of single-phase inverters in a multi-single-phase inverter parallel network system can be selected according to the user's needs, and can be 2, 3, 10, or even 100 units. The anti-reverse current communication architecture of this application is applicable not only to multi-single-phase inverter parallel network systems, but also to systems consisting of parallel coupling of multiple parallel network subsystems. For ease of understanding, the following will use a parallel network system with 3 single-phase inverters as an example to describe the specific structure of the anti-reverse current communication architecture in detail.

[0048] Specifically, such as Figure 2 and Figure 6 As shown, the three single-phase inverters are labeled as Single-Phase Inverter #1, Single-Phase Inverter #2, and Single-Phase Inverter #3. Each single-phase inverter includes output channels L1 and L2, as well as a neutral (N) line channel. During network configuration, the output channel L1 of single-phase inverter #1 can be connected to phase A of the grid, and its output channel L2 to phase B of the grid; the output channel L1 of single-phase inverter #2 can be connected to phase C of the grid, and its output channel L2 to phase A of the grid; the output channel L1 of single-phase inverter #3 can be connected to phase B of the grid, and its output channel L2 to phase C of the grid. The N line channel of all three single-phase inverters shares a connection to the neutral point of the grid. A smart meter is installed at the grid connection point. The main controller is connected to the smart meter via a communication link, and also to the three single-phase inverters via a communication link.

[0049] It should be understood that in the installation process of traditional parallel grid systems of single-phase inverters, phase binding of the single-phase inverter is generally carried out by on-site installation and wiring personnel through a human-machine interface to bind phase tags to the single-phase inverter. However, this method carries the risk of personnel binding the phase information incorrectly, which can lead to the failure of the phase-by-phase anti-reverse current system. To achieve automatic binding between physical phases and inverter channels and avoid human wiring errors, the technical solution of this application designs two phase identification methods based on synchronous phase-locked loop (PLL) and disturbance injection, which are applicable to inverter systems with different hardware conditions.

[0050] It's important to understand that in a parallel grid system of single-phase inverters, each phase output channel can be bound to a grid phase (A / B / C) using a separate phase-locked loop (PLL) method. However, since the phase difference between the three phases of the grid is only 120°, corresponding to a time difference of only 6.67ms in a 20ms cycle (50Hz grid), while conventional communication delays are typically 50ms to 200ms, directly using PLL identification can easily lead to misjudgments. Therefore, for single-phase inverters equipped with real-time clocks or soft clock modules, phase identification can be performed using synchronous PLL. For single-phase inverters lacking high-precision clocks, perturbation injection can be used for phase identification; of course, perturbation injection can also be used for single-phase inverters equipped with high-precision clocks. For ease of understanding, the specific implementation process of these two phase identification methods will be described in detail below.

[0051] I. Phase recognition based on synchronous phase-locked loop.

[0052] In this embodiment, as Figure 3 As shown, the specific phase recognition process includes the following steps:

[0053] Perform system time synchronization: synchronize the time between the main controller, smart meters, and each single-phase inverter.

[0054] Single-phase inverter zero-crossing timestamp acquisition: Phase-locked loop (PLL) is performed on the two output channels L1 and L2 of each single-phase inverter, and the timestamps T of the positive zero crossings of the two output channels L1 and L2 are recorded. L1 and T L2 Then each single-phase inverter uploads its phase-locked time stamp to the main controller via the communication link. The uploaded data packet contains information such as channel identifier (e.g., L1), timestamp, and inverter ID (e.g., single-phase inverter #1).

[0055] Reference phase calculation: The main controller receives the three-phase voltage waveform sampled by the smart meter. The feedback data from the smart meter includes the sampling time T of its sampled three-phase voltage waveform. sample_emeter Since there is a delay in data transmission from the smart meter to the main controller, the current time T recorded by the main controller when it receives the data frame is used as the reference. receive_master The communication delay time ΔT_comm = T can be calculated from the acquisition of the three-phase voltage waveform to the reception by the main controller. receive_master - T sample_emeter Based on the obtained communication delay time, the main controller will determine the positive zero-crossing time T of the A / B / C three-phase voltages at the sampling moment. A_ref T B_ref T C_ref Perform periodic rolling prediction to obtain the reference phase T of the three-phase voltage at the current moment of the system. j_now .

[0056] T j_now = T A_ref +ΔT_comm(mod)T, j={A, B, C}; T represents the power grid cycle.

[0057] The main controller uses the reference phase T A_now T B_now T C_now These serve as the current reference clock bases, aligned with the timestamps of the single-phase inverters.

[0058] Time difference comparison and minimum value determination: The main controller uploads the positive zero-crossing timestamp T to each single-phase inverter. L1 and T L2 By comparing the three-phase voltage reference phases mentioned above, the time difference between each output channel and the three phases of the power grid is calculated.

[0059] Time difference The calculation formula is: , j={A, B, C}, X={1, 2}.

[0060] The phase corresponding to the minimum difference is used as the physical phase identification result of the output channel and phase binding is performed. For example, if the time difference calculated for the output channel L1 of a single-phase inverter... If the minimum value is reached, then the output channel L1 of the single-phase inverter is bound to phase B of the power grid.

[0061] Understandably, to improve the accuracy of phase binding, sliding consistency verification can be performed. This involves repeatedly performing phase identification for K cycles, with the main controller verifying the consistency of the identification results over those K cycles. If the identification results are consistently consistent, the binding is considered valid. If multiple phase time differences are close or the results are unstable, the main controller can re-lock phase or perform phase identification by introducing disturbance injection. The specific value of the number of repetition cycles K for phase identification can be selected according to actual needs; for example, phase identification can be repeated 2 to 5 times. After completing phase identification, the main controller can write the binding relationship established between the identified physical phase tag and the corresponding output channel of the single-phase inverter into the system configuration table and synchronously send it back to each single-phase inverter for subsequent anti-reverse current control strategy calls.

[0062] It is important to understand that during system time synchronization, microsecond-level alignment must be ensured between the main controller, smart meters, and each single-phase inverter. PTP (Precise Time Protocol) is a commonly used hardware time synchronization method that can synchronize time to the microsecond or even sub-microsecond level, but it relies on hardware devices. This application provides a method that does not rely on hardware and can still achieve microsecond-level time synchronization, which will be described in detail below. Since the main controller needs to synchronize with the smart meters and each single-phase inverter separately, and the specific time synchronization method is the same, the following description will use the objects to be synchronized instead of the smart meters and single-phase inverters to describe the time synchronization process.

[0063] Specifically, a single round of synchronization interaction is performed first: the master controller sends a clock calibration request frame carrying the current system timestamp T to the object being synchronized. master_send This timestamp serves as the starting reference for this round of synchronization and does not require precise time alignment.

[0064] The object being synchronized records the local controller clock reception time T the instant it receives the clock calibration request frame. slave_recv and immediately send back the received timestamp T. slave_recv Current local clock T slave_now The response frame is identified by the sequence number seq_id. The sequence number seq_id is used to identify the data frame and avoid data reception errors.

[0065] Then the main controller records the arrival time T of the response frame. master_recv And calculate the round-trip delay time (RTT) of the clock calibration request frame; RTT = T master_recv -T master_send Assuming the communication is a symmetrical link, the one-way delay δ = RTT / 2. Based on this estimate, the main controller can calculate the master control time T for the synchronized object to receive the clock calibration request frame. expected ;T expected =T master_send +δ.

[0066] The reception time T of the clock calibration request frame reported by the object to be synchronized. slave_recv The master control time T calculated by the master controller expected The difference is taken as the clock offset ε; ε = T slave_recv –T expected The master controller sends the received clock offset ε to the synchronized object, which then corrects its local controller clock based on the received clock offset ε.

[0067] Understandably, considering the potentially large error in the clock offset ε obtained from a single round of synchronization interaction, multiple rounds of synchronization interaction can be repeatedly performed between the master controller and the synchronized object. The specific number of synchronization interaction rounds can be set according to actual needs, for example, 5 to 10 rounds can be performed. The multiple clock offsets ε obtained through multiple rounds of synchronization interaction can be fitted using methods such as moving average or least squares to obtain a stable clock offset correction value ε_avg. The master controller can then send the calibrated clock offset correction value ε_avg to the synchronized object, which uses this value to correct its local soft clock module and adopts the corrected time value in tasks such as phase locking and timestamp recording to achieve time synchronization with the master controller.

[0068] II. Phase recognition based on perturbation injection.

[0069] It's important to understand that this method only requires the main controller to have the capability of disturbance command injection and response analysis to automatically identify and bind the physical phases of each single-phase inverter. Its basic principle is as follows: During the initial system startup or reconnection phase, before the inverter enters its formal grid-connected operation mode, the main controller injects a small disturbance command into a specific output channel of the target inverter. The main controller then observes and analyzes the response changes of the grid power in each phase through smart meters, thereby inferring which phase of the grid has a direct coupling relationship between the single-phase inverter channel and that phase. For ease of understanding, a detailed description will follow.

[0070] Specifically, such as Figure 4 As shown, phase recognition based on perturbation injection includes the following process:

[0071] Disturbance Injection Preparation: During the initial stage of system startup, the main controller sequentially sends a disturbance power command based on a fixed period to each output channel of each single-phase inverter. At this time, the single-phase inverter is in a weak injection test mode, injecting power only a small amount within a safe range. It should be noted that the issuance period of the disturbance power command can be set according to the actual needs of those skilled in the art; for example, a disturbance power command can be issued every 200ms. The specific value of the disturbance power command can also be set according to the actual needs of those skilled in the art; for example, the disturbance power command can be 5% to 10% of the rated power.

[0072] Power response sampling: The main controller synchronously collects three-phase grid power change data ΔP from the smart meter. A ΔP B ΔP C It is important to note that this measurement should be completed within 20–100 ms after the disturbance begins to ensure that the disturbance has not yet decayed or been canceled out by other control disturbances.

[0073] Phase response matching analysis: Based on the power change of each phase, the main controller determines which phase has the most obvious response to the injected disturbance, i.e., ΔPj (j=A, B, C) is the largest. Then, the phase is the physical phase of the power grid corresponding to the target output channel and is phase-bound.

[0074] Understandably, to improve the accuracy of phase binding, repeated injection and redundancy verification can be performed. That is, the main controller performs the above-mentioned disturbance process K times on the same output channel. The specific number of executions, K, can be selected according to actual needs; for example, it can be repeated 2 to 5 times. The consistency of the results of multiple disturbance injections is verified. If the consistency is greater than 90%, the identification can be considered reliable. If the multi-phase responses are similar or the responses are not obvious, the disturbance holding time can be extended or a reverse disturbance can be used for verification again. After completing phase identification, the main controller can write the binding relationship established between the identified physical phase tag and the corresponding output channel of the single-phase inverter into the system configuration table and synchronously send it back to each single-phase inverter for its phase binding relationship, which can then be called by subsequent anti-reverse current control strategies.

[0075] In this embodiment, when the main controller detects reverse current in a phase of the power grid via a smart meter, it needs to select a suitable power limiting target allocation scheme from the output channels of multiple single-phase inverters bound to that phase. Since the energy storage battery power and power generation power of the single-phase inverters both affect the power limiting operation to prevent reverse current, this application proposes a power scheduling strategy based on multi-factor dynamic weighting. For ease of understanding, a detailed description will follow.

[0076] Specifically, after the main controller identifies the reverse phase, it can query the output channels of all single-phase inverters bound to that phase and obtain the current output power P, the remaining SOC of the energy storage battery, and the output power P of the P generation unit for each single-phase inverter bound to that phase. PV The main controller calculates the allocation ratio based on a weighted algorithm, generates the target load power ΔP for each single-phase inverter, and sends corresponding anti-reverse current commands to each single-phase inverter through relevant channels.

[0077] For ease of understanding, the following will use the example of the main controller querying the target load power ΔP of the i-th single-phase inverter among the N single-phase inverters bound to the grid's reverse phase. i The calculation formula is described.

[0078] , .

[0079] Where ΔP represents the total load-limiting power, w i SOC represents the power limit response weighting coefficient of the i-th single-phase inverter. iP represents the remaining charge of the energy storage battery in the i-th single-phase inverter. PV_i P represents the output power of the generator unit of the i-th single-phase inverter. i Let α represent the output power of the i-th single-phase inverter. α and β are both empirical coefficients, which can be taken as α=0.6 and β=0.4.

[0080] Based on the aforementioned anti-reverse communication architecture and the calculation process of the load-limiting power target value, the following will take a parallel network system of 3 single-phase inverters as an example to describe in detail the communication timing of the entire anti-reverse process.

[0081] Specifically, such as Figure 5 As shown, the main controller completes the following communication operations within each control cycle:

[0082] The main controller acquires the three-phase power sampled from the smart meter and determines if any phase exceeds the reverse current threshold. If a reverse current phase is detected, the main controller can query the system configuration table to find the output channels of all single-phase inverters bound to the reverse current phase. Assume that the output channels of single-phase inverters #1 to #3 are all bound to the reverse current phase. During time period t1 of the control cycle, the main controller can send anti-reverse current command frames to single-phase inverters #1 to #3. The frame format is {start character, anti-reverse current command, phase tag, target power reference value, timestamp (current system cycle number), check bit}. Single-phase inverters #1 to #3 receive the anti-reverse current command during time period t1 and simultaneously execute anti-reverse current control during time period t2.

[0083] It's important to know that upon receiving the anti-reverse current command, the single-phase inverter immediately responds, adjusts the control target, and feeds back an execution status frame in the next control cycle. The frame format is {start character, anti-reverse current control response, phase tag, current output power value, status flag (execution success / failure), check bit}. Specifically, single-phase inverter #1 feeds back its execution status to the column controller during time period t3 of the next control cycle, and the main controller receives the execution status of single-phase inverter #1 during the same time period; single-phase inverter #2 feeds back its execution status to the column controller during time period t4 of the next control cycle, and the main controller receives the execution status of single-phase inverter #2 during the same time period; single-phase inverter #3 feeds back its execution status to the column controller during time period t5 of the next control cycle, and the main controller receives the execution status of single-phase inverter #3 during the same time period.

[0084] Those skilled in the art should know that, as Figure 6As shown, the architecture of a single-phase inverter includes a front-end DC / DC unit and a back-end DC / AC unit. The input side of the DC / DC unit is connected to the power generation unit. Taking a photovoltaic single-phase inverter as an example, the power generation unit is a photovoltaic string (PV). The output side of the DC / DC unit is connected to the DC side of the DC / AC unit. The AC side of the DC / AC unit is equipped with output channels L1 and L2 for connection to the power grid. Taking single-phase inverter #1 as an example, output channel L1 is connected to phase A of the power grid, and output channel L2 is connected to phase B of the power grid. For single-phase inverters with energy storage capabilities, the architecture also includes an energy storage battery connected in parallel to the DC side of the DC / AC unit via a Bi-DC / DC unit. After the main controller issues a power limiting command to the single-phase inverter, the DC / DC unit, Bi-DC / DC unit, and DC / AC unit will all perform power limiting control based on anti-reverse current. For ease of understanding, the working process of the control loops of the DC / DC unit, Bi-DC / DC unit, and DC / AC unit will be described in detail below.

[0085] In this embodiment, the DC / AC unit adopts a dual-channel independent control architecture with the same control method; after the single-phase inverter receives the anti-reverse current command, the control process of the single control architecture is as follows: taking the occurrence of reverse current in phase A of this control architecture as an example, such as Figure 7 As shown, for the current i in phase A A After sampling, and through a 90° phase shift and dq transformation, the d-axis component i of the phase A current is obtained. A_d and q-axis component i A_q Similarly, for the grid voltage v of phase A... A After sampling, and through a 90° phase shift and dq transformation, the d-axis component v of the A-phase grid voltage is obtained. A_d and q-axis component v A_q .

[0086] Based on the received anti-reverse current command, calculate the corresponding active power target value and reactive power target value for phase A, and then calculate the reference value of the d-axis component of the phase A current. and q-axis component reference value The d-axis component reference value of the obtained phase A current. The d-axis component i of the corresponding A-phase current A_d The comparison is performed, and the comparison result is used to generate the d-axis component of the A-phase grid voltage after passing through a PI controller. Simultaneously, the q-axis component reference value of phase A current is... The q-axis component i of the corresponding A-phase current A_q The comparison results are then processed by a PI controller to generate the q-axis component of the A-phase grid voltage. The d-axis component of the obtained phase A grid voltage. The d-axis component v of the corresponding A-phase grid voltageA_d The components are superimposed, and the q-axis components of the resulting A-phase grid voltage are also superimposed. The q-axis component v of the corresponding A-phase grid voltage A_q The results are superimposed. The superimposed results, along with the voltage v through phase A of the power grid, are then compared. A The grid angular frequency ω obtained by phase-locked loop g With phase angle θ A After being fed into the inverse transformation module for inverse transformation, the modulation signal d of phase A is obtained. A After passing through the PWM generation module, the control signal PWM for the switching transistors of the control architecture connected to phase A of the DC / AC unit is obtained. DC / AC_A This enables grid-connected current control of phase A.

[0087] It is understandable that when a single-phase inverter is operating normally, it is bound to the corresponding active power target value P. ref and reactive power target value Q ref It is calculated from the output power of the power generation unit, the power of the energy storage battery, and the power factor. After the single-phase inverter receives the anti-reverse current command, it binds the corresponding active power target value P. ref and reactive power target value Q ref The value is obtained by subtracting the target load power from the corresponding value during normal operation; the reference value of the d-axis component of the bound phase current. and q-axis component reference value The calculation formula is as follows:

[0088] ; ;

[0089] Among them, v d and v q These represent the d-axis and q-axis components of the corresponding phase grid voltage, respectively.

[0090] In this embodiment, the loop control of the DC / DC unit mainly includes two operating modes: Maximum Power Point Tracking (MPPT tracking) and power limiting mode. That is, when the single-phase inverter is working normally, the loop control of the DC / DC unit performs MPPT tracking; when the single-phase inverter is performing anti-reverse current operation, the loop control of the DC / DC unit performs power limiting mode. For ease of understanding, the two operating modes will be described in detail below.

[0091] Specifically, the control process for the DC / DC unit to perform MPPT tracking is as follows: Figure 8 As shown, the output voltage v of the power generation unit is sampled first. PV and current i PV The reference value of the output voltage of the generator unit is obtained after MPPT loop calculation. The output voltage reference value of the generator unit. With the output voltage v of the power generation unit PV After comparison, the output current reference value of the power generation unit is obtained through the PI controller. The output current reference value of the generator unit. With the output current i of the power generation unit PV After comparison, the duty cycle d of the DC / DC unit is obtained through the PI controller. DC / DC ; Set the duty cycle d DC / DC The PWM generation module generates control signals (PWM) to control the switching transistors in the DC / DC unit. DC / DC This enables MPPT tracing.

[0092] At the bus voltage v DC When the upper limit is exceeded, the DC / DC unit executes a power limiting mode; specifically, in the MPPT control loop, the reference value of the generator unit's output current is... Amplitude limiting control is performed, with a limiting value of i. limit It is obtained through the bus voltage power limiting loop. The specific limiting control process of the bus voltage power limiting loop is as follows: sample the bus voltage v DC and compared with the given bus voltage reference value The comparison is performed, and the output current limiting value i of the power generation unit is obtained after passing through the PI controller. limit Adding a limiting unit to the MPPT control loop, with the limiting value of the limiting unit given by the bus voltage power limiting loop, then the reference value of the output current of the generator unit generated by the MPPT control loop... Subsequent calculations are performed after the amplitude is limited by the amplitude limiting unit.

[0093] In this embodiment, the Bi-DC / DC unit mainly controls the charging and discharging current of the energy storage battery and balances the bus voltage. The control loop includes a bus voltage loop as the outer loop and a charging and discharging current loop as the inner loop. The specific control process is as follows: Sample the bus voltage v DC and compared with the given bus voltage reference value The comparison is performed, and the charging / discharging current reference value is obtained after passing through the PI controller. The charging and discharging current reference value. With the sampled charging and discharging current i bat After comparison, the charge / discharge duty cycle d is obtained by the PI controller. bat The obtained charge / discharge duty cycle d bat The PWM generation module generates the control signal PWM for controlling the switching transistors in the Bi-DC / DC unit. bat This enables the charging and discharging control of the energy storage battery.

[0094] Understandably, when a single-phase inverter receives an anti-reverse current command and executes power limiting, if the DC / AC unit bus voltage rises, the single-phase inverter can prioritize controlling the energy storage battery to store energy to reduce power. There are two energy storage methods for the energy storage battery: one is to charge the battery, in which case the Bi-DC / DC unit controls the target value of the charging current to increase; the other is to reduce the battery's discharge rate, in which case the Bi-DC / DC unit controls the target value of the discharge current to decrease. When the remaining charge of the energy storage battery reaches a set threshold upper limit, the battery will no longer be able to store energy, and the single-phase inverter will execute power limiting through the DC / DC unit bus voltage power limiting loop. The set threshold upper limit for the remaining charge of the energy storage battery can be set according to the actual needs of those skilled in the art, for example, it can be set to 95%.

[0095] It should be noted that the power limiting control logic for anti-reverse current in the single-phase inverter of this application is as follows: energy storage is prioritized, and when the energy storage battery cannot absorb power, the power generation unit enters a power limiting state. This control logic can be achieved through the difference in loop response speed; that is, the control bandwidth of the bus voltage loop of the Bi-DC / DC unit is set higher than the bandwidth of the bus voltage power limiting loop of the DC / DC unit to ensure that the Bi-DC / DC unit responds first.

[0096] The basic principles, main features, and advantages of this application have been described above. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely the principles of this application. Various changes and modifications can be made to this application without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection claimed by this application is defined by the appended claims and their equivalents.

Claims

1. A method for preventing reverse current flow in a multi-unit single-phase inverter parallel grid system, characterized in that, Includes the following steps: The output channel of each single-phase inverter is bound to a portion of the grid phase, and phase identification is performed. After completing the phase identification of all single-phase inverters, the three-phase power on the grid side is detected by the smart meter. If a reverse current is detected in a certain phase of the grid, the main controller queries all single-phase inverters bound to the reverse current phase. Based on the power parameters of the single-phase inverters obtained from the query, the main controller calculates the load limit power target value of each single-phase inverter using a weighted algorithm, and generates an anti-reverse current command to send to the corresponding single-phase inverter. The DC / AC unit of the single-phase inverter adopts a dual-channel independent control architecture with the same control method; after the single-phase inverter receives the anti-reverse current command, the control process of the single control architecture is as follows: The current of the bound phase and the grid voltage of the corresponding phase are sampled. After phase shifting by 90° and dq transformation, the d-axis and q-axis components of the bound phase current and the corresponding grid voltage are obtained. Based on the received anti-reverse current command, calculate the corresponding active power target value and reactive power target value for binding, and then calculate the d-axis component reference value and q-axis component reference value of the bound phase current. The obtained reference values ​​of the d-axis component and q-axis component of the bound phase current are compared with the corresponding d-axis component and q-axis component of the bound phase current, and the comparison results are superimposed with the corresponding d-axis component and q-axis component of the grid voltage of the phase. The superposition result is inversely transformed and then used by the PWM generation module to generate the corresponding control signal.

2. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 1, characterized in that, Phase identification of the output channel and bonded phase of a single-phase inverter based on synchronous phase-locked loop (PLL) is performed, specifically including the following process: Time synchronization is performed between the main controller, smart meters, and each single-phase inverter. Phase-locked operation is performed on the output channel of each single-phase inverter, and the timestamp of the positive zero crossing of the output channel is recorded and fed back to the main controller; The main controller calculates the communication delay time from the acquisition of the three-phase voltage waveform to the receipt of the main controller based on the three-phase voltage waveform sampled by the smart meter. Based on the obtained communication delay time, the main controller performs periodic rolling prediction of the positive zero-crossing time of the three-phase voltage to obtain the reference phase of the three-phase voltage. The main controller compares the positive zero-crossing timestamp uploaded by each single-phase inverter with the reference phase of the three-phase voltage, and uses the phase corresponding to the smallest difference as the binding phase of the output channel.

3. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 2, characterized in that, The time synchronization process between the main controller and the smart meters and single-phase inverters that are the objects to be synchronized is as follows: Perform synchronous interaction: The master controller sends a clock calibration request frame carrying the current system timestamp to the object being synchronized; The object being synchronized records the receiving time of the local controller clock the instant it receives the clock calibration request frame, and immediately sends back a response frame including the receiving timestamp, the current local clock, and the frame sequence number identifier. The main controller records the arrival time of the response frame and calculates the round-trip delay time of the clock calibration request frame, thereby deriving the main control time for the synchronized object to receive the clock calibration request frame. The difference between the receiving time of the clock calibration request frame reported by the object to be synchronized and the master control time calculated by the master controller is used as the clock offset. The synchronization interaction process between the main controller and the synchronized object is repeatedly executed in multiple rounds to obtain multiple clock offsets. Data fitting is then performed to obtain a stable clock offset correction value. The master controller sends the obtained clock offset correction value to the synchronized object, and the synchronized object corrects the local controller clock according to the received clock offset correction value.

4. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 1, characterized in that, Phase identification of the output channel and bonded phase of a single-phase inverter based on disturbance injection includes the following process: During the initial stage of system startup, the main controller sequentially sends disturbance power commands based on a fixed period to each output channel of each single-phase inverter. The main controller synchronously collects three-phase grid power change data from the smart meter and uses the phase with the most obvious disturbance response as the binding phase of the output channel of the selected single-phase inverter.

5. The anti-reverse current control method for a multi-unit single-phase inverter parallel grid system as described in any one of claims 1-4, characterized in that, When a reverse current occurs in a phase of the power grid, the main controller queries the number of single-phase inverters bound to that reverse-current phase, which is N. The target load power of the i-th single-phase inverter is... The calculation formula is as follows: ； ； in, Indicates the total load limit power, W i SOC represents the power limit response weighting coefficient of the i-th single-phase inverter. i P represents the remaining charge of the energy storage battery in the i-th single-phase inverter. PV_i P represents the output power of the generator unit of the i-th single-phase inverter. i Let represent the output power of the i-th single-phase inverter, where α and β are both empirical coefficients.

6. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 1, characterized in that, After the single-phase inverter receives the anti-reverse current command, the corresponding active power target value and reactive power target value are obtained by subtracting the load limit power target value from the corresponding value during normal operation. The reference value of the d-axis component of the bound phase current is calculated by the ratio of the target value of active power to the d-axis component of the bound phase grid voltage; The reference value of the q-axis component of the bound phase current is calculated by the ratio of the reactive power target value to the q-axis component of the bound phase grid voltage.

7. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 5, characterized in that, The control process for the DC / DC unit of a single-phase inverter is as follows: The output voltage and current of the sampling generator unit are used to calculate the reference value of the generator unit's output voltage through the MPPT loop. The output current reference value of the generator unit is obtained by comparing the output voltage reference value of the generator unit with the output voltage of the generator unit and then using the PI controller. The duty cycle of the DC / DC unit is obtained by comparing the output current reference value of the generator unit with the output current of the generator unit through the PI controller. The duty cycle is used to generate the control signal for the DC / DC unit through the PWM generation module.

8. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 7, characterized in that, When the bus voltage exceeds the upper limit, the output current reference value of the generator unit is limited through the bus voltage power limiting loop; the specific limiting control process is as follows: The bus voltage is sampled and compared with a given bus voltage reference value. After passing through a PI controller, the output current limit value of the generator unit is obtained. Based on the obtained output current limit value of the generator unit, the output current reference value of the generator unit is limited.

9. The anti-reverse current control method for a multi-single-phase inverter parallel grid system as described in claim 8, characterized in that, The control process for the Bi-DC / DC unit connected to the energy storage battery in a single-phase inverter is as follows: The bus voltage is sampled and compared with a given bus voltage reference value. After passing through the PI controller, the charging and discharging current reference value is obtained. The charge / discharge duty cycle is obtained by comparing the reference value of the charge / discharge current with the sampled charge / discharge current and then using a PI controller. The obtained charge / discharge duty cycle is processed by the PWM generation module to obtain the corresponding control signal; When the single-phase inverter receives the anti-reverse current command and executes power limiting, if the DC / AC unit side bus voltage rises, the single-phase inverter controls the energy storage battery to store energy. When the remaining charge of the energy storage battery reaches the set threshold limit, the single-phase inverter performs power limiting through the bus voltage power limiting loop of the DC / DC unit.

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