Test back drilling method, back drilling device and readable storage medium

By setting up test holes in partitions on the PCB and using predictive models and probe detection, the problem of difficult control of residual pile length was solved, and the controllability of residual pile length and the improvement of signal transmission quality were achieved.

CN120897336APending Publication Date: 2025-11-04VICTORY GIANT TECH HUIZHOU CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510999705.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-21
Publication Date
2025-11-04

AI Technical Summary

Technical Problem

Existing back-drilling technology cannot precisely control the length of residual posts in multilayer printed circuit boards (PCBs), resulting in a decrease in signal transmission quality, especially affecting the communication and data transmission quality of electronic products in high-frequency and high-speed signal transmission scenarios.

Method used

Test drilling is performed by partitioning the circuit board, calculating the test back drilling depth and probe parameters using a predictive model, and then using a probe to detect the length of the residual pile. The actual back drilling depth is adjusted to control the residual pile within a preset range.

Benefits of technology

This achieves controllability and stability of residual stake length, reduces interference in signal transmission, and improves the signal integrity of PCBs and the communication quality of electronic products.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120897336A_ABST
    Figure CN120897336A_ABST
Patent Text Reader

Abstract

The invention belongs to the related technical field of back drilling, and particularly relates to a back drilling testing method, a back drilling device and a readable storage medium. The method comprises the following steps: obtaining a circuit board, and carrying out partitioning according to the thickness of the circuit board to generate a first target partition; a routing area in the first target partition is obtained, and at least one test drill hole is formed in the routing area; transmitting the thickness of the first target subarea where the test drill hole is located to a preset prediction model, calculating to obtain the test back drilling depth through the prediction model, performing back drilling on the test drill hole according to the test back drilling depth through the probe parameters, detecting the stub length of the test drill hole through the probe parameters, and determining the stub length of the test drill hole through continuous testing. And the actual back drilling depth is calculated for back drilling until the length of the stub meets the preset range. By means of the mode, test back drilling can be conducted on the test drill hole before back drilling, and after the length of the stub meets the requirement range, the stub is controllable in length and small in floating by referring to the back drilling parameters meeting the test requirement.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention belongs to the technical field of back drilling, and particularly relates to a method for testing back drilling, a back drilling device, and a readable storage medium. Background Technology

[0002] Back drilling is a key process in printed circuit board (PCB) manufacturing, playing a crucial role in the production of high-speed, high-frequency PCBs. Its principle is to drill conductive or partially conductive holes during the manufacturing process of multilayer PCBs, allowing the upper and lower circuit boards to connect.

[0003] In back-drilling, residual spikes often remain after drilling through-holes. These spikes, or copper pillars, are excess copper posts left in the circuit layers where electrical connections are not required after drilling through-holes (vias) across multiple layers during PCB manufacturing. These spikes generate parasitic inductance and capacitance, causing signal reflection, delay, and loss during transmission, leading to signal distortion, reduced signal integrity, and impacting PCB performance. Especially in high-frequency, high-speed signal transmission scenarios, interference from these spikes can severely affect the communication and data transmission quality of electronic products. Since these spikes are often impossible to completely remove in back-drilled through-holes, minimizing their length is crucial to reduce their interference with the circuit board.

[0004] As PCBs become increasingly multi-layered, thicker, and more precise, the required length of residual posts is getting shorter. However, existing back-drilling technology cannot precisely control the residual posts inside the holes during direct drilling, and the length of the residual posts varies significantly from hole to hole due to the different thicknesses of each area on the board. Summary of the Invention

[0005] To address the aforementioned problems, this invention proposes a back-drilling test method, a back-drilling device, and a readable storage medium. By setting test holes of varying thicknesses on the circuit board, and performing test back-drilling on these test holes before actual back-drilling, and ensuring the remaining pile length meets the required range, back-drilling of the same thickness is performed. This allows for the determination of optimal parameters through the test holes. When back-drilling at the desired location, the back-drilling parameters that meet the requirements are referenced, ensuring that the remaining pile length is controllable and exhibits minimal fluctuation.

[0006] The present invention is achieved through the following technical solutions:

[0007] In a first aspect, the present invention proposes a method for testing back drills, characterized in that it includes:

[0008] S1, Obtain the circuit board and partition it according to the thickness of the circuit board to generate the first target partition;

[0009] S2, obtaining a copper-clad area in the first target partition, and setting at least one test drill hole in the copper-clad area;

[0010] S3, transmitting the thickness of the first target partition where the test drill hole is located to a preset prediction model, and calculating a test back-drilling depth and a probe parameter through the prediction model;

[0011] S4, back-drilling the position of the preset test drill hole according to the test back-drilling depth, and performing secondary drilling on the formed test drill hole through the probe with the probe parameter, so as to obtain a residual stub length of the test drill hole;

[0012] S5, back-drilling the pre-drill hole according to the residual stub length, wherein when the residual stub length meets a preset range, an actual back-drilling depth is calculated according to the current test back-drilling depth, and the pre-drill hole is back-drilled according to the actual back-drilling depth; when the residual stub length does not meet the range, steps S3-S5 are re-executed on another test drill hole until the residual stub length meets the condition.

[0013] By performing the following steps when back-drilling: obtaining a circuit board, and generating a first target partition according to the thickness of the circuit board; obtaining a copper-clad area in the first target partition, and setting at least one test drill hole in the copper-clad area; transmitting the thickness of the first target partition where the test drill hole is located to a preset prediction model, and calculating a test back-drilling depth and a probe parameter through the prediction model; back-drilling the test drill hole according to the test back-drilling depth, and detecting a residual stub length of the test drill hole through the probe parameter; and continuously testing until the residual stub length meets a preset range, and calculating an actual back-drilling depth for back-drilling. In this way, the test drill hole can be tested for back-drilling before back-drilling, and when the required position is back-drilled, the back-drilling parameters that meet the requirements are referred to, so that the length of the residual stub is controllable and the floating is small.

[0014] In some embodiments, in S3, the actual back-drilling depth is calculated according to the test back-drilling depth; and S3 includes:

[0015]

[0016] wherein D is the actual back-drilling depth, D ′ is the test back-drilling depth, H is the thickness of the circuit board where the pre-drill hole is located, H ′ is the thickness of the circuit board where the test drill hole is located, L is the residual stub length, and a is the drill tip ineffective depth.

[0017] Through the formula, the data ratio of the test hole can be compared to the required back-drilling position, so that when the required back-drilling position is back-drilled, the data of the test drill hole is referred to.

[0018] In some embodiments, the method for testing back drilling according to claim 3, wherein step S3 further comprises:

[0019] S31, obtaining the bakelite board, and dividing the bakelite board into second target partitions according to the first target partitions;

[0020] S32, obtaining the thickness of the second target partitions, corresponding and summing the thickness of the second target partitions and the thickness of the first target partitions to generate the board surface thickness;

[0021] S33, transmitting the board surface thickness where the test drilling hole is located to a preset prediction model, and calculating the test back drilling depth and the probe parameters through the prediction model.

[0022] By increasing the thickness reference of the bakelite board, the accuracy difference caused by the thickness of the bakelite board during back drilling is reduced.

[0023] In some embodiments, S33 further comprises:

[0024] S331, obtaining the preset range of the residual stub length, the board surface thickness, and the preset drill point invalid depth of the drilling hole size, and calculating the drop height of the drill bit.

[0025] In some embodiments, the step S4 further comprises:

[0026] S41, obtaining the hole size of the test drilling hole, and if the hole size is greater than a preset value, performing multiple drilling around the center of the preset test drilling hole position through the probe to form a guide hole;

[0027] S42, the center of the back drilling bit is aligned with the center of the test drilling hole to perform secondary drilling to form a test drilling hole.

[0028] In some embodiments, the central angle between the centers of the guide holes in the test drilling hole is 360 / n, where n is the number of guide holes.

[0029] In some embodiments, the hole diameter of the guide hole is:

[0030] r = R / 2-0.2

[0031] Wherein, r is the hole diameter of the guide hole, and R is the hole diameter of the test drilling hole.

[0032] In a second aspect, the present application provides a back drilling device, characterized in that it comprises:

[0033] A partition module is used to obtain a circuit board and divide the circuit board into first target partitions according to the thickness of the circuit board.

[0034] The drilling setting module is configured to obtain a plate drilling area in the first target partition and set at least one test drilling hole in the plate drilling area;

[0035] The data analysis module is configured to transmit the thickness of the first target partition where the test drilling hole is located to a preset prediction model, and obtain a test back drilling depth and a probe parameter through the prediction model;

[0036] The residual post detection module is configured to back drill the test drilling hole according to the test back drilling depth and detect the residual post length of the test drilling hole through the probe parameter.

[0037] In a third aspect, the present application provides a back drilling device, characterized in that it comprises a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface complete communication with each other through the communication bus;

[0038] The memory is configured to store at least one executable instruction, and the executable instruction causes the processor to perform the operations of the test back drilling method according to any one of the first aspect.

[0039] In a fourth aspect, at least one executable instruction is stored in a storage medium, and the executable instruction causes the back drilling device to perform the operations of the test back drilling method according to the first aspect when the back drilling device is running.

[0040] The test back drilling method, the back drilling device and the readable storage medium have the following beneficial effects:

[0041] By performing the following steps during back drilling: S1, obtaining a circuit board and partitioning according to the thickness of the circuit board to generate a first target partition; S2, obtaining a plate drilling area in the first target partition and setting at least one test drilling hole in the plate drilling area; S2, transmitting the thickness of the first target partition where the test drilling hole is located to a preset prediction model, and obtaining a test back drilling depth and a probe parameter through the prediction model; S4, back drilling the test drilling hole according to the test back drilling depth and detecting the residual post length of the test drilling hole through the probe parameter. In this way, the test drilling hole can be tested for back drilling before back drilling, and when the required position is back drilled, the back drilling parameters that meet the test requirements are referred to, so that the length of the residual post is controllable and the floating is small.

[0042] The above description is only a summary of the technical solutions of the embodiments of the present application, in order to more clearly understand the technical means of the embodiments of the present application, the content of the specification can be implemented, and in order to make the above and other purposes, characteristics and advantages of the embodiments of the present application more obvious and easy to understand, the specific embodiments of the present application are described as follows. BRIEF DESCRIPTION OF DRAWINGS

[0043] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0044] Figure 1 This is a flowchart of the testing back-drilling method of the present invention;

[0045] Figure 2 This is a flowchart of step S3 of the testing back-drilling method of the present invention;

[0046] Figure 3 This is a flowchart of step S4 of the testing back-drilling method of the present invention;

[0047] Figure 4 This is a cross-sectional view of the back-drilling circuit board for testing the back-drilling method of the present invention.

[0048] Figure 5 This is one embodiment of steps S41 to S42 of the testing back drill method of the present invention;

[0049] Figure 6 This is another embodiment of steps S41 to S42 of the test back drilling method of the present invention;

[0050] Figure 7 This is a frame diagram of the back drilling device of the present invention;

[0051] Figure 8 This is a frame diagram of the back drilling device of the present invention. Detailed Implementation

[0052] Exemplary embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein.

[0053] Example 1:

[0054] like Figures 1-6 As shown, this embodiment proposes a method for testing back drills, characterized by comprising:

[0055] Step S1: Obtain the circuit board and partition it according to the thickness of the circuit board to generate the first target partition;

[0056] Specifically, the circuit board is obtained. Since the multi-layer circuit board has a relatively large thickness, and each layer of the circuit board is provided with different copper layers and residual copper, the thickness of the circuit board is different on the same board surface. When back drilling is performed, the difference will cause the lengths of residual stubs to be inconsistent. Therefore, the circuit board needs to be divided into different zones according to the heights of each zone of the circuit board. The thickness of each zone can be determined by means of laser scanning and the like, and the part with a large thickness difference is formed into a first target zone.

[0057] In step S2, a drilling zone in the first target zone is obtained, and at least one test drill hole 1 is arranged in the drilling zone.

[0058] Specifically, the test drill hole 1 is arranged in the zone that needs to be drilled in the first target zone. In this way, the test drill hole 1 itself does not affect the circuit board, and the thickness of the test drill hole 1 and the required back drilling zone is consistent in the same target zone, so that the test drill hole 1 can be used as a reference.

[0059] In step S3, the thickness of the first target zone where the test drill hole 1 is located is transmitted to a preset prediction model, and the test back drilling depth and the probe parameter are obtained by calculation of the prediction model.

[0060] Specifically, the thickness of the first target zone is transmitted to the preset prediction model, which can also be a CBD system. By the thickness, the prediction model automatically calculates the back drilling depth and other parameters of back drilling, such as drill bit drop height and drill bit rotation speed. Meanwhile, the required probe parameters, including probe specification, length, and probe needle drop position, are also automatically calculated. The probe functions to further drill a hole for the center of the residual stub from the back drilling hole after the back drilling drill bit drills a window, and to contact the non-drilling layer (MNC layer) through the probe to judge the length of the residual stub. The length of the residual stub can be composed of the ineffective depth of the drill bit and the length of the probe. Since the back drilling drill bit is conical, the part of the residual stub that extends after back drilling is the ineffective depth of the drill bit.

[0061] In step S4, the back drilling head drills the test drill hole according to the test back drilling depth, and the probe drills a second hole in the test drill hole according to the probe parameter, so as to obtain the length of the residual stub of the test drill hole.

[0062] Specifically, the back drilling drill bit drills a window in the circuit board, and the probe continues to drill in the center of the back drilling hole of the window, and stops when the probe needle touches the MNC layer, and feeds back the extension data, so as to obtain the length of the residual stub. The probe usually has a small drill bit that can detect the MNC layer, and usually has multiple sizes and types. When the probe contacts the MNC layer, an electrical signal is generated to feed back the detection depth.

[0063] Step S5, back drilling the pre-drilled hole according to the residual stake length, wherein when the residual stake length meets the preset range, calculating the actual back drilling depth according to the current test back drilling depth, and back drilling the pre-drilled hole according to the actual back drilling depth; when the residual stake length does not meet the range, re-executing steps S3-S5 on another test drill hole 1 until the residual stake length meets the condition.

[0064] Specifically, the residual stake length obtained in S4 is compared with the preset range, and when the residual stake length does not meet the preset range, another test drill hole 1 can be set for back drilling test, so that the residual stake test back drilling meets the preset range.

[0065] By back drilling multiple test holes, the optimal back drilling data is obtained, so that the length of the residual stake after back drilling is shorter and controllable.

[0066] By performing the following steps during back drilling: obtaining a circuit board, and generating a first target partition according to the thickness of the circuit board; obtaining a panel area in the first target partition, and setting at least one test drill hole in the panel area; transmitting the thickness of the first target partition where the test drill hole is located to a preset prediction model, and calculating the test back drilling depth and the probe parameter by the prediction model; back drilling the test drill hole according to the test back drilling depth, and detecting the residual stake length of the test drill hole by the probe parameter; and continuously testing until the residual stake length meets the preset range, and calculating the actual back drilling depth for back drilling. In this way, the test drill hole can be tested for back drilling before back drilling, and when the residual stake length meets the required range, the back drilling parameters of the test drill hole that meets the requirements are referred to for back drilling at the required position, so that the length of the residual stake is controllable and the floating is small.

[0067] In some embodiments, as shown in Figure 4 S3, the actual back drilling depth is calculated according to the test back drilling depth; including:

[0068]

[0069] wherein D is the actual back drilling depth, D ′ is the test back drilling depth, H is the thickness of the circuit board at the position of the pre-drilled hole 2, H ′ is the thickness of the circuit board at the position of the test drill hole 1, L is the residual stake length, and a is the drill tip ineffective depth.

[0070] Specifically, the formula is derived by proportion, according to the back drilling depth and the thickness of the circuit board, and subtracting the residual pile length L, since the drill bit partially extends into the residual pile, the drill tip invalid depth a needs to be added, the actual back drilling depth D can be obtained, and the actual back drilling is performed according to the depth. Through this method, the data of the test drill hole 1 can be proportionally reduced to the desired back drilling position, and the actual back drilling is performed. Since the test drill hole 1 and the actual back drilling area are in the same first target partition, the thicknesses of the two are basically the same, through this way, the drill hole is reduced in proportion, and the small error in the same area is also reduced, so that the residual pile after the final back drilling is more controllable, and the shorter the residual pile in the test drill hole 1, the shorter the actual drilled residual pile.

[0071] Through the formula, the data of the test hole can be proportionally compared to the desired back drilling position, so that when back drilling at the desired back drilling position, the data of the test drill hole 1 is referred to.

[0072] In some embodiments, as shown in Figure 3 According to the test back drilling method of claim 3, the step S3 further comprises:

[0073] Step S31, obtaining the bakelite board, dividing the bakelite board into second target partitions according to the first target partitions;

[0074] Specifically, when back drilling the circuit board, it is fixed on the bakelite board, and the thickness of the bakelite board usually has differences, so the height also has differences, which will affect the back drilling. When calculating the thickness, the thickness of the bakelite board is calculated to make the thickness calculation more accurate. Therefore, the bakelite board is divided into corresponding second target partitions according to the first target partitions.

[0075] Step S32, obtaining the thickness of the second target partition, corresponding the thickness of the second target partition with the thickness of the first target partition and summing up to generate the board thickness;

[0076] Specifically, the thickness of the second target partition is obtained, and the obtaining method can be consistent with the first target partition obtaining method. The thickness can be obtained separately or combined. The corresponding first target partition and second target partition are corresponded and summed up to form the overall board thickness. By calculating the thickness of the bakelite board and the circuit board as a whole, the back drilling detection is more accurate.

[0077] Step S33, transmitting the board thickness where the test drill hole 1 is located to a preset prediction model, and calculating the test back drilling depth and probe parameters through the prediction model.

[0078] Specifically, by increasing the test back drilling depth and probe parameters calculated by the bakelite board, the accuracy of the final back drilling can be increased.

[0079] By increasing the thickness reference of the bakelite board, the thickness reduction of the bakelite board causes the accuracy difference of the back drilling.

[0080] In some embodiments, S33 further comprises:

[0081] S331, obtaining the preset range of the residual stub length, the thickness of the board surface, and the preset drill point invalid depth of the drill hole size, calculating the drop height of the drill bit.

[0082] Specifically, the preset range of the residual stub length is taken as 0.05mm+ / -50um, the thickness of the board surface can be obtained in step S2, and according to the required drill hole size, the preset drill point invalid depth, i.e. the depth of the drill bit buried in the residual stub, can be calculated. And through formula (1), the back drilling depth is calculated.

[0083] As shown in Figure 5 , Figure 6 In some embodiments, the step S4 further comprises:

[0084] S41, obtaining the hole size of the test drill hole, if the hole size is greater than the preset value, the probe is used to drill multiple times around the center of the preset test drill hole position to form a guide hole;

[0085] Specifically, the preset value is usually 3.5mm, that is, when the hole diameter required to be opened is greater than the preset value, the drill hole will appear during back drilling, and due to the large hole diameter, the drill bit will have a large drilling resistance, which will cause the calculated residual stub length to deviate from the actual value, resulting in the residual stub length being uncontrollable, that is, when the test back drilling depth is determined, the actual back drilling depth calculated by the current test back drilling depth will still have a large difference from the calculated theoretical value, resulting in the residual stub length being uncontrollable. Therefore, the probe is pre-rotated to form a guide hole, thereby reducing the problem of large hole diameter back drilling of the drill bit with large drilling resistance, so that the residual stub length after back drilling is close to the required residual stub length, and the residual stub length meets the preset range.

[0086] S42, the center of the back drilling bit is aligned with the center of the test drill hole to drill twice to form a test drill hole.

[0087] Specifically, the back drilling bit drills twice through the center of the test drill hole, and due to the presence of the guide hole, the drill bit has small drilling resistance during large-diameter back drilling, so that the finally generated residual stub length meets the preset range.

[0088] In some embodiments, the center angle between the centers of the guide holes of the test drill hole is 360 / n, where n is the number of guide holes.

[0089] Specifically, n can be 3 or 4, i.e. the central angle of the circle is 120° or 90°, to uniformly reduce the drilling resistance of the drill bit when back drilling.

[0090] In some embodiments, the diameter of the guide hole is:

[0091] r = R / 2 - 0.2 (2)

[0092] wherein r is the diameter of the guide hole, and R is the diameter of the test drill hole.

[0093] Specifically, the distance from the guide hole to the edge of the test drill hole is usually 0.1 mm, and the length of the diameter is calculated by formula (2).

[0094] Embodiment 2:

[0095] As shown in Figure 7 , the embodiment provides a back drilling device, characterized in that it comprises:

[0096] The partition module 101 is configured to acquire a circuit board and partition the circuit board according to the thickness of the circuit board to generate a first target partition, so that the partition module 101 performs step S1.

[0097] The drill hole setting module 102 is configured to acquire a board area in the first target partition and set at least one test drill hole 1 in the board area, so that the drill hole setting module 102 performs step S2, thereby automatically setting the test drill hole 1 after the partition in step S1.

[0098] The data analysis module 103 is configured to transmit the thickness of the first target partition where the test drill hole 1 is located to a preset prediction model and calculate the test back drilling depth and the probe parameter through the prediction model, so that the data analysis module 103 performs step S3, thereby calculating the test back drilling depth and the probe parameter by using the thickness of the test drill hole 1 obtained in step S3.

[0099] The stub detection module 104 is configured to back drill the test drill hole 1 according to the test back drilling depth and detect the stub length of the test drill hole 1 through the probe parameter, so that the stub detection module 104 performs step S4 and obtains the stub length.

[0100] Embodiment 3:

[0101] As shown in Figure 8 , the embodiment provides a structural diagram of an embodiment of the back drilling device of the present application, and the specific embodiment of the present application does not limit the specific implementation of the back drilling device.

[0102] The back drilling device can include a processor 202, a communications interface 204, a memory 206, and a communications bus 208.

[0103] The processor 202, the communications interface 204, and the memory 206 can communicate with each other through the communications bus 208. The communications interface 204 can be configured to communicate with network elements such as clients or other servers. The processor 202 can be configured to execute the program 210, and can perform the steps in the method for testing back drilling as described in Embodiment 1.

[0104] In particular, the program 210 can include program codes including computer executable instructions.

[0105] The processor 202 can be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present application. The one or more processors included in the back drilling device can be of the same type, such as one or more CPUs, or can be of different types, such as one or more CPUs and one or more ASICs.

[0106] The memory 206 can be configured to store the program 210. The memory 206 can include a high speed RAM memory, and can further include a non-volatile memory such as at least one disk memory.

[0107] Embodiment 4

[0108] The embodiments of the present application provide a computer readable storage medium storing at least one executable instruction, which, when executed on a back drilling device, causes the back drilling device to perform the method for testing back drilling in any of the method embodiments described above.

[0109] The algorithms and displays presented herein are not inherently related to any particular computer, virtual system, or other apparatus. Furthermore, embodiments of the present application are not described with reference to any particular programming language.

[0110] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application can be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been described in detail in order to avoid obscuring the understanding of this description. Like reference numerals refer to like elements throughout. Similarly, while operations can be depicted in the drawings in a particular order, this should not be understood as requiring or

[0111] It is understood by those skilled in the art that modules in the apparatus of the embodiments can be adapted and placed in one or more apparatuses other than the embodiments. Modules or units or components in the embodiments can be combined into one module or unit or component, and further can be divided into multiple sub-modules or sub-units or sub-components. Except that at least some of such features and / or processes or units are mutually exclusive.

[0112] It is noted that the foregoing examples have been provided merely for the purpose of explanation and are in no way to be construed as limiting of the present application. While the application has been described with reference to preferred embodiments, it is understood that the words which have been used herein are words of description, and that changes can be made within the scope and spirit of the application. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word comprising does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application can be implemented by means of both hardware and software, and any combinations thereof. In a unit claim, any reference signs placed between parentheses shall not be construed as limiting the claim. The use of the word "about" followed by a value and / or a unit of measure to describe a criterion is intended to convey that a criterion can not be exactly equal to the value and / or unit of measure. The use of the word "at least" followed by a number is meant to convey "greater than or equal to" that number (inclusive of the number). The word "plurality" shall mean "two or more". The word "another" is used in the broadest sense to mean "one or more".

Claims

1. A method for testing back drills, characterized in that, include: S1, Obtain the circuit board and partition it according to the thickness of the circuit board to generate the first target partition; S2, Obtain the sprue area within the first target partition, and set at least one test hole within the sprue area; S3, the thickness of the first target zone where the test borehole is located is transmitted to the preset prediction model, and the test back drill depth and probe parameters are calculated through the prediction model; S4, according to the test back-drilling depth, the back-drilling bit performs back-drilling at the position of the preset test hole, and the formed test hole is drilled a second time with the probe parameters through the probe, thereby obtaining the residual pile length of the test hole. S5, back-drilling is performed on the pre-drilled hole according to the length of the residual pile. If the length of the residual pile meets the preset range, the actual back-drilling depth is calculated based on the current test back-drilling depth, and the pre-drilled hole is back-drilled according to the actual back-drilling depth. If the length of the residual pile does not meet the range, steps S3-S5 are repeated on another test hole until the length of the residual pile meets the condition.

2. The method for testing back drills according to claim 1, characterized in that, The actual back-drilling depth is calculated based on the test back-drilling depth in S3. include: Where D is the actual back drill depth, D ′ To test the back-drilling depth, H represents the thickness of the circuit board at the location of the pre-drilled hole. ′ To test the thickness of the circuit board at the location of the drill hole, L is the length of the residual pile, and a is the ineffective depth of the drill tip.

3. The method for testing back drills according to claim 2, characterized in that, Step S3 further includes: S31, Obtain the bakelite board and divide the bakelite board into a second target partition according to the first target partition; S32, obtain the thickness of the second target partition, match the thickness of the second target partition with the thickness of the first target partition and sum them to generate the plate thickness; S33, the thickness of the plate surface where the test hole is located is transmitted to the preset prediction model, and the test back drilling depth and probe parameters are calculated through the prediction model.

4. The back drilling method according to claim 3, characterized in that, S33 further includes: S331, obtain the preset range of the residual pile length, the plate thickness, and the preset invalid depth of the drill tip for the borehole size, and calculate the descent height of the drill bit.

5. The method for testing back drills according to claim 1, characterized in that, Step S4 further includes: S41, obtain the diameter of the test borehole. If the diameter is greater than a preset value, drill multiple times around the preset test borehole center using the probe to form a guide hole. S42, the center of the back drill bit is aligned with the center of the test hole location for secondary drilling to form the test hole.

6. The method for testing back drills according to claim 5, characterized in that, The central angle between the radius of the test borehole and the center of the guide hole is 360 / n, where n is the number of guide holes.

7. The method for testing back drills according to claim 5, characterized in that, The diameter of the guide hole is: r=R / 2-0.2 Where r is the diameter of the guide hole and R is the diameter of the test borehole.

8. A back-drilling device, characterized in that, include: The partitioning module is used to acquire the circuit board and partition it according to the thickness of the circuit board to generate the first target partition; A drilling setting module is used to obtain the sprue area within the first target partition and set at least one test drill hole within the sprue area. The data analysis module is used to transmit the thickness of the first target zone where the test borehole is located to a preset prediction model, and calculate the test back drill depth and probe parameters through the prediction model. The residual pile detection module is used to back-drill the test borehole according to the test back-drilling depth and to detect the residual pile length of the test borehole through probe parameters.

9. A back drilling device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store at least one executable instruction that causes the processor to perform the operation of the test back-drilling method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The storage medium stores at least one executable instruction, which, when executed on the back drilling equipment / device, causes the back drilling equipment / device to perform the operation of the test back drilling method as described in any one of claims 1-7.