Method of inspecting display device and electronic device including display device

Abstract

The invention relates to a method of inspecting a display device and an electronic device including the display device. A method of inspecting a display device includes setting an inspection target display device including a substrate including a first surface and a second surface, and first and second sub-pixels formed on the first surface. The method includes performing an etching process in a direction from the second surface toward the first surface and performing an inspection process on a first sub-pixel and a second sub-pixel, where the first sub-pixel may include a first anode electrode and a first contactor is electrically connected to the first anode electrode, and wherein the second sub-pixel may include a second anode electrode and the second contactor is electrically connected to the second anode electrode. Performing the etching process may include exposing the first contactor and the second contactor, and performing the inspection process may include electrically contacting the first probe with the first contactor and electrically contacting the second probe with the second contactor.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to and all benefits arising therefrom of Korean Patent Application No. 10-2024-0058579, filed on May 2, 2024, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present invention relates to display devices, and more particularly to methods for inspecting display devices and electronic devices including display devices. Background Technology

[0004] With increasing interest in information display, research and development of display devices has been ongoing.

[0005] The display device may include sub-pixels, each of which includes an organic light-emitting diode (OLED). Due to leakage current (e.g., lateral leakage) between sub-pixels, there may be a risk of crosstalk between electrical signals. Summary of the Invention

[0006] The present invention can provide a method for an inspection display device in which information about leakage current can be clearly identified, and an electronic device including the display device.

[0007] In an embodiment, a method for inspecting a display device is provided, and the method includes setting a target display device for inspection. The target display device includes a substrate comprising a first surface and a second surface, and a first sub-pixel and a second sub-pixel formed on the first surface of the substrate and disposed adjacent to each other. The method further includes performing an etching process in a direction from the second surface toward the first surface and performing an inspection process on the first sub-pixel and the second sub-pixel, wherein the first sub-pixel may include a first anode electrode and a first contactor electrically connected to the first anode electrode, and the second sub-pixel may include a second anode electrode and a second contactor electrically connected to the second anode electrode. Performing the etching process may include exposing the first contactor and the second contactor, and performing the inspection process may include making a first probe electrically contact the first contactor and making a second probe electrically contact the second contactor.

[0008] In an embodiment, the method may further include performing a pretreatment process on the substrate prior to performing the etching process, wherein performing the pretreatment process may include reducing the thickness of the substrate.

[0009] In an implementation, the pretreatment process may include a polishing process or an etching process.

[0010] In some embodiments, the substrate may include silicon.

[0011] In one embodiment, after performing a pretreatment process, the substrate may have a thickness in the range of about 100 μm to about 200 μm.

[0012] In one embodiment, the target display device to be inspected may further include a buffer layer on a substrate and an interlayer conductive layer on the buffer layer. Performing an etching process may include etching at least a portion of each of the substrate, the buffer layer, and the interlayer conductive layer.

[0013] In one embodiment, performing the etching process may include performing a first etching process, wherein performing the first etching process may include forming a cavity in the substrate such that the buffer layer is not exposed.

[0014] In an implementation, the depth of the cavity can be in the range of about 50 μm to about 90 μm.

[0015] In an embodiment, performing the etching process may further include performing a second etching process, wherein performing the second etching process may include removing at least a portion of each of the substrate and the buffer layer, such that at least a portion of the interlayer conductive layer is exposed.

[0016] In an embodiment, performing the etching process may further include performing a third etching process, wherein performing the third etching process may include removing at least a portion of the interlayer conductive layer, thereby exposing the first contactor and the second contactor.

[0017] In one embodiment, the interlayer conductive layer may include a first conductive layer, a second conductive layer, and a third conductive layer stacked sequentially. Performing a third etching process may further include etching the first conductive layer, the second conductive layer, and the third conductive layer.

[0018] In an implementation, each of the first probe and the second probe may include a nanoprobe or a microprobe.

[0019] In one embodiment, each of the first probe and the second probe may have a thickness smaller than that of each of the first contactor and the second contactor.

[0020] In an implementation, each of the first and second probes may include a tip having a size in the range of about 5 nm to about 15 nm.

[0021] In an implementation, the inspection process may further include determining information related to the leakage current between the first sub-pixel and the second sub-pixel based on quantitative information obtained by the first probe and the second probe.

[0022] In one embodiment, the first sub-pixel may include a first light-emitting element, which includes a first anode electrode, and the second sub-pixel may include a second light-emitting element, which includes a second anode electrode. Performing the inspection process may further include measuring the magnitude of a first current applied to the first light-emitting element and measuring the magnitude of a second current applied to the second light-emitting element.

[0023] In an implementation, the quantitative information may include the magnitude of the first current and the magnitude of the second current.

[0024] In one embodiment, the target display device can be configured to emit light in a direction from the second surface toward the first surface.

[0025] In one embodiment, the target display device may further include an emitting structure disposed on the first anode electrode and the second anode electrode, wherein the emitting structure is oriented in a direction from the second surface toward the first surface. Performing an etching process may include exposing the first contactor and the second contactor without removing the emitting structure.

[0026] In some implementations, the transmitting structure may have a series structure.

[0027] In one embodiment, the electronic device may include: a processor configured to provide input image data; an inspection target display device configured to display an image based on the input image data; and a power supply configured to provide power to the inspection target display device. Attached Figure Description

[0028] The above and other features of the invention will become more apparent from the description of embodiments of the invention in more detail with reference to the accompanying drawings, in which:

[0029] Figure 1 This is a schematic plan view showing an inspection target display device according to an embodiment.

[0030] Figure 2 This is a flowchart illustrating a display device inspection method according to an embodiment.

[0031] Figure 3 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0032] Figure 4 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0033] Figure 5 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0034] Figure 6 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0035] Figure 7 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0036] Figure 8 This is a schematic cross-sectional view of the target display device being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0037] Figure 9 This is a schematic block diagram illustrating an electronic device including a display device according to an embodiment.

[0038] Figure 10 It is shown Figure 9 A schematic diagram illustrating an example of an electronic device implemented as a smartphone.

[0039] Figure 11 It is shown Figure 9 A schematic diagram illustrating an example of an electronic device implemented as a tablet computer. Detailed Implementation

[0040] Because this disclosure allows for various variations and multiple implementations, specific embodiments will be shown in the accompanying drawings and described in detail in the written description. However, this is not intended to limit the invention to a particular mode of practice, and it should be understood that all changes, equivalents, and substitutions that do not depart from the spirit and scope of the invention are included in this disclosure.

[0041] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element discussed below may be referred to as a second element without departing from the teachings of the invention. Similarly, a second element may also be referred to as a first element. In this disclosure, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise.

[0042] It will also be understood that, when used in this disclosure, the terms "comprising," "including," "having," etc., specify the presence of the stated features, integrals, steps, operations, elements, components, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or combinations thereof. Furthermore, when a first portion, such as a layer, film, region, or plate, is disposed on a second portion, the first portion may not only be directly disposed on the second portion, but a third portion may be disposed between them. Furthermore, when it is stated that a first portion, such as a layer, film, region, or plate, is formed on a second portion, the surface of the second portion on which the first portion forms is not limited to the upper surface of the second portion, but may include other surfaces of the second portion, such as side surfaces or lower surfaces. Conversely, when a first portion, such as a layer, film, region, or plate, is below a second portion, the first portion may not only be directly below the second portion, but a third portion may be disposed between them.

[0043] Various embodiments of the present invention relate to methods for inspecting display devices and electronic devices including display devices. Hereinafter, methods for inspecting display devices and electronic devices including display devices according to embodiments will be described with reference to the accompanying drawings.

[0044] Figure 1 This is a schematic plan view showing the inspection target display device TD according to an embodiment.

[0045] In the implementation and reference Figure 1 The inspection target display device TD can be configured, wherein the inspection target display device TD may include a substrate SUB and a first sub-pixel SP1 and a second sub-pixel SP2 disposed (e.g., formed) on the substrate SUB.

[0046] In an implementation, the target display device TD to be inspected can be a target device to which an inspection process is performed based on the method for inspecting a display device according to the implementation.

[0047] In some embodiments, the target display device TD can be a sample device provided for the display device inspection method, or the target display device TD can be a display device configured to operate normally after the display device inspection method is performed. However, the present invention is not limited to these specific embodiments.

[0048] In one embodiment, the substrate SUB can form the base surface of the target display device TD, wherein the substrate SUB can be a rigid or flexible substrate or film. For example, the substrate SUB can include a glass material. In another embodiment, the substrate SUB can include a silicon material. In yet another embodiment, the substrate SUB can include polyimide. However, the present invention is not limited to the above embodiments.

[0049] In an implementation, the target inspection display device TD can be configured to emit light. For example, the target inspection display device TD may include a first sub-pixel SP1 and a second sub-pixel SP2 respectively on a substrate SUB, wherein sub-pixels SP1 and SP2 may be arranged adjacent to each other. Each of the sub-pixels SP1 and SP2 may emit light with a specific wavelength.

[0050] For ease of explanation, Figure 1 Only subpixels SP1 and SP2 are shown in the image, but the inspection target display device TD may include red subpixels, green subpixels and blue subpixels, and any two adjacent subpixels of each subpixel may be defined as the first subpixel SP1 and the second subpixel SP2 respectively.

[0051] In this embodiment, the first sub-pixel SP1 and the second sub-pixel SP2 may be arranged adjacent to each other in the first direction DR1. However, this disclosure is not limited to the above example. Sub-pixels SP1 and SP2 may also be arranged adjacent to each other in the second direction DR2.

[0052] In an embodiment, the first direction DR1 and the second direction DR2 can define a plane on which the substrate SUB is disposed. In this disclosure, the third direction DR3 can correspond to the thickness direction of the substrate SUB and can correspond to the direction of light output when inspecting the light emitted by the target display device TD.

[0053] In the following text, reference will be made to Figures 2 to 7 This describes a display device inspection method for inspecting a target display device TD according to an embodiment.

[0054] Figure 2 This is a flowchart illustrating a display device inspection method according to an embodiment.

[0055] Figures 3 to 8 This is a schematic cross-sectional view of the target display device TD being inspected, illustrating a method for inspecting a display device through process steps according to an embodiment.

[0056] In the implementation and reference Figure 2 The display device inspection method may include a step S50 of setting the target display device for inspection, a step S100 of performing a pretreatment process on the substrate, a step S200 of performing a first etching process, a step S300 of performing a second etching process, a step S400 of performing a third etching process, and a step S500 of performing an inspection process. In the embodiments and with reference to... Figure 2 and Figure 3 In step S50 of setting up the inspection target display device, the inspection target display device TD comprising multiple layers can be set on the substrate SUB.

[0057] In an embodiment, the target display device TD may include a substrate SUB, a buffer layer BFL, an interlayer conductive layer ICL, an insulating layer INS, separate first contactors CNT1 and second contactors CNT2, separate first anode electrodes AE1 and second anode electrodes AE2, a pixel defining layer PDL, an emission structure EMS, a cathode electrode CE, and an encapsulation layer TFE.

[0058] In one embodiment, the substrate SUB may include a first surface S1 and a second surface S2. Multiple layers on the substrate SUB may be disposed on the first surface S1 of the substrate SUB. The first surface S1 may be the front surface of the substrate SUB. The second surface S2 may be the rear surface of the substrate SUB. In one embodiment, the target inspection display device TD may be configured to emit light in a direction from the second surface S2 toward the first surface S1.

[0059] In one embodiment, the buffer layer BFL may be disposed between the substrate SUB and the semiconductor portion included in the inspection target display device TD, and may include an inorganic material such as silicon oxide.

[0060] In one embodiment, the interlayer conductive layer ICL can be disposed on the buffer layer BFL and can be electrically connected to the pixel circuit in another part of the inspection target display device TD.

[0061] The interlayer conductive layer (ICL) can include various conductive materials. For example, in one embodiment, the ICL can include conductive materials such as titanium (Ti), copper (Cu), and aluminum (Al). However, the invention is not limited to the above examples. The ICL can also include a multilayer structure. For example, the ICL can include a first conductive layer on the buffer layer BFL, a second conductive layer on the first conductive layer, and a third conductive layer on the second conductive layer.

[0062] In some embodiments, the first conductive layer may include titanium (Ti), the second conductive layer may include aluminum (Al) or copper (Cu), and the third conductive layer may include titanium (Ti). However, the present invention is not limited to the embodiments described above. In some embodiments, the insulating layer INS may be disposed on the interlayer conductive layer ICL, wherein the insulating layer INS may include various insulating materials. For example, in some embodiments, the insulating layer INS may include inorganic materials such as silicon oxide. However, the present invention is not limited to the embodiments described above.

[0063] In this embodiment, contactors CNT1 and CNT2 may pass through the insulating layer INS. Contactors CNT1 and CNT2 may be conductive structures formed using the same process as the anode electrodes AE1 and AE2, and may be electrically connected to the interlayer conductive layer ICL.

[0064] In this embodiment, anode electrodes AE1 and AE2 can be disposed on the insulating layer INS and electrically connected to the interlayer conductive layer ICL via contactors CNT1 and CNT2, respectively. For example, the first anode electrode AE1 can be electrically connected to a first portion of the interlayer conductive layer ICL via the first contactor CNT1, and the second anode electrode AE2 can be electrically connected to a second portion of the interlayer conductive layer ICL via the second contactor CNT2. For ease of explanation, in Figure 3 In the diagram, the first and second portions of the interlayer conductive layer (ICL) are shown as being continuously arranged, but the first and second portions of the ICL can be separated from each other.

[0065] In some embodiments, the anode electrodes AE1 and AE2 may comprise various conductive materials. For example, the anode electrodes AE1 and AE2 may comprise transparent conductive materials. In other embodiments, the anode electrodes AE1 and AE2 may comprise opaque conductive materials capable of reflecting light. For example, the anode electrodes AE1 and AE2 may comprise one or more materials selected from the group consisting of titanium nitride (TiN), silver (Ag), and aluminum (Al). However, the present invention is not limited to the embodiments described above.

[0066] In one embodiment, the pixel defining layer (PDL) may partially cover portions of the anode electrodes AE1 and AE2 while exposing other portions of the anode electrodes AE1 and AE2. The PDL may comprise inorganic materials such as silicon oxide and silicon nitride. However, the invention is not limited to the embodiments described above.

[0067] In one embodiment, the emission structure EMS can be disposed on the anode electrodes AE1 and AE2 in a direction from the second surface S2 to the first surface S1. In another embodiment, the emission structure EMS can be disposed throughout the sub-pixels SP1 and SP2 and can include multiple layers. For example, the emission structure EMS can include emission units, which include a hole transport component, an emission component (or a light-emitting layer), and an electron transport component. Each of the layers forming the emission structure EMS can include an organic material, and in another embodiment, it can also include inorganic materials such as metal-containing compounds or quantum dots.

[0068] In an implementation, the emitter structure EMS may include a series structure. For example, the emitter structure EMS may have a structure in which a first emitter unit, a first charge generation layer, a second emitter unit, a second charge generation layer, and a third emitter unit are stacked sequentially.

[0069] In one embodiment, the cathode electrode CE can be disposed on the emission structure EMS and oriented in a direction from the second surface S2 toward the first surface S1. The cathode electrode CE can be a common electrode for sub-pixels SP1 and SP2. In another embodiment, the cathode electrode CE can include a transparent conductive material and can be a conductive film comprising a conductive material such as silver (Ag). However, the present invention is not limited to the embodiments described above.

[0070] In one embodiment, a first anode electrode AE1, a portion of the emitting structure EMS, and a portion of the cathode electrode CE can form a first light-emitting element LD1 included in the first sub-pixel SP1. A second anode electrode AE2, another portion of the emitting structure EMS, and another portion of the cathode electrode CE can form a second light-emitting element LD2 included in the second sub-pixel SP2.

[0071] In one embodiment, the encapsulation layer TFE can be disposed on the cathode electrode CE, wherein the encapsulation layer TFE can encapsulate the layer disposed beneath it. The encapsulation layer TFE can include various inorganic or organic materials. In another embodiment, the encapsulation layer TFE can have a multilayer structure.

[0072] In the implementation and reference Figure 2 and Figure 4 In step S100, a pretreatment process can be applied to the second surface S2 of the substrate SUB.

[0073] In one embodiment, in the current step S100, the pretreatment process may be a polishing process of the second surface S2 of the substrate SUB. In another embodiment, the pretreatment process may be an etching process of the second surface S2 of the substrate SUB.

[0074] In one embodiment, at least a portion of the substrate SUB can be removed in the current step S100, thereby allowing the substrate SUB to have a relatively small thickness. For example, in one embodiment, the substrate SUB can have a thickness of about 200 μm or less as the current step S100 is performed. For example, in another embodiment, the substrate SUB can have a thickness in the range of about 100 μm to about 200 μm as the current step S100 is performed.

[0075] In this embodiment, after performing step S100 of the pretreatment process on the substrate, multiple etching processes can be performed. The multiple etching processes performed after step S100 of the pretreatment process on the substrate can be performed in a direction from the second surface S2 toward the first surface S1. In this embodiment, each of the multiple etching processes can be a dry etching process.

[0076] According to the implementation, the multiple etching processes following the pretreatment process of the substrate in step S100 may include the step of exposing contactors CNT1 and CNT2 to perform an inspection process on the target display device TD.

[0077] In the following description, for ease of explanation, the following description will be provided based on an implementation of multiple etching processes for exposing contactors CNT1 and CNT2, including a first etching process through a third etching process.

[0078] In the implementation and reference Figure 2 and Figure 5 In step S200 of performing the first etching process, at least a portion of the substrate SUB can be etched.

[0079] In this implementation, in the current step S200, a portion of the substrate SUB in the inspection target area ISA can be removed, thereby forming a cavity in the substrate SUB. In the current step S200, the buffer layer BFL may not be exposed, and the depth DEP of the area (e.g., cavity) formed in the inspection target area ISA by removing a portion of the substrate SUB can be in the range of about 50 μm to about 90 μm.

[0080] In the implementation and reference Figure 2 and Figure 6 In step S300 of the second etching process, at least a portion of the substrate SUB and the buffer layer BFL can be etched.

[0081] In the current step S300, the substrate SUB and buffer layer BFL in the inspection target area ISA can be etched. Therefore, at least a portion of the interlayer conductive layer ICL in the inspection target area ISA can be exposed.

[0082] In the implementation and reference Figure 2 and Figure 7 In step S400 of the third etching process, at least a portion of the interlayer conductive layer ICL can be etched.

[0083] In the current step S400, the interlayer conductive layer ICL in the inspection target area ISA can be etched. Therefore, contactors CNT1 and CNT2 in the inspection target area ISA can be exposed.

[0084] In an implementation, the target area ISA to be inspected may be the area in which contactors CNT1 and CNT2 are installed, and may be the area in which probe PRB is provided (see [link]). Figure 8 (area).

[0085] In some embodiments, the third etching process may include multiple etching steps. For example, if the interlayer conductive layer (ICL) comprises a first conductive layer to a third conductive layer stacked sequentially, the third etching process may include the steps of etching the first conductive layer and the second conductive layer, as well as the step of etching the third conductive layer.

[0086] In the implementation and reference Figure 2 and Figure 8 In step S500 of the inspection process, a probe PRB can be used to perform an inspection process on sub-pixels SP1 and SP2.

[0087] In the current step S500, the probe PRB can be positioned in the inspection target area ISA and can electrically contact the exposed first contactor CNT1 and second contactor CNT2 respectively. For example, the probe PRB may include a first probe PRB1 and a second probe PRB2, wherein the first probe PRB1 can be electrically connected to the first contactor CNT1 and the second probe PRB2 can be electrically connected to the second contactor CNT2.

[0088] In embodiments, each of the probe PRBs may include a tip and may be a nanoprobe or a microprobe. Each probe PRB may have a thickness smaller than that of contactors CNT1 and CNT2. In embodiments, the size (e.g., diameter) of the tip of each probe PRB may be about 15 nm or smaller. For example, in embodiments, the size (e.g., diameter) of the tip of each probe PRB may be in the range of about 5 nm to about 15 nm. However, the invention is not limited to the embodiments described above.

[0089] In the current step S500, the probe PRB can be used to measure the magnitude of the current flowing to the light-emitting elements LD1 and LD2 when sub-pixels SP1 and SP2 emit light. For example, the probe PRB can be included in a current measuring device. The current flowing to the light-emitting elements LD1 and LD2 can be applied to the probe PRB. Based on information related to the magnitude of the current applied to the probe PRB, the current measuring device can determine the magnitude of the current flowing to the first light-emitting element LD1 and the second light-emitting element LD2.

[0090] According to one embodiment, since the first probe PRB1 can be electrically connected to the first anode electrode AE1 via the first contactor CNT1, the magnitude of the current applied to the first light-emitting element LD1 can be measured when the first sub-pixel SP1 and the second sub-pixel SP2 emit light. According to another embodiment, since the second probe PRB2 can be electrically connected to the second anode electrode AE2 via the second contactor CNT2, the magnitude of the current applied to the second light-emitting element LD2 can be measured when the first sub-pixel SP1 and the second sub-pixel SP2 emit light.

[0091] In this implementation, the magnitude of the leakage current between sub-pixels SP1 and SP2 can be quantitatively measured based on the determined magnitude of the current flowing to the light-emitting elements LD1 and LD2. For example, the magnitude of the leakage current can be determined by comparing the magnitude of the current in the first light-emitting element LD1 measured using the first probe PRB1 with the expected magnitude of the current in the first light-emitting element LD1 in the absence of leakage current between sub-pixels SP1 and SP2. Similarly, the magnitude of the leakage current can be determined by comparing the magnitude of the current in the second light-emitting element LD2 measured using the second probe PRB2 with the expected magnitude of the current in the second light-emitting element LD2 in the absence of leakage current between sub-pixels SP1 and SP2.

[0092] According to the implementation method, as described above, since information related to the leakage current between the adjacent sub-pixels SP1 and SP2 can be quantitatively determined, information about the leakage current can be clearly identified. For example, the magnitude of the first current measured by the first probe PRB1 through the first contactor CNT1 and the magnitude of the second current measured by the second probe PRB2 through the second contactor CNT2 can correspond to quantitative information. Based on the magnitudes of the first and second currents, information about the leakage current can be thoroughly analyzed.

[0093] In an implementation, in order to measure the current of the first light-emitting element LD1 and the second light-emitting element LD2, it may be necessary to contact probes PRB1 and PRB2 with different electrical paths.

[0094] In this implementation, to obtain information related to the current flowing to the light-emitting elements LD1 and LD2, the layer disposed beneath the contactors CNT1 and CNT2 can be exposed. In this case, information related to the current flowing to the light-emitting elements LD1 and LD2 can be obtained without damaging the emitting structure EMS.

[0095] Experimentally, leakage current can be affected by the structure of the common layer between adjacent sub-pixels SP1 and SP2. Therefore, during inspection processes, if probes PRB1 and PRB2 are in direct contact with the common layer of the emission structure EMS (e.g., hole transport components, charge generation layer, etc.), it could be interpreted as external factors other than the operation of light-emitting elements LD1 and LD2 influencing the leakage current. Conversely, according to the embodiment, since the layer beneath contactors CNT1 and CNT2 is exposed, probes PRB1 and PRB2 can acquire information related to the current flowing to light-emitting elements LD1 and LD2, thereby mitigating the aforementioned risk.

[0096] Various embodiments of the present invention can provide a method for an inspection display device in which information about leakage current can be clearly identified.

[0097] In the following, an electronic device 1000 including a target inspection display device TD according to an embodiment will be described.

[0098] Figure 9 This is a schematic block diagram illustrating an electronic device 1000 including a display device according to an embodiment. Figure 10 It is shown Figure 9 A schematic diagram illustrating an example of an electronic device 1000 implemented as a smartphone. Figure 11 It is shown Figure 9 A schematic diagram illustrating an example of an electronic device 1000 implemented as a tablet computer.

[0099] refer to Figures 9 to 11 The electronic device 1000 may include a processor 1010, a memory device 1020, a storage device 1030, an input / output (I / O) device 1040, a power supply 1050, and a display device 1060. The display device 1060 may be... Figure 1 The inspection target display device TD. The electronic device 1000 may also include various ports for communicating with video cards, sound cards, memory cards, USB devices, or other systems. In embodiments, such as Figure 10 As shown, the electronic device 1000 can be a smartphone. In an implementation, as... Figure 11 As shown, electronic device 1000 may be a tablet computer. However, the above example is illustrative, and electronic device 1000 is not necessarily limited to the above example. For example, electronic device 1000 may be a cellular phone, video phone, smart tablet, smartwatch, navigation device for vehicle, computer monitor, laptop computer, head-mounted display device, etc.

[0100] Processor 1010 can perform specific calculations or tasks. In embodiments, processor 1010 may include at least one of a central processing unit, an application processor, a graphics processing unit, a communication processor, an image signal processor, a controller, etc. Processor 1010 can be connected to other components via an address bus, a control bus, a data bus, etc. In embodiments, processor 1010 may be connected to an expansion bus such as a peripheral component interconnect (PCI) bus. In embodiments, processor 1010 can provide input image data to display device 1060. Therefore, display device 1060 can display an image based on the input image data provided from processor 1010.

[0101] The memory device 1020 can store data required for performing operations of the electronic device 1000. The memory device 1020 can be used as working memory and / or buffer memory for the processor 1010. For example, the memory device 1020 may include one or more volatile memory devices such as dynamic random access memory (DRAM) devices, static random access memory (SRAM) devices, and mobile DRAM devices.

[0102] Storage device 1030 can store data in response to control signals or data from processor 1010. Storage device 1030 may include one or more non-volatile memories to retain data even when electronic device 1000 is powered off. In some embodiments, storage device 1030 may include solid-state drive (SSD), hard disk drive (HDD), CD-ROM, etc.

[0103] I / O device 1040 may include input devices such as a keyboard, keypad, touchpad, touch screen, and mouse, as well as output devices such as speakers and printers. In some embodiments, display device 1060 may be integrated with I / O device 1040.

[0104] Power supply 1050 can provide the power required to operate electronic device 1000. For example, power supply 1050 may include a power management integrated circuit (PMIC). In one embodiment, power supply 1050 may provide power to display device 1060.

[0105] The display device 1060 can display an image in response to image data signals and / or control signals from the processor 1010. The display device 1060 can be connected to other components via a bus or other communication link.

[0106] Exemplary embodiments have been disclosed herein, and although specific terminology has been used, it is used and interpreted in a general and descriptive sense only and not for limiting purposes. In some instances, as will be apparent to those skilled in the art, unless otherwise specifically indicated, features, characteristics, and / or elements described in connection with particular embodiments may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention. Thus, while various embodiments have been described above, those skilled in the art will understand that various modifications, additions, and substitutions are possible without departing from the scope and spirit of the invention. Therefore, the embodiments disclosed in this specification are for illustrative purposes only and are not intended to limit the technical spirit of the invention.

Claims

1. A method for inspecting a display device, comprising: The inspection target display device includes a substrate comprising a first surface and a second surface, and a first sub-pixel and a second sub-pixel respectively formed on the first surface of the substrate and disposed adjacent to each other. An etching process is performed in the direction from the second surface toward the first surface; as well as An inspection process is performed on the first sub-pixel and the second sub-pixel. Wherein, the first sub-pixel includes a first anode electrode and a first contactor is electrically connected to the first anode electrode, and wherein the second sub-pixel includes a second anode electrode and a second contactor is electrically connected to the second anode electrode. The etching process includes exposing the first contactor and the second contactor, and The inspection process includes making a first probe electrically contact the first contactor and making a second probe electrically contact the second contactor.

2. The method of claim 1, further comprising performing a pretreatment process on the substrate prior to performing the etching process. in, Performing the pretreatment process includes reducing the thickness of the substrate, and The pretreatment process includes polishing or etching.

3. The method according to claim 2, wherein, The substrate comprises silicon.

4. The method according to claim 2, wherein, After the pretreatment process is performed, the substrate has a thickness of 100 μm to 200 μm.

5. The method according to claim 1, in, The inspection target display device further includes a buffer layer disposed on the substrate and an interlayer conductive layer disposed on the buffer layer. The etching process further includes etching at least a portion of each of the substrate, the buffer layer, and the interlayer conductive layer. The etching process includes performing a first etching process. The first etching process includes forming a cavity in the substrate so that the buffer layer is not exposed, and The depth of the cavity is in the range of 50 μm to 90 μm.

6. The method according to claim 5, in, Performing the etching process further includes performing a second etching process. The second etching process includes removing at least a portion of each of the substrate and the buffer layer, thereby exposing at least a portion of the interlayer conductive layer. The etching process further includes performing a third etching process. The third etching process includes removing at least a portion of the interlayer conductive layer, thereby exposing the first contactor and the second contactor. The interlayer conductive layer comprises a first conductive layer, a second conductive layer, and a third conductive layer stacked sequentially, and The third etching process further includes etching the first conductive layer, the second conductive layer, and the third conductive layer.

7. The method according to claim 1, wherein, Each of the first probe and the second probe includes a nanoprobe or a microprobe. Wherein, each of the first probe and the second probe has a thickness smaller than the thickness of each of the first contactor and the second contactor, and Each of the first probe and the second probe includes a tip having a size in the range of 5 nm to 15 nm.

8. The method according to claim 1, wherein, Performing the inspection process further includes: determining information related to the leakage current between the first sub-pixel and the second sub-pixel based on the quantitative information obtained by the first probe and the second probe. The first sub-pixel includes a first light-emitting element, and the first light-emitting element includes a first anode electrode. The second sub-pixel includes a second light-emitting element, the second light-emitting element includes a second anode electrode, and The inspection process further includes measuring the magnitude of a first current applied to the first light-emitting element and measuring the magnitude of a second current applied to the second light-emitting element.

9. The method according to claim 8, wherein, The quantitative information includes the magnitude of the first current and the magnitude of the second current.

10. The method according to claim 1, wherein, The inspection target display device is configured to emit light in a direction from the second surface to the first surface. The target display device further includes an emitting structure disposed on the first anode electrode and the second anode electrode and oriented in the direction from the second surface toward the first surface. The etching process includes exposing the first contactor and the second contactor without removing the emitter structure. The launching structure has a series structure.

11. An electronic device comprising: The processor is configured to provide input image data; The inspection target display device according to claim 1, wherein the inspection target display device is configured to display an image based on the input image; and The power supply is configured to provide power to the inspection target display device.

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