Power supply transportation network of multi-core particle heterogeneous integrated system

Abstract

The invention discloses a power supply transportation network of a multi-core particle heterogeneous integrated system. The power supply transport network provided by the specification is applied to a multi-core particle heterogeneous integrated system, the power supply transport network is arranged between each core particle and a main power supply of the integrated system, and the power supply transport network comprises a memristor assembly, one end of the memristor assembly is connected with an input end of the power supply transport network, and the other end of the memristor assembly is connected with a switch assembly; the switch assembly is used for controlling the memristor assembly to be switched between a programming mode and a power supply mode; the programming control module is used for adjusting the programming voltage of the memristor component according to the characteristics of a core particle connected with the power supply transportation network in a programming mode, and programming the resistance value of the memristor component to a target resistance value; and the voltage output module is used for converting the input voltage of the input end according to the target resistance value in a power supply mode and then outputting the working voltage of the core particles.

Description

TECHNICAL FIELD

[0001] The present specification relates to the technical field of circuit design, and in particular, to a power delivery network of a multi-chip heterogeneous integrated system. BACKGROUND

[0002] Nowadays, circuit units from different foundries, different process nodes, and even different materials are integrated into a heterogeneous system by using advanced packaging methods, which has the advantages of low design cost, flexible assembly method, rich system integration function, and plug-and-play compared with single-chip integrated systems, and has the advantages of high integration density, high bandwidth, low power consumption, and low delay compared with printed circuit board integrated systems. Therefore, this method of integrating a heterogeneous system by using advanced packaging has become the mainstream technology.

[0003] However, in such a system integrated by packaging using middle and late process processing, the integrated sensing, radio frequency, storage, and logic processing, computing units, etc. circuit modules often come from different preparation processes and have different voltage requirements, resulting in complex and diverse power supply voltage requirements of the system.

[0004] Multiple different voltage domains in the same system will introduce power integrity, parasitic effects, and other problems such as additional noise coupling. At the same time, as the size of the packaging substrate continues to increase, in order to ensure robustness, a thicker core layer needs to be implanted in the interposer, and the increase in thickness also increases the difficulty of achieving sufficient power supply through packaging. For existing chip integrated systems, in order to shorten the power delivery loss, some power handling components such as capacitors, voltage regulators, etc. are often integrated into the interposer, and the uneven voltage distribution of the entire system may cause hot spots to cause reliability and performance degradation problems of the chip.

[0005] Therefore, how to achieve efficient and stable power supply in a system with complex and diverse power supply requirements is a problem to be solved. SUMMARY

[0006] The present specification provides a power delivery network of a multi-chip heterogeneous integrated system to at least partially solve the above problems existing in the prior art.

[0007] The present specification adopts the following technical solutions:

[0008] The present specification provides a power delivery network, which is applied to a multi-chip heterogeneous integrated system, and is arranged between each chip and a total power supply of the integrated system, and includes:

[0009] a memristor component, one end of the memristor component being connected with an input end of the power delivery network, and the other end being connected with a switch component;

[0010] a switch assembly for controlling switching of the memristor assembly between a programming mode or a power supply mode;

[0011] a programming control module for adjusting a programming voltage of the memristor assembly according to a core feature connected to the power delivery network in the programming mode, and programming a resistance value of the memristor assembly to a target resistance value;

[0012] a voltage output module for converting the input voltage of the input terminal and stably outputting an operating voltage of the core according to the target resistance value in the power supply mode.

[0013] Optionally, the memristor assembly comprises a plurality of parallel memristors.

[0014] Optionally, the programming control module comprises:

[0015] a field effect transistor, one end of a source and a drain of the field effect transistor being connected to the memristor assembly, the other end being connected to a bias voltage, and a gate being connected to a control voltage, for programming the resistance of the memristor assembly to the target resistance value by the bias voltage and the control voltage.

[0016] Optionally, the voltage output module comprises:

[0017] a voltage dividing resistor, one end of the voltage dividing resistor being connected to the memristor assembly, the other end being grounded, for adjusting an input voltage of the memristor assembly with a comparator;

[0018] a comparator, one input terminal of the comparator being connected to the voltage dividing resistor to receive the input voltage, the other input terminal being connected to an output terminal of the power delivery network to receive a reference voltage, and an output terminal of the comparator being connected to the control switch, the comparator being configured to switch the control switch between the closed state and the open state according to the input voltage and the reference voltage;

[0019] an output capacitor, one end of the output capacitor being connected to the output terminal of the power delivery network, the other end being grounded, for switching between a charging state and a discharging state according to the closed state and the open state of the control switch.

[0020] Optionally, the voltage output module further comprises:

[0021] an output inductor, one end of the output inductor being connected to the output capacitor and the output terminal of the power delivery network, the other end being connected to an output diode;

[0022] an output diode, one end of the output diode being connected to the output inductor and the output terminal of the comparator, the other end being connected to the output capacitor and grounded.

[0023] Optionally, the voltage output module is specifically used for:

[0024] When the input voltage received by the comparator is greater than the reference voltage, the control switch is closed, and the total power accessed from the input end of the power transmission network charges the output capacitor through the control switch;

[0025] When the input voltage received by the comparator is not greater than the reference voltage, the control switch is opened, and the output capacitor discharges to the output end of the power transmission network.

[0026] Optionally, the voltage output module comprises:

[0027] A voltage dividing resistor, one end of which is connected with the memristor assembly and the other end of which is grounded, for adjusting the input voltage of the comparator with the memristor assembly;

[0028] A comparator, one input end of which is connected with the voltage dividing resistor to receive the input voltage, and the other input end of which is connected with an external voltage source to receive the reference voltage, and an output end of which is connected with the control switch, the comparator being used for switching the closing and opening of the control switch according to the input voltage and the reference voltage;

[0029] An output capacitor, one end of which is connected with the output end of the power transmission network and the other end of which is grounded, for switching the charging state and the discharging state according to the closing state and the opening state of the control switch.

[0030] Optionally, the voltage output module is specifically used for:

[0031] When the input voltage received by the comparator is not greater than the reference voltage, the control switch is closed, and the total power accessed from the input end of the power transmission network charges the output capacitor through the control switch;

[0032] When the input voltage received by the comparator is greater than the reference voltage, the control switch is opened, and the total power is cut off to supply power to the output capacitor.

[0033] Optionally, a plurality of power transmission networks are cascaded between each core particle and the total power source, wherein the input end of the first power transmission network is connected with the total power source, and the output end of the last power transmission network is connected with the core particle.

[0034] Optionally, the programming voltage of the memristor assembly is adjusted according to the characteristics of the core particle connected with the power transmission network, and the resistance value of the memristor assembly is programmed to a target resistance value, specifically comprising:

[0035] For each power transport network, determine the parameter information of the core particle connected by the power transport network, and the resistance value of the voltage dividing resistor included in the power transport network;

[0036] Input the parameter information and the resistance value into a pre-trained neural network model to obtain a control voltage output by the neural network model;

[0037] The resistance value of the memristor assembly is programmed to a target resistance value using the control voltage.

[0038] The above at least one technical solution adopted by the present specification can achieve the following beneficial effects:

[0039] The power transport network provided in the present specification is applied to a multi-core particle heterogeneous integrated system, the power transport network is arranged between each core particle and a total power supply of the integrated system, and includes: a memristor assembly, one end of the memristor assembly is connected with an input end of the power transport network, and the other end is connected with a switch assembly; the switch assembly is used for controlling the memristor assembly to switch between a programming mode and a power supply mode; a programming control module is used for adjusting a programming voltage of the memristor assembly according to a core particle characteristic connected by the power transport network in the programming mode, and programming a resistance value of the memristor assembly to a target resistance value; and a voltage output module is used for converting an input voltage of the input end according to the target resistance value in the power supply mode, and stably outputting a working voltage of the core particle.

[0040] The present specification provides a power transport network for realizing voltage conversion through a memristor assembly. When the power transport network provided in the present specification is adopted, the configuration of the power transport network can be programmed and refreshed by adjusting the resistance value of the memristor assembly, so as to adapt to the diverse and flexible power voltage requirements of different functional modules in a multi-core particle integrated system. Meanwhile, the programmable and refreshed memristor assembly is used as a configuration unit of key parameters of a power management module, and the parameter drift caused by temperature and long-term use can be effectively eliminated by reprogramming the memristor assembly, thereby providing technical support for long-term stable work of the integrated system. BRIEF DESCRIPTION OF DRAWINGS

[0041] The drawings described herein are used to provide further understanding of the present specification, constitute a part of the present specification, and the illustrative embodiments of the present specification and the description thereof are used to explain the present specification, and do not constitute an improper limitation on the present specification. In the drawings:

[0042] Figure 1 A framework schematic diagram of a power transport network provided in the present specification in a multi-core particle heterogeneous integrated system;

[0043] Figure 2A structural diagram of a power delivery network provided in the present specification;

[0044] Figure 3 A structural diagram of a power delivery network provided in the present specification;

[0045] Figure 4 A structural diagram of a power delivery network provided in the present specification including an output inductor and an output diode;

[0046] Figure 5 A structural diagram of a power delivery network provided in the present specification with overload / short circuit protection;

[0047] Figure 6 A diagram of a plurality of power delivery networks in series provided in the present specification;

[0048] Figure 7 A system framework diagram of a core particle integrated system for intelligent power management provided in the present specification;

[0049] Figure 8 A diagram of a memristor component array in a writing state provided in the present specification;

[0050] Figure 9 A three-dimensional stacked structural diagram of a power delivery network provided in the present specification. DETAILED DESCRIPTION

[0051] For the purpose, technical solutions and advantages of the present specification to be clearer, the technical solutions of the present specification will be described clearly and completely below in combination with specific embodiments of the present specification and corresponding drawings. Obviously, the described embodiments are only some of the embodiments of the present specification, but not all the embodiments. Based on the embodiments in the present specification, all other embodiments obtained by those of ordinary skill in the art without any creative work, fall within the scope of the present application.

[0052] The technical solutions provided by the embodiments of the present specification will be described in detail below in combination with the drawings.

[0053] Figure 1 A framework diagram of a power delivery network in a multi-core heterogeneous integrated system provided in the present specification, as shown in Figure 1 A power delivery network is arranged between the total power supply of the multi-core heterogeneous integrated system and each core particle, wherein V dd_in represents the voltage inputted by the input end of the power delivery network, which is usually the voltage outputted by the total power supply of the system, V dd_outi represents the voltage outputted by the i-th power delivery network, which is outputted as the working voltage to the core particle connected with the power delivery network.

[0054] The total power supply voltage is converted by the programmable power delivery network to provide the working voltage for different cores in the heterogeneous integrated system. The memristor is used as the core component for voltage conversion in the power delivery network. The input voltage from the total power supply is converted to the desired output voltage by programming the resistance value of the memristor.

[0055] Figure 2 A schematic diagram of a power delivery network is provided in the present specification. The power delivery network is applied to a multi-core heterogeneous integrated system. The power delivery network is arranged between each core and the total power supply of the integrated system. The power delivery network comprises:

[0056] A memristor component, one end of which is connected to the input end of the power delivery network, and the other end of which is connected to a switch component;

[0057] A switch component for controlling the switching of the memristor component between the programming mode and the power supply mode;

[0058] A programming control module for adjusting the programming voltage of the memristor component in the programming mode according to the characteristics of the core connected to the power delivery network, and programming the resistance value of the memristor component to a target resistance value;

[0059] A voltage output module for converting the input voltage of the input end and outputting the working voltage of the core in the power supply mode according to the target resistance value.

[0060] Figure 2 A schematic diagram of a programmable power delivery network designed in the present application is shown in Figure 2 The power delivery network can work in two states of programming mode and power supply mode under the control of the switch component t r1 . When the switch component t r1 is dialled to the programming control module, the power delivery network works in the programming mode. At this time, the memristor component M works in the write resistance state. The programming control module applies a programming voltage to the memristor component M. The resistance value of the memristor component M is programmed to a target resistance value under the action of the programming voltage. When the switch component t r1 is dialled to the voltage output module, the power delivery network works in the power supply mode. At this time, the memristor component M works in the read resistance state. The voltage input from the total power supply is converted to the working voltage of the core by the voltage division of the memristor component M. The working voltage of the core is output to the core by the voltage output module.

[0061] The function of the power transport network is to convert the mismatched voltage from the main power supply output to a matching operating voltage for the chip, and to stabilize the output operating voltage within a suitable range by adjusting the resistance value M of the memristor component. Furthermore, the power transport network positioned before different chips can be programmed with different target resistance values ​​for the memristor components, enabling the provision of different operating voltages to different chips within the same system.

[0062] Additionally, the memristor component M can be composed of a single memristor or multiple memristors connected in parallel, depending on the specific needs of different scenarios. This manual does not impose any specific restrictions on this.

[0063] In one specific embodiment, the programming control module in the power transport network provided in this specification can be implemented using a field-effect transistor (FET). Specifically, the programming control module includes a FET, with one end of the FET's source and drain connected to the memristor assembly, the other end connected to a bias voltage, and the gate connected to a control voltage, used to program the resistance of the memristor assembly to a target resistance value using the bias voltage and the control voltage.

[0064] Figure 3 This is a schematic diagram illustrating the specific structure of a power transport network provided in this specification. Figure 3 As shown, a field-effect transistor (FET) is used as the programming control module, and the gate of the FET is connected to a control voltage V. ctr One end of the source and drain is connected to the memristor component M, and the other end is connected to the bias voltage V. b In this embodiment, the programming voltage may include a control voltage V. ctr With bias voltage V b In the switch component t r1 In programming mode with the programming control module connected, the control voltage V applied to the memristor component M is adjusted. ctr With bias voltage V b It can adjust the resistance value of the memristor component M.

[0065] In one specific embodiment, a voltage output module can be constructed using voltage divider resistors, a comparator, an output capacitor, and a control switch. Specifically, the voltage output module includes a voltage divider resistor, one end of which is connected to the memristor assembly, and the other end is grounded, used to adjust the input voltage of the comparator with the memristor assembly; a comparator, one input terminal of which is connected to the voltage divider resistor to receive the input voltage, and the other input terminal of which is connected to the output terminal of the power transport network to receive a reference voltage, and the output terminal of which is connected to the control switch, used to switch the control switch between closed and open states based on the input voltage and the reference voltage; and an output capacitor, one end of which is connected to the output terminal of the power transport network, and the other end is grounded, used to switch between charging and discharging states based on the closed and open states of the control switch.

[0066] like Figure 3 As shown, in power supply mode, t r1 Switch to the voltage divider resistor R. The voltage divider resistor R and the memristor component M divide the voltage, resulting in the input voltage V that is input to one end of the comparator Comp. in The voltage input to the other end of comparator Comp is a reference voltage, which in this embodiment is the output voltage of the power transport network. By comparing the input voltage with the reference voltage, the comparator can obtain different outputs under different conditions, which are used to control the control switch t connected to it. ctr .

[0067] When the control switch t ctr In a closed state (in) Figure 3 When not manifested in the middle, but can be manifested as horizontal placement, with left and right sides connected, V dd_in To the output capacitor C out Power supply, output capacitor C out At this time, it is in a charging state, and the voltage at its terminals will continuously increase. When the control switch t... ctr In the disconnected state (e.g.) Figure 3 When shown), the output capacitor C out In the discharge state, through V dd_out Power is supplied to the core.

[0068] Furthermore, in one specific embodiment, the structure of the output capacitor section in the above embodiment can be optimized by increasing the output inductor and output diode to improve circuit stability. Specifically, the voltage output module further includes an output inductor, one end of which is connected to the output capacitor and the output terminal of the power transport network, and the other end is connected to the output diode; and an output diode, one end of which is connected to the output inductor and the output terminal of the comparator, and the other end of which is connected to the output capacitor and grounded.

[0069] Figure 4 This specification provides a schematic diagram of a power supply network structure that incorporates an output inductor and an output diode. Figure 4 As shown, an additional capacitor C is added to the output line of the power supply network. out The output inductor L is connected, and in C out A diode D, connected to both the output inductor L and the output diode D, is added between the unconnected ends of L and C. The rest of the power supply network remains unchanged, allowing for increased circuit stability while further enhancing the control of the output inductor L, output diode D, and output capacitor C. out The charging and discharging time of the combined unit adjusts the output voltage V. dd_out Size.

[0070] In the above Figure 3 , Figure 4 In the specific embodiments shown, the control switch can be switched between closed and open via the comparator output, and the control method is the same in both embodiments. Specifically, when the input voltage received by the comparator is greater than the reference voltage, the control switch is closed, and the total power supply from the input terminal of the power transport network charges the output capacitor through the control switch; when the input voltage received by the comparator is not greater than the reference voltage, the control switch is open, and the output capacitor discharges to the output terminal of the power transport network.

[0071] A comparator changes its output voltage based on the relative magnitudes of the voltages received at its two input terminals. When the voltage at the non-inverting input is greater than the voltage at the inverting input, the comparator outputs a high level; otherwise, it outputs a low level. Based on this, a control switch can be configured to operate in different states depending on the received voltage. For example... Figure 3 or Figure 4 In the specific embodiment shown, the non-inverting input of the comparator receives a reference voltage V. ref That is, V dd_out The inverting input terminal receives the input voltage V. in When V in Greater than V ref When the control switch is closed, the main power supply is supplied to the output capacitor C. out Charging; when V in Not greater than V ref When the control switch is off, the output capacitor C... out Discharge to the output of the power supply network. The above embodiment illustrates the case where the control switch closes when receiving a low level and opens when receiving a high level. In practical applications, the control switch can also be reversed to close when receiving a high level and open when receiving a low level, and the inputs of the two input terminals of the comparator can be interchanged. This specification does not impose specific limitations on this.

[0072] Additionally, in Figure 3 , Figure 4 In the specific embodiment shown in FIG. 8, switch t r2 is an optional component, which is open in the programming mode and closed in the power supply mode, for preventing the power supply line from being connected due to misoperation in the programming mode, thus preventing false power supply.

[0073] In a specific embodiment, in view of the overload and short circuit conditions that may occur during the operation of the circuit, overload / short circuit protection of the power supply transmission network can be achieved by setting the reference voltage as an external voltage. Specifically, the voltage output module comprises a voltage dividing resistor, one end of which is connected to the memristor assembly and the other end of which is grounded, for adjusting the input voltage of the comparator with the memristor assembly; a comparator, one input end of which is connected to the voltage dividing resistor to receive the input voltage and the other input end of which is connected to an external voltage source to receive the reference voltage, the output end of the comparator being connected to the control switch, the comparator being configured to switch the control switch between closed and open states according to the input voltage and the reference voltage; and an output capacitor, one end of which is connected to the output end of the power supply transmission network and the other end of which is grounded, for switching between charging and discharging states according to the closed state and the open state of the control switch.

[0074] Figure 5 A structural diagram of a power supply transmission network with overload / short circuit protection is provided in the present specification. As shown in FIG. 9, compared with the embodiments shown in FIGS. 6-8, in this specific embodiment, the reference voltage of the comparator is changed to an external voltage source, and the structures and working principles of the other parts are the same as those of the embodiments shown in FIGS. 6-8. Figure 5 Figure 3 or Figure 4 Figure 3 , Figure 4

[0075] In this specific embodiment, the control switch is configured to be closed when receiving a high level and to be open when receiving a low level. At this time, when the input voltage received by the comparator is not greater than the reference voltage, the control switch is closed, and the total power supply connected to the input end of the power supply transmission network charges the output capacitor through the control switch; when the input voltage received by the comparator is greater than the reference voltage, the control switch is open, and the power supply of the total power supply to the output capacitor is cut off.

[0076] In the structure of the above specific embodiment, when the input voltage V in generated by the current flowing through the memristor assembly is greater than the set reference V ref , the comparator will prompt the switch t ctr ​​​Disconnecting the power supply achieves a protection effect. Different overload protection thresholds can be set for different chip modules by adjusting the resistance value of the memristor component and the output of the external voltage source.

[0077] Typically, the adjustable resistance of a single memristor ranges from several hundred ohms to megaohms. In practice, multiple memristors can be connected in parallel to enhance the precision of resistance adjustment and further improve the dynamic range of resistance changes. Due to the adjustable resistance of the memristor, the resistance value R and the output capacitor Cout can be optimized according to the chip area and fabrication process requirements. During use, the resistance value of the memristor can be adjusted according to the power supply needs of different chips in the system to stabilize the output voltage within the required range.

[0078] Furthermore, for memristors, in readout mode, excessively high voltage will alter their resistance. Therefore, when the power supply network operates in supply mode, the voltage difference V across the memristor component M... dd_in -V in A voltage lower than the threshold voltage required to change the state of the memristor's resistance is needed. For cases where the voltage output by the total power supply differs significantly from the operating voltage required by the chip, a multi-stage conversion method can be used to progressively convert the total power supply output voltage to the required operating voltage. Specifically, multiple power transport networks are cascaded between each chip and the total power supply, wherein the input of the first power transport network is connected to the total power supply, and the output of the last power transport network is connected to the chip.

[0079] Figure 6 This is a schematic diagram of a series-connected power transport network provided in this specification. Figure 6 As shown, in this embodiment, multiple power transport networks are connected in series between the main power supply and the chip. The input terminal of the first power transport network is connected to the main power supply, and the output terminal of the last power transport network is connected to the chip. The other power transport networks are connected end-to-end, meaning the output terminal of one power transport network is connected to the input terminal of the next power transport network. Thus, by connecting multiple power transport networks layer by layer, the output voltage of the main power supply can be progressively converted to the required operating voltage.

[0080] The power transport network provided in this application replaces the power management input programming module, which consists of a one-time programmable circuit (e.g., a fusible wire or EPROM) and a digital-to-analog converter (DAC), in traditional DC-DC converter circuits with a memristor component. This not only simplifies the circuit structure but also allows for intelligent design of the power management module by leveraging the programmable and storage characteristics of memristors, as well as their high compatibility with artificial neural network hardware acceleration modules.

[0081] The memristor is a device with simple structure, high integration and natural programmable neuro-morphic device. Therefore, the integrated memristor is a key unit of the voltage output module, which can introduce an artificial neural network optimization in the power delivery network, and perform intelligent power management design under the constraints of system peak power consumption, standby power consumption and heat dissipation.

[0082] Figure 7 A system framework diagram of an intelligent power management core particle integrated system is provided for the present specification. As shown in Figure 7 The last stage of the power delivery network in the integrated system or in front of the core particle in different voltage domains can avoid sharing the power rail between the core particles, thereby reducing the noise coupling in the power delivery, and can also improve the accuracy of the power delivery through the last voltage fine-tuning and reduce the power delivery loss.

[0083] At the same time, the power delivery network provided by the present application also aims to propose a hardware system implementation scheme capable of supporting artificial neural network algorithm optimization. Specifically, for each power delivery network, the parameter information of the core particle connected by the power delivery network and the resistance value of the voltage dividing resistor included in the power delivery network are determined; the parameter information and the resistance value are input into a pre-trained neural network model to obtain a control voltage output by the neural network model; and the control voltage is used to program the resistance value of the memristor component to a target resistance value. The specific neural network architecture and algorithm arrangement will be selected and designed according to the parameters to be optimized and the system integration scale.

[0084] Figure 8 A schematic diagram of a memristor component array in a write state is provided for the present specification. As shown in Figure 8 The different power delivery networks can share the same voltage of the total power input and the same bias voltage. According to the different working voltages required by the connected core particles, different control voltages are applied to the gates of the field effect tubes in different power delivery networks, so that different core particles can be supplied with different voltages. This hardware design supports mapping and deploying the neural network parameters trained by software to the memristors of the power delivery network, dynamically adjusting and updating the entire power supply network to adapt to the plug-and-play and rapid iteration and update requirements of the heterogeneous core particle integrated system.

[0085] The passive devices such as memristors, resistors and capacitors can be processed after the transistor-level logic circuit processing in the CMOS foundry, and then processed and prepared by the middle and late process. In this way, three-dimensional stacking design of the power delivery network can also be realized. Figure 9 A three-dimensional stacking schematic diagram of a power delivery network is provided for the present specification. As shown in Figure 9As shown, the reduction module area reduces the loss of power supply voltage transport. In addition, since the memristor has a resistance programmable characteristic, the resistance of the voltage dividing resistor R and the capacitance error of the output capacitor C out of the memristor can be calibrated by programming the resistance of the memristor later.

[0086] The present specification provides a power supply transport network for voltage conversion by a memristor assembly. When the power supply transport network provided by the present specification is used, the configuration of the power supply transport network can be programmed and refreshed by adjusting the resistance of the memristor assembly, so as to adapt to the diverse and flexible power supply voltage requirements of different functional modules in a multi-core integrated system. At the same time, the programmable and refreshed memristor assembly is used as a configuration unit of the key parameters of the power management module, and the parameter drift caused by temperature and long-term use can be effectively eliminated by reprogramming the memristor assembly, thereby providing technical support for long-term stable operation of the integrated system.

[0087] Those skilled in the art will appreciate that embodiments of the present application can be provided as methods, systems, or computer program products. Therefore, the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.

[0088] The present application is described with reference to flowcharts and / or block diagrams according to the methods, devices (systems), and computer program products of the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, as well as combinations of flows and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing apparatus to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing apparatus produce a device that implements the functions specified in the flowcharts and / or block diagrams. Figure 1 The functions specified in one or more flows or one or more blocks in the flowcharts and / or block diagrams. Figure 1 The functions specified in one or more flows or one or more blocks in the flowcharts and / or block diagrams.

[0089] It is also to be noted that the terms "comprising", "including", and "having" or variations thereof herein, are intended to be open-ended terms that specify the presence of the stated elements but do not preclude the presence of additional elements. It is also to be noted that the term "consisting of" is intended to be a closed term that specifies the presence of only the stated elements. The term "comprising" is used herein to include the presence of one or more elements that are not specifically named.

[0090] It will be appreciated by those skilled in the art that the embodiments of the present specification can be provided as methods, systems or computer program products. Accordingly, the present specification can be embodied in the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present specification can be in the form of a computer program product on one or more computer available storage media (including, but not limited to, magnetic disks, CD-ROMs, optical storage media, and the like) embodying computer readable program code.

[0091] The present specification can be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. The present specification can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules can be located in both local and remote computer storage media including memory storage devices.

[0092] The various embodiments described in the specification can be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. The present specification can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules can be located in both local and remote computer storage media including memory storage devices.

[0093] The above description is only the preferred embodiment of the present specification, and is not intended to limit the present specification. The present specification can have various changes and modifications for those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present specification shall be included in the scope of the claims of the present application.

Claims

1. A power transport network, characterized in that, The power transport network is applied to a multi-core particle heterogeneous integrated system, and is arranged between each core particle and a total power supply of the integrated system, and comprises: a memristor component, one end of the memristor component being connected with an input end of the power transport network, and the other end being connected with a switch component; the switch component is used for controlling the memristor component to switch between a programming mode and a power supply mode; a programming control module is used for, in the programming mode, adjusting a programming voltage of the memristor component according to characteristics of the core particle connected with the power transport network, and programming a resistance value of the memristor component to a target resistance value; a voltage output module is used for, in the power supply mode, converting an input voltage of the input end according to the target resistance value, and outputting a working voltage of the core particle.

2. The power transport network of claim 1, wherein, The memristor component comprises a plurality of parallel memristors.

3. The power transport network of claim 1, wherein, The programming control module comprises: a field effect tube, one end of a source and a drain of the field effect tube being connected with the memristor component, the other end being connected with a bias voltage, and a gate being connected with a control voltage, which is used for programming the resistance of the memristor component to the target resistance value through the bias voltage and the control voltage.

4. The power transport network of claim 1, wherein, The voltage output module comprises: a voltage dividing resistor, one end of the voltage dividing resistor being connected with the memristor component, and the other end being grounded, which is used for adjusting an input voltage of a comparator with the memristor component; the comparator, one input end of the comparator being connected with the voltage dividing resistor to receive the input voltage, and the other input end being connected with an output end of the power transport network to receive a reference voltage, an output end of the comparator being connected with the control switch, and the comparator being used for switching the control switch between closing and opening according to the input voltage and the reference voltage; an output capacitor, one end of the output capacitor being connected with the output end of the power transport network, and the other end being grounded, which is used for switching a charging state and a discharging state according to the closing state and the opening state of the control switch.

5. The power transport network of claim 4, wherein, The voltage output module further comprises: an output inductor, one end of the output inductor being connected with the output capacitor and the output end of the power transport network, and the other end being connected with an output diode; the output diode, one end of the output diode being connected with the output inductor and the output end of the comparator, and the other end being connected with the output capacitor and grounded.

6. The power transportation network of claim 4 or 5, wherein, The voltage output module is specifically used for: when the input voltage received by the comparator is greater than the reference voltage, the control switch is closed, and a total power supply connected with the input end of the power transport network charges the output capacitor through the control switch; when the input voltage received by the comparator is not greater than the reference voltage, the control switch is opened, and the output capacitor discharges to the output end of the power transport network.

7. The power transport network of claim 1, wherein, The voltage output module comprises: a voltage dividing resistor, one end of the voltage dividing resistor being connected with the memristor component, and the other end being grounded, which is used for adjusting an input voltage of a comparator with the memristor component; a comparator, one input of the comparator is connected with the voltage dividing resistor and receives the input voltage, another input of the comparator is connected with an external voltage source and receives a reference voltage, an output of the comparator is connected with the control switch, and the comparator is configured to switch the control switch between the closed state and the open state according to the input voltage and the reference voltage; an output capacitor, one end of the output capacitor is connected with the output of the power transport network, and the other end of the output capacitor is grounded, and the output capacitor is configured to switch between the charging state and the discharging state according to the closed state and the open state of the control switch.

8. The power transport network of claim 7, wherein, The voltage output module is specifically configured to: when the input voltage received by the comparator is not greater than the reference voltage, the control switch is closed, and the total power supply connected with the input of the power transport network charges the output capacitor through the control switch; when the input voltage received by the comparator is greater than the reference voltage, the control switch is opened, and the total power supply is cut off to supply power to the output capacitor.

9. The power transport network of claim 1, wherein, a plurality of power transport networks are cascaded between each core particle and the total power supply, wherein the input of the first power transport network is connected with the total power supply, and the output of the last power transport network is connected with the core particle.

10. The power transport network of claim 1, wherein, According to the characteristics of the core particle connected with the power transport network, the programming voltage of the memristor assembly is adjusted, and the resistance value of the memristor assembly is programmed to a target resistance value, specifically including: for each power transport network, determining the parameter information of the core particle connected with the power transport network and the resistance value of the voltage dividing resistor included in the power transport network; inputting the parameter information and the resistance value into a pre-trained neural network model to obtain a programming voltage output by the neural network model; using the programming voltage to program the resistance value of the memristor assembly to a target resistance value.

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